Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
31 | Vashist Bist, Bhim Singh 0001 |
An Adjustable-Speed PFC Bridgeless Buck-Boost Converter-Fed BLDC Motor Drive. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Ind. Electron. ![In: IEEE Trans. Ind. Electron. 61(6), pp. 2665-2677, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
31 | Vashist Bist, Bhim Singh 0001 |
A PFC-Based BLDC Motor Drive Using a Canonical Switching Cell Converter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Ind. Informatics ![In: IEEE Trans. Ind. Informatics 10(2), pp. 1207-1215, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
31 | Vashist Bist, Bhim Singh 0001 |
A Brushless DC Motor Drive With Power Factor Correction Using Isolated Zeta Converter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Ind. Informatics ![In: IEEE Trans. Ind. Informatics 10(4), pp. 2064-2072, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
31 | Ankur Singh Bist |
Detection of metamorphic viruses: A survey. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICACCI ![In: 2014 International Conference on Advances in Computing, Communications and Informatics, ICACCI 2014, Delhi, India, September 24-27, 2014, pp. 1559-1565, 2014, IEEE, 978-1-4799-3078-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
31 | Gary Bist |
Business process management (BPM) in a day. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASCON ![In: Proceedings of 24th Annual International Conference on Computer Science and Software Engineering, CASCON 2014, Markham, Ontario, Canada, 3-5 November, 2014, pp. 290-291, 2014, IBM / ACM. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP BibTeX RDF |
|
31 | Bhim Singh 0001, Vashist Bist |
A PFC based BLDC motor drive using a Bridgeless Zeta converter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IECON ![In: IECON 2013 - 39th Annual Conference of the IEEE Industrial Electronics Society, Vienna, Austria, November 10-13, 2013, pp. 2553-2558, 2013, IEEE, 978-1-4799-0224-8. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
31 | Peter Ash, Anju Bist, Dan Sullivan, Smitha Chandran, Nikhil K. Kothurkar |
Rehabilitating former landfill sites: A case study in habitat restoration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GHTC ![In: 2013 IEEE Global Humanitarian Technology Conference, GHTC 2013, San Jose, CA, USA, October 20-23, 2013, pp. 452-456, 2013, IEEE, 978-1-4799-2402-8. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
31 | Shikha Singh 0008, Bhim Singh 0001, G. Bhuvaneswari, Vashist Bist, Ambrish Chandra, Kamal Al-Haddad |
Power quality improved bridgeless converter based multiple output SMPS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IAS ![In: 2013 IEEE Industry Applications Society Annual Meeting, Lake Buena Vista, FL, USA, October 6-11, 2013, pp. 1-8, 2013, IEEE, 978-1-4673-5202-4. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
31 | Bhim Singh 0001, Vashist Bist, Ambrish Chandra, Kamal Al-Haddad |
Power quality improvement in PFC Bridgeless-Luo converter fed BLDC motor drive. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IAS ![In: 2013 IEEE Industry Applications Society Annual Meeting, Lake Buena Vista, FL, USA, October 6-11, 2013, pp. 1-8, 2013, IEEE, 978-1-4673-5202-4. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
31 | Rashmi Sachan, Shahid Ali, Chandan Bist, Sunil Misra, Vinod Menezes, Sharad Gupta, Pat Bosshart |
A 40nm 650Mhz 0.5fJ/Bit/Search TCAM Compiler Using Complementary Bit-cell Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, Pune, India, January 5-10, 2013, pp. 55-59, 2013, IEEE Computer Society, 978-1-4673-4639-9. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
31 | Gary Bist, Kenneth K. Cheung |
Business process management (BPM) in a day. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASCON ![In: Center for Advanced Studies on Collaborative Research, CASCON '13, Toronto, ON, Canada, November 18-20, 2013, pp. 355-356, 2013, IBM / ACM. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP BibTeX RDF |
|
31 | Gary Bist |
Business process management (BPM) in a day. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASCON ![In: Center for Advanced Studies on Collaborative Research, CASCON '12, Toronto, ON, Canada, November 5-7, 2012, pp. 246-247, 2012, IBM / ACM. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP BibTeX RDF |
|
31 | Gary Bist |
Business process management (BPM) in a day. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASCON ![In: Proceedings of the 2010 conference of the Centre for Advanced Studies on Collaborative Research, November 1-4, 2010, Toronto, Ontario, Canada, pp. 363, 2010, ACM. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
31 | Gary Bist |
Service Oriented Architecture (SOA) in a day. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASCON ![In: Proceedings of the 2009 conference of the Centre for Advanced Studies on Collaborative Research, November 2-5, 2009, Toronto, Ontario, Canada, pp. 338, 2009, ACM. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
31 | Neil J. Bershad, Anurag Bist |
Fast coupled adaptation for sparse impulse responses using a partial haar transform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Signal Process. ![In: IEEE Trans. Signal Process. 53(3), pp. 966-976, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
31 | Neil J. Bershad, Anurag Bist |
Fast coupled adaptation for sparse channels using a partial Haar transform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICASSP (2) ![In: 2004 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2004, Montreal, Quebec, Canada, May 17-21, 2004, pp. 841-844, 2004, IEEE, 0-7803-8484-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
31 | Gary Bist, Neil MacKinnon, Steve Murphy |
Sequence diagram presentation in technical documentation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGDOC ![In: Proceedings of the 22nd Annual International Conference on Design of Communication: The Engineering of Quality Documentation, SIGDOC 2004, Memphis, Tennessee, USA, October 10-13, 2004, pp. 128-133, 2004, ACM, 1-58113-809-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
visualization, unified modeling language, human factors, documentation, guidelines, user testing, graphic design, sequence diagrams, UML diagrams |
31 | Anurag Bist, Parthasarathy Sriram |
Adaptive Quantization for Low Bit Rate Video Coding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP (3) ![In: Proceedings of the 1998 IEEE International Conference on Image Processing, ICIP-98, Chicago, Illinois, USA, October 4-7, 1998, pp. 925-928, 1998, IEEE Computer Society, 0-8186-8821-1. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP BibTeX RDF |
|
31 | Anurag Bist, Parthasarathy Sriram |
Constrained trellis based rate control scheme for low bit rate video coding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIP (2) ![In: Proceedings 1996 International Conference on Image Processing, Lausanne, Switzerland, September 16-19, 1996, pp. 61-64, 1996, IEEE Computer Society, 0-7803-3259-8. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
31 | Anurag Bist |
An approximate analysis of sigma-delta modulation of a Gauss-Markov process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICASSP ![In: 1995 International Conference on Acoustics, Speech, and Signal Processing, ICASSP '95, Detroit, Michigan, USA, May 08-12, 1995, pp. 881-884, 1995, IEEE Computer Society, 0-7803-2431-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
31 | Kenneth Zeger, Anurag Bist, Tamás Linder |
Universal source coding with codebook transmission. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Commun. ![In: IEEE Trans. Commun. 42(234), pp. 336-346, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
31 | A. Bist |
Differential State Quantization of High Order Gauss Markov Process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Data Compression Conference ![In: Proceedings of the IEEE Data Compression Conference, DCC 1994, Snowbird, Utah, USA, March 29-31, 1994., pp. 62-71, 1994, IEEE Computer Society, 0-8186-5637-9. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
31 | Anurag Bist, Arnaud E. Jacquin, Christine Podilchuk |
Encoding of the chrominance signals in 3D subband-based video coding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICASSP (5) ![In: IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP '93, Minneapolis, Minnesota, USA, April 27-30, 1993, pp. 329-332, 1993, IEEE Computer Society, 0-7803-7402-9. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
31 | Kenneth Zeger, Anurag Bist |
Universal adaptive vector quantization using codebook quantization with application to image compression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICASSP ![In: 1992 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP '92, San Francisco, California, USA, March 23-26, 1992, pp. 381-384, 1992, IEEE Computer Society, 0-7803-0532-9. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
31 | Diogo José Costa Alves, Edna Barros |
A logic built-in self-test architecture that reuses manufacturing compressed scan test patterns. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, SBCCI 2009, Natal, Brazil, August 31 - September 3, 2009, 2009, ACM, 978-1-60558-705-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
LBIST, compressed test patterns, test, SoC, self-test |
31 | Mohammad Tehranipoor, Reza M. Rad |
Built-In Self-Test and Recovery Procedures for Molecular Electronics-Based Nanofabrics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(5), pp. 943-958, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
31 | Kim Petersén, Johnny Öberg |
Toward a scalable test methodology for 2D-mesh Network-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 367-372, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
31 | Amit Laknaur, Sai Raghuram Durbha, Haibo Wang 0005 |
Built-In-Self-Testing Techniques for Programmable Capacitor Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 22(4-6), pp. 449-462, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
programmable capacitor array, built-in-self-testing, analog testing, field programmable analog array |
31 | Mohammad Tehranipoor, Reza M. Rad |
Test and recovery for fine-grained nanoscale architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 14th International Symposium on Field Programmable Gate Arrays, FPGA 2006, Monterey, California, USA, February 22-24, 2006, pp. 226, 2006, ACM, 1-59593-292-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
31 | Murari Kejariwal, Prasad Ammisetti, John Melanson |
Built-in self-test mode in a multi-path feedforward compensated operational amplifier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
31 | Ioannis Voyiatzis, Antonis M. Paschalis, Dimitris Gizopoulos, Nektarios Kranitis, Constantin Halatsis |
A concurrent built-in self-test architecture based on a self-testing RAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Reliab. ![In: IEEE Trans. Reliab. 54(1), pp. 69-78, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
31 | Dayu Yang, Foster F. Dai, Charles E. Stroud |
Built-in self-test for automatic analog frequency response measurement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 2208-2211, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
31 | Shyue-Kung Lu, Chien-Hung Yeh, Han-Wen Lin |
Efficient Built-in Self-Test Techniques for Memory-Based FFT Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PRDC ![In: 10th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2004), 3-5 March 2004, Papeete, Tahiti, pp. 321-326, 2004, IEEE Computer Society, 0-7695-2076-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
31 | Mike W. T. Wong, K. Y. Ko, Yim-Shu Lee |
Analog and Mixed-Signal IP Cores Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 1st IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2002), 29-31 January 2002, Christchurch, New Zealand, pp. 3-7, 2002, IEEE Computer Society, 0-7695-1453-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
mixed-signal design, analog circuit testing, SOCs |
31 | Kuo-Liang Cheng, Chia-Ming Hsueh, Jing-Reng Huang, Jen-Chieh Yeh, Chih-Tsun Huang, Cheng-Wen Wu |
Automatic Generation of Memory Built-in Self-Test Cores for System-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan, pp. 91-96, 2001, IEEE Computer Society, 0-7695-1378-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
31 | Sandeep Koranne, Tom Waayers, Robert Beurze, Clemens Wouters, Sunil Kumar, G. S. Visweswara |
A P1500 Compliant Programable BistShell for Embedded Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTDT ![In: 9th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2001), 6-7 August 2001, San Jose, CA, USA, pp. 21-28, 2001, IEEE Computer Society, 0-7695-1242-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
31 | Kun-Han Tsai, Janusz Rajski, Malgorzata Marek-Sadowska |
Star test: the theory and its applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(9), pp. 1052-1064, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
31 | Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero |
Exploiting the Selfish Gene Algorithm for Evolving Cellular Automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IJCNN (6) ![In: Proceedings of the IEEE-INNS-ENNS International Joint Conference on Neural Networks, IJCNN 2000, Neural Computing: New Challenges and Perspectives for the New Millennium, Como, Italy, July 24-27, 2000, Volume 6, pp. 577-584, 2000, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
31 | Kamran Zarrineh, Shambhu J. Upadhyaya |
A New Framework For Automatic Generation, Insertion and Verification of Memory Built-In Self Test Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 17th IEEE VLSI Test Symposium (VTS '99), 25-30 April 1999, San Diego, CA, USA, pp. 391-397, 1999, IEEE Computer Society, 0-7695-0146-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
31 | Karim Arabi, Bozena Kaminska, Mohamad Sawan |
On chip testing data converters using static parameters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 6(3), pp. 409-419, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
31 | Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian |
Effective Built-In Self-Test for Booth Multipliers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 15(3), pp. 105-111, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
Booth multipliers, Built-In Self Test, design for testability, data paths |
31 | Karim Arabi, Bozena Kaminska, Janusz Rzeszut |
A new built-in self-test approach for digital-to-analog and analog-to-digital converters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1994, San Jose, California, USA, November 6-10, 1994, pp. 491-494, 1994, IEEE Computer Society / ACM, 0-89791-690-5. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
29 | Li-Ming Denq, Yu-Tsao Hsing, Cheng-Wen Wu |
Hybrid BIST Scheme for Multiple Heterogeneous Embedded Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 26(2), pp. 64-73, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
29 | Lei Chen 0010, Zhiquan Zhang, Zhiping Wen 0001 |
A novel BIST approach for testing input/output buffers in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, FPGA 2009, Monterey, California, USA, February 22-24, 2009, pp. 285, 2009, ACM, 978-1-60558-410-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
i/o buffers, built-in self-test, fpga testing |
29 | Cheng Jia, Linda S. Milor |
A BIST Circuit for DLL Fault Detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 16(12), pp. 1687-1695, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Mehrdad Nourani, Mohammad Tehranipoor, Nisar Ahmed |
Low-Transition Test Pattern Generation for BIST-Based Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 57(3), pp. 303-315, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Low power pattern generation, Test generation, Built-in tests, Testing strategies, Random generation |
29 | Dong Xiang, Yang Zhao 0001, Krishnendu Chakrabarty, Hideo Fujiwara |
A Reconfigurable Scan Architecture With Weighted Scan-Enable Signals for Deterministic BIST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(6), pp. 999-1012, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Sunghoon Chun, Taejin Kim, Sungho Kang |
A new low energy BIST using a statistical code. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 13th Asia South Pacific Design Automation Conference, ASP-DAC 2008, Seoul, Korea, January 21-24, 2008, pp. 647-652, 2008, IEEE, 978-1-4244-1921-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Kevin Sliech, Martin Margala |
A Digital BIST for Phase-Locked Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 1-3 October 2008, Boston, MA, USA, pp. 134-142, 2008, IEEE Computer Society, 978-0-7695-3365-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Stephen K. Sunter, Aubin Roy |
Purely Digital BIST for Any PLL or DLL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 12th European Test Symposium, ETS 2007, Freiburg, Germany, May 20, 2007, pp. 185-192, 2007, IEEE Computer Society, 978-0-7695-2827-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
29 | Yen-Chih Huang, Hsieh-Hung Hsieh, Liang-Hung Lu |
A Low-Noise Amplifier with Integrated Current and Power Sensors for RF BIST Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 25th IEEE VLSI Test Symposium (VTS 2007), 6-10 May 2007, Berkeley, California, USA, pp. 401-408, 2007, IEEE Computer Society, 0-7695-2812-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
29 | Subir K. Roy, Rubin A. Parekhji |
Modeling Techniques for Formal Verification of BIST Controllers and Their Integration into SOC Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India, pp. 364-372, 2007, IEEE Computer Society, 0-7695-2762-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
29 | Kedarnath J. Balakrishnan |
Efficient Scan-Based BIST Using Multiple LFSRs and Dictionary Coding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India, pp. 345-350, 2007, IEEE Computer Society, 0-7695-2762-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
29 | Jack R. Smith, Tian Xia, Charles E. Stroud |
An Automated BIST Architecture for Testing and Diagnosing FPGA Interconnect Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 22(3), pp. 239-253, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
stuck-at faults, bridging faults, delay faults |
29 | Achraf Dhayni, Salvador Mir, Libor Rufer, Ahcène Bounceur |
Pseudorandom functional BIST for linear and nonlinear MEMS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 664-669, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
29 | Stelios Neophytou, Maria K. Michael, Spyros Tragoudas |
Efficient Deterministic Test Generation for BIST Schemes with LFSR Reseeding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 10-12 July 2006, Como, Italy, pp. 43-50, 2006, IEEE Computer Society, 0-7695-2620-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
29 | Hsieh-Hung Hsieh, Liang-Hung Lu |
Integrated CMOS Power Sensors for RF BIST Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 24th IEEE VLSI Test Symposium (VTS 2006), 30 April - 4 May 2006, Berkeley, California, USA, pp. 234-239, 2006, IEEE Computer Society, 0-7695-2514-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
29 | Lei Li 0036, Krishnendu Chakrabarty |
Hybrid BIST Based on Repeating Sequences and Cluster Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany, pp. 1142-1147, 2005, IEEE Computer Society, 0-7695-2288-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Mária Fischerová, Martin Simlastík |
MemBIST Applet for Learning Principles of Memory Testing and Generating Memory BIST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August - 3 September 2005, Porto, Portugal, pp. 276-281, 2005, IEEE Computer Society, 0-7695-2433-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Peter Filter, Hana Kubátová |
Improvement of the Fault Coverage of the Pseudo-Random Phase in Column-Matching BIST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August - 3 September 2005, Porto, Portugal, pp. 56-63, 2005, IEEE Computer Society, 0-7695-2433-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Chaowen Yu, Sudhakar M. Reddy, Irith Pomeranz |
Circuit Independent Weighted Pseudo-Random BIST Pattern Generator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 14th Asian Test Symposium (ATS 2005), 18-21 December 2005, Calcutta, India, pp. 132-137, 2005, IEEE Computer Society, 0-7695-2481-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Youbean Kim, Myung-Hoon Yang, Yong Lee 0002, Sungho Kang 0001 |
A New Low Power Test Pattern Generator using a Transition Monitoring Window based on BIST Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 14th Asian Test Symposium (ATS 2005), 18-21 December 2005, Calcutta, India, pp. 230-235, 2005, IEEE Computer Society, 0-7695-2481-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Mohammad Tehranipoor, Mehrdad Nourani, Nisar Ahmed |
Low Transition LFSR for BIST-Based Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 14th Asian Test Symposium (ATS 2005), 18-21 December 2005, Calcutta, India, pp. 138-143, 2005, IEEE Computer Society, 0-7695-2481-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | DongSup Song, Sungho Kang |
Increasing Embedding Probabilities of RPRPs in RIN Based BIST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, ACSAC 2005, Singapore, October 24-26, 2005, Proceedings, pp. 600-613, 2005, Springer, 3-540-29643-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Vitalij Ocheretnij, G. Kouznetsov, Ramesh Karri, Michael Gössel |
On-Line Error Detection and BIST for the AES Encryption Algorithm with Different S-Box Implementations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 6-8 July 2005, Saint Raphael, France, pp. 141-146, 2005, IEEE Computer Society, 0-7695-2406-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Anand Gopalan, Tejasvi Das, Clyde Washburn, P. R. Mukund |
An Ultra-Fast, On-Chip BiST for RF Low Noise Amplifiers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 18th International Conference on VLSI Design (VLSI Design 2005), with the 4th International Conference on Embedded Systems Design, 3-7 January 2005, Kolkata, India, pp. 485-490, 2005, IEEE Computer Society, 0-7695-2264-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Ondrej Novák, Zdenek Plíva, Jiri Nosek, Andrzej Hlawiczka, Tomasz Garbolino, Krzysztof Gucwa |
Test-Per-Clock Logic BIST with Semi-Deterministic Test Patterns and Zero-Aliasing Compactor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 20(1), pp. 109-122, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
test-per-clock testing, test pattern compression, zero aliasing error, built-in self test, test response compaction |
29 | Jiang Chau Wang, Paulo Sérgio Cardoso, Jose Artur Quilici González, Marius Strum, Ricardo Pires |
Datapath BIST Insertion Using Pre-Characterized Area and Testability Data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 20(4), pp. 333-344, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
test library, RTL architecture, pre-computed testability, self-test |
29 | Zhiyuan He 0002, Gert Jervan, Zebo Peng, Petru Eles |
Hybrid BIST Test Scheduling Based on Defect Probabilities. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 13th Asian Test Symposium (ATS 2004), 15-17 November 2004, Kenting, Taiwan, pp. 230-235, 2004, IEEE Computer Society, 0-7695-2235-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Dong Xiang, Ming-Jing Chen, Kaiwei Li, Yu-Liang Wu |
Scan-Based BIST Using an Improved Scan Forest Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 13th Asian Test Symposium (ATS 2004), 15-17 November 2004, Kenting, Taiwan, pp. 88-93, 2004, IEEE Computer Society, 0-7695-2235-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Abilio Parreira, João Paulo Teixeira 0001, Marcelino B. Santos |
FPGAs BIST Evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings, pp. 333-343, 2004, Springer, 3-540-22989-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Patrick Girard 0001, Olivier Héron, Serge Pravossoudovitch, Michel Renovell |
BIST of Delay Faults in the Logic Architecture of Symmetrical FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 12-14 July 2004, Funchal, Madeira Island, Portugal, pp. 187-192, 2004, IEEE Computer Society, 0-7695-2180-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Petr Fiser, Hana Kubátová |
Survey of the Algorithms in the Column-Matching BIST Method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 12-14 July 2004, Funchal, Madeira Island, Portugal, pp. 181, 2004, IEEE Computer Society, 0-7695-2180-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Liyang Lai, Thomas Rinderknecht, Wu-Tung Cheng, Janak H. Patel |
Logic BIST Using Constrained Scan Cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 22nd IEEE VLSI Test Symposium (VTS 2004), 25-29 April 2004, Napa Valley, CA, USA, pp. 199-205, 2004, IEEE Computer Society, 0-7695-2134-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Robert C. Aitken |
A Modular Wrapper Enabling High Speed BIST and Repair for Small Wide Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2004 International Test Conference (ITC 2004), October 26-28, 2004, Charlotte, NC, USA, pp. 997-1005, 2004, IEEE Computer Society, 0-7803-8581-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Chunsheng Liu, Krishnendu Chakrabarty |
Failing vector identification based on overlapping intervals of test vectors in a scan-BIST environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(5), pp. 593-604, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Miron Abramovici, Charles E. Stroud |
BIST-Based Delay-Fault Testing in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 19(5), pp. 549-558, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Field Programmable Gate Arrays, Built-In Self-Test, delay faults |
29 | Kumar L. Parthasarathy, Turker Kuyel, Dana Price, Le Jin, Degang Chen 0001, Randall L. Geiger |
BIST and production testing of ADCs using imprecise stimulus. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 8(4), pp. 522-545, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
ADC linearity, imprecision measurement, imprecision stimulus, built-in self-test, Analog and mixed-signal testing, production test |
29 | Dimitris G. Nikolos, Dimitris Nikolos, Haridimos T. Vergos, Costas Efstathiou |
Efficient BIST schemes for RNS datapaths. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 573-576, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Patrick Girard 0001, Olivier Héron, Serge Pravossoudovitch, Michel Renovell |
Defect Analysis for Delay-Fault BIST in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 9th IEEE International On-Line Testing Symposium (IOLTS 2003), 7-9 July 2003, Kos Island, Greece, pp. 124-128, 2003, IEEE Computer Society, 0-7695-1968-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Debjyoti Ghosh, Swarup Bhunia, Kaushik Roy 0001 |
Multiple Scan Chain Design Technique for Power Reduction during Test Application in BIST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 3-5 November 2003, Boston, MA, USA, Proceedings, pp. 191-198, 2003, IEEE Computer Society, 0-7695-2042-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
29 | C. V. Krishna, Nur A. Touba |
Hybrid BIST Using an Incrementally Guided LFSR. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 3-5 November 2003, Boston, MA, USA, Proceedings, pp. 217-224, 2003, IEEE Computer Society, 0-7695-2042-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Chunsheng Liu, Krishnendu Chakrabarty |
Compact Dictionaries for Fault Diagnosis in BIST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 4th International Symposium on Quality of Electronic Design (ISQED 2003), 24-26 March 2003, San Jose, CA, USA, pp. 105-110, 2003, IEEE Computer Society, 0-7695-1881-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Theo J. Powell, Wu-Tung Cheng, Joseph Rayhawk, Omer Samman, Paul Policke, Sherry Lai |
BIST for Deep Submicron ASIC Memories with High Performance Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 386-392, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Olivier Caty, Ismet Bayraktaroglu, Amitava Majumdar 0002, Richard Lee, John Bell, Lisa Curhan |
Instruction Based BIST for Board/System Level Test of External Memories and Internconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 961-970, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Samir Roy, Ujjwal Maulik, Biplab K. Sikdar |
Exploiting Ghost-FSMs as a BIST Structure for Sequential Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 16th International Conference on VLSI Design (VLSI Design 2003), 4-8 January 2003, New Delhi, India, pp. 155-160, 2003, IEEE Computer Society, 0-7695-1868-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Sukanta Das, Niloy Ganguly, Biplab K. Sikdar, Parimal Pal Chaudhuri |
Design Of A Universal BIST (UBIST) Structure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 16th International Conference on VLSI Design (VLSI Design 2003), 4-8 January 2003, New Delhi, India, pp. 161-166, 2003, IEEE Computer Society, 0-7695-1868-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Patrick Girard 0001, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Hans-Joachim Wunderlich |
High Defect Coverage with Low-Power Test Sequences in a BIST Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 19(5), pp. 44-52, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Chunsheng Liu, Krishnendu Chakrabarty, Michael Gössel |
An Interval-Based Diagnosis Scheme for Identifying Failing Vectors in a Scan-BIST Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2002 Design, Automation and Test in Europe Conference and Exposition (DATE 2002), 4-8 March 2002, Paris, France, pp. 382-386, 2002, IEEE Computer Society, 0-7695-1471-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Lihong Tong, Kazuki Suzuki, Hideo Ito |
Optimal Seed Generation for Delay Fault Detection BIST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 11th Asian Test Symposium (ATS 2002), 18-20 November 2002, Guam, USA, pp. 116-121, 2002, IEEE Computer Society, 0-7695-1825-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Alvin Jee |
Defect-Oriented Analysis of Memory BIST Tests. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTDT ![In: 10th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2002), 10-12 July 2002, Isle of Bendor, France, pp. 7-11, 2002, IEEE Computer Society, 0-7695-1617-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Raja Venkatesh, Sailesh Kumar, Joji Philip, Sunil Shukla |
A Fault Modeling Technique to Test Memory BIST Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTDT ![In: 10th IEEE International Workshop on Memory Technology, Design, and Testing (MTDT 2002), 10-12 July 2002, Isle of Bendor, France, pp. 109-116, 2002, IEEE Computer Society, 0-7695-1617-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Andreas Steininger, Johann Vilanek |
Using Offline and Online BIST to Improve System Dependability - The TTPC-C Example. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 20th International Conference on Computer Design (ICCD 2002), VLSI in Computers and Processors, 16-18 September 2002, Freiburg, Germany, Proceedings, pp. 277-, 2002, IEEE Computer Society, 0-7695-1700-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Alvin Jee |
Defect-Oriented Analysis of Memory BIST Tests. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTW ![In: 8th IEEE International On-Line Testing Workshop (IOLTW 2002), 8-10 July 2002, Isle of Bendor, France, pp. 201-205, 2002, IEEE Computer Society, 0-7695-1641-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Miron Abramovici, Charles E. Stroud |
BIST-Based Delay-Fault Testing in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTW ![In: 8th IEEE International On-Line Testing Workshop (IOLTW 2002), 8-10 July 2002, Isle of Bendor, France, pp. 131-134, 2002, IEEE Computer Society, 0-7695-1641-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Charles E. Stroud, Jeremy Nall, Matthew Lashinsky, Miron Abramovici |
BIST-Based Diagnosis of FPGA Interconnect. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2002, Baltimore, MD, USA, October 7-10, 2002, pp. 618-627, 2002, IEEE Computer Society, 0-7803-7543-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Nadir Z. Basturkmen, Sudhakar M. Reddy, Irith Pomeranz |
Pseudo Random Patterns Using Markov Sources for Scan BIST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2002, Baltimore, MD, USA, October 7-10, 2002, pp. 1013-1021, 2002, IEEE Computer Society, 0-7803-7543-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Karim Arabi |
Mixed-Signal BIST: Fact or Fiction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2002, Baltimore, MD, USA, October 7-10, 2002, pp. 1202, 2002, IEEE Computer Society, 0-7803-7543-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Laurence Tianruo Yang, Jon C. Muzio |
Redundant transformations for BIST testability metrics-based data path allocation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS (2) ![In: IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002, pp. 119-123, 2002, IEEE, 0-7803-7690-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Mihalis Psarakis, Yervant Zorian |
An Effective Deterministic BIST Scheme for Shifter/Accumulator Pairs in Datapaths. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 17(2), pp. 97-107, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
datapath test, shifter, Built-in self-test, accumulator, arithmetic-logic unit, processor test |