Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
31 | Vashist Bist, Bhim Singh 0001 |
An Adjustable-Speed PFC Bridgeless Buck-Boost Converter-Fed BLDC Motor Drive. |
IEEE Trans. Ind. Electron. |
2014 |
DBLP DOI BibTeX RDF |
|
31 | Vashist Bist, Bhim Singh 0001 |
A PFC-Based BLDC Motor Drive Using a Canonical Switching Cell Converter. |
IEEE Trans. Ind. Informatics |
2014 |
DBLP DOI BibTeX RDF |
|
31 | Vashist Bist, Bhim Singh 0001 |
A Brushless DC Motor Drive With Power Factor Correction Using Isolated Zeta Converter. |
IEEE Trans. Ind. Informatics |
2014 |
DBLP DOI BibTeX RDF |
|
31 | Ankur Singh Bist |
Detection of metamorphic viruses: A survey. |
ICACCI |
2014 |
DBLP DOI BibTeX RDF |
|
31 | Gary Bist |
Business process management (BPM) in a day. |
CASCON |
2014 |
DBLP BibTeX RDF |
|
31 | Bhim Singh 0001, Vashist Bist |
A PFC based BLDC motor drive using a Bridgeless Zeta converter. |
IECON |
2013 |
DBLP DOI BibTeX RDF |
|
31 | Peter Ash, Anju Bist, Dan Sullivan, Smitha Chandran, Nikhil K. Kothurkar |
Rehabilitating former landfill sites: A case study in habitat restoration. |
GHTC |
2013 |
DBLP DOI BibTeX RDF |
|
31 | Shikha Singh 0008, Bhim Singh 0001, G. Bhuvaneswari, Vashist Bist, Ambrish Chandra, Kamal Al-Haddad |
Power quality improved bridgeless converter based multiple output SMPS. |
IAS |
2013 |
DBLP DOI BibTeX RDF |
|
31 | Bhim Singh 0001, Vashist Bist, Ambrish Chandra, Kamal Al-Haddad |
Power quality improvement in PFC Bridgeless-Luo converter fed BLDC motor drive. |
IAS |
2013 |
DBLP DOI BibTeX RDF |
|
31 | Rashmi Sachan, Shahid Ali, Chandan Bist, Sunil Misra, Vinod Menezes, Sharad Gupta, Pat Bosshart |
A 40nm 650Mhz 0.5fJ/Bit/Search TCAM Compiler Using Complementary Bit-cell Architecture. |
VLSI Design |
2013 |
DBLP DOI BibTeX RDF |
|
31 | Gary Bist, Kenneth K. Cheung |
Business process management (BPM) in a day. |
CASCON |
2013 |
DBLP BibTeX RDF |
|
31 | Gary Bist |
Business process management (BPM) in a day. |
CASCON |
2012 |
DBLP BibTeX RDF |
|
31 | Gary Bist |
Business process management (BPM) in a day. |
CASCON |
2010 |
DBLP DOI BibTeX RDF |
|
31 | Gary Bist |
Service Oriented Architecture (SOA) in a day. |
CASCON |
2009 |
DBLP DOI BibTeX RDF |
|
31 | Neil J. Bershad, Anurag Bist |
Fast coupled adaptation for sparse impulse responses using a partial haar transform. |
IEEE Trans. Signal Process. |
2005 |
DBLP DOI BibTeX RDF |
|
31 | Neil J. Bershad, Anurag Bist |
Fast coupled adaptation for sparse channels using a partial Haar transform. |
ICASSP (2) |
2004 |
DBLP DOI BibTeX RDF |
|
31 | Gary Bist, Neil MacKinnon, Steve Murphy |
Sequence diagram presentation in technical documentation. |
SIGDOC |
2004 |
DBLP DOI BibTeX RDF |
visualization, unified modeling language, human factors, documentation, guidelines, user testing, graphic design, sequence diagrams, UML diagrams |
31 | Anurag Bist, Parthasarathy Sriram |
Adaptive Quantization for Low Bit Rate Video Coding. |
ICIP (3) |
1998 |
DBLP BibTeX RDF |
|
31 | Anurag Bist, Parthasarathy Sriram |
Constrained trellis based rate control scheme for low bit rate video coding. |
ICIP (2) |
1996 |
DBLP DOI BibTeX RDF |
|
31 | Anurag Bist |
An approximate analysis of sigma-delta modulation of a Gauss-Markov process. |
ICASSP |
1995 |
DBLP DOI BibTeX RDF |
|
31 | Kenneth Zeger, Anurag Bist, Tamás Linder |
Universal source coding with codebook transmission. |
IEEE Trans. Commun. |
1994 |
DBLP DOI BibTeX RDF |
|
31 | A. Bist |
Differential State Quantization of High Order Gauss Markov Process. |
Data Compression Conference |
1994 |
DBLP DOI BibTeX RDF |
|
31 | Anurag Bist, Arnaud E. Jacquin, Christine Podilchuk |
Encoding of the chrominance signals in 3D subband-based video coding. |
ICASSP (5) |
1993 |
DBLP DOI BibTeX RDF |
|
31 | Kenneth Zeger, Anurag Bist |
Universal adaptive vector quantization using codebook quantization with application to image compression. |
ICASSP |
1992 |
DBLP DOI BibTeX RDF |
|
31 | Diogo José Costa Alves, Edna Barros |
A logic built-in self-test architecture that reuses manufacturing compressed scan test patterns. |
SBCCI |
2009 |
DBLP DOI BibTeX RDF |
LBIST, compressed test patterns, test, SoC, self-test |
31 | Mohammad Tehranipoor, Reza M. Rad |
Built-In Self-Test and Recovery Procedures for Molecular Electronics-Based Nanofabrics. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2007 |
DBLP DOI BibTeX RDF |
|
31 | Kim Petersén, Johnny Öberg |
Toward a scalable test methodology for 2D-mesh Network-on-Chips. |
DATE |
2007 |
DBLP DOI BibTeX RDF |
|
31 | Amit Laknaur, Sai Raghuram Durbha, Haibo Wang 0005 |
Built-In-Self-Testing Techniques for Programmable Capacitor Arrays. |
J. Electron. Test. |
2006 |
DBLP DOI BibTeX RDF |
programmable capacitor array, built-in-self-testing, analog testing, field programmable analog array |
31 | Mohammad Tehranipoor, Reza M. Rad |
Test and recovery for fine-grained nanoscale architectures. |
FPGA |
2006 |
DBLP DOI BibTeX RDF |
|
31 | Murari Kejariwal, Prasad Ammisetti, John Melanson |
Built-in self-test mode in a multi-path feedforward compensated operational amplifier. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
31 | Ioannis Voyiatzis, Antonis M. Paschalis, Dimitris Gizopoulos, Nektarios Kranitis, Constantin Halatsis |
A concurrent built-in self-test architecture based on a self-testing RAM. |
IEEE Trans. Reliab. |
2005 |
DBLP DOI BibTeX RDF |
|
31 | Dayu Yang, Foster F. Dai, Charles E. Stroud |
Built-in self-test for automatic analog frequency response measurement. |
ISCAS (3) |
2005 |
DBLP DOI BibTeX RDF |
|
31 | Shyue-Kung Lu, Chien-Hung Yeh, Han-Wen Lin |
Efficient Built-in Self-Test Techniques for Memory-Based FFT Processors. |
PRDC |
2004 |
DBLP DOI BibTeX RDF |
|
31 | Mike W. T. Wong, K. Y. Ko, Yim-Shu Lee |
Analog and Mixed-Signal IP Cores Testing. |
DELTA |
2002 |
DBLP DOI BibTeX RDF |
mixed-signal design, analog circuit testing, SOCs |
31 | Kuo-Liang Cheng, Chia-Ming Hsueh, Jing-Reng Huang, Jen-Chieh Yeh, Chih-Tsun Huang, Cheng-Wen Wu |
Automatic Generation of Memory Built-in Self-Test Cores for System-on-Chip. |
Asian Test Symposium |
2001 |
DBLP DOI BibTeX RDF |
|
31 | Sandeep Koranne, Tom Waayers, Robert Beurze, Clemens Wouters, Sunil Kumar, G. S. Visweswara |
A P1500 Compliant Programable BistShell for Embedded Memories. |
MTDT |
2001 |
DBLP DOI BibTeX RDF |
|
31 | Kun-Han Tsai, Janusz Rajski, Malgorzata Marek-Sadowska |
Star test: the theory and its applications. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2000 |
DBLP DOI BibTeX RDF |
|
31 | Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero |
Exploiting the Selfish Gene Algorithm for Evolving Cellular Automata. |
IJCNN (6) |
2000 |
DBLP DOI BibTeX RDF |
|
31 | Kamran Zarrineh, Shambhu J. Upadhyaya |
A New Framework For Automatic Generation, Insertion and Verification of Memory Built-In Self Test Units. |
VTS |
1999 |
DBLP DOI BibTeX RDF |
|
31 | Karim Arabi, Bozena Kaminska, Mohamad Sawan |
On chip testing data converters using static parameters. |
IEEE Trans. Very Large Scale Integr. Syst. |
1998 |
DBLP DOI BibTeX RDF |
|
31 | Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian |
Effective Built-In Self-Test for Booth Multipliers. |
IEEE Des. Test Comput. |
1998 |
DBLP DOI BibTeX RDF |
Booth multipliers, Built-In Self Test, design for testability, data paths |
31 | Karim Arabi, Bozena Kaminska, Janusz Rzeszut |
A new built-in self-test approach for digital-to-analog and analog-to-digital converters. |
ICCAD |
1994 |
DBLP DOI BibTeX RDF |
|
29 | Li-Ming Denq, Yu-Tsao Hsing, Cheng-Wen Wu |
Hybrid BIST Scheme for Multiple Heterogeneous Embedded Memories. |
IEEE Des. Test Comput. |
2009 |
DBLP DOI BibTeX RDF |
|
29 | Lei Chen 0010, Zhiquan Zhang, Zhiping Wen 0001 |
A novel BIST approach for testing input/output buffers in FPGAs. |
FPGA |
2009 |
DBLP DOI BibTeX RDF |
i/o buffers, built-in self-test, fpga testing |
29 | Cheng Jia, Linda S. Milor |
A BIST Circuit for DLL Fault Detection. |
IEEE Trans. Very Large Scale Integr. Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Mehrdad Nourani, Mohammad Tehranipoor, Nisar Ahmed |
Low-Transition Test Pattern Generation for BIST-Based Applications. |
IEEE Trans. Computers |
2008 |
DBLP DOI BibTeX RDF |
Low power pattern generation, Test generation, Built-in tests, Testing strategies, Random generation |
29 | Dong Xiang, Yang Zhao 0001, Krishnendu Chakrabarty, Hideo Fujiwara |
A Reconfigurable Scan Architecture With Weighted Scan-Enable Signals for Deterministic BIST. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Sunghoon Chun, Taejin Kim, Sungho Kang |
A new low energy BIST using a statistical code. |
ASP-DAC |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Kevin Sliech, Martin Margala |
A Digital BIST for Phase-Locked Loops. |
DFT |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Stephen K. Sunter, Aubin Roy |
Purely Digital BIST for Any PLL or DLL. |
ETS |
2007 |
DBLP DOI BibTeX RDF |
|
29 | Yen-Chih Huang, Hsieh-Hung Hsieh, Liang-Hung Lu |
A Low-Noise Amplifier with Integrated Current and Power Sensors for RF BIST Applications. |
VTS |
2007 |
DBLP DOI BibTeX RDF |
|
29 | Subir K. Roy, Rubin A. Parekhji |
Modeling Techniques for Formal Verification of BIST Controllers and Their Integration into SOC Designs. |
VLSI Design |
2007 |
DBLP DOI BibTeX RDF |
|
29 | Kedarnath J. Balakrishnan |
Efficient Scan-Based BIST Using Multiple LFSRs and Dictionary Coding. |
VLSI Design |
2007 |
DBLP DOI BibTeX RDF |
|
29 | Jack R. Smith, Tian Xia, Charles E. Stroud |
An Automated BIST Architecture for Testing and Diagnosing FPGA Interconnect Faults. |
J. Electron. Test. |
2006 |
DBLP DOI BibTeX RDF |
stuck-at faults, bridging faults, delay faults |
29 | Achraf Dhayni, Salvador Mir, Libor Rufer, Ahcène Bounceur |
Pseudorandom functional BIST for linear and nonlinear MEMS. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
29 | Stelios Neophytou, Maria K. Michael, Spyros Tragoudas |
Efficient Deterministic Test Generation for BIST Schemes with LFSR Reseeding. |
IOLTS |
2006 |
DBLP DOI BibTeX RDF |
|
29 | Hsieh-Hung Hsieh, Liang-Hung Lu |
Integrated CMOS Power Sensors for RF BIST Applications. |
VTS |
2006 |
DBLP DOI BibTeX RDF |
|
29 | Lei Li 0036, Krishnendu Chakrabarty |
Hybrid BIST Based on Repeating Sequences and Cluster Analysis. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Mária Fischerová, Martin Simlastík |
MemBIST Applet for Learning Principles of Memory Testing and Generating Memory BIST. |
DSD |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Peter Filter, Hana Kubátová |
Improvement of the Fault Coverage of the Pseudo-Random Phase in Column-Matching BIST. |
DSD |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Chaowen Yu, Sudhakar M. Reddy, Irith Pomeranz |
Circuit Independent Weighted Pseudo-Random BIST Pattern Generator. |
Asian Test Symposium |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Youbean Kim, Myung-Hoon Yang, Yong Lee 0002, Sungho Kang 0001 |
A New Low Power Test Pattern Generator using a Transition Monitoring Window based on BIST Architecture. |
Asian Test Symposium |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Mohammad Tehranipoor, Mehrdad Nourani, Nisar Ahmed |
Low Transition LFSR for BIST-Based Applications. |
Asian Test Symposium |
2005 |
DBLP DOI BibTeX RDF |
|
29 | DongSup Song, Sungho Kang |
Increasing Embedding Probabilities of RPRPs in RIN Based BIST. |
Asia-Pacific Computer Systems Architecture Conference |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Vitalij Ocheretnij, G. Kouznetsov, Ramesh Karri, Michael Gössel |
On-Line Error Detection and BIST for the AES Encryption Algorithm with Different S-Box Implementations. |
IOLTS |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Anand Gopalan, Tejasvi Das, Clyde Washburn, P. R. Mukund |
An Ultra-Fast, On-Chip BiST for RF Low Noise Amplifiers. |
VLSI Design |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Ondrej Novák, Zdenek Plíva, Jiri Nosek, Andrzej Hlawiczka, Tomasz Garbolino, Krzysztof Gucwa |
Test-Per-Clock Logic BIST with Semi-Deterministic Test Patterns and Zero-Aliasing Compactor. |
J. Electron. Test. |
2004 |
DBLP DOI BibTeX RDF |
test-per-clock testing, test pattern compression, zero aliasing error, built-in self test, test response compaction |
29 | Jiang Chau Wang, Paulo Sérgio Cardoso, Jose Artur Quilici González, Marius Strum, Ricardo Pires |
Datapath BIST Insertion Using Pre-Characterized Area and Testability Data. |
J. Electron. Test. |
2004 |
DBLP DOI BibTeX RDF |
test library, RTL architecture, pre-computed testability, self-test |
29 | Zhiyuan He 0002, Gert Jervan, Zebo Peng, Petru Eles |
Hybrid BIST Test Scheduling Based on Defect Probabilities. |
Asian Test Symposium |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Dong Xiang, Ming-Jing Chen, Kaiwei Li, Yu-Liang Wu |
Scan-Based BIST Using an Improved Scan Forest Architecture. |
Asian Test Symposium |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Abilio Parreira, João Paulo Teixeira 0001, Marcelino B. Santos |
FPGAs BIST Evaluation. |
FPL |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Patrick Girard 0001, Olivier Héron, Serge Pravossoudovitch, Michel Renovell |
BIST of Delay Faults in the Logic Architecture of Symmetrical FPGAs. |
IOLTS |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Petr Fiser, Hana Kubátová |
Survey of the Algorithms in the Column-Matching BIST Method. |
IOLTS |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Liyang Lai, Thomas Rinderknecht, Wu-Tung Cheng, Janak H. Patel |
Logic BIST Using Constrained Scan Cells. |
VTS |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Robert C. Aitken |
A Modular Wrapper Enabling High Speed BIST and Repair for Small Wide Memories. |
ITC |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Chunsheng Liu, Krishnendu Chakrabarty |
Failing vector identification based on overlapping intervals of test vectors in a scan-BIST environment. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Miron Abramovici, Charles E. Stroud |
BIST-Based Delay-Fault Testing in FPGAs. |
J. Electron. Test. |
2003 |
DBLP DOI BibTeX RDF |
Field Programmable Gate Arrays, Built-In Self-Test, delay faults |
29 | Kumar L. Parthasarathy, Turker Kuyel, Dana Price, Le Jin, Degang Chen 0001, Randall L. Geiger |
BIST and production testing of ADCs using imprecise stimulus. |
ACM Trans. Design Autom. Electr. Syst. |
2003 |
DBLP DOI BibTeX RDF |
ADC linearity, imprecision measurement, imprecision stimulus, built-in self-test, Analog and mixed-signal testing, production test |
29 | Dimitris G. Nikolos, Dimitris Nikolos, Haridimos T. Vergos, Costas Efstathiou |
Efficient BIST schemes for RNS datapaths. |
ISCAS (5) |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Patrick Girard 0001, Olivier Héron, Serge Pravossoudovitch, Michel Renovell |
Defect Analysis for Delay-Fault BIST in FPGAs. |
IOLTS |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Debjyoti Ghosh, Swarup Bhunia, Kaushik Roy 0001 |
Multiple Scan Chain Design Technique for Power Reduction during Test Application in BIST. |
DFT |
2003 |
DBLP DOI BibTeX RDF |
|
29 | C. V. Krishna, Nur A. Touba |
Hybrid BIST Using an Incrementally Guided LFSR. |
DFT |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Chunsheng Liu, Krishnendu Chakrabarty |
Compact Dictionaries for Fault Diagnosis in BIST. |
ISQED |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Theo J. Powell, Wu-Tung Cheng, Joseph Rayhawk, Omer Samman, Paul Policke, Sherry Lai |
BIST for Deep Submicron ASIC Memories with High Performance Application. |
ITC |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Olivier Caty, Ismet Bayraktaroglu, Amitava Majumdar 0002, Richard Lee, John Bell, Lisa Curhan |
Instruction Based BIST for Board/System Level Test of External Memories and Internconnects. |
ITC |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Samir Roy, Ujjwal Maulik, Biplab K. Sikdar |
Exploiting Ghost-FSMs as a BIST Structure for Sequential Machines. |
VLSI Design |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Sukanta Das, Niloy Ganguly, Biplab K. Sikdar, Parimal Pal Chaudhuri |
Design Of A Universal BIST (UBIST) Structure. |
VLSI Design |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Patrick Girard 0001, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Hans-Joachim Wunderlich |
High Defect Coverage with Low-Power Test Sequences in a BIST Environment. |
IEEE Des. Test Comput. |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Chunsheng Liu, Krishnendu Chakrabarty, Michael Gössel |
An Interval-Based Diagnosis Scheme for Identifying Failing Vectors in a Scan-BIST Environment. |
DATE |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Lihong Tong, Kazuki Suzuki, Hideo Ito |
Optimal Seed Generation for Delay Fault Detection BIST. |
Asian Test Symposium |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Alvin Jee |
Defect-Oriented Analysis of Memory BIST Tests. |
MTDT |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Raja Venkatesh, Sailesh Kumar, Joji Philip, Sunil Shukla |
A Fault Modeling Technique to Test Memory BIST Algorithms. |
MTDT |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Andreas Steininger, Johann Vilanek |
Using Offline and Online BIST to Improve System Dependability - The TTPC-C Example. |
ICCD |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Alvin Jee |
Defect-Oriented Analysis of Memory BIST Tests. |
IOLTW |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Miron Abramovici, Charles E. Stroud |
BIST-Based Delay-Fault Testing in FPGAs. |
IOLTW |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Charles E. Stroud, Jeremy Nall, Matthew Lashinsky, Miron Abramovici |
BIST-Based Diagnosis of FPGA Interconnect. |
ITC |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Nadir Z. Basturkmen, Sudhakar M. Reddy, Irith Pomeranz |
Pseudo Random Patterns Using Markov Sources for Scan BIST. |
ITC |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Karim Arabi |
Mixed-Signal BIST: Fact or Fiction. |
ITC |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Laurence Tianruo Yang, Jon C. Muzio |
Redundant transformations for BIST testability metrics-based data path allocation. |
APCCAS (2) |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Mihalis Psarakis, Yervant Zorian |
An Effective Deterministic BIST Scheme for Shifter/Accumulator Pairs in Datapaths. |
J. Electron. Test. |
2001 |
DBLP DOI BibTeX RDF |
datapath test, shifter, Built-in self-test, accumulator, arithmetic-logic unit, processor test |