Search results for "NOCS"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Michael N. Horak, Steven M. Nowick, Matthew Carlberg, Uzi Vishkin	A Low-Overhead Asynchronous Interconnection Network for GALS Chip Multiprocessors.	NOCS	2010	DBLP DOI BibTeX RDF
1	Dmitri Vainbrand, Ran Ginosar	Network-on-Chip Architectures for Neural Networks.	NOCS	2010	DBLP DOI BibTeX RDF	Neural Network, Network-on-Chip
1	Dongki Kim, Sungjoo Yoo, Sunggu Lee	A Network Congestion-Aware Memory Controller.	NOCS	2010	DBLP DOI BibTeX RDF	memory access scheduling, network-on-chip, Memory, congestion
1	Francisco Gilabert Villamón, María Engracia Gómez, Simone Medardoni, Davide Bertozzi	Improved Utilization of NoC Channel Bandwidth by Switch Replication for Cost-Effective Multi-processor Systems-on-Chip.	NOCS	2010	DBLP DOI BibTeX RDF
1	Alessandro Cremonesi	Semiconductor Industry: Perspective, Evolution and Challenges.	NOCS	2010	DBLP DOI BibTeX RDF
1	Nikita Nikitin, Satrajit Chatterjee, Jordi Cortadella, Michael Kishinevsky, Ümit Y. Ogras	Physical-Aware Link Allocation and Route Assignment for Chip Multiprocessing.	NOCS	2010	DBLP DOI BibTeX RDF
1	Carles Hernández 0001, Antoni Roca 0001, Federico Silla, José Flich, José Duato	Improving the Performance of GALS-Based NoCs in the Presence of Process Variation.	NOCS	2010	DBLP DOI BibTeX RDF
1	Tushar N. K. Jain, Paul V. Gratz, Alexander Sprintson, Gwan Choi	Asynchronous Bypass Channels: Improving Performance for Multi-synchronous NoCs.	NOCS	2010	DBLP DOI BibTeX RDF	asynchronous interconnect, NoC, GALS, on-chip networks
1	Rohit Sunkam Ramanujam, Vassos Soteriou, Bill Lin 0001, Li-Shiuan Peh	Design of a High-Throughput Distributed Shared-Buffer NoC Router.	NOCS	2010	DBLP DOI BibTeX RDF	Router micro-architecture, On-chip interconnection networks
1	Ruizhe Wu, Yi Wang 0007, Dan Zhao 0001	A Low-Cost Deadlock-Free Design of Minimal-Table Rerouted XY-Routing for Irregular Wireless NoCs.	NOCS	2010	DBLP DOI BibTeX RDF	Wireless Network-on-Chip, Segmented XY-Routing, Turn Classes-based Deadlock Avoidance
1	Francesca Palumbo, Danilo Pani, Alessandro Pilia, Luigi Raffo	Impact of Half-Duplex and Full-Duplex DMA Implementations on NoC Performance.	NOCS	2010	DBLP DOI BibTeX RDF	full-duplex DMA, half-duplex DMA, hybrid switching NoC, DMA performance bias, deadlock prevention
1	Masoud Daneshtalab, Masoumeh Ebrahimi, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen	A Low-Latency and Memory-Efficient On-chip Network.	NOCS	2010	DBLP DOI BibTeX RDF
1	Qiaoyan Yu, Paul Ampadu	Transient and Permanent Error Co-management Method for Reliable Networks-on-Chip.	NOCS	2010	DBLP DOI BibTeX RDF	permanent error, splitting transmission, spare wire, reliability, Network-on-chip, transient error
1	George Michelogiannakis, Daniel Sánchez 0003, William J. Dally, Christos Kozyrakis	Evaluating Bufferless Flow Control for On-chip Networks.	NOCS	2010	DBLP DOI BibTeX RDF	Networks, Flow control, Buffers, Multiprocessor interconnection
1	Jonas Diemer, Rolf Ernst	Back Suction: Service Guarantees for Latency-Sensitive On-chip Networks.	NOCS	2010	DBLP DOI BibTeX RDF	Latency-Sensitive, Quality of Service, QoS, Real-Time, NoC, Manycore
1	Young Hoon Kang, Taek-Jun Kwon, Jeffrey T. Draper	Fault-Tolerant Flow Control in On-chip Networks.	NOCS	2010	DBLP DOI BibTeX RDF	fault-tolerant router, soft-error handling, networks-on-chip
1	Andreas Lankes, Thomas Wild, Andreas Herkersdorf, Sören Sonntag, Helmut Reinig	Comparison of Deadlock Recovery and Avoidance Mechanisms to Approach Message Dependent Deadlocks in On-chip Networks.	NOCS	2010	DBLP DOI BibTeX RDF	message dependent deadlocks, strict ordering, Network-on-chip, deadlock avoidance, deadlock recovery
1	Randy Wayne Morris Jr., Avinash Karanth Kodi	Power-Efficient and High-Performance Multi-level Hybrid Nanophotonic Interconnect for Multicores.	NOCS	2010	DBLP DOI BibTeX RDF	Network-on-Chip, Interconnects, Low-Power architecture, Optoelectronic
1	Giorgos Passas, Manolis Katevenis, Dionisios N. Pnevmatikatos	A 128 x 128 x 24Gb/s Crossbar Interconnecting 128 Tiles in a Single Hop and Occupying 6% of Their Area.	NOCS	2010	DBLP DOI BibTeX RDF
1		NOCS 2010, Fourth ACM/IEEE International Symposium on Networks-on-Chip, Grenoble, France, May 3-6, 2010	NOCS	2010	DBLP BibTeX RDF
1	Robin Emery, Alexandre Yakovlev, E. Graeme Chester	Connection-centric network for spiking neural networks.	NOCS	2009	DBLP DOI BibTeX RDF
1	Bo Fu, David Wolpert 0001, Paul Ampadu	Lookahead-based adaptive voltage scheme for energy-efficient on-chip interconnect links.	NOCS	2009	DBLP DOI BibTeX RDF
1	Nicola Concer, Luciano Bononi, Michael Soulie, Riccardo Locatelli, Luca P. Carloni	CTC: An end-to-end flow control protocol for multi-core systems-on-chip.	NOCS	2009	DBLP DOI BibTeX RDF
1	Somayyeh Koohi, Shaahin Hessabi	Contention-free on-chip routing of optical packets.	NOCS	2009	DBLP DOI BibTeX RDF
1	Ajay Joshi, Christopher Batten, Yong-Jin Kwon, Scott Beamer, Imran Shamim, Krste Asanovic, Vladimir Stojanovic	Silicon-photonic clos networks for global on-chip communication.	NOCS	2009	DBLP DOI BibTeX RDF
1	Ivo Bolsens	NoCs: It is about the memory and the programming model.	NOCS	2009	DBLP DOI BibTeX RDF
1	Henrique C. Freitas, Marco A. Z. Alves, Lucas Mello Schnorr, Philippe Olivier Alexandre Navaux	Performance Evaluation of NoC Architectures for Parallel Workloads.	NOCS	2009	DBLP DOI BibTeX RDF
1	Andrew A. Chien	NoC's at the center of chip architecture: Urgent needs (today) and what they must become (future).	NOCS	2009	DBLP DOI BibTeX RDF
1	Paul Teehan, Guy G. Lemieux, Mark R. Greenstreet	Estimating reliability and throughput of source-synchronous wave-pipelined interconnect.	NOCS	2009	DBLP DOI BibTeX RDF
1	Marcos Hervé, Érika F. Cota, Fernanda Lima Kastensmidt, Marcelo Lubaszewski	Diagnosis of interconnect shorts in mesh NoCs.	NOCS	2009	DBLP DOI BibTeX RDF
1	Lei Wang 0041, Yuho Jin, Hyungjun Kim, Eun Jung Kim 0001	Recursive partitioning multicast: A bandwidth-efficient routing for Networks-on-Chip.	NOCS	2009	DBLP DOI BibTeX RDF
1	Yue Qian, Zhonghai Lu, Wenhua Dou	Analysis of worst-case delay bounds for best-effort communication in wormhole networks on chip.	NOCS	2009	DBLP DOI BibTeX RDF
1	Anh Thien Tran, Dean Truong, Bevan M. Baas	A GALS many-core heterogeneous DSP platform with source-synchronous on-chip interconnection network.	NOCS	2009	DBLP DOI BibTeX RDF
1	Ran Manevich, Isask'har Walter, Israel Cidon, Avinoam Kolodny	Best of both worlds: A bus enhanced NoC (BENoC).	NOCS	2009	DBLP DOI BibTeX RDF
1	Gilbert Hendry, Shoaib Kamil 0001, Aleksandr Biberman, Johnnie Chan, Benjamin G. Lee, Marghoob Mohiyuddin, Ankit Jain, Keren Bergman, Luca P. Carloni, John Kubiatowicz, Leonid Oliker, John Shalf	Analysis of photonic networks for a chip multiprocessor using scientific applications.	NOCS	2009	DBLP DOI BibTeX RDF
1	Rudy Beraha, Isask'har Walter, Israel Cidon, Avinoam Kolodny	The design of a latency constrained, power optimized NoC for a 4G SoC.	NOCS	2009	DBLP DOI BibTeX RDF
1	Ying-Cherng Lan, Shih-Hsin Lo, Yueh-Chi Lin, Yu Hen Hu, Sao-Jie Chen	BiNoC: A bidirectional NoC architecture with dynamic self-reconfigurable channel.	NOCS	2009	DBLP DOI BibTeX RDF
1	Prabhat Kumar 0002, Yan Pan, John Kim, Gokhan Memik, Alok N. Choudhary	Exploring concentration and channel slicing in on-chip network router.	NOCS	2009	DBLP DOI BibTeX RDF
1	Luca P. Carloni, Partha Pande 0001, Yuan Xie 0001	Networks-on-chip in emerging interconnect paradigms: Advantages and challenges.	NOCS	2009	DBLP DOI BibTeX RDF
1	Daniel Gebhardt, Kenneth S. Stevens	Power reduction through physical placement of asynchronous routers.	NOCS	2009	DBLP DOI BibTeX RDF
1	Evgeni Krimer, Mattan Erez, Isaac Keslassy, Avinoam Kolodny, Isask'har Walter	Packet-level static timing analysis for NoCs.	NOCS	2009	DBLP DOI BibTeX RDF
1	Pavel Ghosh, Arunabha Sen, Alexander Hall	Energy efficient application mapping to NoC processing elements operating at multiple voltage levels.	NOCS	2009	DBLP DOI BibTeX RDF
1		Third International Symposium on Networks-on-Chips, NOCS 2009, May 10-13 2009, La Jolla, CA, USA. Proceedings	NOCS	2009	DBLP BibTeX RDF
1	Keun Sup Shim, Myong Hyon Cho, Michel A. Kinsy, Tina Wen, Mieszko Lis, G. Edward Suh, Srinivas Devadas	Static virtual channel allocation in oblivious routing.	NOCS	2009	DBLP DOI BibTeX RDF
1	Avinash Karanth Kodi, Randy Morris, Ahmed Louri, Xiang Zhang	On-Chip photonic interconnects for scalable multi-core architectures.	NOCS	2009	DBLP DOI BibTeX RDF
1	Guilherme Montez Guindani, Cezar Reinbrecht, Thiago R. da Rosa, Fernando Moraes 0001	Increasing NoC power estimation accuracy through a rate-based model.	NOCS	2009	DBLP DOI BibTeX RDF
1	Tarik Ono-Tesfaye, Mark R. Greenstreet	A modular synchronizing FIFO for NoCs.	NOCS	2009	DBLP DOI BibTeX RDF
1	Awet Yemane Weldezion, Matt Grange, Dinesh Pamunuwa, Zhonghai Lu, Axel Jantsch, Roshan Weerasekera, Hannu Tenhunen	Scalability of network-on-chip communication architecture for 3-D meshes.	NOCS	2009	DBLP DOI BibTeX RDF
1	Fabien Clermidy, Romain Lemaire, Yvain Thonnart, Pascal Vivet	A Communication and configuration controller for NoC based reconfigurable data flow architecture.	NOCS	2009	DBLP DOI BibTeX RDF
1	Wei Song 0002, Doug A. Edwards, José Luis Núñez-Yáñez, Sohini Dasgupta	Adaptive stochastic routing in fault-tolerant on-chip networks.	NOCS	2009	DBLP DOI BibTeX RDF
1	Rickard Holsmark, Shashi Kumar, Maurizio Palesi, Andres Mejia	HiRA: A methodology for deadlock free routing in hierarchical networks on chip.	NOCS	2009	DBLP DOI BibTeX RDF
1	Young Hoon Kang, Taek-Jun Kwon, Jeff Draper	Dynamic packet fragmentation for increased virtual channel utilization in on-chip routers.	NOCS	2009	DBLP DOI BibTeX RDF
1	Adán Kohler, Martin Radetzki	Fault-tolerant architecture and deflection routing for degradable NoC switches.	NOCS	2009	DBLP DOI BibTeX RDF
1	Arnab Banerjee, Simon W. Moore	Flow-aware allocation for on-chip networks.	NOCS	2009	DBLP DOI BibTeX RDF
1	Mohamed Bakhouya, Suboh A. Suboh, Jaafar Gaber, Tarek A. El-Ghazawi	Analytical modeling and evaluation of On-Chip Interconnects using Network Calculus.	NOCS	2009	DBLP DOI BibTeX RDF
1	Ajay Joshi, Fred Chen, Vladimir Stojanovic	A Modeling and exploration framework for interconnect network design in the nanometer era.	NOCS	2009	DBLP DOI BibTeX RDF
1	Anant Agarwal	Keynote 3 (Banquet Talk) Digital space.	NOCS	2009	DBLP DOI BibTeX RDF
1	Yury Markovsky, Yatish Patel, John Wawrzynek	Using adaptive routing to compensate for performance heterogeneity.	NOCS	2009	DBLP DOI BibTeX RDF
1	Mehdi Modarressi, Hamid Sarbazi-Azad, Arash Tavakkol	Performance and power efficient on-chip communication using adaptive virtual point-to-point connections.	NOCS	2009	DBLP DOI BibTeX RDF
1		Author index.	NOCS	2009	DBLP DOI BibTeX RDF
1	Daniele Ludovici, Alessandro Strano, Davide Bertozzi, Luca Benini, Georgi Gaydadjiev	Comparing tightly and loosely coupled mesochronous synchronizers in a NoC switch architecture.	NOCS	2009	DBLP DOI BibTeX RDF
1	Martti Forsell	Configurable emulated shared memory architecture for general purpose MP-SOCs and NOC regions.	NOCS	2009	DBLP DOI BibTeX RDF
1	José Flich, Samuel Rodrigo, José Duato	An Efficient Implementation of Distributed Routing Algorithms for NoCs.	NOCS	2008	DBLP DOI BibTeX RDF	routing implementation, router architecture
1	Ivan Miro Panades, Fabien Clermidy, Pascal Vivet, Alain Greiner	Physical Implementation of the DSPIN Network-on-Chip in the FAUST Architecture.	NOCS	2008	DBLP DOI BibTeX RDF	DSPIN, ANOC, physical implementation, FAUST, bi-synchronous FIFO, network-on-chip, NoC
1	Xuan-Tu Tran, Yvain Thonnart, Jean Durupt, Vincent Beroulle, Chantal Robach	A Design-for-Test Implementation of an Asynchronous Network-on-Chip Architecture and its Associated Test Pattern Generation and Application.	NOCS	2008	DBLP DOI BibTeX RDF	NoC testing, QDI asynchronous logic, Network-on-Chip, DfT, testability, NoC, Design-for-Test, GALS, SoC testing, testing methodology, on-chip communication, Globally Asynchronous - Locally Synchronous
1	Francisco Gilabert Villamón, Simone Medardoni, Davide Bertozzi, Luca Benini, María Engracia Gómez, Pedro López 0001, José Duato	Exploring High-Dimensional Topologies for NoC Design Through an Integrated Analysis and Synthesis Framework.	NOCS	2008	DBLP DOI BibTeX RDF	Interconnection networks, networks on chip, topologies, chip design
1	David May 0001	Invited Talk 1- Past, Present, and Future Communicating Processors.	NOCS	2008	DBLP DOI BibTeX RDF
1	Shijun Lin, Li Su 0001, Depeng Jin, Lieguang Zeng	Dual-Channel Access Mechanism for Cost-Effective NoC Design.	NOCS	2008	DBLP DOI BibTeX RDF	dual-channel, System-on-Chip, Networks-on-Chip
1	Po-Tsang Huang, Wei-Li Fang, Yin-Ling Wang, Wei Hwang	Low Power and Reliable Interconnection with Self-Corrected Green Coding Scheme for Network-on-Chip.	NOCS	2008	DBLP DOI BibTeX RDF	interconnnection, reliability, low power, network-on-chip
1	Daniel Gebhardt, JunBok You, W. Scott Lee, Kenneth S. Stevens	Network Simplicity for Latency Insensitive Cores.	NOCS	2008	DBLP DOI BibTeX RDF	latency insensitive, low power, system-on-chip, network-on-chip, topology, desynchronize
1	Edith Beigné, Fabien Clermidy, Sylvain Miermont, Pascal Vivet	Dynamic Voltage and Frequency Scaling Architecture for Units Integration within a GALS NoC.	NOCS	2008	DBLP DOI BibTeX RDF	Pausable clock, Vdd Hopping, Network-on-Chip, power, DVFS, GALS
1	Rosemary M. Francis, Simon W. Moore, Robert D. Mullins	A Network of Time-Division Multiplexed Wiring for FPGAs.	NOCS	2008	DBLP DOI BibTeX RDF	time division multplexing, fpga, network-on-chip
1	Zheng Shi, Alan Burns 0001	Real-Time Communication Analysis for On-Chip Networks with Wormhole Switching.	NOCS	2008	DBLP DOI BibTeX RDF	real-time, schedulable analysis, wormhole switching
1	Alireza Ejlali, Bashir M. Al-Hashimi	SEU-Hardened Energy Recovery Pipelined Interconnects for On-Chip Networks.	NOCS	2008	DBLP DOI BibTeX RDF
1	Maurizio Palesi, Giuseppe Longo, Salvatore Signorino, Rickard Holsmark, Shashi Kumar, Vincenzo Catania	Design of Bandwidth Aware and Congestion Avoiding Efficient Routing Algorithms for Networks-on-Chip Platforms.	NOCS	2008	DBLP DOI BibTeX RDF	Application Specific Routing, Network on Chip, Routing Algorithm, Deadlock, Congestion, Router Design
1	Natalie D. Enright Jerger, Li-Shiuan Peh, Mikko H. Lipasti	Circuit-Switched Coherence.	NOCS	2008	DBLP DOI BibTeX RDF	Interconnection network, multiprocessor systems, cache coherence
1	Itamar Cohen, Ori Rottenstreich, Isaac Keslassy	Statistical Approach to NoC Design.	NOCS	2008	DBLP DOI BibTeX RDF	T-Plot, NoC, statistical approach, capacity allocation, traffic matrices
1	Terrence S. T. Mak, Crescenzo D'Alessandro, N. Pete Sedcole, Peter Y. K. Cheung, Alexandre Yakovlev, Wayne Luk	Implementation of Wave-Pipelined Interconnects in FPGAs.	NOCS	2008	DBLP DOI BibTeX RDF
1	Pablo Abad Fidalgo, Valentin Puente, José-Ángel Gregorio	Reducing the Interconnection Network Cost of Chip Multiprocessors.	NOCS	2008	DBLP DOI BibTeX RDF	Chip Multiprocessors, Deadlock, Router Design
1	Min Zhang 0012, Chiu-sing Choy	Low-Cost VC Allocator Design for Virtual Channel Wormhole Routers in Networks-on-Chip.	NOCS	2008	DBLP DOI BibTeX RDF
1		Second International Symposium on Networks-on-Chips, NOCS 2008, 5-6 April 2008, Newcastle University, UK. Proceedings	NOCS	2008	DBLP BibTeX RDF
1	Bart Vermeulen, Kees Goossens, Siddharth Umrani	Debugging Distributed-Shared-Memory Communication at Multiple Granularities in Networks on Chip.	NOCS	2008	DBLP DOI BibTeX RDF	communication-centric debug, debug, network-on-chip, design for debug
1	Luis A. Plana, John Bainbridge, Steve B. Furber, Sean Salisbury, Yebin Shi, Jian Wu	An On-Chip and Inter-Chip Communications Network for the SpiNNaker Massively-Parallel Neural Net Simulator.	NOCS	2008	DBLP DOI BibTeX RDF	Synchonizer, source-address routing, GALS, Bandwidth aggregation
1	Hiroki Matsutani, Michihiro Koibuchi, Daihan Wang, Hideharu Amano	Adding Slow-Silent Virtual Channels for Low-Power On-Chip Networks.	NOCS	2008	DBLP DOI BibTeX RDF	low power, Network-on-Chip, virtual channels, NoC, DVFS, power gating
1	Mikkel Bystrup Stensgaard, Jens Sparsø	ReNoC: A Network-on-Chip Architecture with Reconfigurable Topology.	NOCS	2008	DBLP DOI BibTeX RDF	Communication, System-on-Chip, Network-on-Chip, Reconfigurable, Application-specific
1	Andreas Hansson 0001, Maarten Wiggers, Arno Moonen, Kees Goossens, Marco Bekooij	Applying Dataflow Analysis to Dimension Buffers for Guaranteed Performance in Networks on Chip.	NOCS	2008	DBLP DOI BibTeX RDF	Cyclo-Static Dataflow, System on Chip, Network on Chip, Real-Time Performance
1	Suboh A. Suboh, Mohamed Bakhouya, Tarek A. El-Ghazawi	Simulation and Evaluation of On-Chip Interconnect Architectures: 2D Mesh, Spidergon, and WK-Recursive Network.	NOCS	2008	DBLP DOI BibTeX RDF	System on Chip, Network on Chip, Modeling and simulation, On Chip Interconnects
1	Michihiro Koibuchi, Hiroki Matsutani, Hideharu Amano, Timothy Mark Pinkston	A Lightweight Fault-Tolerant Mechanism for Network-on-Chip.	NOCS	2008	DBLP DOI BibTeX RDF	fault tolerance, reliability, Network-on-Chip, routing algorithm, deadlock avoidance, on-chip network
1	Ian H. White, Richard V. Penty	Invited Talk 2 - Optical Interconnects for Backplane and Chip-to-Chip Photonics.	NOCS	2008	DBLP DOI BibTeX RDF
1	Bin Li 0018, Li-Shiuan Peh, Priyadarsan Patra	Impact of Process and Temperature Variations on Network-on-Chip Design Exploration.	NOCS	2008	DBLP DOI BibTeX RDF
1	Kees Goossens, Martijn T. Bennebroek, Jae Young Hur, Muhammad Aqeel Wahlah	Hardwired Networks on Chip in FPGAs to Unify Functional and Con?guration Interconnects.	NOCS	2008	DBLP DOI BibTeX RDF
1	Simon Ogg, Enrico Valli, Crescenzo D'Alessandro, Alexandre Yakovlev, Bashir M. Al-Hashimi, Luca Benini	Reducing Interconnect Cost in NoC through Serialized Asynchronous Links.	NOCS	2007	DBLP DOI BibTeX RDF
1	Wein-Tsung Shen, Chih-Hao Chao, Yu-Kuang Lien, An-Yeu Wu	A New Binomial Mapping and Optimization Algorithm for Reduced-Complexity Mesh-Based On-Chip Network.	NOCS	2007	DBLP DOI BibTeX RDF
1	Paul Gratz, Karthikeyan Sankaralingam, Heather Hanson, Premkishore Shivakumar, Robert G. McDonald, Stephen W. Keckler, Doug Burger	Implementation and Evaluation of a Dynamically Routed Processor Operand Network.	NOCS	2007	DBLP DOI BibTeX RDF
1	Giovanni De Micheli	Design Technologies for Networks on Chips.	NOCS	2007	DBLP DOI BibTeX RDF
1	Evgeny Bolotin, Zvika Guz, Israel Cidon, Ran Ginosar, Avinoam Kolodny	The Power of Priority: NoC Based Distributed Cache Coherency.	NOCS	2007	DBLP DOI BibTeX RDF
1	Pascal T. Wolkotte, Philip K. F. Hölzenspies, Gerard J. M. Smit	Fast, Accurate and Detailed NoC Simulations.	NOCS	2007	DBLP DOI BibTeX RDF
1	Jean-Philippe Diguet, Samuel Evain, Romain Vaslin, Guy Gogniat, Emmanuel Juin	NOC-centric Security of Reconfigurable SoC.	NOCS	2007	DBLP DOI BibTeX RDF
1	Zied Marrakchi, Hayder Mrabet, Christian Masson, Habib Mehrez	Mesh of Tree: Unifying Mesh and MFPGA for Better Device Performances.	NOCS	2007	DBLP DOI BibTeX RDF
1	Stephan Bourduas, Zeljko Zilic	A Hybrid Ring/Mesh Interconnect for Network-on-Chip Using Hierarchical Rings for Global Routing.	NOCS	2007	DBLP DOI BibTeX RDF

Publications at "NOCS"( http://dblp.L3S.de/Venues/NOCS )