Search results for "accelerator"

Hits ?▲	Authors	Title	Venue	Year	Link
10	Zifan He, Linghao Song, Robert F. Lucas, Jason Cong	LevelST: Stream-based Accelerator for Sparse Triangular Solver.	FPGA	2024	DBLP DOI BibTeX RDF
10	Sahand Kashani, Mahyar Emami, Keisuke Kamahori, Mohammad Sepehr Pourghannad, Ritik Raj, James R. Larus	A 475 MHz Manycore FPGA Accelerator for RTL Simulation.	FPGA	2024	DBLP DOI BibTeX RDF
10	Shengjun Xu, Wenlu Peng, Wenjin Huang, Qi Liu, Yihua Huang 0005	HR-GCN: An Efficient GCN Accelerator for Heterogeneous Graph Data and R-GCN Model.	FPGA	2024	DBLP DOI BibTeX RDF
10	Kai Qian, Zheng Liu, Yinqiu Liu, Haodong Lu 0001, Zexu Zhang, Ruiqiu Chen, Kun Wang 0005	AutoHammer: Breaking the Compilation Wall Between Deep Neural Network and Overlay-based FPGA Accelerator.	FPGA	2024	DBLP DOI BibTeX RDF
10	Minjae Lee, Seongmin Park, Hyungmin Kim, Minyong Yoon, Janghwan Lee, Jun Won Choi, Nam Sung Kim, Mingu Kang, Jungwook Choi	SPADE: Sparse Pillar-based 3D Object Detection Accelerator for Autonomous Driving.	HPCA	2024	DBLP DOI BibTeX RDF
10	Gerasimos Gerogiannis, Sriram Aananthakrishnan, Josep Torrellas, Ibrahim Hur	HotTiles: Accelerating SpMM with Heterogeneous Accelerator Architectures.	HPCA	2024	DBLP DOI BibTeX RDF
10	Fuping Niu, Jianhui Yue, Jiangqiu Shen, Xiaofei Liao, Hai Jin 0001	FlashGNN: An In-SSD Accelerator for GNN Training.	HPCA	2024	DBLP DOI BibTeX RDF
10	Jaeyong Jang, Yulhwa Kim, Juheun Lee, Jae-Joon Kim	FIGNA: Integer Unit-Based Accelerator Design for FP-INT GEMM Preserving Numerical Accuracy.	HPCA	2024	DBLP DOI BibTeX RDF
10	Chenlin Ma, Yingping Wang, Fuwen Chen, Jing Liao 0008, Yi Wang 0003, Rui Mao 0001	Rapper: A Parameter-Aware Repair-in-Memory Accelerator for Blockchain Storage Platform.	HPCA	2024	DBLP DOI BibTeX RDF
10	Zeyu Zhu, Fanrong Li, Gang Li 0015, Zejian Liu, Zitao Mo, Qinghao Hu, Xiaoyao Liang, Jian Cheng 0001	MEGA: A Memory-Efficient GNN Accelerator Exploiting Degree-Aware Mixed-Precision Quantization.	HPCA	2024	DBLP DOI BibTeX RDF
10	Hanqing Zhu, Jiaqi Gu, Hanrui Wang 0002, Zixuan Jiang, Zhekai Zhang, Rongxing Tang, Chenghao Feng, Song Han 0003, Ray T. Chen, David Z. Pan	Lightening-Transformer: A Dynamically-Operated Optically-Interconnected Photonic Transformer Accelerator.	HPCA	2024	DBLP DOI BibTeX RDF
10	Prasetiyo, Adiwena Putra, Joo-Young Kim 0001	Morphling: A Throughput-Maximized TFHE-based Accelerator using Transform-domain Reuse.	HPCA	2024	DBLP DOI BibTeX RDF
10	Weichuang Zhang, Jieru Zhao, Guan Shen, Quan Chen 0002, Chen Chen 0067, Minyi Guo	An Optimizing Framework on MLIR for Efficient FPGA-based Accelerator Generation.	HPCA	2024	DBLP DOI BibTeX RDF
10	Sudhanshu Gupta, Sandhya Dwarkadas	RELIEF: Relieving Memory Pressure In SoCs Via Data Movement-Aware Accelerator Scheduling.	HPCA	2024	DBLP DOI BibTeX RDF
10	Jeong-In Choi, Seo-Yoon Lee, Chan-Woong Park, Jin-Gon Oh, Ji Hoon Kang 0003, Kee-Won Kwon	Highly Linear Charging/Discharging of Charge Trap FET Using Regulated Single Pulse for Neural Accelerator.	ICEIC	2024	DBLP DOI BibTeX RDF
10	Vatistas Kostalabros, Jordi Ribes-González, Oriol Farràs, Miquel Moretó, Carles Hernández 0001	A Safety-Critical, RISC-V SoC Integrated and ASIC-Ready Classic McEliece Accelerator.	ARC	2024	DBLP DOI BibTeX RDF
10	Panagiotis Mpakos, Ioanna Tasou, Chloe Alverti, Panagiotis Miliadis, Pavlos Malakonakis, Dimitris Theodoropoulos, Georgios I. Goumas, Dionisios N. Pnevmatikatos, Nectarios Koziris	Open-Source SpMV Multiplication Hardware Accelerator for FPGA-Based HPC Systems.	ARC	2024	DBLP DOI BibTeX RDF
10	Shine Parekkadan Sunny, Satyajit Das	Spectral-Blaze: A High-Performance FFT-Based CNN Accelerator.	ARC	2024	DBLP DOI BibTeX RDF
10	José L. Mira, Jesús Barba, Julián Caba, José Antonio de la Torre, Fernando Rincón, Soledad Escolar, Juan Carlos López 0001	High Performance Connected Components Accelerator for Image Processing in the Edge.	ARC	2024	DBLP DOI BibTeX RDF
10	Nael Mizanur Rahman, Sudarshan Sharma, Coleman DeLude, Wei Chun Wang, Justin Romberg, Saibal Mukhopadhyay	BeamCIM: A Compute-In-Memory based Broadband Beamforming Accelerator using Linear Embedding.	RWS	2024	DBLP DOI BibTeX RDF
10	Alan Smith, Eric Chapman, Chintan Patel, Raja Swaminathan, John J. Wuu, Tyrone Huang, Wonjun Jung, Alexander Kaganov, Hugh McIntyre, Ramon Mangaser	11.1 AMD InstinctTM MI300 Series Modular Chiplet Package - HPC and AI Accelerator for Exa-Class Systems.	ISSCC	2024	DBLP DOI BibTeX RDF
10	Yi Zhang, Wenyue Zhou, Yiwei Zhang, Houren Ji, Yongming Huang, Xiaohu You 0001, Chuan Zhang 0001	2.7 BayesBB: A 9.6Gbps 1.61ms Configurable All-MessagePassing Baseband-Accelerator for B5G/6G Cell-Free Massive-MIMO in 40nm CMOS.	ISSCC	2024	DBLP DOI BibTeX RDF
10	Koichi Nose, Taro Fujii, Katsumi Togawa, Shunsuke Okumura, Kentaro Mikami, Daichi Hayashi, Teruhito Tanaka, Takao Toi	20.3 A 23.9TOPS/W @ 0.8V, 130TOPS AI Accelerator with 16× Performance-Accelerable Pruning in 14nm Heterogeneous Embedded MPU for Real-Time Robot Applications.	ISSCC	2024	DBLP DOI BibTeX RDF
10	Samuel D. Spetalnick, Ashwin Sanjay Lele, Brian Crafton, Muya Chang, Sigang Ryu, Jong-Hyeok Yoon, Zhijian Hao, Azadeh Ansari, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Arijit Raychowdhury	30.1 A 40nm VLIW Edge Accelerator with 5MB of 0.256pJ/b RRAM and a Localization Solver for Bristle Robot Surveillance.	ISSCC	2024	DBLP DOI BibTeX RDF
10	Maico Cassel dos Santos, Tianyu Jia, Joseph Zuckerman, Martin Cochet, Davide Giri, Erik Jens Loscalzo, Karthik Swaminathan, Thierry Tambe, Jeff Jun Zhang, Alper Buyuktosunoglu, Kuan-Lin Chiu, Giuseppe Di Guglielmo, Paolo Mantovani, Luca Piccolboni, Gabriele Tombesi, David Trilla, John-David Wellman, En-Yu Yang, Aporva Amarnath, Ying Jing, Bakshree Mishra, Joshua Park, Vignesh Suresh, Sarita V. Adve, Pradip Bose, David Brooks 0001, Luca P. Carloni, Kenneth L. Shepard, Gu-Yeon Wei	14.5 A 12nm Linux-SMP-Capable RISC-V SoC with 14 Accelerator Types, Distributed Hardware Power Management and Flexible NoC-Based Data Orchestration.	ISSCC	2024	DBLP DOI BibTeX RDF
10	Ruiqi Guo, Lei Wang, Xiaofeng Chen, Hao Sun, Zhiheng Yue, Yubin Qin, Huiming Han, Yang Wang, Fengbin Tu, Shaojun Wei, Yang Hu 0001, Shouyi Yin	20.2 A 28nm 74.34TFLOPS/W BF16 Heterogenous CIM-Based Accelerator Exploiting Denoising-Similarity for Diffusion Models.	ISSCC	2024	DBLP DOI BibTeX RDF
10	Sylvana Sofkova Hashemi, Nataliya Berbyuk Lindström, Nina Bergdahl	Pandemic as Digital Change Accelerator: Sustainable Reshaping of Adult Education Post Covid-19.	HICSS	2024	DBLP BibTeX RDF
10	Md. Najrul Islam, Rahul Shrestha, Shubhajit Roy Chowdhury	Low-Complexity lassification Technique and Hardware-Efficient Classify-Unit Architecture for CNN Accelerator.	VLSID	2024	DBLP DOI BibTeX RDF
10	Alireza Amirshahi, Giovanni Ansaloni, David Atienza	Accelerator-Driven Data Arrangement to Minimize Transformers Run-Time on Multi-Core Architectures.	PARMA-DITAM	2024	DBLP DOI BibTeX RDF
10	Yeong-Kang Lai, Ling-Cheng Huang	An Efficient Convolutional Neural Network Accelerator on FPGA Platform.	ICCE	2024	DBLP DOI BibTeX RDF
10	Yun-Ting Chao, Jhih-Yuan Gao, Chinatip Lawansuk, Yu-Cheng Fan	Two-Dimensional Convolution Accelerator of High-Precision Quantization.	ICCE	2024	DBLP DOI BibTeX RDF
10	Daiki Furukawa, Taito Manabe, Yuichiro Shibata, Tomohiro Ueno, Kentaro Sano	HLS Implementation of a Building Cube Stencil Computation Framework for an FPGA Accelerator.	ICCE	2024	DBLP DOI BibTeX RDF
10	Yusuke Yamagiwa, Kenji Kanazawa, Moritoshi Yasunaga	A FPGA-based Learning Accelerator for Self-Organizing Map and Its Application to Trend-Visualization.	ICCE	2024	DBLP DOI BibTeX RDF
10	Mari Yasunaga, Junnosuke Suzuki, Masato Watanabe, Kazushi Kawamura, Thiem Van Chu, Masato Motomura	High Throughput Datapath Design for Vision Permutator FPGA Accelerator.	ICCE	2024	DBLP DOI BibTeX RDF
10	Minseok Seo, Xuan Truong Nguyen, Seok Joong Hwang, Yongkee Kwon, Guhyun Kim, Chanwook Park, Ilkon Kim, Jaehan Park, Jeongbin Kim 0005, Woojae Shin, Jongsoon Won, Haerang Choi, Kyuyoung Kim, Daehan Kwon, Chunseok Jeong, Sangheon Lee, Yongseok Choi, Wooseok Byun, Seungcheol Baek, Hyuk-Jae Lee, John Kim	IANUS: Integrated Accelerator based on NPU-PIM Unified Memory System.	ASPLOS (3)	2024	DBLP DOI BibTeX RDF
10	Yuhui Hao, Yiming Gan, Bo Yu 0014, Qiang Liu 0011, Yinhe Han, Zishen Wan, Shaoshan Liu	ORIANNA: An Accelerator Generation Framework for Optimization-based Robotic Applications.	ASPLOS (2)	2024	DBLP DOI BibTeX RDF
10	Reese Kuper, Ipoom Jeong, Yifan Yuan, Ren Wang 0001, Narayan Ranganathan, Nikhil Rao, Jiayu Hu, Sanjay Kumar, Philip Lantz, Nam Sung Kim	A Quantitative Analysis and Guidelines of Data Streaming Accelerator in Modern Intel Xeon Scalable Processors.	ASPLOS (2)	2024	DBLP DOI BibTeX RDF
10	Kai Zhong, Zhenhua Zhu, Guohao Dai, Hongyi Wang, Xinhao Yang, Haoyu Zhang, Jin Si, Qiuli Mao, Shulin Zeng, Ke Hong, Genghan Zhang, Huazhong Yang, Yu Wang 0002	FEASTA: A Flexible and Efficient Accelerator for Sparse Tensor Algebra in Machine Learning.	ASPLOS (3)	2024	DBLP DOI BibTeX RDF
10	Neha Prakriya, Yuze Chi, Suhail Basalama, Linghao Song, Jason Cong	TAPA-CS: Enabling Scalable Accelerator Design on Distributed HBM-FPGAs.	ASPLOS (3)	2024	DBLP DOI BibTeX RDF
10	Rama Muni Reddy Yanamala, Muralidhar Pullakandam	A high-speed reusable quantized hardware accelerator design for CNN on constrained edge device.	Des. Autom. Embed. Syst.	2023	DBLP DOI BibTeX RDF
10	Sang-Gyun Gi, Hyunkeun Lee, Jingon Jang, Byung-Geun Lee	A ReRAM-Based Convolutional Neural Network Accelerator Using the Analog Layer Normalization Technique.	IEEE Trans. Ind. Electron.	2023	DBLP DOI BibTeX RDF
10	Yue Zheng, Cheng Xing, Jie-Sheng Wang, Hao-Ming Song, Yin-Yin Bao, Xing-Yue Zhang	An improved reptile search algorithm based on mathematical optimization accelerator and elementary functions.	J. Intell. Fuzzy Syst.	2023	DBLP DOI BibTeX RDF
10	Ben Keller, Rangharajan Venkatesan, Steve Dai, Stephen G. Tell, Brian Zimmer, Charbel Sakr, William J. Dally, C. Thomas Gray, Brucek Khailany	A 95.6-TOPS/W Deep Learning Inference Accelerator With Per-Vector Scaled 4-bit Quantization in 5 nm.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
10	Dae-Han Kwon, Seongju Lee, Kyuyoung Kim, Sanghoon Oh, Joonhong Park, Gimoon Hong, Dongyoon Ka, Kyu-Dong Hwang, Jeongje Park, Kyeong Pil Kang, Jungyeon Kim, Junyeol Jeon, Nahsung Kim, Yongkee Kwon, Kornijcuk Vladimir, Woojae Shin, Jongsoon Won, Minkyu Lee, Hyunha Joo, Haerang Choi, Guhyun Kim, Byeongju An, Jaewook Lee, Donguc Ko, Younggun Jun, Ilwoong Kim, Choungki Song, Ilkon Kim, Chanwook Park, Seho Kim, Chunseok Jeong, Euicheol Lim, Dongkyun Kim, Jieun Jang, Il Park 0001, Junhyun Chun, Joohwan Cho	A 1ynm 1.25V 8Gb 16Gb/s/Pin GDDR6-Based Accelerator-in-Memory Supporting 1TFLOPS MAC Operation and Various Activation Functions for Deep Learning Application.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
10	Richard Dorrance, Deepak Dasalukunte, Hechen Wang, Renzhi Liu, Brent R. Carlton	An Energy-Efficient Bayesian Neural Network Accelerator With CiM and a Time-Interleaved Hadamard Digital GRNG Using 22-nm FinFET.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
10	Chengshuo Yu, Junjie Mu, Yuqi Su, Kevin Tshun Chuan Chai, Tony Tae-Hyoung Kim, Bongjin Kim	A Time-Domain Wavefront Computing Accelerator With a 32 × 32 Reconfigurable PE Array.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
10	Junjie Mu, Bongjin Kim	A Dynamic-Precision Bit-Serial Computing Hardware Accelerator for Solving Partial Differential Equations Using Finite Difference Method.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
10	Fengbin Tu, Zihan Wu 0006, Yiqi Wang 0005, Ling Liang, Liu Liu 0017, Yufei Ding, Leibo Liu, Shaojun Wei, Yuan Xie 0001, Shouyi Yin	TranCIM: Full-Digital Bitline-Transpose CIM-based Sparse Transformer Accelerator With Pipeline/Parallel Reconfigurable Modes.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
10	Hsueh-Yen Shen, Yu-Chi Lee, Tzu-Wei Tong, Chia-Hsiang Yang	A 40-nm 91-mW, 90-fps Learning-Based Full HD Super-Resolution Accelerator.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
10	Bo Zhang, Shihui Yin, Minkyu Kim 0001, Jyotishman Saikia, Soonwan Kwon, Sungmeen Myung, Hyunsoo Kim, Sang Joon Kim, Jae-Sun Seo, Mingoo Seok	PIMCA: A Programmable In-Memory Computing Accelerator for Energy-Efficient DNN Inference.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
10	Adrian Kneip, Martin Lefebvre 0002, Julien Verecken, David Bol	IMPACT: A 1-to-4b 813-TOPS/W 22-nm FD-SOI Compute-in-Memory CNN Accelerator Featuring a 4.2-POPS/W 146-TOPS/mm2 CIM-SRAM With Multi-Bit Analog Batch-Normalization.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
10	Zhengguo Shen, Weiwei Shan, Yuxuan Du, Ziyu Li, Jun Yang 0006	Beyond Eliminating Timing Margin: An Efficient and Reliable Negative Margin Timing Error Detection for Neural Network Accelerator Without Accuracy Loss.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
10	Jaehoon Heo, Junsoo Kim 0002, Sukbin Lim, Wontak Han, Joo-Young Kim 0001	T-PIM: An Energy-Efficient Processing-in-Memory Accelerator for End-to-End On-Device Training.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
10	Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Anantha P. Chandrakasan	A Threshold Implementation-Based Neural Network Accelerator With Power and Electromagnetic Side-Channel Countermeasures.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
10	Mingshuo Liu, Miao Yin, Kevin Han, Ronald F. DeMara, Bo Yuan 0001, Yu Bai 0004	Algorithm and hardware co-design co-optimization framework for LSTM accelerator using quantized fully decomposed tensor train.	Internet Things	2023	DBLP DOI BibTeX RDF
10	Pengzhou He, Yazheng Tu, Çetin Kaya Koç, Jiafeng Xie	Hardware-Implemented Lightweight Accelerator for Large Integer Polynomial Multiplication.	IEEE Comput. Archit. Lett.	2023	DBLP DOI BibTeX RDF
10	Jonathan Garcia-Mallen, Shuohao Ping, Alex Miralles-Cordal, Ian Martin, Mukund Ramakrishnan, Yipeng Huang 0001	Towards an Accelerator for Differential and Algebraic Equations Useful to Scientists.	IEEE Comput. Archit. Lett.	2023	DBLP DOI BibTeX RDF
10	Venkata Siva Kumar Kokkiligadda, Vijitha Naikoti, Gaurao Sunil Patkotwar, Samrat L. Sabat, Rangababu Peesapati	FPGA-Based Hardware Accelerator for Matrix Inversion.	SN Comput. Sci.	2023	DBLP DOI BibTeX RDF
10	Omar S. Saleh	RCAM: Resource Constraint Approximate Multiplier Design for Deep Convolutional Neural Network Accelerator.	SN Comput. Sci.	2023	DBLP DOI BibTeX RDF
10	Ratko Pilipovic, Veljko Pejovic, Octavian Machidon	In Search of an Accuracy-Tuneable Accelerator Platform for Ubiquitous Computing.	GetMobile Mob. Comput. Commun.	2023	DBLP DOI BibTeX RDF
10	Liang Chang 0002, Xin Zhao, Jun Zhou 0017	ADAS: A High Computational Utilization Dynamic Reconfigurable Hardware Accelerator for Super Resolution.	ACM Trans. Reconfigurable Technol. Syst.	2023	DBLP DOI BibTeX RDF
10	Zhiqiang Que, Hiroki Nakahara, Hongxiang Fan, He Li 0008, Jiuxi Meng, Kuen Hung Tsoi, Xinyu Niu, Eriko Nurvitadhi, Wayne Luk	Remarn: A Reconfigurable Multi-threaded Multi-core Accelerator for Recurrent Neural Networks.	ACM Trans. Reconfigurable Technol. Syst.	2023	DBLP DOI BibTeX RDF
10	Kenneth Liu, Alec Lu, Kartik Samtani, Zhenman Fang, Licheng Guo	CHIP-KNNv2: A Configurable and High-Performance K-Nearest Neighbors Accelerator on HBM-based FPGAs.	ACM Trans. Reconfigurable Technol. Syst.	2023	DBLP DOI BibTeX RDF
10	Xiangwei Li, Douglas L. Maskell, Carol Jingyi Li, Philip H. W. Leong, David Boland	A Scalable Systolic Accelerator for Estimation of the Spectral Correlation Density Function and Its FPGA Implementation.	ACM Trans. Reconfigurable Technol. Syst.	2023	DBLP DOI BibTeX RDF
10	Tiancheng Xu, Scott Rixner, Alan L. Cox	An FPGA Accelerator for Genome Variant Calling.	ACM Trans. Reconfigurable Technol. Syst.	2023	DBLP DOI BibTeX RDF
10	Guiming Wu, Qianwen He, Jiali Jiang, Zhenxiang Zhang, Yuan Zhao, Yinchao Zou, Jie Zhang, Changzheng Wei, Ying Yan 0002, Hui Zhang	Topgun: An ECC Accelerator for Private Set Intersection.	ACM Trans. Reconfigurable Technol. Syst.	2023	DBLP DOI BibTeX RDF
10	Zhuofu Tao, Chen Wu, Yuan Liang, Kun Wang 0005, Lei He 0001	LW-GCN: A Lightweight FPGA-based Graph Convolutional Network Accelerator.	ACM Trans. Reconfigurable Technol. Syst.	2023	DBLP DOI BibTeX RDF
10	Junjie Zhang, Qiao Yin, Weicheng Hu, Yunfeng Li, Hu Li, Nan Ye, Bingyao Cao	EPA: The effective pipeline architecture for CNN accelerator with high performance and computing efficiency based on FPGA.	Concurr. Comput. Pract. Exp.	2023	DBLP DOI BibTeX RDF
10	Lucas Bragança, Michael Canesche, Jeronimo Costa Penha, Josué Campos, José Augusto Miranda Nacif, Ricardo S. Ferreira 0001	Fast flow cloud: A stream dataflow framework for cloud FPGA accelerator overlays at runtime.	Concurr. Comput. Pract. Exp.	2023	DBLP DOI BibTeX RDF
10	Lucas Leiva, Jordina Torrents-Barrena, Martín Vázquez 0001	FPGA-Based Accelerator for AI-Toolbox Reinforcement Learning Library.	IEEE Embed. Syst. Lett.	2023	DBLP DOI BibTeX RDF
10	Guiming Wu, Qianwen He, Jiali Jiang, Zhenxiang Zhang, Yunfeng Shi, Xin Long, Linquan Jiang, Shuangchen Li, Yuan Xie 0001, Changzheng Wei, Yuan Zhao, Ying Yan 0002, Hui Zhang 0002, Yinchao Zou	E-Booster: A Field-Programmable Gate Array-Based Accelerator for Secure Tree Boosting Using Additively Homomorphic Encryption.	IEEE Micro	2023	DBLP DOI BibTeX RDF
10	Yutaka Sugawara, Dong Chen 0005, Ruud A. Haring, Abdullah Kayi, Eugene Ratzlaff, Robert M. Senger, Krishnan Sugavanam, Ralph Bellofatto, Ben J. Nathanson, Craig B. Stunkel	Data Movement Accelerator Engines on a Prototype Power10 Processor.	IEEE Micro	2023	DBLP DOI BibTeX RDF
10	Moritz Scherer, Alfio Di Mauro, Tim Fischer 0001, Georg Rutishauser, Luca Benini	TCN-CUTIE: A 1, 036-TOp/s/W, 2.72-µJ/Inference, 12.2-mW All-Digital Ternary Accelerator in 22-nm FDX Technology.	IEEE Micro	2023	DBLP DOI BibTeX RDF
10	Yaime Fernández, Javier E. Soto, Sofía Vera, Yasmany Prieto, Cecilia Hernández, Miguel E. Figueroa	A streaming algorithm and hardware accelerator to estimate the empirical entropy of network flows.	Comput. Networks	2023	DBLP DOI BibTeX RDF
10	Carlos Megías, Víctor Vázquez, Eduardo Ros 0001, Mauro Cappelli, Javier Díaz 0001	Ethernet-based timing system for accelerator facilities: The IFMIF-DONES case.	Comput. Networks	2023	DBLP DOI BibTeX RDF
10	Hiromitsu Awano, Masanori Hashimoto	B2N2: Resource efficient Bayesian neural network accelerator using Bernoulli sampler on FPGA.	Integr.	2023	DBLP DOI BibTeX RDF
10	Jiangwei Shang, Kun Zhang, Zhan Zhang, Chuanyou Li, Hongwei Liu 0002	A high-performance convolution block oriented accelerator for MBConv-Based CNNs.	Integr.	2023	DBLP DOI BibTeX RDF
10	Li Zhang, Qishen Lv, Di Gao, Xian Zhou, Wenchao Meng, Qinmin Yang, Cheng Zhuo	A fine-grained mixed precision DNN accelerator using a two-stage big-little core RISC-V MCU.	Integr.	2023	DBLP DOI BibTeX RDF
10	Emily C. Hector, Lan Luo, Peter X.-K. Song	Parallel-and-stream accelerator for computationally fast supervised learning.	Comput. Stat. Data Anal.	2023	DBLP DOI BibTeX RDF
10	Chen Yang 0005, Kaibo Huo, Long-Fei Geng, Kuizhi Mei	DRGN: a dynamically reconfigurable accelerator for graph neural networks.	J. Ambient Intell. Humaniz. Comput.	2023	DBLP DOI BibTeX RDF
10	Tadeusz Tomczak, Mariusz Ksiezyk, Jacek Hanke, Marek Kostur, Maciej Marek	Double-precision hardware accelerator for incompressible Navier-Stokes equations solver based on discontinuous Galerkin method.	Adv. Eng. Softw.	2023	DBLP DOI BibTeX RDF
10	Min-Kwan Kee, Chiwon Han, Gi-Ho Park	An Integrated Solution to Improve Performance of In-Memory Data Caching With an Efficient Item Retrieving Mechanism and a Near-Memory Accelerator.	IEEE Access	2023	DBLP DOI BibTeX RDF
10	Aswani Radhakrishnan, Dibyasha Mahapatra, Alex James 0001	Consumer Document Analytical Accelerator Hardware.	IEEE Access	2023	DBLP DOI BibTeX RDF
10	Whoi Ree Ha, Hyunjun Kim, Yunheung Paek	Modeling and Library Support for Early-Stage Exploration of Sparse Tensor Accelerator Designs.	IEEE Access	2023	DBLP DOI BibTeX RDF
10	Nana Sutisna, Andi M. Riyadhus Ilmy, Infall Syafalni, Rahmat Mulyawan, Trio Adiono	FARANE-Q: Fast Parallel and Pipeline Q-Learning Accelerator for Configurable Reinforcement Learning SoC.	IEEE Access	2023	DBLP DOI BibTeX RDF
10	Stefano Di Matteo, Matteo Lo Gerfo, Sergio Saponara	VLSI Design and FPGA Implementation of an NTT Hardware Accelerator for Homomorphic SEAL-Embedded Library.	IEEE Access	2023	DBLP DOI BibTeX RDF
10	Chun Yan Lo, Chiu-Wing Sham, Chong Fu	Novel CNN Accelerator Design With Dual Benes Network Architecture.	IEEE Access	2023	DBLP DOI BibTeX RDF
10	Iraj Moghaddasi, Saeid Gorgin 0001, Jeong-A Lee	Dependable DNN Accelerator for Safety-Critical Systems: A Review on the Aging Perspective.	IEEE Access	2023	DBLP DOI BibTeX RDF
10	Victoria Heekyung Kim, Kyuwon Ken Choi	A Reconfigurable CNN-Based Accelerator Design for Fast and Energy-Efficient Object Detection System on Mobile FPGA.	IEEE Access	2023	DBLP DOI BibTeX RDF
10	Krishna Teja Chitty-Venkata, Yiming Bian, Murali Emani, Venkatram Vishwanath, Arun K. Somani	Differentiable Neural Architecture, Mixed Precision and Accelerator Co-Search.	IEEE Access	2023	DBLP DOI BibTeX RDF
10	Whijin Kim, Hana Kim, Jihye Lee, Hyunji Kim, Ji-Hoon Kim	Multi-Mode SpMV Accelerator for Transprecision PageRank With Real-World Graphs.	IEEE Access	2023	DBLP DOI BibTeX RDF
10	Kosuke Tatsumura, Ryo Hidaka, Jun Nakayama, Tomoya Kashimata, Masaya Yamasaki	Pairs-Trading System Using Quantum-Inspired Combinatorial Optimization Accelerator for Optimal Path Search in Market Graphs.	IEEE Access	2023	DBLP DOI BibTeX RDF
10	Ruizhi Wang, Cheng-Hsuan Wu, Makoto Takamiya	Integrated Imager and 3.22 μs/Kernel-Latency All-Digital In-Imager Global-Parallel Binary Convolutional Neural Network Accelerator for Image Processing.	IEEE Access	2023	DBLP DOI BibTeX RDF
10	Chenxiao Lin, Yuezhong Liu, Delong Shang	ORSAS: An Output Row-Stationary Accelerator for Sparse Neural Networks.	IEEE Access	2023	DBLP DOI BibTeX RDF
10	Biagio Peccerillo, Elham Cheshmikhani, Mirco Mannino, Andrea Mondelli, Sandro Bartolini	IXIAM: ISA EXtension for Integrated Accelerator Management.	IEEE Access	2023	DBLP DOI BibTeX RDF
10	Nachiketa Chatterjee, Srijoni Majumdar, Partha Pratim Das, Amlan Chakrabarti	ParallelC-Assist: Productivity Accelerator Suite Based on Dynamic Instrumentation.	IEEE Access	2023	DBLP DOI BibTeX RDF
10	Wenda Wei, Chenyang Wang, Xinyang Zheng, Hengshan Yue	An Approximate Fault-Tolerance Design for a Convolutional Neural Network Accelerator.	IT Prof.	2023	DBLP DOI BibTeX RDF
10	Dingkun Yang, Zhiyong Luo	A Parallel Processing CNN Accelerator on Embedded Devices Based on Optimized MobileNet.	IEEE Internet Things J.	2023	DBLP DOI BibTeX RDF
10	Changchun Zhou, Min Liu, Siyuan Qiu, Xugang Cao, Yuzhe Fu, Yifan He, Hailong Jiao	Sagitta: An Energy-Efficient Sparse 3D-CNN Accelerator for Real-Time 3-D Understanding.	IEEE Internet Things J.	2023	DBLP DOI BibTeX RDF
10	Shaofeng Zhao, Fang Wang 0001, Bo Liu, Dan Feng, Yang Liu	LayCO: Achieving Least Lossy Accuracy for Most Efficient RRAM-Based Deep Neural Network Accelerator via Layer-Centric Co-Optimization.	J. Comput. Sci. Technol.	2023	DBLP DOI BibTeX RDF