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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 845 occurrences of 538 keywords
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Results
Found 5134 publication records. Showing 5134 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
10 | Zifan He, Linghao Song, Robert F. Lucas, Jason Cong |
LevelST: Stream-based Accelerator for Sparse Triangular Solver. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2024, Monterey, CA, USA, March 3-5, 2024, pp. 67-77, 2024, ACM. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Sahand Kashani, Mahyar Emami, Keisuke Kamahori, Mohammad Sepehr Pourghannad, Ritik Raj, James R. Larus |
A 475 MHz Manycore FPGA Accelerator for RTL Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2024, Monterey, CA, USA, March 3-5, 2024, pp. 78-84, 2024, ACM. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Shengjun Xu, Wenlu Peng, Wenjin Huang, Qi Liu, Yihua Huang 0005 |
HR-GCN: An Efficient GCN Accelerator for Heterogeneous Graph Data and R-GCN Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2024, Monterey, CA, USA, March 3-5, 2024, pp. 186, 2024, ACM. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Kai Qian, Zheng Liu, Yinqiu Liu, Haodong Lu 0001, Zexu Zhang, Ruiqiu Chen, Kun Wang 0005 |
AutoHammer: Breaking the Compilation Wall Between Deep Neural Network and Overlay-based FPGA Accelerator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2024, Monterey, CA, USA, March 3-5, 2024, pp. 185, 2024, ACM. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Minjae Lee, Seongmin Park, Hyungmin Kim, Minyong Yoon, Janghwan Lee, Jun Won Choi, Nam Sung Kim, Mingu Kang, Jungwook Choi |
SPADE: Sparse Pillar-based 3D Object Detection Accelerator for Autonomous Driving. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: IEEE International Symposium on High-Performance Computer Architecture, HPCA 2024, Edinburgh, United Kingdom, March 2-6, 2024, pp. 454-467, 2024, IEEE, 979-8-3503-9313-2. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Gerasimos Gerogiannis, Sriram Aananthakrishnan, Josep Torrellas, Ibrahim Hur |
HotTiles: Accelerating SpMM with Heterogeneous Accelerator Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: IEEE International Symposium on High-Performance Computer Architecture, HPCA 2024, Edinburgh, United Kingdom, March 2-6, 2024, pp. 1012-1028, 2024, IEEE, 979-8-3503-9313-2. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Fuping Niu, Jianhui Yue, Jiangqiu Shen, Xiaofei Liao, Hai Jin 0001 |
FlashGNN: An In-SSD Accelerator for GNN Training. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: IEEE International Symposium on High-Performance Computer Architecture, HPCA 2024, Edinburgh, United Kingdom, March 2-6, 2024, pp. 361-378, 2024, IEEE, 979-8-3503-9313-2. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Jaeyong Jang, Yulhwa Kim, Juheun Lee, Jae-Joon Kim |
FIGNA: Integer Unit-Based Accelerator Design for FP-INT GEMM Preserving Numerical Accuracy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: IEEE International Symposium on High-Performance Computer Architecture, HPCA 2024, Edinburgh, United Kingdom, March 2-6, 2024, pp. 760-773, 2024, IEEE, 979-8-3503-9313-2. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Chenlin Ma, Yingping Wang, Fuwen Chen, Jing Liao 0008, Yi Wang 0003, Rui Mao 0001 |
Rapper: A Parameter-Aware Repair-in-Memory Accelerator for Blockchain Storage Platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: IEEE International Symposium on High-Performance Computer Architecture, HPCA 2024, Edinburgh, United Kingdom, March 2-6, 2024, pp. 468-482, 2024, IEEE, 979-8-3503-9313-2. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Zeyu Zhu, Fanrong Li, Gang Li 0015, Zejian Liu, Zitao Mo, Qinghao Hu, Xiaoyao Liang, Jian Cheng 0001 |
MEGA: A Memory-Efficient GNN Accelerator Exploiting Degree-Aware Mixed-Precision Quantization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: IEEE International Symposium on High-Performance Computer Architecture, HPCA 2024, Edinburgh, United Kingdom, March 2-6, 2024, pp. 124-138, 2024, IEEE, 979-8-3503-9313-2. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Hanqing Zhu, Jiaqi Gu, Hanrui Wang 0002, Zixuan Jiang, Zhekai Zhang, Rongxing Tang, Chenghao Feng, Song Han 0003, Ray T. Chen, David Z. Pan |
Lightening-Transformer: A Dynamically-Operated Optically-Interconnected Photonic Transformer Accelerator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: IEEE International Symposium on High-Performance Computer Architecture, HPCA 2024, Edinburgh, United Kingdom, March 2-6, 2024, pp. 686-703, 2024, IEEE, 979-8-3503-9313-2. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Prasetiyo, Adiwena Putra, Joo-Young Kim 0001 |
Morphling: A Throughput-Maximized TFHE-based Accelerator using Transform-domain Reuse. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: IEEE International Symposium on High-Performance Computer Architecture, HPCA 2024, Edinburgh, United Kingdom, March 2-6, 2024, pp. 249-262, 2024, IEEE, 979-8-3503-9313-2. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Weichuang Zhang, Jieru Zhao, Guan Shen, Quan Chen 0002, Chen Chen 0067, Minyi Guo |
An Optimizing Framework on MLIR for Efficient FPGA-based Accelerator Generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: IEEE International Symposium on High-Performance Computer Architecture, HPCA 2024, Edinburgh, United Kingdom, March 2-6, 2024, pp. 75-90, 2024, IEEE, 979-8-3503-9313-2. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Sudhanshu Gupta, Sandhya Dwarkadas |
RELIEF: Relieving Memory Pressure In SoCs Via Data Movement-Aware Accelerator Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: IEEE International Symposium on High-Performance Computer Architecture, HPCA 2024, Edinburgh, United Kingdom, March 2-6, 2024, pp. 1063-1079, 2024, IEEE, 979-8-3503-9313-2. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Jeong-In Choi, Seo-Yoon Lee, Chan-Woong Park, Jin-Gon Oh, Ji Hoon Kang 0003, Kee-Won Kwon |
Highly Linear Charging/Discharging of Charge Trap FET Using Regulated Single Pulse for Neural Accelerator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICEIC ![In: International Conference on Electronics, Information, and Communication, ICEIC 2024, Taipei, Taiwan, January 28-31, 2024, pp. 1-4, 2024, IEEE, 979-8-3503-7188-8. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Vatistas Kostalabros, Jordi Ribes-González, Oriol Farràs, Miquel Moretó, Carles Hernández 0001 |
A Safety-Critical, RISC-V SoC Integrated and ASIC-Ready Classic McEliece Accelerator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Applied Reconfigurable Computing. Architectures, Tools, and Applications - 20th International Symposium, ARC 2024, Aveiro, Portugal, March 20-22, 2024, Proceedings, pp. 282-295, 2024, Springer, 978-3-031-55672-2. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Panagiotis Mpakos, Ioanna Tasou, Chloe Alverti, Panagiotis Miliadis, Pavlos Malakonakis, Dimitris Theodoropoulos, Georgios I. Goumas, Dionisios N. Pnevmatikatos, Nectarios Koziris |
Open-Source SpMV Multiplication Hardware Accelerator for FPGA-Based HPC Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Applied Reconfigurable Computing. Architectures, Tools, and Applications - 20th International Symposium, ARC 2024, Aveiro, Portugal, March 20-22, 2024, Proceedings, pp. 19-32, 2024, Springer, 978-3-031-55672-2. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
10 | Shine Parekkadan Sunny, Satyajit Das |
Spectral-Blaze: A High-Performance FFT-Based CNN Accelerator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Applied Reconfigurable Computing. Architectures, Tools, and Applications - 20th International Symposium, ARC 2024, Aveiro, Portugal, March 20-22, 2024, Proceedings, pp. 222-238, 2024, Springer, 978-3-031-55672-2. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | José L. Mira, Jesús Barba, Julián Caba, José Antonio de la Torre, Fernando Rincón, Soledad Escolar, Juan Carlos López 0001 |
High Performance Connected Components Accelerator for Image Processing in the Edge. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Applied Reconfigurable Computing. Architectures, Tools, and Applications - 20th International Symposium, ARC 2024, Aveiro, Portugal, March 20-22, 2024, Proceedings, pp. 210-221, 2024, Springer, 978-3-031-55672-2. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Nael Mizanur Rahman, Sudarshan Sharma, Coleman DeLude, Wei Chun Wang, Justin Romberg, Saibal Mukhopadhyay |
BeamCIM: A Compute-In-Memory based Broadband Beamforming Accelerator using Linear Embedding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RWS ![In: IEEE Radio and Wireless Symposium, RWS 2024, San Antonio, TX, USA, January 21-24, 2024, pp. 46-49, 2024, IEEE, 979-8-3503-4045-7. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Alan Smith, Eric Chapman, Chintan Patel, Raja Swaminathan, John J. Wuu, Tyrone Huang, Wonjun Jung, Alexander Kaganov, Hugh McIntyre, Ramon Mangaser |
11.1 AMD InstinctTM MI300 Series Modular Chiplet Package - HPC and AI Accelerator for Exa-Class Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2024, San Francisco, CA, USA, February 18-22, 2024, pp. 490-492, 2024, IEEE, 979-8-3503-0620-0. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Yi Zhang, Wenyue Zhou, Yiwei Zhang, Houren Ji, Yongming Huang, Xiaohu You 0001, Chuan Zhang 0001 |
2.7 BayesBB: A 9.6Gbps 1.61ms Configurable All-MessagePassing Baseband-Accelerator for B5G/6G Cell-Free Massive-MIMO in 40nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2024, San Francisco, CA, USA, February 18-22, 2024, pp. 48-50, 2024, IEEE, 979-8-3503-0620-0. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Koichi Nose, Taro Fujii, Katsumi Togawa, Shunsuke Okumura, Kentaro Mikami, Daichi Hayashi, Teruhito Tanaka, Takao Toi |
20.3 A 23.9TOPS/W @ 0.8V, 130TOPS AI Accelerator with 16× Performance-Accelerable Pruning in 14nm Heterogeneous Embedded MPU for Real-Time Robot Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2024, San Francisco, CA, USA, February 18-22, 2024, pp. 364-366, 2024, IEEE, 979-8-3503-0620-0. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Samuel D. Spetalnick, Ashwin Sanjay Lele, Brian Crafton, Muya Chang, Sigang Ryu, Jong-Hyeok Yoon, Zhijian Hao, Azadeh Ansari, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Arijit Raychowdhury |
30.1 A 40nm VLIW Edge Accelerator with 5MB of 0.256pJ/b RRAM and a Localization Solver for Bristle Robot Surveillance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2024, San Francisco, CA, USA, February 18-22, 2024, pp. 482-484, 2024, IEEE, 979-8-3503-0620-0. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Maico Cassel dos Santos, Tianyu Jia, Joseph Zuckerman, Martin Cochet, Davide Giri, Erik Jens Loscalzo, Karthik Swaminathan, Thierry Tambe, Jeff Jun Zhang, Alper Buyuktosunoglu, Kuan-Lin Chiu, Giuseppe Di Guglielmo, Paolo Mantovani, Luca Piccolboni, Gabriele Tombesi, David Trilla, John-David Wellman, En-Yu Yang, Aporva Amarnath, Ying Jing, Bakshree Mishra, Joshua Park, Vignesh Suresh, Sarita V. Adve, Pradip Bose, David Brooks 0001, Luca P. Carloni, Kenneth L. Shepard, Gu-Yeon Wei |
14.5 A 12nm Linux-SMP-Capable RISC-V SoC with 14 Accelerator Types, Distributed Hardware Power Management and Flexible NoC-Based Data Orchestration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2024, San Francisco, CA, USA, February 18-22, 2024, pp. 262-264, 2024, IEEE, 979-8-3503-0620-0. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Ruiqi Guo, Lei Wang, Xiaofeng Chen, Hao Sun, Zhiheng Yue, Yubin Qin, Huiming Han, Yang Wang, Fengbin Tu, Shaojun Wei, Yang Hu 0001, Shouyi Yin |
20.2 A 28nm 74.34TFLOPS/W BF16 Heterogenous CIM-Based Accelerator Exploiting Denoising-Similarity for Diffusion Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2024, San Francisco, CA, USA, February 18-22, 2024, pp. 362-364, 2024, IEEE, 979-8-3503-0620-0. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Sylvana Sofkova Hashemi, Nataliya Berbyuk Lindström, Nina Bergdahl |
Pandemic as Digital Change Accelerator: Sustainable Reshaping of Adult Education Post Covid-19. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS ![In: 57th Hawaii International Conference on System Sciences, HICSS 2024, Hilton Hawaiian Village Waikiki Beach Resort, Hawaii, USA, January 3-6, 2024, pp. 6793-6802, 2024, ScholarSpace, 978-0-9981331-7-1. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP BibTeX RDF |
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10 | Md. Najrul Islam, Rahul Shrestha, Shubhajit Roy Chowdhury |
Low-Complexity lassification Technique and Hardware-Efficient Classify-Unit Architecture for CNN Accelerator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSID ![In: 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, VLSID 2024, Kolkata, India, January 6-10, 2024, pp. 210-215, 2024, IEEE, 979-8-3503-8440-6. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Alireza Amirshahi, Giovanni Ansaloni, David Atienza |
Accelerator-Driven Data Arrangement to Minimize Transformers Run-Time on Multi-Core Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARMA-DITAM ![In: 15th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 13th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM 2024, January 18, 2024, Munich, Germany, pp. 2:1-2:13, 2024, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 978-3-95977-307-2. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Yeong-Kang Lai, Ling-Cheng Huang |
An Efficient Convolutional Neural Network Accelerator on FPGA Platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCE ![In: IEEE International Conference on Consumer Electronics, ICCE 2024, Las Vegas, NV, USA, January 6-8, 2024, pp. 1-2, 2024, IEEE, 979-8-3503-2413-6. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Yun-Ting Chao, Jhih-Yuan Gao, Chinatip Lawansuk, Yu-Cheng Fan |
Two-Dimensional Convolution Accelerator of High-Precision Quantization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCE ![In: IEEE International Conference on Consumer Electronics, ICCE 2024, Las Vegas, NV, USA, January 6-8, 2024, pp. 1-2, 2024, IEEE, 979-8-3503-2413-6. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Daiki Furukawa, Taito Manabe, Yuichiro Shibata, Tomohiro Ueno, Kentaro Sano |
HLS Implementation of a Building Cube Stencil Computation Framework for an FPGA Accelerator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCE ![In: IEEE International Conference on Consumer Electronics, ICCE 2024, Las Vegas, NV, USA, January 6-8, 2024, pp. 1-6, 2024, IEEE, 979-8-3503-2413-6. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Yusuke Yamagiwa, Kenji Kanazawa, Moritoshi Yasunaga |
A FPGA-based Learning Accelerator for Self-Organizing Map and Its Application to Trend-Visualization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCE ![In: IEEE International Conference on Consumer Electronics, ICCE 2024, Las Vegas, NV, USA, January 6-8, 2024, pp. 1-5, 2024, IEEE, 979-8-3503-2413-6. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Mari Yasunaga, Junnosuke Suzuki, Masato Watanabe, Kazushi Kawamura, Thiem Van Chu, Masato Motomura |
High Throughput Datapath Design for Vision Permutator FPGA Accelerator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCE ![In: IEEE International Conference on Consumer Electronics, ICCE 2024, Las Vegas, NV, USA, January 6-8, 2024, pp. 1-2, 2024, IEEE, 979-8-3503-2413-6. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Minseok Seo, Xuan Truong Nguyen, Seok Joong Hwang, Yongkee Kwon, Guhyun Kim, Chanwook Park, Ilkon Kim, Jaehan Park, Jeongbin Kim 0005, Woojae Shin, Jongsoon Won, Haerang Choi, Kyuyoung Kim, Daehan Kwon, Chunseok Jeong, Sangheon Lee, Yongseok Choi, Wooseok Byun, Seungcheol Baek, Hyuk-Jae Lee, John Kim |
IANUS: Integrated Accelerator based on NPU-PIM Unified Memory System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS (3) ![In: Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3, ASPLOS 2024, La Jolla, CA, USA, 27 April 2024- 1 May 2024, pp. 545-560, 2024, ACM. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Yuhui Hao, Yiming Gan, Bo Yu 0014, Qiang Liu 0011, Yinhe Han, Zishen Wan, Shaoshan Liu |
ORIANNA: An Accelerator Generation Framework for Optimization-based Robotic Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS (2) ![In: Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2, ASPLOS 2024, La Jolla, CA, USA, 27 April 2024- 1 May 2024, pp. 813-829, 2024, ACM. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Reese Kuper, Ipoom Jeong, Yifan Yuan, Ren Wang 0001, Narayan Ranganathan, Nikhil Rao, Jiayu Hu, Sanjay Kumar, Philip Lantz, Nam Sung Kim |
A Quantitative Analysis and Guidelines of Data Streaming Accelerator in Modern Intel Xeon Scalable Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS (2) ![In: Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2, ASPLOS 2024, La Jolla, CA, USA, 27 April 2024- 1 May 2024, pp. 37-54, 2024, ACM. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Kai Zhong, Zhenhua Zhu, Guohao Dai, Hongyi Wang, Xinhao Yang, Haoyu Zhang, Jin Si, Qiuli Mao, Shulin Zeng, Ke Hong, Genghan Zhang, Huazhong Yang, Yu Wang 0002 |
FEASTA: A Flexible and Efficient Accelerator for Sparse Tensor Algebra in Machine Learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS (3) ![In: Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3, ASPLOS 2024, La Jolla, CA, USA, 27 April 2024- 1 May 2024, pp. 349-366, 2024, ACM. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Neha Prakriya, Yuze Chi, Suhail Basalama, Linghao Song, Jason Cong |
TAPA-CS: Enabling Scalable Accelerator Design on Distributed HBM-FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS (3) ![In: Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3, ASPLOS 2024, La Jolla, CA, USA, 27 April 2024- 1 May 2024, pp. 966-980, 2024, ACM. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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10 | Rama Muni Reddy Yanamala, Muralidhar Pullakandam |
A high-speed reusable quantized hardware accelerator design for CNN on constrained edge device. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Des. Autom. Embed. Syst. ![In: Des. Autom. Embed. Syst. 27(3), pp. 165-189, September 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Sang-Gyun Gi, Hyunkeun Lee, Jingon Jang, Byung-Geun Lee |
A ReRAM-Based Convolutional Neural Network Accelerator Using the Analog Layer Normalization Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Ind. Electron. ![In: IEEE Trans. Ind. Electron. 70(6), pp. 6442-6451, June 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Yue Zheng, Cheng Xing, Jie-Sheng Wang, Hao-Ming Song, Yin-Yin Bao, Xing-Yue Zhang |
An improved reptile search algorithm based on mathematical optimization accelerator and elementary functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Intell. Fuzzy Syst. ![In: J. Intell. Fuzzy Syst. 45(3), pp. 4179-4208, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Ben Keller, Rangharajan Venkatesan, Steve Dai, Stephen G. Tell, Brian Zimmer, Charbel Sakr, William J. Dally, C. Thomas Gray, Brucek Khailany |
A 95.6-TOPS/W Deep Learning Inference Accelerator With Per-Vector Scaled 4-bit Quantization in 5 nm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 58(4), pp. 1129-1141, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Dae-Han Kwon, Seongju Lee, Kyuyoung Kim, Sanghoon Oh, Joonhong Park, Gimoon Hong, Dongyoon Ka, Kyu-Dong Hwang, Jeongje Park, Kyeong Pil Kang, Jungyeon Kim, Junyeol Jeon, Nahsung Kim, Yongkee Kwon, Kornijcuk Vladimir, Woojae Shin, Jongsoon Won, Minkyu Lee, Hyunha Joo, Haerang Choi, Guhyun Kim, Byeongju An, Jaewook Lee, Donguc Ko, Younggun Jun, Ilwoong Kim, Choungki Song, Ilkon Kim, Chanwook Park, Seho Kim, Chunseok Jeong, Euicheol Lim, Dongkyun Kim, Jieun Jang, Il Park 0001, Junhyun Chun, Joohwan Cho |
A 1ynm 1.25V 8Gb 16Gb/s/Pin GDDR6-Based Accelerator-in-Memory Supporting 1TFLOPS MAC Operation and Various Activation Functions for Deep Learning Application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 58(1), pp. 291-302, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Richard Dorrance, Deepak Dasalukunte, Hechen Wang, Renzhi Liu, Brent R. Carlton |
An Energy-Efficient Bayesian Neural Network Accelerator With CiM and a Time-Interleaved Hadamard Digital GRNG Using 22-nm FinFET. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 58(10), pp. 2826-2838, October 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Chengshuo Yu, Junjie Mu, Yuqi Su, Kevin Tshun Chuan Chai, Tony Tae-Hyoung Kim, Bongjin Kim |
A Time-Domain Wavefront Computing Accelerator With a 32 × 32 Reconfigurable PE Array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 58(8), pp. 2372-2382, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Junjie Mu, Bongjin Kim |
A Dynamic-Precision Bit-Serial Computing Hardware Accelerator for Solving Partial Differential Equations Using Finite Difference Method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 58(2), pp. 543-553, February 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Fengbin Tu, Zihan Wu 0006, Yiqi Wang 0005, Ling Liang, Liu Liu 0017, Yufei Ding, Leibo Liu, Shaojun Wei, Yuan Xie 0001, Shouyi Yin |
TranCIM: Full-Digital Bitline-Transpose CIM-based Sparse Transformer Accelerator With Pipeline/Parallel Reconfigurable Modes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 58(6), pp. 1798-1809, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Hsueh-Yen Shen, Yu-Chi Lee, Tzu-Wei Tong, Chia-Hsiang Yang |
A 40-nm 91-mW, 90-fps Learning-Based Full HD Super-Resolution Accelerator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 58(2), pp. 520-529, February 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Bo Zhang, Shihui Yin, Minkyu Kim 0001, Jyotishman Saikia, Soonwan Kwon, Sungmeen Myung, Hyunsoo Kim, Sang Joon Kim, Jae-Sun Seo, Mingoo Seok |
PIMCA: A Programmable In-Memory Computing Accelerator for Energy-Efficient DNN Inference. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 58(5), pp. 1436-1449, May 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Adrian Kneip, Martin Lefebvre 0002, Julien Verecken, David Bol |
IMPACT: A 1-to-4b 813-TOPS/W 22-nm FD-SOI Compute-in-Memory CNN Accelerator Featuring a 4.2-POPS/W 146-TOPS/mm2 CIM-SRAM With Multi-Bit Analog Batch-Normalization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 58(7), pp. 1871-1884, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Zhengguo Shen, Weiwei Shan, Yuxuan Du, Ziyu Li, Jun Yang 0006 |
Beyond Eliminating Timing Margin: An Efficient and Reliable Negative Margin Timing Error Detection for Neural Network Accelerator Without Accuracy Loss. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 58(5), pp. 1462-1471, May 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Jaehoon Heo, Junsoo Kim 0002, Sukbin Lim, Wontak Han, Joo-Young Kim 0001 |
T-PIM: An Energy-Efficient Processing-in-Memory Accelerator for End-to-End On-Device Training. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 58(3), pp. 600-613, March 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Anantha P. Chandrakasan |
A Threshold Implementation-Based Neural Network Accelerator With Power and Electromagnetic Side-Channel Countermeasures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 58(1), pp. 141-154, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Mingshuo Liu, Miao Yin, Kevin Han, Ronald F. DeMara, Bo Yuan 0001, Yu Bai 0004 |
Algorithm and hardware co-design co-optimization framework for LSTM accelerator using quantized fully decomposed tensor train. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Internet Things ![In: Internet Things 22, pp. 100680, July 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Pengzhou He, Yazheng Tu, Çetin Kaya Koç, Jiafeng Xie |
Hardware-Implemented Lightweight Accelerator for Large Integer Polynomial Multiplication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Comput. Archit. Lett. ![In: IEEE Comput. Archit. Lett. 22(1), pp. 57-60, January - June 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Jonathan Garcia-Mallen, Shuohao Ping, Alex Miralles-Cordal, Ian Martin, Mukund Ramakrishnan, Yipeng Huang 0001 |
Towards an Accelerator for Differential and Algebraic Equations Useful to Scientists. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Comput. Archit. Lett. ![In: IEEE Comput. Archit. Lett. 22(2), pp. 185-188, July - December 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Venkata Siva Kumar Kokkiligadda, Vijitha Naikoti, Gaurao Sunil Patkotwar, Samrat L. Sabat, Rangababu Peesapati |
FPGA-Based Hardware Accelerator for Matrix Inversion. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SN Comput. Sci. ![In: SN Comput. Sci. 4(2), pp. 147, March 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Omar S. Saleh |
RCAM: Resource Constraint Approximate Multiplier Design for Deep Convolutional Neural Network Accelerator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SN Comput. Sci. ![In: SN Comput. Sci. 4(4), pp. 397, July 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Ratko Pilipovic, Veljko Pejovic, Octavian Machidon |
In Search of an Accuracy-Tuneable Accelerator Platform for Ubiquitous Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GetMobile Mob. Comput. Commun. ![In: GetMobile Mob. Comput. Commun. 27(1), pp. 18-22, March 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Liang Chang 0002, Xin Zhao, Jun Zhou 0017 |
ADAS: A High Computational Utilization Dynamic Reconfigurable Hardware Accelerator for Super Resolution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 16(3), pp. 47:1-47:22, September 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Zhiqiang Que, Hiroki Nakahara, Hongxiang Fan, He Li 0008, Jiuxi Meng, Kuen Hung Tsoi, Xinyu Niu, Eriko Nurvitadhi, Wayne Luk |
Remarn: A Reconfigurable Multi-threaded Multi-core Accelerator for Recurrent Neural Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 16(1), pp. 4:1-4:26, March 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Kenneth Liu, Alec Lu, Kartik Samtani, Zhenman Fang, Licheng Guo |
CHIP-KNNv2: A Configurable and High-Performance K-Nearest Neighbors Accelerator on HBM-based FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 16(4), pp. 62:1-62:26, December 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Xiangwei Li, Douglas L. Maskell, Carol Jingyi Li, Philip H. W. Leong, David Boland |
A Scalable Systolic Accelerator for Estimation of the Spectral Correlation Density Function and Its FPGA Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 16(1), pp. 9:1-9:24, March 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Tiancheng Xu, Scott Rixner, Alan L. Cox |
An FPGA Accelerator for Genome Variant Calling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 16(4), pp. 53:1-53:29, December 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Guiming Wu, Qianwen He, Jiali Jiang, Zhenxiang Zhang, Yuan Zhao, Yinchao Zou, Jie Zhang, Changzheng Wei, Ying Yan 0002, Hui Zhang |
Topgun: An ECC Accelerator for Private Set Intersection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 16(4), pp. 52:1-52:30, December 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Zhuofu Tao, Chen Wu, Yuan Liang, Kun Wang 0005, Lei He 0001 |
LW-GCN: A Lightweight FPGA-based Graph Convolutional Network Accelerator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 16(1), pp. 10:1-10:19, March 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Junjie Zhang, Qiao Yin, Weicheng Hu, Yunfeng Li, Hu Li, Nan Ye, Bingyao Cao |
EPA: The effective pipeline architecture for CNN accelerator with high performance and computing efficiency based on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Concurr. Comput. Pract. Exp. ![In: Concurr. Comput. Pract. Exp. 35(18), 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Lucas Bragança, Michael Canesche, Jeronimo Costa Penha, Josué Campos, José Augusto Miranda Nacif, Ricardo S. Ferreira 0001 |
Fast flow cloud: A stream dataflow framework for cloud FPGA accelerator overlays at runtime. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Concurr. Comput. Pract. Exp. ![In: Concurr. Comput. Pract. Exp. 35(17), 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Lucas Leiva, Jordina Torrents-Barrena, Martín Vázquez 0001 |
FPGA-Based Accelerator for AI-Toolbox Reinforcement Learning Library. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Embed. Syst. Lett. ![In: IEEE Embed. Syst. Lett. 15(2), pp. 113-116, June 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Guiming Wu, Qianwen He, Jiali Jiang, Zhenxiang Zhang, Yunfeng Shi, Xin Long, Linquan Jiang, Shuangchen Li, Yuan Xie 0001, Changzheng Wei, Yuan Zhao, Ying Yan 0002, Hui Zhang 0002, Yinchao Zou |
E-Booster: A Field-Programmable Gate Array-Based Accelerator for Secure Tree Boosting Using Additively Homomorphic Encryption. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 43(5), pp. 88-96, September - October 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Yutaka Sugawara, Dong Chen 0005, Ruud A. Haring, Abdullah Kayi, Eugene Ratzlaff, Robert M. Senger, Krishnan Sugavanam, Ralph Bellofatto, Ben J. Nathanson, Craig B. Stunkel |
Data Movement Accelerator Engines on a Prototype Power10 Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 43(1), pp. 67-75, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Moritz Scherer, Alfio Di Mauro, Tim Fischer 0001, Georg Rutishauser, Luca Benini |
TCN-CUTIE: A 1, 036-TOp/s/W, 2.72-µJ/Inference, 12.2-mW All-Digital Ternary Accelerator in 22-nm FDX Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 43(1), pp. 42-48, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Yaime Fernández, Javier E. Soto, Sofía Vera, Yasmany Prieto, Cecilia Hernández, Miguel E. Figueroa |
A streaming algorithm and hardware accelerator to estimate the empirical entropy of network flows. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Networks ![In: Comput. Networks 237, pp. 110035, December 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Carlos Megías, Víctor Vázquez, Eduardo Ros 0001, Mauro Cappelli, Javier Díaz 0001 |
Ethernet-based timing system for accelerator facilities: The IFMIF-DONES case. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Networks ![In: Comput. Networks 233, pp. 109897, September 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Hiromitsu Awano, Masanori Hashimoto |
B2N2: Resource efficient Bayesian neural network accelerator using Bernoulli sampler on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 89, pp. 1-8, March 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Jiangwei Shang, Kun Zhang, Zhan Zhang, Chuanyou Li, Hongwei Liu 0002 |
A high-performance convolution block oriented accelerator for MBConv-Based CNNs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 88, pp. 298-312, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Li Zhang, Qishen Lv, Di Gao, Xian Zhou, Wenchao Meng, Qinmin Yang, Cheng Zhuo |
A fine-grained mixed precision DNN accelerator using a two-stage big-little core RISC-V MCU. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 88, pp. 241-248, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Emily C. Hector, Lan Luo, Peter X.-K. Song |
Parallel-and-stream accelerator for computationally fast supervised learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Stat. Data Anal. ![In: Comput. Stat. Data Anal. 177, pp. 107587, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Chen Yang 0005, Kaibo Huo, Long-Fei Geng, Kuizhi Mei |
DRGN: a dynamically reconfigurable accelerator for graph neural networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Ambient Intell. Humaniz. Comput. ![In: J. Ambient Intell. Humaniz. Comput. 14(7), pp. 8985-9000, July 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Tadeusz Tomczak, Mariusz Ksiezyk, Jacek Hanke, Marek Kostur, Maciej Marek |
Double-precision hardware accelerator for incompressible Navier-Stokes equations solver based on discontinuous Galerkin method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Adv. Eng. Softw. ![In: Adv. Eng. Softw. 176, pp. 103393, February 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Min-Kwan Kee, Chiwon Han, Gi-Ho Park |
An Integrated Solution to Improve Performance of In-Memory Data Caching With an Efficient Item Retrieving Mechanism and a Near-Memory Accelerator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 78726-78736, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Aswani Radhakrishnan, Dibyasha Mahapatra, Alex James 0001 |
Consumer Document Analytical Accelerator Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 5161-5167, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Whoi Ree Ha, Hyunjun Kim, Yunheung Paek |
Modeling and Library Support for Early-Stage Exploration of Sparse Tensor Accelerator Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 55361-55369, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Nana Sutisna, Andi M. Riyadhus Ilmy, Infall Syafalni, Rahmat Mulyawan, Trio Adiono |
FARANE-Q: Fast Parallel and Pipeline Q-Learning Accelerator for Configurable Reinforcement Learning SoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 144-161, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Stefano Di Matteo, Matteo Lo Gerfo, Sergio Saponara |
VLSI Design and FPGA Implementation of an NTT Hardware Accelerator for Homomorphic SEAL-Embedded Library. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 72498-72508, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Chun Yan Lo, Chiu-Wing Sham, Chong Fu |
Novel CNN Accelerator Design With Dual Benes Network Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 59524-59529, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Iraj Moghaddasi, Saeid Gorgin 0001, Jeong-A Lee |
Dependable DNN Accelerator for Safety-Critical Systems: A Review on the Aging Perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 89803-89834, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Victoria Heekyung Kim, Kyuwon Ken Choi |
A Reconfigurable CNN-Based Accelerator Design for Fast and Energy-Efficient Object Detection System on Mobile FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 59438-59445, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Krishna Teja Chitty-Venkata, Yiming Bian, Murali Emani, Venkatram Vishwanath, Arun K. Somani |
Differentiable Neural Architecture, Mixed Precision and Accelerator Co-Search. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 106670-106687, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Whijin Kim, Hana Kim, Jihye Lee, Hyunji Kim, Ji-Hoon Kim |
Multi-Mode SpMV Accelerator for Transprecision PageRank With Real-World Graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 6261-6272, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Kosuke Tatsumura, Ryo Hidaka, Jun Nakayama, Tomoya Kashimata, Masaya Yamasaki |
Pairs-Trading System Using Quantum-Inspired Combinatorial Optimization Accelerator for Optimal Path Search in Market Graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 104406-104416, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Ruizhi Wang, Cheng-Hsuan Wu, Makoto Takamiya |
Integrated Imager and 3.22 μs/Kernel-Latency All-Digital In-Imager Global-Parallel Binary Convolutional Neural Network Accelerator for Image Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 74364-74378, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Chenxiao Lin, Yuezhong Liu, Delong Shang |
ORSAS: An Output Row-Stationary Accelerator for Sparse Neural Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 44123-44135, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Biagio Peccerillo, Elham Cheshmikhani, Mirco Mannino, Andrea Mondelli, Sandro Bartolini |
IXIAM: ISA EXtension for Integrated Accelerator Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 33768-33791, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Nachiketa Chatterjee, Srijoni Majumdar, Partha Pratim Das, Amlan Chakrabarti |
ParallelC-Assist: Productivity Accelerator Suite Based on Dynamic Instrumentation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 73599-73612, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Wenda Wei, Chenyang Wang, Xinyang Zheng, Hengshan Yue |
An Approximate Fault-Tolerance Design for a Convolutional Neural Network Accelerator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IT Prof. ![In: IT Prof. 25(4), pp. 85-90, July - August 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Dingkun Yang, Zhiyong Luo |
A Parallel Processing CNN Accelerator on Embedded Devices Based on Optimized MobileNet. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Internet Things J. ![In: IEEE Internet Things J. 10(21), pp. 18844-18852, nov1 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Changchun Zhou, Min Liu, Siyuan Qiu, Xugang Cao, Yuzhe Fu, Yifan He, Hailong Jiao |
Sagitta: An Energy-Efficient Sparse 3D-CNN Accelerator for Real-Time 3-D Understanding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Internet Things J. ![In: IEEE Internet Things J. 10(23), pp. 20703-20717, dec1 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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10 | Shaofeng Zhao, Fang Wang 0001, Bo Liu, Dan Feng, Yang Liu |
LayCO: Achieving Least Lossy Accuracy for Most Efficient RRAM-Based Deep Neural Network Accelerator via Layer-Centric Co-Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. Technol. ![In: J. Comput. Sci. Technol. 38(2), pp. 328-347, April 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
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