Search results for "asynchronous"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
23	Marius-Calin Silaghi	HOWTO: Asynchronous PFC-MRDAC -Optimization in Distributed Constraint Problems±Adopt-.	IAT	2003	DBLP DOI BibTeX RDF
23	Takahiro Hanyu, Tomohiro Takahashi, Michitaka Kameyama	Bidirectional Data Transfer Based Asynchronous VLSI System Using Multiple-Valued Current Mode Logic.	ISMVL	2003	DBLP DOI BibTeX RDF
23	Grzegorz Malewicz	A work-optimal deterministic algorithm for the asynchronous certified write-all problem.	PODC	2003	DBLP DOI BibTeX RDF	design and analysis of parallel algorithms, write-all
23	Binoy Ravindran, Gérard Le Lann, Peng Li 0020	Constructing High Assurance Asynchronous Real-Time Distributed Systems: A Proof-Based System Engineering Approach.	HASE	2002	DBLP DOI BibTeX RDF
23	Marco Tomassini, Mattias Venzi	Evolution of Asynchronous Cellular Automata for the Density Task.	PPSN	2002	DBLP DOI BibTeX RDF
23	Victor Varshavsky, Vyacheslav Marakhovsky	GALA (Globally Asynchronous - Locally Arbitrary) Design.	Concurrency and Hardware Design	2002	DBLP DOI BibTeX RDF
23	Jia Lee, Ferdinand Peper, Susumu Adachi, Kenichi Morita, Shinro Mashiko	Reversible Computation in Asynchronous Cellular Automata.	UMC	2002	DBLP DOI BibTeX RDF
23	Quoc Thai Ho, Jean-Baptiste Rigaud, Laurent Fesquet, Marc Renaudin, Robin Rolland	Implementing Asynchronous Circuits on LUT Based FPGAs.	FPL	2002	DBLP DOI BibTeX RDF
23	Nina Amla, E. Allen Emerson, Kedar S. Namjoshi, Richard J. Trefler	Visual Specifications for Modular Reasoning about Asynchronous Systems.	FORTE	2002	DBLP DOI BibTeX RDF
23	Alexander H. Jackson, Andrew M. Tyrrell	Implementing Asynchronous Embryonic Circuits using AARDVArc.	Evolvable Hardware	2002	DBLP DOI BibTeX RDF
23	Marco Tomassini, Mattias Venzi	Artificially Evolved Asynchronous Cellular Automata for the Density Task.	ACRI	2002	DBLP DOI BibTeX RDF
23	Francesco Quaglia, Andrea Santoro	Semi-asynchronous checkpointing for optimistic simulation on a Myrinet based NOW.	Workshop on Parallel and Distributed Simulation	2001	DBLP DOI BibTeX RDF
23	Alexander H. Jackson, Andrew M. Tyrrell	Asynchronous Embryonics with Reconfiguration.	ICES	2001	DBLP DOI BibTeX RDF
23	Euiseok Kim, Dong-Ik Lee	A new resource constrained asynchronous scheduling method through transformation of dataflow graphs.	ISCAS (5)	2001	DBLP DOI BibTeX RDF
23	Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee	Building a Distributed Asynchronous Control Unit through Automatic Derivation of Hierarchically Decomposed AFSMs from a CDFG.	ARVLSI	2001	DBLP DOI BibTeX RDF
23	Stephen B. Furber, David A. Edwards, Jim D. Garside	AMULET3: A 100 MIPS Asynchronous Embedded Processor.	ICCD	2000	DBLP DOI BibTeX RDF
23	Ivan Blunno, Luciano Lavagno	Automated Synthesis of Micro-Pipelines from Behavioral Verilog HDL.	ASYNC	2000	DBLP DOI BibTeX RDF
23	Lyman Do, Prabhu Ram, Pamela Drew	The Need for Distributed Asynchronous Transactions.	SIGMOD Conference	1999	DBLP DOI BibTeX RDF
23	Jerry Fjermestad, Starr Roxanne Hiltz	Asynchronous Learning Networks - Introduction.	HICSS	1999	DBLP DOI BibTeX RDF
23	J. Gong, Eddie M. C. Wong	Verification of Asynchronous Circuits with Bounded Inertial Gate Delays.	Asian Test Symposium	1998	DBLP DOI BibTeX RDF
23	John O'Leary, Geoffrey Brown	Synchronous emulation of asynchronous circuits.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1997	DBLP DOI BibTeX RDF
23	Georgios K. Theodoropoulos 0001, G. Tsakogiannis, J. V. Woods	Occam: An Asynchronous Hardware Description Language?	EUROMICRO	1997	DBLP DOI BibTeX RDF
23	Manfred Droste, Paul Gastin	Asynchronous Cellular Automata for Pomsets Without Auto-concurrency.	CONCUR	1996	DBLP DOI BibTeX RDF
23	Kent L. Einspahr, Sharad C. Seth	A switch-level test generation system for synchronous and asynchronous circuits.	J. Electron. Test.	1995	DBLP DOI BibTeX RDF	reverse time processing, stuck-open and stuck-at faults, time-frame expansion, sequential circuits, Automatic test generation
23	Ganesh Gopalakrishnan, Venkatesh Akella	High-level optimizations in compiling process descriptions to asynchronous circuits.	J. VLSI Signal Process.	1994	DBLP DOI BibTeX RDF
23	Wai-Kau Lo, Vassos Hadzilacos	Using Failure Detectors to Solve Consensus in Asynchronous Sharde-Memory Systems (Extended Abstract).	WDAG	1994	DBLP DOI BibTeX RDF
23	Aydin Üresin, Michel Dubois 0001	Parallel Asynchronous Algorithms for Discrete Data	J. ACM	1990	DBLP DOI BibTeX RDF
23	Guy L. Steele Jr.	Making Asynchronous Parallelism Safe for the World.	POPL	1990	DBLP DOI BibTeX RDF
23	Teresa H.-Y. Meng, Robert W. Brodersen, David G. Messerschmitt	Automatic synthesis of asynchronous circuits from high-level specifications.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1989	DBLP DOI BibTeX RDF
23	Aydin Üresin, Michel Dubois 0001	Generalized Asynchronous Iterations.	CONPAR	1986	DBLP DOI BibTeX RDF
23	Gabriel Bracha, Sam Toueg	Asynchronous Consensus and Broadcast Protocols	J. ACM	1985	DBLP DOI BibTeX RDF
23	Robert J. Smith 0001, James H. Tracey, W. L. Schoeffel, Gary K. Maki	Automation in the design of asynchronous sequential circuits.	AFIPS Spring Joint Computing Conference	1968	DBLP DOI BibTeX RDF
23	Jo C. Ebergen, Robert Berks	Response Time Properties of Some Asynchronous Circuits.	ASYNC	1997	DBLP DOI BibTeX RDF	variable-delay model, performance analysis, Asynchronous circuits, response time, micropipeline
23	D. K. Arvind 0001, Robert D. Mullins, Vinod E. F. Rebello	Micronets: a model for decentralising control in asynchronous processor architectures.	ASYNC	1995	DBLP DOI BibTeX RDF	decentralising control, asynchronous processor architectures, micronets, communicating resources, four-phase protocol, hazard avoidance mechanisms, SPICE-level simulations, computer architecture, computer architecture, pipeline processing, processor architectures, fine-grain concurrency
23	Mark B. Josephs	Gate-level modelling and verification of asynchronous circuits using CSPM and FDR.	ASYNC	2007	DBLP DOI BibTeX RDF
23	Alex Chow, William S. Coates, David Hopkins 0001	A Configurable Asynchronous Pseudorandom Bit Sequence Generator.	ASYNC	2007	DBLP DOI BibTeX RDF
23	Frankie Liu, Ron Ho, Robert J. Drost, Scott Fairbanks	On-chip samplers for test and debug of asynchronous circuits.	ASYNC	2007	DBLP DOI BibTeX RDF
23	Filipp Akopyan, Rajit Manohar, Alyssa B. Apsel	A Level-Crossing Flash Asynchronous Analog-to-Digital Converter.	ASYNC	2006	DBLP DOI BibTeX RDF
23	Masashi Imai, Takashi Nanya	A Novel Design Method for Asynchronous Bundled-data Transfer Circuits Considering Characteristics of Delay Variations.	ASYNC	2006	DBLP DOI BibTeX RDF
23	Song Peng, Rajit Manohar	Self-Healing Asynchronous Arrays.	ASYNC	2006	DBLP DOI BibTeX RDF
23	Ferdinand Peper	Asynchronous Architectures for Nanometer Scales.	ASYNC	2006	DBLP DOI BibTeX RDF
23	Tobias Bjerregaard, Jens Sparsø	A Scheduling Discipline for Latency and Bandwidth Guarantees in Asynchronous Network-on-Chip.	ASYNC	2005	DBLP DOI BibTeX RDF
23	Joep L. W. Kessels	Register Communication between Mutually Asynchronous Domains.	ASYNC	2005	DBLP DOI BibTeX RDF
23	Virantha N. Ekanayake, Clinton Kelly IV, Rajit Manohar	BitSNAP: Dynamic Significance Compression for a Low-Energy Sensor Network Asynchronous Processor.	ASYNC	2005	DBLP DOI BibTeX RDF
23	Nikolai Starodoubtsev, Sergei Bystrov	Behavior and Synthesis of Two-Input Gate Asynchronous Circuits.	ASYNC	2005	DBLP DOI BibTeX RDF
23	Aristides Efthymiou, W. Suntiamorntut, Jim D. Garside, L. E. M. Brackenbury	An Asynchronous, Iterative Implementation of the Original Booth Multiplication Algorithm.	ASYNC	2004	DBLP DOI BibTeX RDF
23	Alain J. Martin, Mika Nyström, Karl Papadantonakis, Paul I. Pénzes, Piyush Prakash, Catherine G. Wong, Jonathan Chang, Kevin S. Ko, Benjamin Lee, Elaine Ou, James Pugh, Eino-Ville Talvala, James T. Tong, Ahmet Tura	The Lutonium: A Sub-Nanojoule Asynchronous 8051 Microcontroller.	ASYNC	2003	DBLP DOI BibTeX RDF
23	Virantha N. Ekanayake, Rajit Manohar	Asynchronous DRAM Design and Synthesis.	ASYNC	2003	DBLP DOI BibTeX RDF
23	Yee William Li, George Patounakis, Anup P. Jose, Kenneth L. Shepard, Steven M. Nowick	Asynchronous Datapath with Software-Controlled On-Chip Adaptive Voltage Scaling for Multirate Signal Processing Application.	ASYNC	2003	DBLP DOI BibTeX RDF
23	Paul I. Pénzes, Alain J. Martin	An Energy Estimation Method for Asynchronous Circuits with Application to an Asynchronous Microprocessor.	DATE	2002	DBLP DOI BibTeX RDF
23	Metehan Özcan, Masashi Imai, Takashi Nanya	Generation and Verification of Timing Constraints for Fine-Grain Pipelined Asynchronous Data-Path Circuits.	ASYNC	2002	DBLP DOI BibTeX RDF
23	William S. Coates, Jon K. Lexau, Ian W. Jones, Scott M. Fairbanks, Ivan E. Sutherland	FLEETzero: An Asynchronous Switching Experiment.	ASYNC	2001	DBLP DOI BibTeX RDF
23	Motokazu Ozawa, Masashi Imai, Hiroshi Nakamura, Takashi Nanya, Yoichiro Ueno	Performance Evaluation of Cascade ALU Architecture for Asynchronous Super-Scalar Processors.	ASYNC	2001	DBLP DOI BibTeX RDF
23	Oliver Hauck, A. Katoch, Sorin A. Huss	VLSI System Design Using Asynchronous Wave Pipelines: A 0.35?m CMOS 1.5 GHz Elliptic Curve Public Key Cryptosystem Chip.	ASYNC	2000	DBLP DOI BibTeX RDF
23	Oliver Hauck, M. Garg, Sorin A. Huss	Two-Phase Asynchronous Wave-Pipelines and Their Application to a 2D-DCT.	ASYNC	1999	DBLP DOI BibTeX RDF
23	Shai Rotem, Ken S. Stevens, Charles Dike, Marly Roncken, Boris Agapiev, Ran Ginosar, Rakefet Kol, Peter A. Beerel, Chris J. Myers, Kenneth Y. Yun	RAPPID: An Asynchronous Instruction Length Decoder.	ASYNC	1999	DBLP DOI BibTeX RDF
23	Alexander Taubin, Alex Kondratyev, Jordi Cortadella, Luciano Lavagno	Behavioral Transformations to Increase Noise Immunity in Asynchronous Specifications.	ASYNC	1999	DBLP DOI BibTeX RDF
23	Z. John Deng, Steve R. Whiteley, Theodore Van Duzer, José A. Tierno	Asynchronous Circuits and Systems in Superconducting RSFQ Digital Technology.	ASYNC	1998	DBLP DOI BibTeX RDF
22	Venkata Nori, Baudouin Chauviere, Mackenzie J. Wibbels, Kenneth S. Stevens	A Novel Asynchronous Network-On-Chip Based on Source Asynchronous Signaling.	ASYNC	2023	DBLP DOI BibTeX RDF
22	Shomit Das, Vikas S. Vij, Kenneth S. Stevens	SAS: Source Asynchronous Signaling Protocol for Asynchronous Handshake Communication Free from Wire Delay Overhead.	ASYNC	2013	DBLP DOI BibTeX RDF
21	Yasumasa Hayashi, Takashi Matsubara 0002, Yoshiaki Koga	Implementation and evaluation for dependable bus control using CPLD.	PRDC	2000	DBLP DOI BibTeX RDF	phase control, dependable bus control, bus systems, dependable bus operations, bus phase control, reliability, dependability, sequential circuits, system buses, CPLD, asynchronous sequential logic, asynchronous sequential circuit
21	Guang Lu, Rob Simmonds, Xiao Zhonge, Brian W. Unger, Carey L. Williamson	The Performance of TCP over ATM on Lossy ADSL Networks.	LCN	2000	DBLP DOI BibTeX RDF	TCP over ATM, lossy ADSL networks, asymmetric digital subscriber line, protocol conversion overhead, data losses, noisy local loops, unidirectional bulk data transfer, independent error model, burst error model, TCP effective throughput, maximum segment size, switch buffer size, bandwidth asymmetry, noisy lines, asynchronous transfer mode, asynchronous transfer mode, transmission control protocol, noise, transport protocols, packet switching, digital simulation, simulation results, network architecture, performance metrics, simulation model, buffer storage, simulation experiments, losses, packet loss ratio, digital subscriber lines, transmission errors, channel errors, cell loss ratio
21	Hea-Sook Park, Sung-Jin Moon, Man-Sik Park, Boseob Kwon, Kwang-Suk Song	Design of inter processor communication controller using ATM switch and analysis of its optimal message length considering retransmission.	RTCSA	1997	DBLP DOI BibTeX RDF	inter processor communication controller, optimal message length, distributed large-scale multiprocessors, ATM adaptation layer, message error rate, message retransmission rate, asynchronous transfer mode, ATM switch, asynchronous transfer mode switches
21	Andreas Ermedahl, Hans Hansson, Mikael Sjödin	Response-time guarantees in ATM networks.	RTSS	1997	DBLP DOI BibTeX RDF	response time guarantees, traditional real time CPU Response Time Analysis, hard real time traffic, strict timing requirements, Calculus for Network Delays, traffic scenarios, observed worst case behaviors, CND, realistic traffic scenarios, asynchronous transfer mode, Asynchronous Transfer Mode, admission control, ATM networks, Weighted Fair Queuing, WFQ
21	Chuang Lin 0002, Bo Li 0001, Jianping Wu	Modeling ATM traffic using stochastic Petri net.	ICCCN	1997	DBLP DOI BibTeX RDF	stochastic high level Petri net, stochastic events, ATM traffic control modeling, concurrent events, nondeterministic events, state space explosion problem, bursty traffic source, traffic rate control, token condensing, performance analysis, asynchronous transfer mode, ATM networks, multimedia traffic, asynchronous events, submodels, reduction method
21	M. Talla, Ahmed K. Elhakeem, Michel Kadoch	QOS based performance of selective repeat transport user in hybrid ATM/TDMA networks.	ICCCN	1997	DBLP DOI BibTeX RDF	QOS based performance, selective repeat transport user, hybrid ATM/TDMA networks, throughput characteristics, delay characteristics, cell-level global congestion control, ATM multiplexer node, packet level control, ATM cell level, Norton equivalent queueing model, transport service characteristic, protocol efficiency, virtual leaky bucket, modified leaky bucket, flow control parameters modulation, quality of service, asynchronous transfer mode, asynchronous transfer mode, video, time division multiple access, data, voice, virtual circuit, queue management, leaky bucket, window size, packet size, cell loss probability
21	Hea-Sook Park, Sung-Jin Moon, Mee-Hye Lee, Kwang-Suk Song	The design and comparison of two IPC control methods in an ATM switching control system.	RTCSA	1996	DBLP DOI BibTeX RDF	IPC control methods, ATM switching control system, inter-processor communication control, asynchronous transfer mode switching system, indirect control method, local software, direct memory access, main control software, asynchronous transfer mode, local memory
21	Ian T. Foster, Jonathan Geisler, Bill Nickless, Warren Smith, Steven Tuecke	Software Infrastructure for the I-WAY Performance Distributed Computing Experiment.	HPDC	1996	DBLP DOI BibTeX RDF	I-WAY high-performance distributed computing experiment, high speed wide area networks, innovative applications, geographically distributed high performance computing, higher level services, large scale prototyping effort, hardware base, national scale asynchronous transfer mode network, application programming system, I-Soft, I-WAY sites, I-WAY network, parallel programming, asynchronous transfer mode, wide area networks, network operating systems, networking resources, software infrastructure
21	Leonard Barolli, Kuninobu Tanno	A Fuzzy Policing Mechanism for Still Picture in ATM Networks.	LCN	1996	DBLP DOI BibTeX RDF	selectivity characteristics, fuzzy policing mechanism, B-ISDN networks, traffic parameters control, source traffic characteristics, mean cell rate, peak cell rate, peak burst duration, cell spacer, bursty traffic sources, still picture source, simulation, quality of service, performance evaluation, asynchronous transfer mode, asynchronous transfer mode, ATM networks, fuzzy set theory, statistical multiplexing, virtual connection, link utilization
21	Chris Plate, Jack Tan	Performance Analysis of a Fault-Tolerant B-Tree ATM Switch.	LCN	1996	DBLP DOI BibTeX RDF	fault-tolerant B-tree ATM switch, ATM switching fabrics, buffering methods, simulation, performance analysis, asynchronous transfer mode, asynchronous transfer mode, routing algorithm, ATM networks, traffic models, multiplexing, real-time traffic, computer industry, telecommunications industry, data packets
21	Moon-Kyun Oh, Dae Young Kim, Sung-Woong Ra, Chi-Moon Han, Han-Kyung Kim	A Study on Point-to-Multipoint Connection Control in ATM Switching System.	LCN	1996	DBLP DOI BibTeX RDF	point-to-multipoint connection control, ATM switching system, ATM switching nodes, distributed ATM switching system, burst traffic, cell replication function, broadcasting, asynchronous transfer mode, asynchronous transfer mode, ATM network, real time processing, dynamic bandwidth allocation, B-ISDN, signaling protocol, distribution services, multicasting services, ITU-T
21	Mengjou Lin, David Singer	An Experimental ATM-Based Video-on-Demand System on a Macintosh Platform.	LCN	1996	DBLP DOI BibTeX RDF	Macintosh platform, MPEG movie playback, VOD systems, company training, home entertainment, VOD servers, network standard, Moving Picture Experts Group, VOD system design, multimedia programming environment, remote MPEG playback, asynchronous transfer mode, asynchronous transfer mode, distance learning, ATM networks, ATM networking, telemedicine, buffer management, process scheduling, distributed multimedia applications, connection networks, video on demand system, MPEG standard
21	Syed Sohel Hussain, Yih-Chyun Jenq	Analysis and Optimization of a Banyan-Based ATM Switch by Simulations.	LCN	1996	DBLP DOI BibTeX RDF	Banyan based ATM switch, switch optimization, switch analysis, delay variance, performanc analysis, uniform traffic, three-state model, nonblocking first stage, packet blocking, enhanced priority scheme, single buffer Banyan network, double buffer switching element, delay sensitive voice packet, asynchronous transfer mode, asynchronous transfer mode, delay, throughput, bandwidth, simulation results, voice traffic, data traffic
21	Kuang Klark Fan, Anura P. Jayasumana	Policing Function in ATM Network Using Multi-Layer Neural Network.	LCN	1996	DBLP DOI BibTeX RDF	policing function, user network interface, cell loss priority, ATM cell header, backpropagation learning algorithms, quality of service, asynchronous transfer mode, asynchronous transfer mode, data streams, bandwidth, ATM network, QOS, feedforward neural networks, traffic control, multilayer neural network
21	Qin Zheng	An Enhanced Timed-Round-Robin Traffic Control Scheme for ATM Networks.	LCN	1996	DBLP DOI BibTeX RDF	timed round robin traffic control, guaranteed bandwidth, dynamic bandwidth sharing, bursty data traffic, integrated digital networks, cell transmission scheduling algorithm, feedback flow control, link bandwidth, ATM switch design, asynchronous transfer mode, asynchronous transfer mode, ATM networks, real-time communications, switch architectures
21	Hemant Kanakia, Partho Pratim Mishra	Variable bit rate coding for real-time video transmission in ATM networks.	ICIP	1995	DBLP DOI BibTeX RDF	variable rate codes, variable bit rate coding, asynchronous transport multiplexing, single network, variable bandwidth, variable path delay, constant bandwidth channel, traffic classes, network usage, congestion signals, real-time systems, asynchronous transfer mode, video coding, feedback, packet switching, encoder, ATM networks, visual communication, video quality, telecommunication networks, telecommunication congestion control, perceptual quality, virtual connections, real-time video transmission
21	Branka Medved Rogina, Bozidar Vojnovic	Metastability evaluation method by propagation delay distribution measurement.	Asian Test Symposium	1995	DBLP DOI BibTeX RDF	propagation delay distribution measurement, edge-triggered flip-flops, input signals time relationship, output signal timing characteristics, analytical representation, propagation delay density distribution function, fault events, integrated propagation delay density distribution function, flip-flop normal propagation delay, resolution time constant, automatic data acquisition, complex architecture microsystems, MTBF, latch devices, custom CMOS, VLSI, VLSI, fault diagnosis, logic testing, delays, logic design, asynchronous circuits, flip-flops, data acquisition, failure analysis, reliability analysis, graphical representation, metastability, PLD, asynchronous logic, integrated circuit reliability, statistical measurement
21	Young-Keun Park, Gyungho Lee	ATM cell scheduling with queue length-based priority scheme.	ICCCN	1995	DBLP DOI BibTeX RDF	ATM cell scheduling, queue length based priority scheme, nonblocking switch, optimal input bypass queueing method, switch throughput maximisation, cell delay variations, delay variance, cell loss rate, neural network, asynchronous transfer mode, asynchronous transfer mode, ATM switches, buffer size, B-ISDN, FIFO queueing, nonuniform traffic, head-of-line blocking, input queues, cell loss probabilities
21	Y. Chang, Nada Golmie, David H. Su	Study of interoperability between EFCI and ER switch mechanisms for ABR traffic in an ATM network.	ICCCN	1995	DBLP DOI BibTeX RDF	ABR traffic, rate-based flow control, transmission rate control, feedback information, resource management cells, network switching nodes, ATM Forum Traffic Management Specification, network switch mechanism, ATM switch vendor, bandwidth allocation fairness, explicit forward congestion indication, explicit rate mechanism, end system behavior, congestion notification, algorithms, interoperability, asynchronous transfer mode, asynchronous transfer mode, ATM network, simulation results, network performance, simulation study, performance characteristics, available bit rate, destination nodes
21	Hiroshi Saito	Adaptive CACs using Bayesian performance estimation.	ICCCN	1995	DBLP DOI BibTeX RDF	Bayesian performance estimation, adaptive CAC, Bayesian regression analysis, log-transform, maximum queue length, measurement period, maximum queue size, monitored performance data, simulation, asynchronous transfer mode, asynchronous transfer mode, convergence, queueing theory, ATM networks, variance, oscillation, connection admission control, telecommunication system, cell loss ratio
21	Gerd Keiser, David Freeman, Carrie Carter	ATM test traffic generation algorithms.	ICCCN	1995	DBLP DOI BibTeX RDF	ATM test traffic generation algorithms, ATM traffic analyzer, user-selectable statistical distribution, ATM network performance, ATM switch performance, cell delay, cell error, variable-bit-rate traffic patterns, constant-bit-rate traffic patterns, asynchronous transfer mode, asynchronous transfer mode, performance metrics, video traffic, voice traffic, cell loss, data traffic
21	Latha A. Kant, William H. Sanders	Loss process analysis of the knockout switch using stochastic activity networks.	ICCCN	1995	DBLP DOI BibTeX RDF	loss process analysis, knockout switch, fast packet switches, consecutive cell losses, tagged port, telecommunication switch design, quality of service, performance, asynchronous transfer mode, asynchronous transfer mode, Markov processes, ATM networks, bursty traffic, B-ISDN, stochastic activity networks, cell loss probability
21	Chris J. Myers, Tomas Rokicki, Teresa H.-Y. Meng	Automatic synthesis of gate-level timed circuits with choice.	ARVLSI	1995	DBLP DOI BibTeX RDF	gate-level timed circuits, C-elements, explicit timing information, textual specification, conditional operation, reachable state space, semi-custom components, timing, logic CAD, asynchronous circuits, asynchronous circuits, circuit CAD, cellular arrays, circuit complexity, logic arrays, graphical representation, standard-cells, CAD tool, automatic synthesis, gate-arrays, state-space methods, AND gates, OR gates
21	Aditya Agrawal, Anand Raju, Sachidanand Varadarajan, Magdy A. Bayoumi	A scalable shared buffer ATM switch architecture.	Great Lakes Symposium on VLSI	1995	DBLP DOI BibTeX RDF	electronic switching systems, field effect transistor switches, scalable shared buffer ATM switch architecture, memory bandwidth requirement, maximum crosspoint switch size, buffer memory size, access time reduction, multiple buffer memories, 8/spl times/8 switch, 1 mum, 622 Mbit/s, asynchronous transfer mode, asynchronous transfer mode, shared memory systems, buffer storage, CMOS technology, CMOS digital integrated circuits, B-ISDN, B-ISDN, switching circuits, parallel access
21	O. A. Petlin, Stephen B. Furber	Scan testing of micropipelines.	VTS	1995	DBLP DOI BibTeX RDF	asynchronous VLSI circuit design, AMULET1 microprocessor, scan test technique, data processing blocks, combinational processing logic, state holding elements, test generation techniques, VLSI, logic testing, delays, integrated circuit testing, design for testability, logic design, asynchronous circuits, fault location, integrated circuit design, microprocessor chips, delay faults, boundary scan testing, computer testing, test patterns, single stuck-at faults, micropipelines
21	S. Suzuki, K. Kiyake	NTT's R&D and deployment activities for the information highway in Japan.	FTDCS	1995	DBLP DOI BibTeX RDF	information highway, future multimedia communication network infrastructure, high-speed communication technologies, asynchronous transfer mode based network system architecture, nationwide multimedia communication network, Internet, asynchronous transfer mode, multimedia communication, internetworking, Japan, research and development management
21	Zohir Bouzid, Maria Gradinariu Potop-Butucaru, Sébastien Tixeuil	Byzantine Convergence in Robot Networks: The Price of Asynchrony.	OPODIS	2009	DBLP DOI BibTeX RDF	Robot networks, Byzantine tolerance, Convergence, Asynchronous systems
21	Ji-Jon Sit, Rahul Sarpeshkar	A Cochlear-Implant Processor for Encoding Music and Lowering Stimulation Power.	IEEE Pervasive Comput.	2008	DBLP DOI BibTeX RDF	fine-timing information, electrode stimulation, analog processor, phase information, music processor, neural stimulation, low power, asynchronous, cochlear implant
21	Daniela E. Damian, Filippo Lanubile, Teresa Mallardo	On the Need for Mixed Media in Distributed Requirements Negotiations.	IEEE Trans. Software Eng.	2008	DBLP DOI BibTeX RDF	Experimental design, Requirements/Specifications, Asynchronous interaction, Distributed/Internet based software engineering tools and techniques, Synchronous interaction
21	Binny S. Gill, Luis Angel D. Bathen	Optimal multistream sequential prefetching in a shared cache.	ACM Trans. Storage	2007	DBLP DOI BibTeX RDF	Adaptive prefetching, asynchronous prefetching, degree of prefetch, fixed prefetching, multistream read, optimal prefetching, prefetch wastage, prestaging, sequential prefetching, synchronous prefetching, trigger distance, cache pollution
21	Antonio Fernández Anta, Michel Raynal	From an Intermittent Rotating Star to a Leader.	OPODIS	2007	DBLP DOI BibTeX RDF	Assumption coverage, Eventual t-source, Moving source, Timely link, Fault-tolerance, Distributed algorithm, System model, Asynchronous system, Failure detector, Process crash, Partial synchrony, Omega, Message pattern, Eventual leader
21	Steve Vinoski	Advanced Message Queuing Protocol.	IEEE Internet Comput.	2006	DBLP DOI BibTeX RDF	AMQP, Advanced Message Queuing Protocol, middleware, asynchronous messaging
21	Achour Mostéfaoui, Michel Raynal, Corentin Travers	Time-Free and Timer-Based Assumptions Can Be Combined to Obtain Eventual Leadership.	IEEE Trans. Parallel Distributed Syst.	2006	DBLP DOI BibTeX RDF	time-free assumption, timer-based assumption, fault tolerance, distributed algorithm, Asynchronous system, leader election, process crash, hybrid protocol
21	Mark S. Hancock, John David Miller, Saul Greenberg, Sheelagh Carpendale	Exploring visual feedback of change conflict in a distributed 3D environment.	AVI	2006	DBLP DOI BibTeX RDF	change conflict, synchronous, asynchronous, distributed collaboration, visual feedback, divergence
21	Matthew W. Heath, Wayne P. Burleson, Ian G. Harris	Synchro-Tokens: A Deterministic GALS Methodology for Chip-Level Debug and Test.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	test, debug, SoC, nondeterminism, GALS, globally asynchronous locally synchronous
21	Xiang Fu 0001, Tevfik Bultan, Jianwen Su	Synchronizability of Conversations among Web Services.	IEEE Trans. Software Eng.	2005	DBLP DOI BibTeX RDF	synchronizability, Web services, model checking, verification, conversations, asynchronous communication, realizability
21	Eitan Altman, Konstantin Avrachenkov, B. J. Prabhu	Fairness in MIMD Congestion Control Algorithms.	Telecommun. Syst.	2005	DBLP DOI BibTeX RDF	synchronous and asynchronous losses, stochastic stability, Fairness, MIMD, AIMD
21	Duarte Lopes de Oliveira, Marius Strum, Jiang Chau Wang	Miriã_SI: a tool for the synthesis of speed-independent multi burst-mode controllers.	SBCCI	2005	DBLP DOI BibTeX RDF	burst-mode, automatic synthesis, hazard, asynchronous logic, speed-independent
21	Victor V. Kuliamin, Nick V. Pakoulin, Alexander K. Petrenko	Practical Approach to Specification and Conformance Testing of Distributed Network Applications.	ISAS	2005	DBLP DOI BibTeX RDF	asynchronous events specification, distributed system specification, formalization of standards, automated test construction, specification extension of programming language, test oracle generation, UniTesK, model based testing, conformance testing, Design by Contract
21	Changshe Ma, Kefei Chen, Dong Zheng 0001, Shengli Liu 0001	Efficient and Proactive Threshold Signcryption.	ISC	2005	DBLP DOI BibTeX RDF	threshold signcryption, threshold approach, Network security, provable security, asynchronous network