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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 2974 occurrences of 1216 keywords
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Results
Found 3381 publication records. Showing 3380 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
14 | Naveen Davanam, Byeong Kil Lee |
Towards Smaller-Sized Cache for Mobile Processors Using Shared Set-Associativity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITNG ![In: Seventh International Conference on Information Technology: New Generations, ITNG 2010, Las Vegas, Nevada, USA, 12-14 April 2010, pp. 1-6, 2010, IEEE Computer Society, 978-0-7695-3984-3. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
performance, caches, computer architecture |
14 | Enrico Mezzetti, Tullio Vardanega |
Towards a Cache-Aware Development of High Integrity Real-Time Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 16th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2010, Macau, SAR, China, 23-25 August 2010, pp. 329-338, 2010, IEEE Computer Society, 978-1-4244-8480-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
software architectures, caches, Timing analysis, WCET |
14 | Georgios Keramidas, Pavlos Petoumenos, Stefanos Kaxiras |
Where replacement algorithms fail: a thorough analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 7th Conference on Computing Frontiers, 2010, Bertinoro, Italy, May 17-19, 2010, pp. 141-150, 2010, ACM, 978-1-4503-0044-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
replacement/placement policies/algorithms, profiling, memory system, last-level caches |
14 | Abel G. Silva-Filho, Cristiano C. de Araújo |
A methodology for tuning two-level cache hierarchy considering energy and performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, SBCCI 2009, Natal, Brazil, August 31 - September 3, 2009, 2009, ACM, 978-1-60558-705-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
exploration mechanism, two-level caches, embedded systems, system-on-chip, low power design, memory hierarchy |
14 | Han Wan, Xiaopeng Gao, Xiang Long, Zhiqiang Wang |
GCSim: A GPU-Based Trace-Driven Simulator for Multi-level Cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APPT ![In: Advanced Parallel Processing Technologies, 8th International Symposium, APPT 2009, Rapperswil, Switzerland, August 24-25, 2009, Proceedings, pp. 177-190, 2009, Springer, 978-3-642-03643-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
parallel algorithms, caches, GPGPU, CUDA, trace-driven simulation |
14 | Kapil Anand, Rajeev Barua |
Instruction cache locking inside a binary rewriter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2009 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2009, Grenoble, France, October 11-16, 2009, pp. 185-194, 2009, ACM. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
cache locking, embedded systems, caches, binary rewriting |
14 | Han Wan, Xiaopeng Gao, Zhiqiang Wang, Yi Li |
Using GPU to Accelerate Cache Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPA ![In: IEEE International Symposium on Parallel and Distributed Processing with Applications, ISPA 2009, Chengdu, Sichuan, China, 10-12 August 2009, pp. 565-570, 2009, IEEE Computer Society, 978-0-7695-3747-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
algorithms, caches, GPGPU, CUDA, trace-driven simulation |
14 | Doe Hyun Yoon, Mattan Erez |
Flexible cache error protection using an ECC FIFO. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the ACM/IEEE Conference on High Performance Computing, SC 2009, November 14-20, 2009, Portland, Oregon, USA, 2009, ACM, 978-1-60558-744-8. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
reliability, error correction, soft error, last-level caches |
14 | Anshul Gupta, Seid Koric, Thomas George |
Sparse matrix factorization on massively parallel computers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the ACM/IEEE Conference on High Performance Computing, SC 2009, November 14-20, 2009, Portland, Oregon, USA, 2009, ACM, 978-1-60558-744-8. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
reliability, error correction, soft error, last-level caches |
14 | Abhishek Bhattacharjee, Margaret Martonosi |
Thread criticality predictors for dynamic performance, power, and resource management in chip multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA, pp. 290-301, 2009, ACM, 978-1-60558-526-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
intel tbb, thread criticality prediction, parallel processing, caches, dvfs |
14 | Xiaoyao Liang, Ramon Canal, Gu-Yeon Wei, David M. Brooks |
Replacing 6T SRAMs with 3T1D DRAMs in the L1 Data Cache to Combat Process Variability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 28(1), pp. 60-68, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
caches, process variation, variability, dynamic memory |
14 | Bingsheng He, Qiong Luo 0001 |
Cache-oblivious databases: Limitations and opportunities. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Database Syst. ![In: ACM Trans. Database Syst. 33(2), pp. 8:1-8:42, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
cache-conscious, chip multiprocessors, data caches, simultaneous multithreading, Cache-oblivious |
14 | Emre Özer 0001, Ronald G. Dreslinski, Trevor N. Mudge, Stuart Biles, Krisztián Flautner |
Energy-Efficient Simultaneous Thread Fetch from Different Cache Levels in a Soft Real-Time SMT Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Embedded Computer Systems: Architectures, Modeling, and Simulation, 8th International Workshop, SAMOS 2008, Samos, Greece, July 21-24, 2008. Proceedings, pp. 12-22, 2008, Springer, 978-3-540-70549-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Real-time, Energy Efficiency, Caches, Embedded Processors, SMT |
14 | Jonathan Weinberg, Allan Snavely |
Accurate memory signatures and synthetic address traces for HPC applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 22nd Annual International Conference on Supercomputing, ICS 2008, Island of Kos, Greece, June 7-12, 2008, pp. 36-45, 2008, ACM, 978-1-60558-158-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
synthetic memory traces, caches, locality, hpc |
14 | Arun Kejariwal, Alexandru Nicolau, Utpal Banerjee, Alexander V. Veidenbaum, Constantine D. Polychronopoulos |
Cache-aware iteration space partitioning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPoPP ![In: Proceedings of the 13th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 2008, Salt Lake City, UT, USA, February 20-23, 2008, pp. 269-270, 2008, ACM, 978-1-59593-795-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
load balancing, caches |
14 | Ioana Burcea, Stephen Somogyi, Andreas Moshovos, Babak Falsafi |
Predictor virtualization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: Proceedings of the 13th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2008, Seattle, WA, USA, March 1-5, 2008, pp. 157-167, 2008, ACM, 978-1-59593-958-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
predictor virtualization, caches, metadata, memory hierarchy |
14 | Arne Maus, Stein Gjessing |
A Model for the Effect of Caching on Algorithmic Efficiency in Radix based Sorting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSEA ![In: Proceedings of the Second International Conference on Software Engineering Advances (ICSEA 2007), August 25-31, 2007, Cap Esterel, French Riviera, France, pp. 33, 2007, IEEE Computer Society, 0-7695-2937-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
cache friendly algorithms, caches, sorting, cache models, radix |
14 | Arun Kejariwal, Gerolf Hoflehner, Darshan Desai, Daniel M. Lavery, Alexandru Nicolau, Alexander V. Veidenbaum |
Comparative characterization of SPEC CPU2000 and CPU2006 on Itanium architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the 2007 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, SIGMETRICS 2007, San Diego, California, USA, June 12-16, 2007, pp. 361-362, 2007, ACM, 978-1-59593-639-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
SPEC CPU benchmarks, performance evaluation, caches, branch prediction |
14 | David K. Tam, Reza Azimi, Michael Stumm |
Thread clustering: sharing-aware scheduling on SMP-CMP-SMT multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EuroSys ![In: Proceedings of the 2007 EuroSys Conference, Lisbon, Portugal, March 21-23, 2007, pp. 47-58, 2007, ACM, 978-1-59593-636-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
cache behavior, detecting sharing, performance monitoring unit, single-chip multiprocessors, thread placement, resource allocation, CMP, multithreading, sharing, SMP, simultaneous multithreading, SMT, shared caches, cache locality, thread scheduling, thread migration, hardware performance monitors, hardware performance counters, affinity scheduling |
14 | Nian-Feng Tzeng |
Routing Table Partitioning for Speedy Packet Lookups in Scalable Routers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 17(5), pp. 481-494, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
line cards, prefix matching search, routing table lookups, Caches, interconnects, routers, tries, forwarding engines |
14 | Nathaniel McIntosh, Sandya Mannarswamy, Robert Hundt |
Whole-program optimization of global variable layout. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: 15th International Conference on Parallel Architectures and Compilation Techniques (PACT 2006), Seattle, Washington, USA, September 16-20, 2006, pp. 164-172, 2006, ACM, 1-59593-264-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
compiler-directed memory management, global variable layout, data caches |
14 | Dayong Gu, Clark Verbrugge, Etienne M. Gagnon |
Relative factors in performance analysis of Java virtual machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VEE ![In: Proceedings of the 2nd International Conference on Virtual Execution Environments, VEE 2006, Ottawa, Ontario, Canada, June 14-16, 2006, pp. 111-121, 2006, ACM, 978-1-59593-332-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Java, performance analysis, caches, garbage collection, hardware counters |
14 | André Seznec, Roger Espasa |
Conflict-Free Accesses to Strided Vectors on a Banked Cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 54(7), pp. 913-196, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Vector microprocessor, strided vectors, conflict free access, L2 caches |
14 | Xiaogang Qiu, Michel Dubois 0001 |
Moving Address Translation Closer to Memory in Distributed Shared-Memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 16(7), pp. 612-623, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
dynamic address translation, virtual-address caches, simulations, Multiprocessors, distributed shared memory, virtual memory |
14 | Wei Zhang 0002, Mahmut T. Kandemir, Mustafa Karaköy, Guangyu Chen |
Reducing data cache leakage energy using a compiler-based approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 4(3), pp. 652-678, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
array-intensive applications, pointer-intensive applications, data caches, energy optimization, Compiler analysis |
14 | Jayaram Mudigonda, Harrick M. Vin, Raj Yavatkar |
Managing memory access latency in packet processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the International Conference on Measurements and Modeling of Computer Systems, SIGMETRICS 2005, June 6-10, 2005, Banff, Alberta, Canada, pp. 396-397, 2005, ACM, 1-59593-022-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
multithreading, network processors, data-caches |
14 | Malik Silva |
Sparse matrix storage revisited. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the Second Conference on Computing Frontiers, 2005, Ischia, Italy, May 4-6, 2005, pp. 230-235, 2005, ACM, 1-59593-019-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
sparse matrix storage, spatial and temporal locality, caches, memory wall, sparse matrix computations |
14 | Raksit Ashok, Saurabh Chheda, Csaba Andras Moritz |
Coupling compiler-enabled and conventional memory accessing for energy efficiency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Comput. Syst. ![In: ACM Trans. Comput. Syst. 22(2), pp. 180-213, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
translation buffers, virtually addressed caches, Energy efficiency |
14 | Zhiyuan Li 0001, Yonghong Song |
Automatic tiling of iterative stencil loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Program. Lang. Syst. ![In: ACM Trans. Program. Lang. Syst. 26(6), pp. 975-1028, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Caches, optimizing compilers, loop transformations |
14 | Florin Isaila, Guido Malpohl, Vlad Olaru, Gabor Szeder, Walter F. Tichy |
Integrating collective I/O and cooperative caching into the "clusterfile" parallel file system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 18th Annual International Conference on Supercomputing, ICS 2004, Saint Malo, France, June 26 - July 01, 2004, pp. 58-67, 2004, ACM, 1-58113-839-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
non-contiguous I/O, parallel I/O, parallel file systems, cooperative caches, collective I/O |
14 | Rajeev Balasubramonian |
Cluster prefetch: tolerating on-chip wire delays in clustered microarchitectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 18th Annual International Conference on Supercomputing, ICS 2004, Saint Malo, France, June 26 - July 01, 2004, pp. 326-335, 2004, ACM, 1-58113-839-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
communication-bound processors, effective address and memory dependence prediction, processor, data prefetch, distributed caches, clustered microarchitectures |
14 | Rajeev Balasubramonian, David H. Albonesi, Alper Buyuktosunoglu, Sandhya Dwarkadas |
A Dynamically Tunable Memory Hierarchy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 52(10), pp. 1243-1258, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
High performance microprocessors, energy and performance of on-chip caches, memory hierarchy, reconfigurable architectures |
14 | Rodric M. Rabbah, Krishna V. Palem |
Data remapping for design space optimization of embedded memory systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 2(2), pp. 186-218, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
data remapping, embedded systems, caches, memory hierarchy, Design space exploration, compiler optimization, memory subsystem |
14 | Jim Nilsson, Anders Landin, Per Stenström |
The Coherence Predictor Cache: A Resource-Efficient and Accurate Coherence Prediction Infrastructure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings, pp. 10, 2003, IEEE Computer Society, 0-7695-1926-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
coherence message prediction, memory overhead, caches, Shared-memory multiprocessors |
14 | Wei Zhang 0002, Mustafa Karaköy, Mahmut T. Kandemir, Guangyu Chen |
A compiler approach for reducing data cache energy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 17th Annual International Conference on Supercomputing, ICS 2003, San Francisco, CA, USA, June 23-26, 2003, pp. 76-85, 2003, ACM, 1-58113-733-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
data caches, energy optimization, compiler analysis |
14 | Yunheung Paek, Angeles G. Navarro, Emilio L. Zapata, Jay P. Hoeflinger, David A. Padua |
An Advanced Compiler Framework for Non-Cache-Coherent Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 13(3), pp. 241-259, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
array privatization, noncoherent caches, Put/Get, compiler, multiprocessors, dependence analysis, shared-memory programming |
14 | Yan Solihin, Josep Torrellas, Jaejin Lee |
Using a User-Level Memory Thread for Correlation Prefetching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 29th International Symposium on Computer Architecture (ISCA 2002), 25-29 May 2002, Anchorage, AK, USA, pp. 171-182, 2002, IEEE Computer Society, 0-7695-1605-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
intelligent memory, correlation prefetching, caches, computer architecture, memory hierarchies, threads, data prefetching, processing-in-memory |
14 | Wei-Fen Lin, Steven K. Reinhardt, Doug Burger |
Designing a Modern Memory Hierarchy with Hardware Prefetching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 50(11), pp. 1202-1218, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Rambus DRAM, caches, Prefetching, memory bandwidth, spatial locality, memory system design |
14 | Sanjay J. Patel, Steven Lumetta |
rePLay: A Hardware Framework for Dynamic Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 50(6), pp. 590-608, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
High-performance microarchitecture, dynamic optimization, trace caches |
14 | Bruce L. Jacob, Trevor N. Mudge |
Uniprocessor Virtual Memory without TLBs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 50(5), pp. 482-499, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
virtual address translation, virtual caches, software-managed address translation, memory management, Virtual memory, translation lookaside buffers |
14 | Nathan T. Slingerland, Alan Jay Smith |
Cache performance for multimedia applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 15th international conference on Supercomputing, ICS 2001, Sorrento, Napoli, Italy, June 16-21, 2001, pp. 204-217, 2001, ACM, 1-58113-410-X. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
CPU caches, mulitmedia, simulation, cache, trace driven simulation |
14 | Chris M. Roadknight, Ian W. Marshall, Debbie Vearer |
File popularity characterisation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS Perform. Evaluation Rev. ![In: SIGMETRICS Perform. Evaluation Rev. 27(4), pp. 45-50, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
file popularity, WEB, web caches |
14 | Nancy M. Amato, Jack Perdue, Mark M. Mathis, Andrea Pietracaprina, Geppino Pucci |
Predicting Performance on SMPs. A Case Study: The SGI Power Challenge. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: Proceedings of the 14th International Parallel & Distributed Processing Symposium (IPDPS'00), Cancun, Mexico, May 1-5, 2000, pp. 729-737, 2000, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Caches, Performance Modeling, Memory Hierarchy, SMPs |
14 | Chung-Ho Chen, Arun K. Somani |
Fault Containment in Cache Memories for TMR Redundant Processor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 48(4), pp. 386-397, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
error detection and recovery, Caches, transient faults, fault-containment, redundant systems |
14 | Dimitris Nikolos, Haridimos T. Vergos |
On the Yield of VLSI Processors with On-Chip CPU Cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 48(10), pp. 1138-1144, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
on-chip CPU caches, partially good chips, Fault tolerance, yield enhancement |
14 | Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary |
Improving Cache Locality by a Combination of Loop and Data Transformation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 48(2), pp. 159-167, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
loop and data transformations, Caches, locality, optimizing compilers, data reuse |
14 | Chi-Keung Luk, Todd C. Mowry |
Automatic Compiler-Inserted Prefetching for Pointer-Based Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 48(2), pp. 134-141, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
pointer-based applications, performance evaluation, Caches, prefetching, compiler optimization, shared-memory multiprocessors, recursive data structures |
14 | John Kalamatianos, Alireza Khalafi, David R. Kaeli, Waleed Meleis |
Analysis of Temporal-Based Program Behavior for Improved Instruction Cache Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 48(2), pp. 168-175, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
program reordering, graph pruning, graph coloring, Instruction caches, temporal locality, conflict misses |
14 | Zhiyuan Li 0001 |
Reducing Cache Conflicts by Partitioning and Privatizing Shared Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: Proceedings of the 1999 International Conference on Parallel Architectures and Compilation Techniques, Newport Beach, California, USA, October 12-16, 1999, pp. 183-190, 1999, IEEE Computer Society, 0-7695-0425-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
set conflicts, array privatization, caches, shared-memory multiprocessors, Optimizing compilers |
14 | Yonghong Song, Zhiyuan Li 0001 |
New Tiling Techniques to Improve Cache Temporal Locality. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the 1999 ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), Atlanta, Georgia, USA, May 1-4, 1999, pp. 215-228, 1999, ACM, 1-58113-094-5. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
caches, optimizing compilers, loop transformations |
14 | Stefan M. Petters, Georg Färber |
Making Worst Case Execution Time Analysis for Hard Real-Time Tasks on State of the Art Processors Feasible. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 6th International Workshop on Real-Time Computing and Applications Symposium (RTCSA '99), 13-16 December 1999, Hong Kong, China, pp. 442-, 1999, IEEE Computer Society, 0-7695-0306-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
WCET analyses, caches, hard real-time, control flow analysis, automated measurement |
14 | Brian R. Fisk, R. Iris Bahar |
The Non-Critical Buffer: Using Load Latency Tolerance to Improve Data Cache Efficiency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design, VLSI in Computers and Processors, ICCD '99, Austin, Texas, USA, October 10-13, 1999, pp. 538-545, 1999, IEEE Computer Society, 0-7695-0406-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Algorithms, Architecture, Caches |
14 | Fredrik Dahlgren, Michel Dubois 0001, Per Stenström |
Performance Evaluation and Cost Analysis of Cache Protocol Extensions for Shared-Memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 47(10), pp. 1041-1055, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
competitive-update protocols, write caches, performance evaluation, prefetching, Shared-memory multiprocessors, cache-coherence protocols |
14 | Josep Torrellas, Chun Xia, Russell L. Daigle |
Optimizing the Instruction Cache Performance of the Operating System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 47(12), pp. 1363-1381, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
code layout optimization, instruction caches, Cache miss rates |
14 | Hiroyuki Tomiyama, Tohru Ishihara, Akihiko Inoue, Hiroto Yasuura |
Instruction Scheduling for Power Reduction in Processor-Based System Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 1998 Design, Automation and Test in Europe (DATE '98), February 23-26, 1998, Le Palais des Congrès de Paris, Paris, France, pp. 855-860, 1998, IEEE Computer Society, 0-8186-8359-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
Caches, Low-Power Design, Instruction Scheduling |
14 | Jude A. Rivers, Edward S. Tam, Gary S. Tyson, Edward S. Davidson, Matthew K. Farrens |
Utilizing Reuse Information in Data Cache Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Supercomputing ![In: Proceedings of the 12th international conference on Supercomputing, ICS 1998, Melbourne, Australia, July 13-17, 1998, pp. 449-456, 1998, ACM, 0-89791-998-X. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
effective address, multi-lateral caches, program counter |
14 | François Bodin, André Seznec |
Skewed Associativity Improves Program Performance and Enhances Predictability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 46(5), pp. 530-544, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
numeric kernels, loop blocking, skewed-associative caches, Cache, predictable performance |
14 | Lars Bækgaard, Leo Mark |
Incremental Computation of Set Difference Views. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Knowl. Data Eng. ![In: IEEE Trans. Knowl. Data Eng. 9(2), pp. 251-261, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
incremental view computation, view pointer caches, Set differences |
14 | Richard Uhlig, Trevor N. Mudge |
Trace-Driven Memory Simulation: A Survey. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Comput. Surv. ![In: ACM Comput. Surv. 29(2), pp. 128-170, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
memory simulation, caches, memory management, trace-driven simulation, TLBs |
14 | Jude A. Rivers, Gary S. Tyson, Edward S. Davidson, Todd M. Austin |
On High-Bandwidth Data Cache Design for Multi-Issue Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 30, Research Triangle Park, North Carolina, USA, December 1-3, 1997, pp. 46-56, 1997, ACM/IEEE Computer Society, 0-8186-7977-8. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Locality-Based Interleaving, Multiporting, High-Bandwidth Data Supply, Multi-Bank Caches |
14 | James D. Allen, David E. Schimmel |
Issues in the Design of High Performance SIMD Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 7(8), pp. 818-829, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
MasPar, caches, pipelining, SIMD, data parallel |
14 | Dimitris Nikolos, Haridimos T. Vergos |
On the Yield of VLSI Processors with on-chip CPU Cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDCC ![In: Dependable Computing - EDCC-2, Second European Dependable Computing Conference, Taormina, Italy, October 2-4, 1996, Proceedings, pp. 214-230, 1996, Springer, 3-540-61772-8. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Indexing terms On-chip CPU caches, Partially good chips, Fault Tolerance, Yield Enhancement |
14 | Rafael H. Saavedra, Alan Jay Smith |
Measuring Cache and TLB Performance and Their Effect on Benchmark Runtimes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 44(10), pp. 1223-1235, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
execution time prediction, processor caches, table lookaside buffers, Performance evaluation, memory hierarchy |
14 | Lars Bækgaard, Leo Mark |
Incremental Computation of Time-Varying Query Expressions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Knowl. Data Eng. ![In: IEEE Trans. Knowl. Data Eng. 7(4), pp. 583-590, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
Time-varying queries, incremental query computation, predicate caches, superviews, temporal databases, temporal data |
14 | Daniel H. Linder, James C. Harden |
Access Graphs: A Model for Investigating Memory Consistency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 5(1), pp. 39-52, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
access pipelining, synchronization, caches, computer architecture, computer architectures, synchronisation, shared memory systems, memory consistency, massively parallel systems |
14 | Anders Adlemo, Sven-Arne Andréasson |
Fault tolerance in partitioned manufacturing networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Syst. Integr. ![In: J. Syst. Integr. 3(1), pp. 63-84, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
quasi-partitioning, fault tolerance, Caches, fault diagnosis, fault detection, distributed computing systems, network partitioning, dynamic configuration, computer integrated manufacturing |
14 | Masaru Takesue |
Cache Memories for Data Flow Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 41(6), pp. 677-687, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
data flow machines, dataflow caches, cache block replacement, cache memories, memory architecture, buffer storage, register transfer level simulator |
14 | Richard A. Floyd, Carla Schlatter Ellis |
Directory Reference Patterns in Hierarchical File Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Knowl. Data Eng. ![In: IEEE Trans. Knowl. Data Eng. 1(2), pp. 238-247, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
file opening, file use, local file systems, hierarchical file systems, directory reference patterns, 4.2BSD UNIX system, name lookup overhead, name resolution overhead, disk blocks, IRU, caches, locality, distributed databases, environment, distributed file systems, file organisation, nodes, paths, data handling, least recently used |
14 | Kimming So, Rudolph N. Rechtschaffen |
Cache Operations by MRU Change. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 37(6), pp. 700-709, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
MRU change, most recently used, prefetch algorithms, performance evaluation, performance, storage management, CPU, content-addressable storage, virtual storage, replacement algorithms, memory access, cache simulation, set associative caches |
14 | Lucien M. Censier, Paul Feautrier |
A New Solution to Coherence Problems in Multicache Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 27(12), pp. 1112-1118, 1978. The full citation details ...](Pics/full.jpeg) |
1978 |
DBLP DOI BibTeX RDF |
nonstore-through, Caches, multiprocessor systems, memory hierarchy, coherence |
13 | João Vieira, Nuno Roma, Gabriel Falcão 0001, Pedro Tomás |
NDPmulator: Enabling Full-System Simulation for Near-Data Accelerators From Caches to DRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 12, pp. 10349-10365, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
13 | Wei Song 0002, Zihan Xue, Jinchi Han, Zhenzhen Li, Peng Liu 0005 |
Randomizing Set-Associative Caches Against Conflict-Based Cache Side-Channel Attacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 73(4), pp. 1019-1033, April 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
13 | Ali Gholami, Kai Wan, Hua Sun 0001, Mingyue Ji, Giuseppe Caire |
Coded Caching With Private Demands and Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Inf. Theory ![In: IEEE Trans. Inf. Theory 70(2), pp. 1087-1106, February 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
13 | Zafaryab Rasool, Scott Barnett, David Willie, Stefanus Kurniawan, Sherwin Balugo, Srikanth Thudumu, Mohamed Almorsy Abdelrazek |
LLMs for Test Input Generation for Semantic Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2401.08138, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
13 | Florian Mayer 0001, Julian Brandner, Michael Philippsen |
Employing polyhedral methods to optimize stencils on FPGAs with stencil-specific caches, data reuse, and wide data bursts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2401.13645, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
13 | Monolina Dutta, Anoop Thomas |
Decentralized coded caching for shared caches using erasure coding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Phys. Commun. ![In: Phys. Commun. 62, pp. 102242, February 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
13 | Daniel Lin-Kit Wong, Hao Wu, Carson Molder, Sathya Gunasekar, Jimmy Lu, Snehal Khandkar, Abhinav Sharma, Daniel S. Berger, Nathan Beckmann, Gregory R. Ganger |
Baleen: ML Admission & Prefetching for Flash Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FAST ![In: 22nd USENIX Conference on File and Storage Technologies, FAST 2024, Santa Clara, CA, USA, February 27-29, 2024., pp. 347-371, 2024, USENIX Association. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP BibTeX RDF |
|
13 | Yazhuo Zhang, Juncheng Yang, Yao Yue, Ymir Vigfusson, K. V. Rashmi |
SIEVE is Simpler than LRU: an Efficient Turn-Key Eviction Algorithm for Web Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NSDI ![In: 21st USENIX Symposium on Networked Systems Design and Implementation, NSDI 2024, Santa Clara, CA, April 15-17, 2024., 2024, USENIX Association. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP BibTeX RDF |
|
13 | Kevin Weston, Farabi Mahmud, Vahid Janfaza, Abdullah Muzahid |
SmartIndex: Learning to Index Caches to Improve Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Comput. Archit. Lett. ![In: IEEE Comput. Archit. Lett. 22(1), pp. 33-36, January - June 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Jieun Kim, Hyeonsang Eom, Yoonhee Kim |
Analyzing Data Locality on GPU Caches Using Static Profiling of Workloads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 95939-95947, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Luís Fiolhais, Manuel Goulão, Leonel Sousa |
CoDi$: Randomized Caches Through Confusion and Diffusion. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 17265-17282, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Guojun Xiong, Shufan Wang, Gang Yan, Jian Li 0008 |
Reinforcement Learning for Dynamic Dimensioning of Cloud Caches: A Restless Bandit Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE/ACM Trans. Netw. ![In: IEEE/ACM Trans. Netw. 31(5), pp. 2147-2161, October 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Sheel Sindhu Manohar, Hemangee K. Kapoor |
CAPMIG: Coherence-Aware Block Placement and Migration in Multiretention STT-RAM Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(2), pp. 411-422, February 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Majid Jalili 0001, Mattan Erez |
Harvesting L2 Caches in Server Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2301.04228, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Gururaj Saileshwar, Moinuddin K. Qureshi |
The Mirage of Breaking MIRAGE: Refuting the HPCA-2023 Paper "Are Randomized Caches Truly Random?". ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2303.15673, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Michael A. Bender, Rathish Das, Martin Farach-Colton, Guido Tagliavini |
An Associativity Threshold Phenomenon in Set-Associative Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2304.04954, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Mingi Yoo, Jaeyong Song, Hyeyoon Lee, Jounghoo Lee, Namhyung Kim, Youngsok Kim, Jinho Lee |
Slice-and-Forge: Making Better Use of Caches for Graph Convolutional Network Accelerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2301.09813, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Murali Dadi, Shubhang Pandey, Aparna Behera, T. G. Venkatesh 0001 |
Performance Study of Partitioned Caches in Asymmetric Multi-Core Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2304.05442, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Anirban Chakraborty 0003, Sarani Bhattacharya, Sayandeep Saha, Debdeep Mukhopadhyay |
A short note on the paper 'Are Randomized Caches Really Random?'. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2304.00955, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Maryam Babaie, Ayaz Akram, Jason Lowe-Power |
Enabling Design Space Exploration of DRAM Caches in Emerging Memory Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2303.13029, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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13 | Ziyue Deng, Alex Sim, Kesheng Wu, Chin Guok, Damian Hazen, Inder Monga, Fabio Andrijauskas, Frank Würthwein, Derek Weitzel |
Analyzing Transatlantic Network Traffic over Scientific Data Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2305.00856, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Tzu-Wei Yang, Seth Pollen, Mustafa Uysal, Arif Merchant, Homer Wolfmeister, Junaid Khalid |
CacheSack: Theory and Experience of Google's Admission Optimization for Datacenter Flash Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Storage ![In: ACM Trans. Storage 19(2), pp. 13:1-13:24, May 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Kanishak Vaidya, Balaji Sundar Rajan |
Multi-User PIR with Cyclic Wraparound Multi-Access Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Entropy ![In: Entropy 25(8), pp. 1228, August 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Thomas Dangl, Stewart Sentanoe, Hans P. Reiser |
VMIFresh: Efficient and fresh caches for virtual machine introspection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Secur. ![In: Comput. Secur. 135, pp. 103527, December 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Abdul Jalil, Jun Kobayashi, Takeshi Saitoh |
Performance Improvement of Multi-Robot Data Transmission in Aggregated Robot Processing Architecture with Caches and QoS Balancing Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Robotics ![In: Robotics 12(3), pp. 87, June 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Elizabath Peter, B. Sundar Rajan |
Multi-Antenna Coded Caching for Shared Caches With Arbitrary User-to-Cache Association. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Commun. Lett. ![In: IEEE Commun. Lett. 27(7), pp. 1729-1733, July 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Jan de Mooij, Matthew Gaudet, Iain Ireland, Nathan Henderson, José Nelson Amaral |
CacheIR: The Benefits of a Structured Representation for Inline Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MPLR ![In: Proceedings of the 20th ACM SIGPLAN International Conference on Managed Programming Languages and Runtimes, MPLR 2023, Cascais, Portugal, 22 October 2023, pp. 34-46, 2023, ACM. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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13 | Tyler Estro, Mário Antunes 0001, Pranav Bhandari, Anshul Gandhi, Geoff Kuenning, Yifei Liu, Carl A. Waldspurger, Avani Wildani, Erez Zadok |
Guiding Simulations of Multi-Tier Storage Caches Using Knee Detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MASCOTS ![In: 31st International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems, MASCOTS 2023, Stony Brook, NY, USA, October 16-18, 2023, pp. 1-8, 2023, IEEE, 979-8-3503-1948-4. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Yijie Zhong, Zhirong Shen, Zixiang Yu, Jiwu Shu |
Redesigning High-Performance LSM-based Key-Value Stores with Persistent CPU Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDE ![In: 39th IEEE International Conference on Data Engineering, ICDE 2023, Anaheim, CA, USA, April 3-7, 2023, pp. 1098-1111, 2023, IEEE, 979-8-3503-2227-9. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Thilo L. Fischer, Heiko Falk |
WCET Analysis of Shared Caches in Multi -Core Architectures using Event-Arrival Curves. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2023, Antwerp, Belgium, April 17-19, 2023, pp. 1-2, 2023, IEEE, 978-3-9819263-7-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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