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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 2974 occurrences of 1216 keywords
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Results
Found 3381 publication records. Showing 3380 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
14 | Naveen Davanam, Byeong Kil Lee |
Towards Smaller-Sized Cache for Mobile Processors Using Shared Set-Associativity. |
ITNG |
2010 |
DBLP DOI BibTeX RDF |
performance, caches, computer architecture |
14 | Enrico Mezzetti, Tullio Vardanega |
Towards a Cache-Aware Development of High Integrity Real-Time Systems. |
RTCSA |
2010 |
DBLP DOI BibTeX RDF |
software architectures, caches, Timing analysis, WCET |
14 | Georgios Keramidas, Pavlos Petoumenos, Stefanos Kaxiras |
Where replacement algorithms fail: a thorough analysis. |
Conf. Computing Frontiers |
2010 |
DBLP DOI BibTeX RDF |
replacement/placement policies/algorithms, profiling, memory system, last-level caches |
14 | Abel G. Silva-Filho, Cristiano C. de Araújo |
A methodology for tuning two-level cache hierarchy considering energy and performance. |
SBCCI |
2009 |
DBLP DOI BibTeX RDF |
exploration mechanism, two-level caches, embedded systems, system-on-chip, low power design, memory hierarchy |
14 | Han Wan, Xiaopeng Gao, Xiang Long, Zhiqiang Wang |
GCSim: A GPU-Based Trace-Driven Simulator for Multi-level Cache. |
APPT |
2009 |
DBLP DOI BibTeX RDF |
parallel algorithms, caches, GPGPU, CUDA, trace-driven simulation |
14 | Kapil Anand, Rajeev Barua |
Instruction cache locking inside a binary rewriter. |
CASES |
2009 |
DBLP DOI BibTeX RDF |
cache locking, embedded systems, caches, binary rewriting |
14 | Han Wan, Xiaopeng Gao, Zhiqiang Wang, Yi Li |
Using GPU to Accelerate Cache Simulation. |
ISPA |
2009 |
DBLP DOI BibTeX RDF |
algorithms, caches, GPGPU, CUDA, trace-driven simulation |
14 | Doe Hyun Yoon, Mattan Erez |
Flexible cache error protection using an ECC FIFO. |
SC |
2009 |
DBLP DOI BibTeX RDF |
reliability, error correction, soft error, last-level caches |
14 | Anshul Gupta, Seid Koric, Thomas George |
Sparse matrix factorization on massively parallel computers. |
SC |
2009 |
DBLP DOI BibTeX RDF |
reliability, error correction, soft error, last-level caches |
14 | Abhishek Bhattacharjee, Margaret Martonosi |
Thread criticality predictors for dynamic performance, power, and resource management in chip multiprocessors. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
intel tbb, thread criticality prediction, parallel processing, caches, dvfs |
14 | Xiaoyao Liang, Ramon Canal, Gu-Yeon Wei, David M. Brooks |
Replacing 6T SRAMs with 3T1D DRAMs in the L1 Data Cache to Combat Process Variability. |
IEEE Micro |
2008 |
DBLP DOI BibTeX RDF |
caches, process variation, variability, dynamic memory |
14 | Bingsheng He, Qiong Luo 0001 |
Cache-oblivious databases: Limitations and opportunities. |
ACM Trans. Database Syst. |
2008 |
DBLP DOI BibTeX RDF |
cache-conscious, chip multiprocessors, data caches, simultaneous multithreading, Cache-oblivious |
14 | Emre Özer 0001, Ronald G. Dreslinski, Trevor N. Mudge, Stuart Biles, Krisztián Flautner |
Energy-Efficient Simultaneous Thread Fetch from Different Cache Levels in a Soft Real-Time SMT Processor. |
SAMOS |
2008 |
DBLP DOI BibTeX RDF |
Real-time, Energy Efficiency, Caches, Embedded Processors, SMT |
14 | Jonathan Weinberg, Allan Snavely |
Accurate memory signatures and synthetic address traces for HPC applications. |
ICS |
2008 |
DBLP DOI BibTeX RDF |
synthetic memory traces, caches, locality, hpc |
14 | Arun Kejariwal, Alexandru Nicolau, Utpal Banerjee, Alexander V. Veidenbaum, Constantine D. Polychronopoulos |
Cache-aware iteration space partitioning. |
PPoPP |
2008 |
DBLP DOI BibTeX RDF |
load balancing, caches |
14 | Ioana Burcea, Stephen Somogyi, Andreas Moshovos, Babak Falsafi |
Predictor virtualization. |
ASPLOS |
2008 |
DBLP DOI BibTeX RDF |
predictor virtualization, caches, metadata, memory hierarchy |
14 | Arne Maus, Stein Gjessing |
A Model for the Effect of Caching on Algorithmic Efficiency in Radix based Sorting. |
ICSEA |
2007 |
DBLP DOI BibTeX RDF |
cache friendly algorithms, caches, sorting, cache models, radix |
14 | Arun Kejariwal, Gerolf Hoflehner, Darshan Desai, Daniel M. Lavery, Alexandru Nicolau, Alexander V. Veidenbaum |
Comparative characterization of SPEC CPU2000 and CPU2006 on Itanium architecture. |
SIGMETRICS |
2007 |
DBLP DOI BibTeX RDF |
SPEC CPU benchmarks, performance evaluation, caches, branch prediction |
14 | David K. Tam, Reza Azimi, Michael Stumm |
Thread clustering: sharing-aware scheduling on SMP-CMP-SMT multiprocessors. |
EuroSys |
2007 |
DBLP DOI BibTeX RDF |
cache behavior, detecting sharing, performance monitoring unit, single-chip multiprocessors, thread placement, resource allocation, CMP, multithreading, sharing, SMP, simultaneous multithreading, SMT, shared caches, cache locality, thread scheduling, thread migration, hardware performance monitors, hardware performance counters, affinity scheduling |
14 | Nian-Feng Tzeng |
Routing Table Partitioning for Speedy Packet Lookups in Scalable Routers. |
IEEE Trans. Parallel Distributed Syst. |
2006 |
DBLP DOI BibTeX RDF |
line cards, prefix matching search, routing table lookups, Caches, interconnects, routers, tries, forwarding engines |
14 | Nathaniel McIntosh, Sandya Mannarswamy, Robert Hundt |
Whole-program optimization of global variable layout. |
PACT |
2006 |
DBLP DOI BibTeX RDF |
compiler-directed memory management, global variable layout, data caches |
14 | Dayong Gu, Clark Verbrugge, Etienne M. Gagnon |
Relative factors in performance analysis of Java virtual machines. |
VEE |
2006 |
DBLP DOI BibTeX RDF |
Java, performance analysis, caches, garbage collection, hardware counters |
14 | André Seznec, Roger Espasa |
Conflict-Free Accesses to Strided Vectors on a Banked Cache. |
IEEE Trans. Computers |
2005 |
DBLP DOI BibTeX RDF |
Vector microprocessor, strided vectors, conflict free access, L2 caches |
14 | Xiaogang Qiu, Michel Dubois 0001 |
Moving Address Translation Closer to Memory in Distributed Shared-Memory Multiprocessors. |
IEEE Trans. Parallel Distributed Syst. |
2005 |
DBLP DOI BibTeX RDF |
dynamic address translation, virtual-address caches, simulations, Multiprocessors, distributed shared memory, virtual memory |
14 | Wei Zhang 0002, Mahmut T. Kandemir, Mustafa Karaköy, Guangyu Chen |
Reducing data cache leakage energy using a compiler-based approach. |
ACM Trans. Embed. Comput. Syst. |
2005 |
DBLP DOI BibTeX RDF |
array-intensive applications, pointer-intensive applications, data caches, energy optimization, Compiler analysis |
14 | Jayaram Mudigonda, Harrick M. Vin, Raj Yavatkar |
Managing memory access latency in packet processing. |
SIGMETRICS |
2005 |
DBLP DOI BibTeX RDF |
multithreading, network processors, data-caches |
14 | Malik Silva |
Sparse matrix storage revisited. |
Conf. Computing Frontiers |
2005 |
DBLP DOI BibTeX RDF |
sparse matrix storage, spatial and temporal locality, caches, memory wall, sparse matrix computations |
14 | Raksit Ashok, Saurabh Chheda, Csaba Andras Moritz |
Coupling compiler-enabled and conventional memory accessing for energy efficiency. |
ACM Trans. Comput. Syst. |
2004 |
DBLP DOI BibTeX RDF |
translation buffers, virtually addressed caches, Energy efficiency |
14 | Zhiyuan Li 0001, Yonghong Song |
Automatic tiling of iterative stencil loops. |
ACM Trans. Program. Lang. Syst. |
2004 |
DBLP DOI BibTeX RDF |
Caches, optimizing compilers, loop transformations |
14 | Florin Isaila, Guido Malpohl, Vlad Olaru, Gabor Szeder, Walter F. Tichy |
Integrating collective I/O and cooperative caching into the "clusterfile" parallel file system. |
ICS |
2004 |
DBLP DOI BibTeX RDF |
non-contiguous I/O, parallel I/O, parallel file systems, cooperative caches, collective I/O |
14 | Rajeev Balasubramonian |
Cluster prefetch: tolerating on-chip wire delays in clustered microarchitectures. |
ICS |
2004 |
DBLP DOI BibTeX RDF |
communication-bound processors, effective address and memory dependence prediction, processor, data prefetch, distributed caches, clustered microarchitectures |
14 | Rajeev Balasubramonian, David H. Albonesi, Alper Buyuktosunoglu, Sandhya Dwarkadas |
A Dynamically Tunable Memory Hierarchy. |
IEEE Trans. Computers |
2003 |
DBLP DOI BibTeX RDF |
High performance microprocessors, energy and performance of on-chip caches, memory hierarchy, reconfigurable architectures |
14 | Rodric M. Rabbah, Krishna V. Palem |
Data remapping for design space optimization of embedded memory systems. |
ACM Trans. Embed. Comput. Syst. |
2003 |
DBLP DOI BibTeX RDF |
data remapping, embedded systems, caches, memory hierarchy, Design space exploration, compiler optimization, memory subsystem |
14 | Jim Nilsson, Anders Landin, Per Stenström |
The Coherence Predictor Cache: A Resource-Efficient and Accurate Coherence Prediction Infrastructure. |
IPDPS |
2003 |
DBLP DOI BibTeX RDF |
coherence message prediction, memory overhead, caches, Shared-memory multiprocessors |
14 | Wei Zhang 0002, Mustafa Karaköy, Mahmut T. Kandemir, Guangyu Chen |
A compiler approach for reducing data cache energy. |
ICS |
2003 |
DBLP DOI BibTeX RDF |
data caches, energy optimization, compiler analysis |
14 | Yunheung Paek, Angeles G. Navarro, Emilio L. Zapata, Jay P. Hoeflinger, David A. Padua |
An Advanced Compiler Framework for Non-Cache-Coherent Multiprocessors. |
IEEE Trans. Parallel Distributed Syst. |
2002 |
DBLP DOI BibTeX RDF |
array privatization, noncoherent caches, Put/Get, compiler, multiprocessors, dependence analysis, shared-memory programming |
14 | Yan Solihin, Josep Torrellas, Jaejin Lee |
Using a User-Level Memory Thread for Correlation Prefetching. |
ISCA |
2002 |
DBLP DOI BibTeX RDF |
intelligent memory, correlation prefetching, caches, computer architecture, memory hierarchies, threads, data prefetching, processing-in-memory |
14 | Wei-Fen Lin, Steven K. Reinhardt, Doug Burger |
Designing a Modern Memory Hierarchy with Hardware Prefetching. |
IEEE Trans. Computers |
2001 |
DBLP DOI BibTeX RDF |
Rambus DRAM, caches, Prefetching, memory bandwidth, spatial locality, memory system design |
14 | Sanjay J. Patel, Steven Lumetta |
rePLay: A Hardware Framework for Dynamic Optimization. |
IEEE Trans. Computers |
2001 |
DBLP DOI BibTeX RDF |
High-performance microarchitecture, dynamic optimization, trace caches |
14 | Bruce L. Jacob, Trevor N. Mudge |
Uniprocessor Virtual Memory without TLBs. |
IEEE Trans. Computers |
2001 |
DBLP DOI BibTeX RDF |
virtual address translation, virtual caches, software-managed address translation, memory management, Virtual memory, translation lookaside buffers |
14 | Nathan T. Slingerland, Alan Jay Smith |
Cache performance for multimedia applications. |
ICS |
2001 |
DBLP DOI BibTeX RDF |
CPU caches, mulitmedia, simulation, cache, trace driven simulation |
14 | Chris M. Roadknight, Ian W. Marshall, Debbie Vearer |
File popularity characterisation. |
SIGMETRICS Perform. Evaluation Rev. |
2000 |
DBLP DOI BibTeX RDF |
file popularity, WEB, web caches |
14 | Nancy M. Amato, Jack Perdue, Mark M. Mathis, Andrea Pietracaprina, Geppino Pucci |
Predicting Performance on SMPs. A Case Study: The SGI Power Challenge. |
IPDPS |
2000 |
DBLP DOI BibTeX RDF |
Caches, Performance Modeling, Memory Hierarchy, SMPs |
14 | Chung-Ho Chen, Arun K. Somani |
Fault Containment in Cache Memories for TMR Redundant Processor Systems. |
IEEE Trans. Computers |
1999 |
DBLP DOI BibTeX RDF |
error detection and recovery, Caches, transient faults, fault-containment, redundant systems |
14 | Dimitris Nikolos, Haridimos T. Vergos |
On the Yield of VLSI Processors with On-Chip CPU Cache. |
IEEE Trans. Computers |
1999 |
DBLP DOI BibTeX RDF |
on-chip CPU caches, partially good chips, Fault tolerance, yield enhancement |
14 | Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary |
Improving Cache Locality by a Combination of Loop and Data Transformation. |
IEEE Trans. Computers |
1999 |
DBLP DOI BibTeX RDF |
loop and data transformations, Caches, locality, optimizing compilers, data reuse |
14 | Chi-Keung Luk, Todd C. Mowry |
Automatic Compiler-Inserted Prefetching for Pointer-Based Applications. |
IEEE Trans. Computers |
1999 |
DBLP DOI BibTeX RDF |
pointer-based applications, performance evaluation, Caches, prefetching, compiler optimization, shared-memory multiprocessors, recursive data structures |
14 | John Kalamatianos, Alireza Khalafi, David R. Kaeli, Waleed Meleis |
Analysis of Temporal-Based Program Behavior for Improved Instruction Cache Performance. |
IEEE Trans. Computers |
1999 |
DBLP DOI BibTeX RDF |
program reordering, graph pruning, graph coloring, Instruction caches, temporal locality, conflict misses |
14 | Zhiyuan Li 0001 |
Reducing Cache Conflicts by Partitioning and Privatizing Shared Arrays. |
IEEE PACT |
1999 |
DBLP DOI BibTeX RDF |
set conflicts, array privatization, caches, shared-memory multiprocessors, Optimizing compilers |
14 | Yonghong Song, Zhiyuan Li 0001 |
New Tiling Techniques to Improve Cache Temporal Locality. |
PLDI |
1999 |
DBLP DOI BibTeX RDF |
caches, optimizing compilers, loop transformations |
14 | Stefan M. Petters, Georg Färber |
Making Worst Case Execution Time Analysis for Hard Real-Time Tasks on State of the Art Processors Feasible. |
RTCSA |
1999 |
DBLP DOI BibTeX RDF |
WCET analyses, caches, hard real-time, control flow analysis, automated measurement |
14 | Brian R. Fisk, R. Iris Bahar |
The Non-Critical Buffer: Using Load Latency Tolerance to Improve Data Cache Efficiency. |
ICCD |
1999 |
DBLP DOI BibTeX RDF |
Algorithms, Architecture, Caches |
14 | Fredrik Dahlgren, Michel Dubois 0001, Per Stenström |
Performance Evaluation and Cost Analysis of Cache Protocol Extensions for Shared-Memory Multiprocessors. |
IEEE Trans. Computers |
1998 |
DBLP DOI BibTeX RDF |
competitive-update protocols, write caches, performance evaluation, prefetching, Shared-memory multiprocessors, cache-coherence protocols |
14 | Josep Torrellas, Chun Xia, Russell L. Daigle |
Optimizing the Instruction Cache Performance of the Operating System. |
IEEE Trans. Computers |
1998 |
DBLP DOI BibTeX RDF |
code layout optimization, instruction caches, Cache miss rates |
14 | Hiroyuki Tomiyama, Tohru Ishihara, Akihiko Inoue, Hiroto Yasuura |
Instruction Scheduling for Power Reduction in Processor-Based System Design. |
DATE |
1998 |
DBLP DOI BibTeX RDF |
Caches, Low-Power Design, Instruction Scheduling |
14 | Jude A. Rivers, Edward S. Tam, Gary S. Tyson, Edward S. Davidson, Matthew K. Farrens |
Utilizing Reuse Information in Data Cache Management. |
International Conference on Supercomputing |
1998 |
DBLP DOI BibTeX RDF |
effective address, multi-lateral caches, program counter |
14 | François Bodin, André Seznec |
Skewed Associativity Improves Program Performance and Enhances Predictability. |
IEEE Trans. Computers |
1997 |
DBLP DOI BibTeX RDF |
numeric kernels, loop blocking, skewed-associative caches, Cache, predictable performance |
14 | Lars Bækgaard, Leo Mark |
Incremental Computation of Set Difference Views. |
IEEE Trans. Knowl. Data Eng. |
1997 |
DBLP DOI BibTeX RDF |
incremental view computation, view pointer caches, Set differences |
14 | Richard Uhlig, Trevor N. Mudge |
Trace-Driven Memory Simulation: A Survey. |
ACM Comput. Surv. |
1997 |
DBLP DOI BibTeX RDF |
memory simulation, caches, memory management, trace-driven simulation, TLBs |
14 | Jude A. Rivers, Gary S. Tyson, Edward S. Davidson, Todd M. Austin |
On High-Bandwidth Data Cache Design for Multi-Issue Processors. |
MICRO |
1997 |
DBLP DOI BibTeX RDF |
Locality-Based Interleaving, Multiporting, High-Bandwidth Data Supply, Multi-Bank Caches |
14 | James D. Allen, David E. Schimmel |
Issues in the Design of High Performance SIMD Architectures. |
IEEE Trans. Parallel Distributed Syst. |
1996 |
DBLP DOI BibTeX RDF |
MasPar, caches, pipelining, SIMD, data parallel |
14 | Dimitris Nikolos, Haridimos T. Vergos |
On the Yield of VLSI Processors with on-chip CPU Cache. |
EDCC |
1996 |
DBLP DOI BibTeX RDF |
Indexing terms On-chip CPU caches, Partially good chips, Fault Tolerance, Yield Enhancement |
14 | Rafael H. Saavedra, Alan Jay Smith |
Measuring Cache and TLB Performance and Their Effect on Benchmark Runtimes. |
IEEE Trans. Computers |
1995 |
DBLP DOI BibTeX RDF |
execution time prediction, processor caches, table lookaside buffers, Performance evaluation, memory hierarchy |
14 | Lars Bækgaard, Leo Mark |
Incremental Computation of Time-Varying Query Expressions. |
IEEE Trans. Knowl. Data Eng. |
1995 |
DBLP DOI BibTeX RDF |
Time-varying queries, incremental query computation, predicate caches, superviews, temporal databases, temporal data |
14 | Daniel H. Linder, James C. Harden |
Access Graphs: A Model for Investigating Memory Consistency. |
IEEE Trans. Parallel Distributed Syst. |
1994 |
DBLP DOI BibTeX RDF |
access pipelining, synchronization, caches, computer architecture, computer architectures, synchronisation, shared memory systems, memory consistency, massively parallel systems |
14 | Anders Adlemo, Sven-Arne Andréasson |
Fault tolerance in partitioned manufacturing networks. |
J. Syst. Integr. |
1993 |
DBLP DOI BibTeX RDF |
quasi-partitioning, fault tolerance, Caches, fault diagnosis, fault detection, distributed computing systems, network partitioning, dynamic configuration, computer integrated manufacturing |
14 | Masaru Takesue |
Cache Memories for Data Flow Machines. |
IEEE Trans. Computers |
1992 |
DBLP DOI BibTeX RDF |
data flow machines, dataflow caches, cache block replacement, cache memories, memory architecture, buffer storage, register transfer level simulator |
14 | Richard A. Floyd, Carla Schlatter Ellis |
Directory Reference Patterns in Hierarchical File Systems. |
IEEE Trans. Knowl. Data Eng. |
1989 |
DBLP DOI BibTeX RDF |
file opening, file use, local file systems, hierarchical file systems, directory reference patterns, 4.2BSD UNIX system, name lookup overhead, name resolution overhead, disk blocks, IRU, caches, locality, distributed databases, environment, distributed file systems, file organisation, nodes, paths, data handling, least recently used |
14 | Kimming So, Rudolph N. Rechtschaffen |
Cache Operations by MRU Change. |
IEEE Trans. Computers |
1988 |
DBLP DOI BibTeX RDF |
MRU change, most recently used, prefetch algorithms, performance evaluation, performance, storage management, CPU, content-addressable storage, virtual storage, replacement algorithms, memory access, cache simulation, set associative caches |
14 | Lucien M. Censier, Paul Feautrier |
A New Solution to Coherence Problems in Multicache Systems. |
IEEE Trans. Computers |
1978 |
DBLP DOI BibTeX RDF |
nonstore-through, Caches, multiprocessor systems, memory hierarchy, coherence |
13 | João Vieira, Nuno Roma, Gabriel Falcão 0001, Pedro Tomás |
NDPmulator: Enabling Full-System Simulation for Near-Data Accelerators From Caches to DRAM. |
IEEE Access |
2024 |
DBLP DOI BibTeX RDF |
|
13 | Wei Song 0002, Zihan Xue, Jinchi Han, Zhenzhen Li, Peng Liu 0005 |
Randomizing Set-Associative Caches Against Conflict-Based Cache Side-Channel Attacks. |
IEEE Trans. Computers |
2024 |
DBLP DOI BibTeX RDF |
|
13 | Ali Gholami, Kai Wan, Hua Sun 0001, Mingyue Ji, Giuseppe Caire |
Coded Caching With Private Demands and Caches. |
IEEE Trans. Inf. Theory |
2024 |
DBLP DOI BibTeX RDF |
|
13 | Zafaryab Rasool, Scott Barnett, David Willie, Stefanus Kurniawan, Sherwin Balugo, Srikanth Thudumu, Mohamed Almorsy Abdelrazek |
LLMs for Test Input Generation for Semantic Caches. |
CoRR |
2024 |
DBLP DOI BibTeX RDF |
|
13 | Florian Mayer 0001, Julian Brandner, Michael Philippsen |
Employing polyhedral methods to optimize stencils on FPGAs with stencil-specific caches, data reuse, and wide data bursts. |
CoRR |
2024 |
DBLP DOI BibTeX RDF |
|
13 | Monolina Dutta, Anoop Thomas |
Decentralized coded caching for shared caches using erasure coding. |
Phys. Commun. |
2024 |
DBLP DOI BibTeX RDF |
|
13 | Daniel Lin-Kit Wong, Hao Wu, Carson Molder, Sathya Gunasekar, Jimmy Lu, Snehal Khandkar, Abhinav Sharma, Daniel S. Berger, Nathan Beckmann, Gregory R. Ganger |
Baleen: ML Admission & Prefetching for Flash Caches. |
FAST |
2024 |
DBLP BibTeX RDF |
|
13 | Yazhuo Zhang, Juncheng Yang, Yao Yue, Ymir Vigfusson, K. V. Rashmi |
SIEVE is Simpler than LRU: an Efficient Turn-Key Eviction Algorithm for Web Caches. |
NSDI |
2024 |
DBLP BibTeX RDF |
|
13 | Kevin Weston, Farabi Mahmud, Vahid Janfaza, Abdullah Muzahid |
SmartIndex: Learning to Index Caches to Improve Performance. |
IEEE Comput. Archit. Lett. |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Jieun Kim, Hyeonsang Eom, Yoonhee Kim |
Analyzing Data Locality on GPU Caches Using Static Profiling of Workloads. |
IEEE Access |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Luís Fiolhais, Manuel Goulão, Leonel Sousa |
CoDi$: Randomized Caches Through Confusion and Diffusion. |
IEEE Access |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Guojun Xiong, Shufan Wang, Gang Yan, Jian Li 0008 |
Reinforcement Learning for Dynamic Dimensioning of Cloud Caches: A Restless Bandit Approach. |
IEEE/ACM Trans. Netw. |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Sheel Sindhu Manohar, Hemangee K. Kapoor |
CAPMIG: Coherence-Aware Block Placement and Migration in Multiretention STT-RAM Caches. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Majid Jalili 0001, Mattan Erez |
Harvesting L2 Caches in Server Processors. |
CoRR |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Gururaj Saileshwar, Moinuddin K. Qureshi |
The Mirage of Breaking MIRAGE: Refuting the HPCA-2023 Paper "Are Randomized Caches Truly Random?". |
CoRR |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Michael A. Bender, Rathish Das, Martin Farach-Colton, Guido Tagliavini |
An Associativity Threshold Phenomenon in Set-Associative Caches. |
CoRR |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Mingi Yoo, Jaeyong Song, Hyeyoon Lee, Jounghoo Lee, Namhyung Kim, Youngsok Kim, Jinho Lee |
Slice-and-Forge: Making Better Use of Caches for Graph Convolutional Network Accelerators. |
CoRR |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Murali Dadi, Shubhang Pandey, Aparna Behera, T. G. Venkatesh 0001 |
Performance Study of Partitioned Caches in Asymmetric Multi-Core Processors. |
CoRR |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Anirban Chakraborty 0003, Sarani Bhattacharya, Sayandeep Saha, Debdeep Mukhopadhyay |
A short note on the paper 'Are Randomized Caches Really Random?'. |
CoRR |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Maryam Babaie, Ayaz Akram, Jason Lowe-Power |
Enabling Design Space Exploration of DRAM Caches in Emerging Memory Systems. |
CoRR |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Ziyue Deng, Alex Sim, Kesheng Wu, Chin Guok, Damian Hazen, Inder Monga, Fabio Andrijauskas, Frank Würthwein, Derek Weitzel |
Analyzing Transatlantic Network Traffic over Scientific Data Caches. |
CoRR |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Tzu-Wei Yang, Seth Pollen, Mustafa Uysal, Arif Merchant, Homer Wolfmeister, Junaid Khalid |
CacheSack: Theory and Experience of Google's Admission Optimization for Datacenter Flash Caches. |
ACM Trans. Storage |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Kanishak Vaidya, Balaji Sundar Rajan |
Multi-User PIR with Cyclic Wraparound Multi-Access Caches. |
Entropy |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Thomas Dangl, Stewart Sentanoe, Hans P. Reiser |
VMIFresh: Efficient and fresh caches for virtual machine introspection. |
Comput. Secur. |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Abdul Jalil, Jun Kobayashi, Takeshi Saitoh |
Performance Improvement of Multi-Robot Data Transmission in Aggregated Robot Processing Architecture with Caches and QoS Balancing Optimization. |
Robotics |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Elizabath Peter, B. Sundar Rajan |
Multi-Antenna Coded Caching for Shared Caches With Arbitrary User-to-Cache Association. |
IEEE Commun. Lett. |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Jan de Mooij, Matthew Gaudet, Iain Ireland, Nathan Henderson, José Nelson Amaral |
CacheIR: The Benefits of a Structured Representation for Inline Caches. |
MPLR |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Tyler Estro, Mário Antunes 0001, Pranav Bhandari, Anshul Gandhi, Geoff Kuenning, Yifei Liu, Carl A. Waldspurger, Avani Wildani, Erez Zadok |
Guiding Simulations of Multi-Tier Storage Caches Using Knee Detection. |
MASCOTS |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Yijie Zhong, Zhirong Shen, Zixiang Yu, Jiwu Shu |
Redesigning High-Performance LSM-based Key-Value Stores with Persistent CPU Caches. |
ICDE |
2023 |
DBLP DOI BibTeX RDF |
|
13 | Thilo L. Fischer, Heiko Falk |
WCET Analysis of Shared Caches in Multi -Core Architectures using Event-Arrival Curves. |
DATE |
2023 |
DBLP DOI BibTeX RDF |
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