Search results for "latency"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
18	Anthony T. C. Tam, Cho-Li Wang	Contention-Aware Communication Schedule for High-Speed Communication.	Clust. Comput.	2003	DBLP DOI BibTeX RDF	congestion control, hierarchical network, complete exchange, low-latency communication
18	Wen-Syan Li, Oliver Po, Wang-Pin Hsiung, K. Selçuk Candan, Divyakant Agrawal	Engineering and hosting adaptive freshness-sensitive web applications on data centers.	WWW	2003	DBLP DOI BibTeX RDF	database-driven web applications, net-work latency, web acceleration, response time, dynamic content, freshness
18	Won Woo Ro, Jean-Luc Gaudiot, Stephen P. Crago, Alvin M. Despain	HiDISC: A Decoupled Architecture for Data-Intensive Application.	IPDPS	2003	DBLP DOI BibTeX RDF	Memory access latency and Speculative pre-execution, Data prefetching, Data-intensive applications, Decoupled architecture
18	Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli	On-chip communication design: roadblocks and avenues.	CODES+ISSS	2003	DBLP DOI BibTeX RDF	GALS, on-chip networks, latency-insensitive design
18	José A. Tierno, Sergey V. Rylov, Alexander V. Rylyakov, Montek Singh, Steven M. Nowick	An Adaptively-Pipelined Mixed Synchronous-Asynchronous Digital FIR Filter Chip Operating at 1.3 GigaHertz.	ASYNC	2002	DBLP DOI BibTeX RDF	PRML read channel, magnetic recording, asynchronous pipeline, digital arithmetic, FIR filter, dynamic logic, high-throughput, low-latency, distributed arithmetic, mixed timing
18	Hui Wu 0001, Joxan Jaffar, Roland H. C. Yap	A Fast Algorithm for Scheduling Instructions with Deadline Constraints on RISC Processors.	IEEE PACT	2000	DBLP DOI BibTeX RDF	inter-instructional latency, instruction scheduling, feasible schedule, deadline constraints
18	Mohammad Banikazemi, Vijay Moorthy, Dhabaleswar K. Panda 0001, Lorraine Herger, Bülent Abali	Efficient Virtual Interface Architecture (VIA) Support for the IBM SP Switch-Connected NT Clusters.	IPDPS	2000	DBLP DOI BibTeX RDF	Performance Evaluation, Interconnection Networks, Cluster Computing, Distributed Memory, Scalable Architecture, Low-Latency Communication
18	Hamid Sarbazi-Azad, Mohamed Ould-Khaoua, Lewis M. Mackenzie	Performance Analysis of k-Ary n-Cubes with Fully Adaptive Routing.	ICPADS	2000	DBLP DOI BibTeX RDF	Interconnection Networks, Parallel Architectures, Performance Modeling, Wormhole Routing, Multicomputers, Virtual Channels, Message Latency, Fully-Adaptive Routing
18	Kai Hwang 0001, Choming Wang, Cho-Li Wang, Zhiwei Xu	Resource Scaling Effects on MPP Performance: The STAP Benchmark Implications.	IEEE Trans. Parallel Distributed Syst.	1999	DBLP DOI BibTeX RDF	SPMD parallelism, ASCI program, STAP benchmark, phase-parallel model, latency and bandwidth, supercomputer performance, Massively parallel processors, scalability analysis
18	Lixin Zhang 0002, John B. Carter, Wilson C. Hsieh, Sally A. McKee	Memory System Support for Image Processing.	IEEE PACT	1999	DBLP DOI BibTeX RDF	bus utilization, image processing, virtual memory, memory architecture, memory bandwidth, memory latency, cache efficiency
18	Indhira Garcés, Daniel Franco 0002, Emilio Luque	Analytical Modeling of the Network Traffic Performance.	MASCOTS	1999	DBLP DOI BibTeX RDF	Wormhole Routing Protocol Performance, Network Traffic Simulation, Interconnection Network Simulation Modeling, Latency Behavior Analytical Model
18	Jae Hun Choi, Jae-Hyuck Kwak, Earl E. Swartzlander Jr.	High-Speed CORDIC Architecture Based on Redundant Sum Formation and Overlapped s-Selection.	ICCD	1999	DBLP DOI BibTeX RDF	Low latency CORDIC architecture, Folded-transistor design, Area optimization
18	Daniel Franco 0002, Indhira Garcés, Emilio Luque	Avoiding Communication Hot-Spots in Interconnection Networks.	HICSS	1999	DBLP DOI BibTeX RDF	hot-spot avoidance, uniform latency, distributed routing balancing, Interconnection networks, adaptive routing, random routing, traffic distribution
18	David A. Koufaty, Josep Torrellas	Compiler Support for Data Forwarding in Scalable Shared-Memory Multiprocessors.	ICPP	1999	DBLP DOI BibTeX RDF	cache hierarchy performance, compiler algorithms to hide memory latency, shared-memory multiprocessors, cache coherence protocols, data forwarding
18	Hock-Beng Lim, Pen-Chung Yew	An Integrated Framework for Compiler-Directed Cache Coherence and Data Prefetching.	LCPC	1998	DBLP DOI BibTeX RDF	Compiler-directed Cache Coherence, Memory Latency Hiding, Shared-memory Multiprocessors, Data Prefetching
18	Samuel Norman Hamilton, Alex Orailoglu	Transient and Intermittent Fault Recovery without Rollback.	DFT	1998	DBLP DOI BibTeX RDF	High-Level Synthesis of Fault Tolerant ICs, Transient and Intermittent Fault Resilience, Low Latency Fault Recovery, Safety Critical Systems, Fault Tolerant Microarchitectures
18	Mahamed Adda	A Scalable Multibus Configuration for Connecting Transputer Links.	IEEE Trans. Parallel Distributed Syst.	1997	DBLP DOI BibTeX RDF	CSMA/CD protocol, scalability, latency, deadlock, packet routing, Transputers, virtual cut-through
18	Todd C. Mowry, Chi-Keung Luk	Predicting Data Cache Misses in Non-Numeric Applications through Correlation Profiling.	MICRO	1997	DBLP DOI BibTeX RDF	cache miss prediction, non-numeric applications, profiling, correlation, latency tolerance
18	Asger Munk Nielsen, David W. Matula, Chung Nan Lyu, Guy Even	Pipelined Packet-Forwarding Floating Point: II. An Adder.	IEEE Symposium on Computer Arithmetic	1997	DBLP DOI BibTeX RDF	pipelined packet forwarding floating point, floating point addition algorithm, adder pipeline design, packet forwarding pipeline paradigm, data hazards, deeply pipelined floating point pipelines, four stage execution phase pipeline, short clock period, fifteen logic levels, addition algorithm, standard binary floating point format, standard IEEE 754 rounded result, two cycle latency, cooperating multiplier pipeline, packet forwarding operand, IEEE 754 binary floating point compatibility, pipeline arithmetic
18	Minsoo Ryu, Seongsoo Hong, Manas Saksena	Streamlining real-time controller design: From performance specifications to end-to-end timing constraints.	IEEE Real Time Technology and Applications Symposium	1997	DBLP DOI BibTeX RDF	real-time controller design, performance specifications, end-to-end timing constraints, control theoretic approach, schedulability constraint, control output responses, steady state error maximum overshoot, rise time, loop processing periods, input-to-output latency, heuristic optimization algorithm, embedded real-time controller, period calibration method, real-time systems, performance requirements, control performance, real-time control system, temporal requirements, settling time
18	Vikram R. Pesati, Thomas E. Keefe, Shankar Pal	The Design and Implementation of a Multilevel Secure Log Manager.	S&P	1997	DBLP DOI BibTeX RDF	data loggers, multilevel secure log manager, log management, flush latency, performance, system design, bandwidth, system implementation, security evaluation, multilevel secure database system
18	Dean M. Tullsen, Susan J. Eggers	Effective Cache Prefetching on Bus-Based Multiprocessors	ACM Trans. Comput. Syst.	1995	DBLP DOI BibTeX RDF	bus-based multiprocessors, memory latency hiding, false sharing, cache prefetching
18	Qiang Li, David B. Gustavson	Fat-tree for local area multiprocessors.	IPPS	1995	DBLP DOI BibTeX RDF	local area multiprocessors, LAMP, high-performance low-cost parallel computing, LAN-size area, remote data cache, high performance multiprocessor, point-to-point physical connections, high system throughput, fat-tree topology, cable length, link clock speeds, biCMOS chips, performance evaluation, parallel architectures, parallel architecture, multiprocessor interconnection networks, local area networks, latency, packet switching, packet switch, CMOS, shared memory systems, distributed memory systems, simulation results, cache storage, system buses, SCI, buffer requirements, distributed-shared-memory multiprocessor, scalable coherent interface
18	Klaus E. Schauser, Chris J. Scheiman	Experience with active messages on the Meiko CS-2.	IPPS	1995	DBLP DOI BibTeX RDF	Meiko CS-2, network communication co-processors, parallel architectures, message passing, parallel machines, parallel machines, low latency, communication architecture, active messages
18	Masato Oguchi, Hitoshi Aida, Tadao Saito	A Proposal for a DSM Architecture Suitable for a Widely Distributed Environment and its Evaluation.	HPDC	1995	DBLP DOI BibTeX RDF	distributed shared memory architecture, widely distributed environment, functionally distributed computing, software programming, replicated shared memory, internal machine memory, SPARCstations, SCRAMNet, latency hiding techniques, performance evaluation, parallel architectures, shared memory systems, distributed memory systems, data prefetching, multi-thread programming, shared virtual memory
18	David M. Koppelman	Reducing PE/Memory Traffic in Multiprocessors by the Difference Coding of Memory Addresses.	IEEE Trans. Parallel Distributed Syst.	1994	DBLP DOI BibTeX RDF	memory traffic, difference coding, memory addresses, shared memory parallel computer, trace-drivensimulation, traffic volume, lower cost, lower latency network, networklatency, virtual machines, multiprocessors, message passing, multiprocessor interconnection networks, memories, shared memory systems, storage management, buffer storage, processing elements, coherent cache
18	Stefan Lüpke	Accelerated Access to Shared Distributed Arrays on Distribued Memory Systems by Access Objects.	CONPAR	1994	DBLP DOI BibTeX RDF	access objects, data prefetch, distributed data structures, latency hiding, virtual shared memory
18	Yuval Tamir, Hsin-Chou Chi	Symmetric Crossbar Arbiters for VLSI Communication Switches.	IEEE Trans. Parallel Distributed Syst.	1993	DBLP DOI BibTeX RDF	VLSI communication switches, symmetric crossbar arbiters, multistage interconnectionnetwork, switch arbitration policy, worst-case latency, circuitsimulation, performance evaluation, VLSI, circuit analysis computing, network simulations, critical path, multiprocessorinterconnection networks, system clock
16	Shao-Jung Lu, Wei-Xun Chen, Yu-Shao Su, Yu-Shou Chang, Yao-Wen Liu, Chi-Yu Li, Guan-Hua Tu	Practical Latency-Aware Scheduling for Low-Latency Elephant VR Flows in Wi-Fi Networks.	PerCom	2024	DBLP DOI BibTeX RDF
16	Grégoire Hugues Cattan, César Mendoza	Tagging Latency Estimator: A Standalone Software for Estimating Latency of Event-Related Potentials in P300-based Brain-Computer Interfaces.	J. Open Source Softw.	2023	DBLP DOI BibTeX RDF
16	Yuichi Hiroi, Akira Watanabe, Yuri Mikawa, Yuta Itoh 0001	Low-Latency Beaming Display: Implementation of Wearable, 133 μs Motion-to-Photon Latency Near-Eye Display.	IEEE Trans. Vis. Comput. Graph.	2023	DBLP DOI BibTeX RDF
16	Lintao Li, Wei Chen 0002, Petar Popovski, Khaled B. Letaief	Reliability-Latency-Rate Tradeoff in Low-Latency Communications with Finite-Blocklength Coding.	CoRR	2023	DBLP DOI BibTeX RDF
16	Takumi Fujimori, Shuou Nomura	BOOSTER: Rethinking the erase operation of low-latency SSDs to achieve high throughput and less long latency.	SYSTOR	2023	DBLP DOI BibTeX RDF
16	Nuoya Zhang, Ping He, Zuping Wu, Pinghui Chen, Lei Wang 0118, Zhenye Ye	Latency Analysis and Trial for 5G Ultra Reliable Low Latency Communication.	ICCC Workshops	2023	DBLP DOI BibTeX RDF
16	Feixue Han, Mowei Wang, Yong Cui 0001, Qing Li 0006, Ru Liang, Yashe Liu, Yong Jiang 0001	Future Data Center Networking: From Low Latency to Deterministic Latency.	IEEE Netw.	2022	DBLP DOI BibTeX RDF
16	Brian Eaton, Jeff Sterart, Jon Tedesco, N. Cihan Tas	Distributed Latency Profiling through Critical Path Tracing: CPT can provide actionable and precise latency analysis.	ACM Queue	2022	DBLP DOI BibTeX RDF
16	Dang Van-Huynh, Van-Dinh Nguyen, Saeed R. Khosravirad, Trung Q. Duong	Minimising Offloading Latency for Edge-Cloud Systems with Ultra-Reliable and Low-Latency Communications.	ICC	2022	DBLP DOI BibTeX RDF
16	Dang Van-Huynh, Van-Dinh Nguyen, Saeed R. Khosravirad, Trung Q. Duong	Fairness-aware Latency Minimisation in Digital Twin-aided Edge Computing with Ultra-Reliable and Low-Latency Communications: A Distributed Optimisation Approach (Invited Paper).	IEEECONF	2022	DBLP DOI BibTeX RDF
16	Mingzhe Liu, Haikun Liu, Chencheng Ye, Xiaofei Liao, Hai Jin 0001, Yu Zhang 0027, Ran Zheng, Liting Hu	Towards low-latency I/O services for mixed workloads using ultra-low latency SSDs.	ICS	2022	DBLP DOI BibTeX RDF
16	Dawei Sun 0001, Hanyu He, Hongbin Yan, Shang Gao 0003, Xunyun Liu, Xinqi Zheng	Lr-Stream: Using latency and resource aware scheduling to improve latency and throughput for streaming applications.	Future Gener. Comput. Syst.	2021	DBLP DOI BibTeX RDF
16	Mohammad Reza Amini, Mohammed W. Baidas	Reliability-Latency Tradeoffs in Random Access Ultra-Reliable Low-Latency Energy-Harvesting 5G Networks with Finite Blocklength Codes.	PIMRC	2020	DBLP DOI BibTeX RDF
16	Jan-Philipp Stauffert, Florian Niebling, Marc Erich Latoschik	Simultaneous Run-Time Measurement of Motion-to-Photon Latency and Latency Jitter.	VR	2020	DBLP DOI BibTeX RDF
16	Robert Gruen, Eyal Ofek, Anthony Steed, Ran Gal, Mike Sinclair, Mar González-Franco	Measuring System Visual Latency through Cognitive Latency on Video See-Through AR devices.	VR	2020	DBLP DOI BibTeX RDF
16	Mia Primorac	Understanding and Mitigating Latency Variability of Latency-Critical Applications.		2020	DOI RDF
16	Lingxia Liao, Victor C. M. Leung, Min Chen 0003	An Efficient and Accurate Link Latency Monitoring Method for Low-Latency Software-Defined Networks.	IEEE Trans. Instrum. Meas.	2019	DBLP DOI BibTeX RDF
16	Esmail Asyabi, Erfan Sharafzadeh, SeyedAlireza SanaeeKohroudi, Mohsen Sharifi	CTS: An operating system CPU scheduler to mitigate tail latency for latency-sensitive multi-threaded applications.	J. Parallel Distributed Comput.	2019	DBLP DOI BibTeX RDF
16	Xiaolin Jiang 0001, Hossein Shokri Ghadikolaei, Gábor Fodor 0001, Eytan H. Modiano, Zhibo Pang, Michele Zorzi, Carlo Fischione	Low-Latency Networking: Where Latency Lurks and How to Tame It.	Proc. IEEE	2019	DBLP DOI BibTeX RDF
16	Georgios Psaropoulos, Ismail Oukid, Thomas Legler, Norman May, Anastasia Ailamaki	Bridging the Latency Gap between NVM and DRAM for Latency-bound Operations.	DaMoN	2019	DBLP DOI BibTeX RDF
16	Gyusun Lee, Seokha Shin, Wonsuk Song, Tae Jun Ham, Jae W. Lee, Jinkyu Jeong	Asynchronous I/O Stack: A Low-latency Kernel I/O Stack for Ultra-Low Latency SSDs.	USENIX Annual Technical Conference	2019	DBLP BibTeX RDF
16	Wenzhi Cui, Daniel Richins, Yuhao Zhu 0001, Vijay Janapa Reddi	Tail latency in node.js: energy efficient turbo boosting for long latency requests in event-driven web services.	VEE	2019	DBLP DOI BibTeX RDF
16	Apostolos Avranas, Marios Kountouris, Philippe Ciblat	Energy-Latency Tradeoff in Ultra-Reliable Low-Latency Communication With Retransmissions.	IEEE J. Sel. Areas Commun.	2018	DBLP DOI BibTeX RDF
16	Apostolos Avranas, Marios Kountouris, Philippe Ciblat	Energy-Latency Tradeoff in Ultra-Reliable Low-Latency Communication with Retransmissions.	CoRR	2018	DBLP BibTeX RDF
16	Donghyuk Lee, Yoongu Kim, Gennady Pekhimenko, Samira Manabi Khan, Vivek Seshadri, Kevin K. Chang, Onur Mutlu	Adaptive-Latency DRAM: Reducing DRAM Latency by Exploiting Timing Margins.	CoRR	2018	DBLP BibTeX RDF
16	Donghyuk Lee, Yoongu Kim, Vivek Seshadri, Jamie Liu, Lavanya Subramanian, Onur Mutlu	Tiered-Latency DRAM: Enabling Low-Latency Main Memory at Low Cost.	CoRR	2018	DBLP BibTeX RDF
16	Xiaolin Jiang 0001, Hossein Shokri Ghadikolaei, Gábor Fodor 0001, Eytan H. Modiano, Zhibo Pang, Michele Zorzi, Carlo Fischione	Low-latency Networking: Where Latency Lurks and How to Tame It.	CoRR	2018	DBLP BibTeX RDF
16	Kevin K. Chang, Abhijith Kashyap, Hasan Hassan, Saugata Ghose, Kevin Hsieh, Donghyuk Lee, Tianshi Li 0001, Gennady Pekhimenko, Samira Manabi Khan, Onur Mutlu	Flexible-Latency DRAM: Understanding and Exploiting Latency Variation in Modern DRAM Chips.	CoRR	2018	DBLP BibTeX RDF
16	Jeremie S. Kim, Minesh Patel, Hasan Hassan, Onur Mutlu	The DRAM Latency PUF: Quickly Evaluating Physical Unclonable Functions by Exploiting the Latency-Reliability Tradeoff in Modern Commodity DRAM Devices.	HPCA	2018	DBLP DOI BibTeX RDF
16	Apostolos Avranas, Marios Kountouris, Philippe Ciblat	Energy-Latency Tradeoff in Ultra-Reliable Low-Latency Communication with Short Packets.	GLOBECOM	2018	DBLP DOI BibTeX RDF
16	Christophe J. Merlin, Laura Poplawski Ma, Gregory Lauer, Stephen Zabele	Latency-Aware Forwarding for IRON: Latency Support for Back-Pressure Forwarding.	MILCOM	2018	DBLP DOI BibTeX RDF
16	Donghyuk Lee, Samira Manabi Khan, Lavanya Subramanian, Saugata Ghose, Rachata Ausavarungnirun, Gennady Pekhimenko, Vivek Seshadri, Onur Mutlu	Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms.	Proc. ACM Meas. Anal. Comput. Syst.	2017	DBLP DOI BibTeX RDF
16	Asmita Pal, Aatreyi Bal, Koushik Chakraborty, Sanghamitra Roy	Split Latency Allocator: Process Variation-Aware Register Access Latency Boost in a Near-Threshold Graphics Processing Unit.	J. Low Power Electron.	2017	DBLP DOI BibTeX RDF
16	Christiane Attig, Nadine Rauh, Thomas Franke, Josef F. Krems	System Latency Guidelines Then and Now - Is Zero Latency Really Considered Necessary?	HCI (6)	2017	DBLP DOI BibTeX RDF
16	Donghyuk Lee, Samira Manabi Khan, Lavanya Subramanian, Saugata Ghose, Rachata Ausavarungnirun, Gennady Pekhimenko, Vivek Seshadri, Onur Mutlu	Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms.	SIGMETRICS (Abstracts)	2017	DBLP DOI BibTeX RDF
16	Jan-Philipp Stauffert, Florian Niebling, Marc Erich Latoschik	A Latency and Latency Jitter Simulation Framework with OSVR.	SEARIS	2017	DBLP DOI BibTeX RDF
16	Gayani Samaraweera, Rongkai Guo, John Quarles	Head Tracking Latency in Virtual Environments Revisited: Do Users with Multiple Sclerosis Notice Latency Less?	IEEE Trans. Vis. Comput. Graph.	2016	DBLP DOI BibTeX RDF
16	Donghyuk Lee, Samira Manabi Khan, Lavanya Subramanian, Rachata Ausavarungnirun, Gennady Pekhimenko, Vivek Seshadri, Saugata Ghose, Onur Mutlu	Reducing DRAM Latency by Exploiting Design-Induced Latency Variation in Modern DRAM Chips.	CoRR	2016	DBLP BibTeX RDF
16	In-Gul Jang, Gweon-Do Jo	Study on the latency efficient IFFT design method for low latency communication systems.	ISPACS	2016	DBLP DOI BibTeX RDF
16	Karthikeyan Ganesan, Tapisha Soni, Swaroop Nunna, Ali Ramadan Ali	Poster: A TDM approach for latency reduction of ultra-reliable low-latency data in 5G.	VNC	2016	DBLP DOI BibTeX RDF
16	Qun Wei, Ki-Woong Seong, Jyung Hyun Lee, Hee Joon Park, Myoung Nam Kim, Jin-Ho Cho	Implementation of adjustive latency compensation in a binaural hearing aid to prevent latency due to wireless transmission for using with multi-media devices.	Int. J. Sens. Networks	2015	DBLP DOI BibTeX RDF
16	Naresh M. Patel	Half-Latency Rule for Finding the Knee of the Latency Curve.	SIGMETRICS Perform. Evaluation Rev.	2015	DBLP DOI BibTeX RDF
16	Katsushi Kobayashi	LAWIN: A Latency-AWare InterNet architecture for latency support on best-effort networks.	HPSR	2015	DBLP DOI BibTeX RDF
16	Jonathan Deber, Ricardo Jota, Clifton Forlines, Daniel Wigdor	How Much Faster is Fast Enough?: User Perception of Latency & Latency Improvements in Direct and Indirect Touch.	CHI	2015	DBLP DOI BibTeX RDF
16	Jarrod Knibbe, Hrvoje Benko, Andrew D. Wilson	Juggling the Effects of Latency: Software Approaches to Minimizing Latency in Dynamic Projector-Camera Systems.	UIST (Adjunct Volume)	2015	DBLP DOI BibTeX RDF
16	Xiang Liu 0013, Huaiyu Zeng, Naresh Chand, Frank J. Effenberger	Experimental demonstration of high-throughput low-latency mobile fronthaul supporting 48 20-MHz LTE signals with 59-Gb/s CPRI-equivalent rate and 2-μs processing latency.	ECOC	2015	DBLP DOI BibTeX RDF
16	Yuqi Fan, Hongli Ding, Donghui Hu	Green latency-aware data deployment in data centers: balancing latency, energy in networks and servers.	DCC@SIGCOMM	2014	DBLP DOI BibTeX RDF
16	Haijun Xia, Ricardo Jota, Benjamin McCanny, Zhe Yu, Clifton Forlines, Karan Singh, Daniel Wigdor	Zero-latency tapping: using hover information to predict touch locations and eliminate touchdown latency.	UIST	2014	DBLP DOI BibTeX RDF
16	Donghyuk Lee, Yoongu Kim, Vivek Seshadri, Jamie Liu, Lavanya Subramanian, Onur Mutlu	Tiered-latency DRAM: A low latency and low cost DRAM architecture.	HPCA	2013	DBLP DOI BibTeX RDF
16	Ricard Marxer Piñón	Audio source separation for music in low-latency and high-latency scenarios.		2013	RDF
16	Timothy J. Buker, Dennis A. Vincenzi, John E. Deaton	The Effect of Apparent Latency on Simulator Sickness While Using a See-Through Helmet-Mounted Display: Reducing Apparent Latency With Predictive Compensation.	Hum. Factors	2012	DBLP DOI BibTeX RDF
16	Mario R. Casu, Stefano Colazzo, Paolo Mantovani	Coupling latency-insensitivity with variable-latency for better than worst case design: a RISC case study.	ACM Great Lakes Symposium on VLSI	2011	DBLP DOI BibTeX RDF
16	Martin J. Fischer, Denise M. Bevilacqua Masi, John F. Shortle	Approximating Low Latency Queueing Buffer Latency.	AICT	2008	DBLP DOI BibTeX RDF
16	Toshinori Sato, Itsujiro Arita	Combining variable latency pipeline with instruction reuse for execution latency reduction.	Syst. Comput. Jpn.	2003	DBLP DOI BibTeX RDF
16	Brook Conner, Loring Holden	Providing a Low Latency User Experience in a High Latency Application.	SI3D	1997	DBLP DOI BibTeX RDF
16	Doug Mahar, Renee Napier, Michael Wagner 0004, William Laverty, Ron Henderson, Michael Hiron	Optimizing digraph-latency based biometric typist verification systems: inter and intra typist differences in digraph latency distributions.	Int. J. Hum. Comput. Stud.	1995	DBLP DOI BibTeX RDF
16	Volker Strumpen, Thomas L. Casavant	Implementing communication latency hiding in high-latency computer networks.	HPCN	1995	DBLP DOI BibTeX RDF
15	Chia-Hung Dylan Tsai, Imin Kao	The latency model for viscoelastic contact interface in robotics: Theory and experiments.	ICRA	2009	DBLP DOI BibTeX RDF
15	Peng-Jun Wan, Zhu Wang 0002, Zhiyuan Wan, Scott C.-H. Huang, Hai Liu 0001	Minimum-Latency Schedulings for Group Communications in Multi-channel Multihop Wireless Networks.	WASA	2009	DBLP DOI BibTeX RDF
15	Jan Staschulat, Marco Bekooij	Dataflow models for shared memory access latency analysis.	EMSOFT	2009	DBLP DOI BibTeX RDF	multiprocessor performance analysis, real-time, memory accesses, dataflow model
15	Andrey Brito, Christof Fetzer, Pascal Felber	Minimizing Latency in Fault-Tolerant Distributed Stream Processing Systems.	ICDCS	2009	DBLP DOI BibTeX RDF
15	Seungtak Oh, Hyunseung Choo	Low Latency Handover Scheme Based on Optical Buffering at LMA in Proxy MIPv6 Networks.	ICCSA (2)	2009	DBLP DOI BibTeX RDF
15	Basavaraj Talwar, Shailesh Kulkarni, Bharadwaj Amrutur	Latency, Power and Performance Trade-Offs in Network-on-Chips by Link Microarchitecture Exploration.	VLSI Design	2009	DBLP DOI BibTeX RDF
15	Marleen Morbée, Antoni Roca 0002, Josep Prades-Nebot, Aleksandra Pizurica, Wilfried Philips	Reduced decoder complexity and latency in pixel-domain Wyner-Ziv video coders.	Signal Image Video Process.	2008	DBLP DOI BibTeX RDF	Feedback channel, Rate allocation, Distributed video coding, Wyner-Ziv coding
15	Khoi Anh Phan, Zahir Tari, Peter Bertók	Similarity-Based SOAP Multicast Protocol to Reduce Bandwith and Latency in Web Services.	IEEE Trans. Serv. Comput.	2008	DBLP DOI BibTeX RDF
15	Scott C.-H. Huang, Hongwei Du, Eun K. Park	Minimum-latency gossiping in multi-hop wireless networks.	MobiHoc	2008	DBLP DOI BibTeX RDF	broadcast, gossip, TDMA
15	Ehsan Atoofian, Amirali Baniasadi	Exploiting program cyclic behavior to reduce memory latency in embedded processors.	SAC	2008	DBLP DOI BibTeX RDF	high-speed embedded processors, row buffer, memory
15	Ajay Kumar Verma, Philip Brisk, Paolo Ienne	Variable Latency Speculative Addition: A New Paradigm for Arithmetic Circuit Design.	DATE	2008	DBLP DOI BibTeX RDF
15	Jelte Peter Vink, Kees van Berkel 0001, Pieter van der Wolf	Performance Analysis of SoC Architectures Based on Latency-Rate Servers.	DATE	2008	DBLP DOI BibTeX RDF
15	Paul B. Beskow, Knut-Helge Vik, Pål Halvorsen, Carsten Griwodz	Latency reduction by dynamic core selection and partial migration of game state.	NETGAMES	2008	DBLP DOI BibTeX RDF
15	Itziar Marín, Aitzol Zuloaga, Iker Losada	A Novel Technique for Low Latency Data Gathering in Wireless Sensor Networks.	DSD	2008	DBLP DOI BibTeX RDF
15	Elizabeth A. Bodine, Michael K. Cheng	Characterization of Luby Transform Codes with Small Message Size for Low-Latency Decoding.	ICC	2008	DBLP DOI BibTeX RDF