Search results for "subthreshold"

Hits ?▲	Authors	Title	Venue	Year	Link
15	Charalambos M. Andreou, Alessandro Paccagnella, Diego González Castaño, Faustino Gómez Rodríguez, Valentino Liberali, Alexander V. Prokofiev, Cristiano Calligaro, Arto Javanainen, Ari Virtanen, Daniel Nahmad, Julius Georgiou	A subthreshold, low-power, RHBD reference circuit, for earth observation and communication satellites.	ISCAS	2015	DBLP DOI BibTeX RDF
15	Tzu-Yun Wang, Li-Han Liu, Min-Rui Lai, Sheng-Yu Peng	Linearity efficiency factor and power-efficient operational transconductance amplifier in subthreshold operation.	ISCAS	2015	DBLP DOI BibTeX RDF
15	A. R. Aravinth Kumar, Shiv Govind Singh, Ashudeb Dutta	Low power reconfigurable multi-mode LNA utilizing subthreshold bias and low-Q inductors.	ISCAS	2015	DBLP DOI BibTeX RDF
15	Jize Jiang, Wei Shu, Joseph Sylvester Chang, Jingyuan Liu	A novel subthreshold voltage reference featuring 17ppm/°C TC within -40°C to 125°C and 75dB PSRR.	ISCAS	2015	DBLP DOI BibTeX RDF
15	Mahsa Shoaran, Armin Tajalli, Massimo Alioto, Yusuf Leblebici	Jitter analysis and measurement in subthreshold source-coupled differential ring oscillators.	ISCAS	2015	DBLP DOI BibTeX RDF
15	Jian Li, Jiancheng Li, Li Yang	A nanopower, high PSRR full CMOS voltage reference circuit consisting of subthreshold MOSFETs.	ASICON	2015	DBLP DOI BibTeX RDF
15	Jiangzheng Cai, Jia Yuan, Liming Chen 0007, Yong Hei	A design of subthreshold SRAM cell based on RSCE and RNCE.	ASICON	2015	DBLP DOI BibTeX RDF
15	Yongquan Li, Mei Jiang, Liangwei Cai	A 30 nA, 6.6 ppm/°C, high PSRR subthreshold CMOS voltage reference.	ASICON	2015	DBLP DOI BibTeX RDF
15	Benoit Larras, Cyril Lahuec, Fabrice Seguin, Matthieu Arzel	Design of analog subthreshold Encoded Neural Network circuit in sub-100nm CMOS.	IJCNN	2015	DBLP DOI BibTeX RDF
15	Vinay M. M., Roy P. Paily, Anil Mahanta	A low-power subthreshold LNA for mobile applications.	VDAT	2015	DBLP DOI BibTeX RDF
15	Meriam Gay Bautista, Eryk Dutkiewicz, Michael Heimlich	Subthreshold Energy Harvesters Circuits for Biomedical Implants Applications.	BODYNETS	2015	DBLP DOI BibTeX RDF
15	Horacio G. Rotstein	Subthreshold Amplitude and Phase Resonance in Single Cells.	Encyclopedia of Computational Neuroscience	2014	DBLP DOI BibTeX RDF
15	Hyoyoung Shin, Youngkyu Park, Gihwa Lee, Jungsik Park, Sungho Kang	Interleaving Test Algorithm for Subthreshold Leakage-Current Defects in DRAM Considering the Equal Bit Line Stress.	IEEE Trans. Very Large Scale Integr. Syst.	2014	DBLP DOI BibTeX RDF
15	Mahmood Khayatzadeh, Yong Lian 0001	Average-8T Differential-Sensing Subthreshold SRAM With Bit Interleaving and 1k Bits Per Bitline.	IEEE Trans. Very Large Scale Integr. Syst.	2014	DBLP DOI BibTeX RDF
15	Michael X. Cohen, Simon van Gaal	Subthreshold muscle twitches dissociate oscillatory neural signatures of conflicts from errors.	NeuroImage	2014	DBLP DOI BibTeX RDF
15	Domenico Albano, Felice Crupi, Francesca Cucchi, Giuseppe Iannaccone	A picopower temperature-compensated, subthreshold CMOS voltage reference.	Int. J. Circuit Theory Appl.	2014	DBLP DOI BibTeX RDF
15	Luca Magnelli, Francesco A. Amoroso, Felice Crupi, Gregorio Cappuccino, Giuseppe Iannaccone	Design of a 75-nW, 0.5-V subthreshold complementary metal-oxide-semiconductor operational amplifier.	Int. J. Circuit Theory Appl.	2014	DBLP DOI BibTeX RDF
15	Yanhan Zeng, Yuankun Xu, Miaowang Zeng, Hong-Zhou Tan	An output-capacitor-free low-dropout regulator with subthreshold slew-rate enhancement technique.	Microelectron. J.	2014	DBLP DOI BibTeX RDF
15	Yogesh Pratap, Pujarini Ghosh, Subhasis Haldar, R. S. Gupta, Mridula Gupta	An analytical subthreshold current modeling of cylindrical gate all around (CGAA) MOSFET incorporating the influence of device design engineering.	Microelectron. J.	2014	DBLP DOI BibTeX RDF
15	Abhijit Biswas, Swagata Bhattacherjee	Temperature dependent model for threshold voltage and subthreshold slope of strained-Si channel MOSFETs with a polysilicon gate.	Microelectron. Reliab.	2014	DBLP DOI BibTeX RDF
15	Atanu Kundu 0001, Kalyan Koley, Arka Dutta, Chandan Kumar Sarkar	Impact of gate metal work-function engineering for enhancement of subthreshold analog/RF performance of underlap dual material gate DG-FET.	Microelectron. Reliab.	2014	DBLP DOI BibTeX RDF
15	Cong Li, Yiqi Zhuang, Ru Han, Gang Jin	Subthreshold behavior models for short-channel junctionless tri-material cylindrical surrounding-gate MOSFET.	Microelectron. Reliab.	2014	DBLP DOI BibTeX RDF
15	Rajni Gautam, Manoj Saxena, R. S. Gupta, Mridula Gupta	Temperature dependent subthreshold model of long channel GAA MOSFET including localized charges to study variations in its temperature sensitivity.	Microelectron. Reliab.	2014	DBLP DOI BibTeX RDF
15	Byung-Do Yang	250-mV Supply Subthreshold CMOS Voltage Reference Using a Low-Voltage Comparator and a Charge-Pump Circuit.	IEEE Trans. Circuits Syst. II Express Briefs	2014	DBLP DOI BibTeX RDF
15	S. Rasool Hosseini, Mehdi Saberi, Reza Lotfi	A Low-Power Subthreshold to Above-Threshold Voltage Level Shifter.	IEEE Trans. Circuits Syst. II Express Briefs	2014	DBLP DOI BibTeX RDF
15	Roghayeh Saeidi, Mohammad Sharifkhani, Khosrow Hajsadeghi	A Subthreshold Symmetric SRAM Cell With High Read Stability.	IEEE Trans. Circuits Syst. II Express Briefs	2014	DBLP DOI BibTeX RDF
15	Yi-Wei Chiu, Yu-Hao Hu, Ming-Hsien Tu, Jun-Kai Zhao, Yuan-Hua Chu, Shyh-Jye Jou, Ching-Te Chuang	40 nm Bit-Interleaving 12T Subthreshold SRAM With Data-Aware Write-Assist.	IEEE Trans. Circuits Syst. I Regul. Pap.	2014	DBLP DOI BibTeX RDF
15	L. Darrell Whitley, Jonathan E. Rowe	Single-Funnel and Multi-funnel Landscapes and Subthreshold-Seeking Behavior.	Theory and Principled Methods for the Design of Metaheuristics	2014	DBLP DOI BibTeX RDF
15	Gaspard Hiblot, Quentin Rafhay, Frédéric Boeuf, Gérard Ghibaudo	Impact of quantum modulation of the inversion charge in the MOSFET subthreshold regime.	ESSDERC	2014	DBLP DOI BibTeX RDF
15	Farshad Moradi, Jens Kargaard Madsen	Robust subthreshold 7T-SRAM cell for low-power applications.	MWSCAS	2014	DBLP DOI BibTeX RDF
15	Munem Hossain, Masud H. Chowdhury	Transistor doping profile optimization for low power subthreshold circuits.	MWSCAS	2014	DBLP DOI BibTeX RDF
15	Shilpa Pendyala, Srinivas Katkoori	Interval Arithmetic and Self Similarity Based Subthreshold Leakage Optimization in RTL Datapaths.	VLSI-SoC (Selected Papers)	2014	DBLP DOI BibTeX RDF
15	Magne Voernes, Trond Ytterdal, Snorre Aunet	Performance comparison of 5 subthreshold CMOS flip-flops under process-, voltage-, and temperature variations, based on netlists from layout.	NORCHIP	2014	DBLP DOI BibTeX RDF
15	Nikola Katic, Ibrahim Kazi, Armin Tajalli, Alexandre Schmid, Yusuf Leblebici	A 5.43-μW 0.8-V subthreshold current-sensing ΣΔ modulator for low-noise sensor interfaces.	NORCHIP	2014	DBLP DOI BibTeX RDF
15	Tapani Nevalainen, Tero Koivisto, Mikko Pänkäälä	Subthreshold nano-watt front-end amplifier for wireless ECG applications.	NORCHIP	2014	DBLP DOI BibTeX RDF
15	Jonathan Edvard Bjerkedok, Ali Asghar Vatanjou, Trond Ytterdal, Snorre Aunet	Modular layout-friendly cell library design applied for subthreshold CMOS.	NORCHIP	2014	DBLP DOI BibTeX RDF
15	Marco Lanuzza, Ramiro Taco, Domenico Albano	Dynamic gate-level body biasing for subthreshold digital design.	LASCAS	2014	DBLP DOI BibTeX RDF
15	Weiwei Shi 0001, Oliver Chiu-sing Choy	Subthreshold passive RF tag's PIE decoder design with wide tolerance and custom ratioed logic cells.	ICECS	2014	DBLP DOI BibTeX RDF
15	Myungjoon Choi, Inhee Lee, Tae-Kwang Jang, David T. Blaauw, Dennis Sylvester	A 23pW, 780ppm/°C resistor-less current reference using subthreshold MOSFETs.	ESSCIRC	2014	DBLP DOI BibTeX RDF
15	Zhiliang Qiao, Xiong Zhou, Qiang Li 0021	A 250mV 77dB DR 10kHz BW SC ΔΣ Modulator Exploiting Subthreshold OTAs.	ESSCIRC	2014	DBLP DOI BibTeX RDF
15	Kazunari Kato, Yasuhiro Takahashi, Toshikazu Sekine	Two phase clocking subthreshold adiabatic logic.	ISCAS	2014	DBLP DOI BibTeX RDF
15	Weiwei Shi 0001, Oliver Chiu-sing Choy	A novel ratioed logic style for faster subthreshold digital circuits based on 90 nm CMOS and below.	SoCC	2014	DBLP DOI BibTeX RDF
15	Mahmood Mohammed, Khaldoon Abugharbieh, Mahmoud Abdelfattah, Sanad Kawar	Design of a voltage reference circuit based on subthreshold and triode MOSFETs in 90nm CMOS.	ICICDT	2014	DBLP DOI BibTeX RDF
15	Shien-Chun Luo, Chi-Ray Huang, Lih-Yih Chiou	An ultra-low-power adaptive-body-bias control for subthreshold circuits.	VLSI-DAT	2014	DBLP DOI BibTeX RDF
15	D. H. Lung, S. K. Hu, James B. Kuo, D. Chen, Y. J. Chen	Parasitic BJT versus DIBL: Floating-body-related subthreshold characteristics of SOI NMOS device.	ISIC	2014	DBLP DOI BibTeX RDF
15	Kazunari Kato, Yasuhiro Takahashi, Toshikazu Sekine	Skew tolerance analysis and layout design of 4×4 multiplier using two phase clocking subthreshold adiabatic logic.	APCCAS	2014	DBLP DOI BibTeX RDF
15	Meng-Fan Chang, Che-Wei Wu, Jui-Yu Hung, Ya-Chin King, Chomg-Jung Lin, Mon-Shu Ho, Chia-Cheng Kuo, Shyh-Shyuan Sheu	A low-power subthreshold-to-superthreshold level-shifter for sub-0.5V embedded resistive RAM (ReRAM) macro in ultra low-voltage chips.	APCCAS	2014	DBLP DOI BibTeX RDF
15	Sven Lütkemeier, Thorsten Jungeblut, Hans Kristian Otnes Berge, Snorre Aunet, Mario Porrmann, Ulrich Rückert 0001	A 65 nm 32 b Subthreshold Processor With 9T Multi-Vt SRAM and Adaptive Supply Voltage Control.	IEEE J. Solid State Circuits	2013	DBLP DOI BibTeX RDF
15	Hiroshi Fuketa, Ryo Takahashi, Makoto Takamiya, Masahiro Nomura, Hirofumi Shinohara, Takayasu Sakurai	Increase of Crosstalk Noise Due to Imbalanced Threshold Voltage Between nMOS and pMOS in Subthreshold Logic Circuits.	IEEE J. Solid State Circuits	2013	DBLP DOI BibTeX RDF
15	Julia Berzhanskaya, Nick Chernyy, Bruce J. Gluckman, Steven J. Schiff, Giorgio A. Ascoli	Modulation of hippocampal rhythms by subthreshold electric fields and network topology.	J. Comput. Neurosci.	2013	DBLP DOI BibTeX RDF
15	Jason C. Wester, Diego Contreras	Biophysical mechanism of spike threshold dependence on the rate of rise of the membrane potential by sodium channel inactivation or subthreshold axonal potassium current.	J. Comput. Neurosci.	2013	DBLP DOI BibTeX RDF
15	Asaf Kaizerman, Sagi Fisher, Alexander Fish	Subthreshold Dual Mode Logic.	IEEE Trans. Very Large Scale Integr. Syst.	2013	DBLP DOI BibTeX RDF
15	Natan Krihely, Sam Ben-Yaakov, Alexander Fish	Efficiency Optimization of a Step-Down Switched Capacitor Converter for Subthreshold.	IEEE Trans. Very Large Scale Integr. Syst.	2013	DBLP DOI BibTeX RDF
15	Chen-Wei Lin, Hung-Hsin Chen, Hao-Yu Yang, Chin-Yuan Huang, Mango Chia-Tso Chao, Rei-Fu Huang	Fault Models and Test Methods for Subthreshold SRAMs.	IEEE Trans. Computers	2013	DBLP DOI BibTeX RDF
15	Tan-Tan Zhang, Pui-In Mak, Mang I Vai, Peng Un Mak, Man-Kay Law, Sio-Hang Pun, Feng Wan, Rui Paulo Martins	15-nW Biopotential LPFs in 0.35-µm CMOS Using Subthreshold-Source-Follower Biquads With and Without Gain Compensation.	IEEE Trans. Biomed. Circuits Syst.	2013	DBLP DOI BibTeX RDF
15	Shoucai Yuan, Yuan Li, Yifang Yuan, Yamei Liu	Pass transistor with dual threshold voltage domino logic design using standby switch for reduced subthreshold leakage current.	Microelectron. J.	2013	DBLP DOI BibTeX RDF
15	S. D. Pable, Mohd. Hasan, Shuja A. Abbasi, Abdul Rahman M. Alamoud	Interconnect optimization to enhance the performance of subthreshold circuits.	Microelectron. J.	2013	DBLP DOI BibTeX RDF
15	D. Nirmal, P. Vijayakumar 0003, Divya Mary Thomas, Binola K. Jebalin, N. Mohankumar 0002	Subthreshold performance of gate engineered FinFET devices and circuit with high-k dielectrics.	Microelectron. Reliab.	2013	DBLP DOI BibTeX RDF
15	Toufik Bentrcia, Fayçal Djeffal, M. Chahdi	An analytical two dimensional subthreshold behavior model to study the nanoscale GCGS DG Si MOSFET including interfacial trap effects.	Microelectron. Reliab.	2013	DBLP DOI BibTeX RDF
15	Chun-hsiang Chang, Marvin Onabajo	IIP3 Enhancement of Subthreshold Active Mixers.	IEEE Trans. Circuits Syst. II Express Briefs	2013	DBLP DOI BibTeX RDF
15	Li Lu 0004, Bozorgmehr Vosooghi, Jinghong Chen, Changzhi Li	A Subthreshold-MOSFETs-Based Scattered Relative Temperature Sensor Front-End With a Non-Calibrated ±2.5°C 3σ Relative Inaccuracy From -40°C to 100°C.	IEEE Trans. Circuits Syst. I Regul. Pap.	2013	DBLP DOI BibTeX RDF
15	Igors Homjakovs, Tetsuya Hirose, Yuji Osaki, Masanori Hashimoto, Takao Onoye	A 0.8-V 110-nA CMOS current reference circuit using subthreshold operation.	IEICE Electron. Express	2013	DBLP DOI BibTeX RDF
15	Michael J. Roy, Michelle E. Costanzo, Tanja Jovanovic, Suzanne Leaman, Patricia L. Taylor, Seth D. Norrholm, Albert A. Rizzo	Heart Rate Response to Fear Conditioning and Virtual Reality in Subthreshold PTSD.	Annual Review of Cybertherapy and Telemedicine	2013	DBLP DOI BibTeX RDF
15	Hans Kristian Otnes Berge, Snorre Aunet	Yield-oriented energy and performance model for subthreshold circuits with Vth variations.	DDECS	2013	DBLP DOI BibTeX RDF
15	Marc Pons 0001, Jean-Luc Nagel, Daniel Séverac, Marc-Nicolas Morgan, Daniel Sigg, Pierre-François Rüedi, Christian Piguet	Ultra low-power standard cell design using planar bulk CMOS in subthreshold operation.	PATMOS	2013	DBLP DOI BibTeX RDF
15	Tatsuo Kitajima, Zhonggang Feng	Contribution of voltage-dependent ion channels to subthreshold resonance.	ASCC	2013	DBLP DOI BibTeX RDF
15	Viviane S. Ghaderi, Dong Song, Jean-Marie C. Bouteiller, John Choma Jr., Theodore W. Berger	A programmable analog subthreshold biomimetic model for bi-directional communication with the brain.	EMBC	2013	DBLP DOI BibTeX RDF
15	Azzedin D. Es-Sakhi, Masud H. Chowdhury	Analytical model to estimate the subthreshold swing of SOI FinFET.	ICECS	2013	DBLP DOI BibTeX RDF
15	Abdoul Rjoub, Nedal Al Taradeh, Mamoun F. Al-Mistarihi	Accurate subthreshold leakage model for nanoscale MOSFET transistor.	ICECS	2013	DBLP DOI BibTeX RDF
15	Mahmood Mohammed, Khaldoon Abugharbieh, Sanad Kawar	Design of a sub 1-V MOSFET based voltage reference circuit operating in subthreshold region.	ICECS	2013	DBLP DOI BibTeX RDF
15	Babak Vazifehkhah Ghaffari, Shahrum Shah bin Abdullah, Mojgan Kouhnavard, Tatsuo Kitajima	Contribution of NaP-Channels to the Property of Subthreshold Resonance Oscillation.	AsiaSim	2013	DBLP DOI BibTeX RDF
15	Hossein Kassiri, Karim Abdelhalim, Roman Genov	Low-distortion super-GOhm subthreshold-MOS resistors for CMOS neural amplifiers.	BioCAS	2013	DBLP DOI BibTeX RDF
15	Yi Li, Xu Cheng 0002, Yicheng Zhang, Weijing Shi, Jun Han 0003, Xiaoyang Zeng	A highly energy-efficient compressed sensing encoder with robust subthreshold clockless pipeline for wireless BANs.	BioCAS	2013	DBLP DOI BibTeX RDF
15	Yi-Wei Chiu, Yu-Hao Hu, Ming-Hsien Tu, Jun-Kai Zhao, Shyh-Jye Jou, Ching-Te Chuang	A 40 nm 0.32 V 3.5 MHz 11T single-ended bit-interleaving subthreshold SRAM with data-aware write-assist.	ISLPED	2013	DBLP DOI BibTeX RDF
15	Chun-hsiang Chang, Marvin Onabajo	Linearization of subthreshold low-noise amplifiers.	ISCAS	2013	DBLP DOI BibTeX RDF
15	Charalambos M. Andreou, Julius Georgiou	An all-subthreshold, 0.75V supply, 2ppm/°C, CMOS Voltage Reference.	ISCAS	2013	DBLP DOI BibTeX RDF
15	Chien-Yu Lu, Ching-Te Chuang	A disturb-free subthreshold 9T SRAM cell with improved performance and variation tolerance.	SoCC	2013	DBLP DOI BibTeX RDF
15	Weiwei Shi 0001, Oliver Chiu-sing Choy, Robert K. F. Teng	Key component designs of subthreshold baseband processors in passive RF device.	ASICON	2013	DBLP DOI BibTeX RDF
15	Masanori Hashimoto	Soft error immunity of subthreshold SRAM.	ASICON	2013	DBLP DOI BibTeX RDF
15	Hiroshi Fuketa, Ryo Takahashi, Makoto Takamiya, Masahiro Nomura, Hirofumi Shinohara, Takayasu Sakurai	Variation-aware subthreshold logic circuit design.	ASICON	2013	DBLP DOI BibTeX RDF
15	Ping Xiang, Zhihao Ding, Guangxi Hu, Hui Chol Ri, Ran Liu 0001, Lingli Wang, Xing Zhou	Analytic models for electric potential and subthreshold swing of the dual-material double-gate MOSFET.	ASICON	2013	DBLP DOI BibTeX RDF
15	Mukund Kalyanaraman, Michael Orshansky	Novel strong PUF based on nonlinearity of MOSFET subthreshold operation.	HOST	2013	DBLP DOI BibTeX RDF
15	Mohsen Jafari, Mohsen Imani, Mohammad Ansari, Morteza Fathipour, Nader Sehatbakhsh	Design of an ultra-low power 32-bit adder operating at subthreshold voltages in 45-nm FinFET.	DTIS	2013	DBLP DOI BibTeX RDF
15	Himadri Singh Raghav, Sachin Maheshwari, B. Prasad Singh	Performance Analysis of Subthreshold 32-Bit Kogge-Stone Adder for Worst-Case-Delay and Power in Sub-micron Technology.	VDAT	2013	DBLP DOI BibTeX RDF
15	Saima Cherukat, Vineet Sahula	Variation Robust Subthreshold SRAM Design with Ultra Low Power Consumption.	VDAT	2013	DBLP DOI BibTeX RDF
15	J. Kevin Hicks, Dhireesha Kudithipudi	Subthreshold Computing.	Handbook of Energy-Aware and Green Computing	2012	DBLP BibTeX RDF
15	Ming-Hsien Tu, Jihi-Yu Lin, Ming-Chien Tsai, Chien-Yu Lu, Yuh-Jiun Lin, Meng-Hsueh Wang, Huan-Shun Huang, Kuen-Di Lee, Wei-Chiang Shih, Shyh-Jye Jou, Ching-Te Chuang	A Single-Ended Disturb-Free 9T Subthreshold SRAM With Cross-Point Data-Aware Write Word-Line Structure, Negative Bit-Line, and Adaptive Read Operation Timing Tracing.	IEEE J. Solid State Circuits	2012	DBLP DOI BibTeX RDF
15	Ming Gu 0008, Shantanu Chakrabartty	Subthreshold, Varactor-Driven CMOS Floating-Gate Current Memory Array With Less Than 150-ppm/°K Temperature Sensitivity.	IEEE J. Solid State Circuits	2012	DBLP DOI BibTeX RDF
15	Phanumas Khumsat, Apisak Worapishet	A 0.5-V R-MOSFET-C Filter Design Using Subthreshold R-MOSFET Resistors and OTAs With Cross-Forward Common-Mode Cancellation Technique.	IEEE J. Solid State Circuits	2012	DBLP DOI BibTeX RDF
15	Dongsuk Jeon, Mingoo Seok, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester	A Super-Pipelined Energy Efficient Subthreshold 240 MS/s FFT Core in 65 nm CMOS.	IEEE J. Solid State Circuits	2012	DBLP DOI BibTeX RDF
15	Shiwani Singh, Tripti Sharma, K. G. Sharma, B. P. Singh	9T Full Adder Design in Subthreshold Region.	VLSI Design	2012	DBLP DOI BibTeX RDF
15	S. D. Pable, Mohd. Hasan	Ultra-low-power signaling challenges for subthreshold global interconnects.	Integr.	2012	DBLP DOI BibTeX RDF
15	Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye	Adaptive Performance Compensation With In-Situ Timing Error Predictive Sensors for Subthreshold Circuits.	IEEE Trans. Very Large Scale Integr. Syst.	2012	DBLP DOI BibTeX RDF
15	Junya Kawashima, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato	A Variability-Aware Energy-Minimization Strategy for Subthreshold Circuits.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2012	DBLP DOI BibTeX RDF
15	Angsuman Sarkar, Swapnadip De, Anup Dey, Chandan Kumar Sarkar	1/f noise and analogue performance study of short-channel cylindrical surrounding gate MOSFET using a new subthreshold analytical pseudo-two-dimensional model.	IET Circuits Devices Syst.	2012	DBLP DOI BibTeX RDF
15	Hao Luo, Yan Han, Ray C. C. Cheung, Guo Liang, Dazhong Zhu	Subthreshold CMOS voltage reference circuit with body bias compensation for process variation.	IET Circuits Devices Syst.	2012	DBLP DOI BibTeX RDF
15	Shahin Sanayei Lotfabadi, Andy Gean Ye, Sridhar Krishnan 0001	Measuring the power efficiency of subthreshold FPGAs for implementing portable biomedical applications.	Microprocess. Microsystems	2012	DBLP DOI BibTeX RDF
15	Linlin Liu, Zunchao Li	A quantum-confinement model for surrounding-gate MOSFETS from subthreshold to strong-inversion regions.	Sci. China Inf. Sci.	2012	DBLP DOI BibTeX RDF
15	Dheeraj Sharma, Santosh Kumar Vishvakarma	Analytical modeling for 3D potential distribution of rectangular gate (RecG) gate-all-around (GAA) MOSFET in subthreshold and strong inversion regions.	Microelectron. J.	2012	DBLP DOI BibTeX RDF
15	Kalyan Koley, Binit Syamal, Atanu Kundu 0001, N. Mohankumar 0002, Chandan Kumar Sarkar	Subthreshold analog/RF performance of underlap DG FETs with asymmetric source/drain extensions.	Microelectron. Reliab.	2012	DBLP DOI BibTeX RDF