Search results for "Microprocessors"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
14	Kiran Puttaswamy, Gabriel H. Loh	3D-Integrated SRAM Components for High-Performance Microprocessors.	IEEE Trans. Computers	2009	DBLP DOI BibTeX RDF
14	Kaushik Datta, Shoaib Kamil 0001, Samuel Williams 0001, Leonid Oliker, John Shalf, Katherine A. Yelick	Optimization and Performance Modeling of Stencil Computations on Modern Microprocessors.	SIAM Rev.	2009	DBLP DOI BibTeX RDF
14	Yusuf Osmanlioglu, Y. Sinan Hanay, Oguz Ergin	Modifying the Data-Holding Components of the Microprocessors for Energy Efficiency.	J. Circuits Syst. Comput.	2009	DBLP DOI BibTeX RDF
14	Konstantin Moiseev, Avinoam Kolodny, Shmuel Wimer	Power-delay optimization in VLSI microprocessors by wire spacing.	ACM Trans. Design Autom. Electr. Syst.	2009	DBLP DOI BibTeX RDF	Wire spacing, power optimization, interconnect optimization, delay-optimization
14	Padmaraj Singh, David L. Landis, Vijaykrishnan Narayanan	Test Generation for Precise Interrupts on Out-of-Order Microprocessors.	MTV	2009	DBLP DOI BibTeX RDF
14	Mark D. Hill	Opportunities beyond single-core microprocessors.	HPCA	2009	DBLP DOI BibTeX RDF
14	Sunil R. Shenoy	Leadership Microprocessors: Validation, debug and test.	HLDVT	2009	DBLP DOI BibTeX RDF
14	Kürsat Zühtüogullari, Ismail Saritas, Novruz Allahverdi	The application of fuzzy expert cooling system for multi core microprocessors and mainboards.	CompSysTech	2009	DBLP DOI BibTeX RDF
14	Jim D. Garside, Stephen B. Furber, Steve Temple, Viv Woods	The Amulet chips: Architectural development for asynchronous microprocessors.	ICECS	2009	DBLP DOI BibTeX RDF
14	Soumyaroop Roy, Nagarajan Ranganathan, Srinivas Katkoori	Compiler-directed leakage reduction in embedded microprocessors.	ICCD	2009	DBLP DOI BibTeX RDF
14	Naghmeh Karimi, Michail Maniatakos, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris	Impact analysis of performance faults in modern microprocessors.	ICCD	2009	DBLP DOI BibTeX RDF
14	Paolo Rech, Simone Gerardin, Alessandro Paccagnella, Paolo Bernardi, Michelangelo Grosso, Matteo Sonza Reorda, Davide Appello	Evaluating Alpha-induced soft errors in embedded microprocessors.	IOLTS	2009	DBLP DOI BibTeX RDF
14	Franco Leite, Tiago R. Balen, Marcos Hervé, Marcelo Lubaszewski, Gilson I. Wirth	Using Bulk Built-In Current Sensors and recomputing techniques to mitigate transient faults in microprocessors.	LATW	2009	DBLP DOI BibTeX RDF
14	Yiorgos Makris	Workload-Cognizant Impact Analysis and its Applications in Error Detection and Tolerance in Modern Microprocessors.	DFT	2009	DBLP DOI BibTeX RDF
14	Uwe Brinkschulte, Mathias Pacher	A Theoretical Examination of a Self-Adaptation Approach to Improve the Real-Time Capabilities in Multi-Threaded Microprocessors.	SASO	2009	DBLP DOI BibTeX RDF
14	Yuan He 0002, Morteza Biglari-Abhari, Zoran A. Salcic	Rapid Energy Estimation for Embedded Soft-core Microprocessors.	ESA	2009	DBLP BibTeX RDF
14	Burcin Aktan, Garrison W. Greenwood	Evolutionary Computation in pre-silicon verification of complex microprocessors.	WEAH	2009	DBLP DOI BibTeX RDF
14	Mark D. Hill	Opportunities beyond single-core microprocessors.	PPoPP	2009	DBLP DOI BibTeX RDF
14	Thomas Baumann, Doris Schmitt-Landsiedel, Christian Pacha	Architectural assessment of design techniques to improve speed and robustness in embedded microprocessors.	DAC	2009	DBLP DOI BibTeX RDF	variability-aware design, robustness, micro-architecture
14	Andrew J. Robinson 0002	Improving instruction encoding efficiency in low power microprocessors.		2009	RDF
14	Anderson Kuei-An Ku	Novel gather and scatter hardware support for microprocessors.		2009	RDF
14	Jonathan R. Haigh, Lawrence T. Clark	High performance set associative translation lookaside buffers for low power microprocessors.	Integr.	2008	DBLP DOI BibTeX RDF
14	Shingo Watanabe, Akihiro Chiyonobu, Toshinori Sato	A Low-Power Instruction Issue Queue for Microprocessors.	IEICE Trans. Electron.	2008	DBLP DOI BibTeX RDF
14	Amit Kumar 0002, Li Shang, Li-Shiuan Peh, Niraj K. Jha	System-Level Dynamic Thermal Management for High-Performance Microprocessors.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
14	Seda Ogrenci Memik, Rajarshi Mukherjee, Min Ni, Jieyi Long	Optimizing Thermal Sensor Allocation for Microprocessors.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
14	Hans-Jürgen Brand	Optimization of Design Flows for Multi-Core x86 Microprocessors in 45 and 32nm Technologies under Productivity Considerations.	DATE	2008	DBLP DOI BibTeX RDF
14	Duo Li, Sheldon X.-D. Tan, Murli Tirumala	Architecture-level thermal behavioral characterization for multi-core microprocessors.	ASP-DAC	2008	DBLP DOI BibTeX RDF
14	Inhwa Jung, Moo-young Kim, Chulwoo Kim	A 1.2GHz delayed clock generator for high-speed microprocessors.	ASP-DAC	2008	DBLP DOI BibTeX RDF
14	Stefano Di Carlo, Giorgio Di Natale, Riccardo Mariani	On-Line Instruction-Checking in Pipelined Microprocessors.	ATS	2008	DBLP DOI BibTeX RDF
14	Yung-Yuan Chen, Shu-Hao Hsu, Kuen-Long Leu	An Estimation Model of Vulnerability for Embedded Microprocessors.	SSIRI	2008	DBLP DOI BibTeX RDF
14	Collin McCurdy, Alan L. Cox, Jeffrey S. Vetter	Investigating the TLB Behavior of High-end Scientific Applications on Commodity Microprocessors.	ISPASS	2008	DBLP DOI BibTeX RDF
14	Swaroop Ghosh, Jung Hwan Choi, Patrick Ndai, Kaushik Roy 0001	O2C: occasional two-cycle operations for dynamic thermal management in high performance in-order microprocessors.	ISLPED	2008	DBLP DOI BibTeX RDF
14	Avadh Patel, Kanad Ghose	Energy-efficient MESI cache coherence with pro-active snoop filtering for multicore microprocessors.	ISLPED	2008	DBLP DOI BibTeX RDF
14	Srikanth Balasubramanian	Power delivery for high performance microprocessors.	ISLPED	2008	DBLP DOI BibTeX RDF
14	Ilya Wagner, Valeria Bertacco	Reversi: Post-silicon validation system for modern microprocessors.	ICCD	2008	DBLP DOI BibTeX RDF
14	Nikolaos G. Bartzoudis, Vasileios Tantsios, Klaus D. McDonald-Maier	Dynamic Scheduling of Test Routines for Efficient Online Self-Testing of Embedded Microprocessors.	IOLTS	2008	DBLP DOI BibTeX RDF
14	T. M. Mak	Jitters in high performance microprocessors.	ITC	2008	DBLP DOI BibTeX RDF
14	Heiko Ahrens, Rolf Schlagenhaft, Helmut Lang, V. Srinivasan, Enrico Bruzzano	DFT Architecture for Automotive Microprocessors using On-Chip Scan Compression supporting Dual Vendor ATPG.	ITC	2008	DBLP DOI BibTeX RDF
14	Syed Zafar Shazli, Mohammed A. Abdul-Aziz, Mehdi Baradaran Tahoori, David R. Kaeli	A Field Analysis of System-level Effects of Soft Errors Occurring in Microprocessors used in Information Systems.	ITC	2008	DBLP DOI BibTeX RDF
14	Naghmeh Karimi, Michail Maniatakos, Abhijit Jas, Yiorgos Makris	On the Correlation between Controller Faults and Instruction-Level Errors in Modern Microprocessors.	ITC	2008	DBLP DOI BibTeX RDF
14	Robert L. Franch, Phillip J. Restle, James K. Norman, William V. Huott, Joshua Friedrich, R. Dixon, Steve Weitzel, K. van Goor, Gerard Salem	On-chip Timing Uncertainty Measurements on IBM Microprocessors.	ITC	2008	DBLP DOI BibTeX RDF
14	Anjali Vij, Richard Ratliff	Implementation Update: Logic Mapping On SPARC- Microprocessors.	ITC	2008	DBLP DOI BibTeX RDF
14	Xiaodong Li	Soft Error Modeling and Analysis for Microprocessors		2008	RDF
14	Ilya Wagner	An Effective Verification Solution for Modern Microprocessors.		2008	RDF
14	Jörg Platte	A security architecture for microprocessors. (PDF / PS)		2008	RDF
14	Hendrik F. Hamann, Alan J. Weger, James A. Lacey, Zhigang Hu, Pradip Bose, Erwin B. Cohen, Jamil A. Wakil	Hotspot-Limited Microprocessors: Direct Temperature and Power Distribution Measurements.	IEEE J. Solid State Circuits	2007	DBLP DOI BibTeX RDF
14	Giorgos Dimitrakopoulos, Christos Mavrokefalidis, Costas Galanopoulos, Dimitris Nikolos	Sorter Based Permutation Units for Media-Enhanced Microprocessors.	IEEE Trans. Very Large Scale Integr. Syst.	2007	DBLP DOI BibTeX RDF
14	Ibrahim Hur, Calvin Lin	Memory scheduling for modern microprocessors.	ACM Trans. Comput. Syst.	2007	DBLP DOI BibTeX RDF	adaptive history-based scheduling, memory scheduling, Memory system performance
14	Pradeep S. Nair, Eugene B. John	Analysing the performance of personal computers based on Intel microprocessors for sequence aligning bioinformatics applications.	Int. J. Bioinform. Res. Appl.	2007	DBLP DOI BibTeX RDF
14	Pedro Trancoso	Watt Matters Most? Design Space Exploration of High-Performance Microprocessors for Power-Performance Efficiency.	J. Circuits Syst. Comput.	2007	DBLP DOI BibTeX RDF
14	Fred A. Bower, Daniel J. Sorin, Sule Ozev	Online diagnosis of hard faults in microprocessors.	ACM Trans. Archit. Code Optim.	2007	DBLP DOI BibTeX RDF	Hard fault tolerance, fine-grained diagnosis, processor microarchitecture
14	Yasser Mohanna, Mostafa Hamad, Rabih A. Jabr, Ali Haidar Alaeddine, Oussama Bazzi	Teaching microprocessors, microcontrollers, and digital signal processing courses using only one target processor: The newborn dsPIC30F™ from Microchip™.	Comput. Appl. Eng. Educ.	2007	DBLP DOI BibTeX RDF
14	Hiroaki Suzuki, Chris H. Kim, Kaushik Roy 0001	Fast Tag Comparator Using Diode Partitioned Domino for 64-bit Microprocessors.	IEEE Trans. Circuits Syst. I Regul. Pap.	2007	DBLP DOI BibTeX RDF
14	Shekhar Borkar, Norman P. Jouppi, Per Stenström	Microprocessors in the era of terascale integration.	DATE	2007	DBLP DOI BibTeX RDF
14	Trevor Harmon, Raymond Klefstad	Interactive Back-annotation of Worst-case Execution Time Analysis for Java Microprocessors.	RTCSA	2007	DBLP DOI BibTeX RDF
14	Andreas Kasper	Efficient implementation of rainbow table based cryptanalysis tools on general purpose microprocessors.	Informatiktage	2007	DBLP BibTeX RDF
14	Stefan Rusu, Jim Warnock	Microprocessors.	ISSCC	2007	DBLP DOI BibTeX RDF
14	Kyunghwa Kim, Junho Shim, Ig-hoon Lee	Cache Conscious Trees: How Do They Perform on Contemporary Commodity Microprocessors?	ICCSA (1)	2007	DBLP DOI BibTeX RDF
14	Andrew Robinson, Jim D. Garside	Sensitive registers: a technique for reducing the fetch bandwidth in low-power microprocessors.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	processors, memory bandwidth, power efficiency, registers
14	George Xenoulis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis	On-Line Periodic Self-Testing of High-Speed Floating-Point Units in Microprocessors.	DFT	2007	DBLP DOI BibTeX RDF
14	Miltiadis Hatzimihail, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis	A methodology for detecting performance faults in microprocessors via performance monitoring hardware.	ITC	2007	DBLP DOI BibTeX RDF
14	Cecilia Metra, Martin Omaña 0001, T. M. Mak, Simon Tam 0001	Novel compensation scheme for local clocks of high performance microprocessors.	ITC	2007	DBLP DOI BibTeX RDF
14	Dean L. Lewis, Hsien-Hsin S. Lee	A scanisland based design enabling prebond testability in die-stacked microprocessors.	ITC	2007	DBLP DOI BibTeX RDF
14	Robert L. Franch, Phillip J. Restle, James K. Norman, William V. Huott, Joshua Friedrich, R. Dixon, Steve Weitzel, K. van Goor, Gerard Salem	On-chip timing uncertainty measurements on IBM microprocessors.	ITC	2007	DBLP DOI BibTeX RDF
14	Salah Merniz, Mohamed Benmohammed	A Methodology for the Formal Verification of RISC Microprocessors A Functional Approach.	AICCSA	2007	DBLP DOI BibTeX RDF
14	Soumyaroop Roy, Srinivas Katkoori, Nagarajan Ranganathan	A Compiler Based Leakage Reduction Technique by Power-Gating Functional Units in Embedded Microprocessors.	VLSI Design	2007	DBLP DOI BibTeX RDF
14	Kiran Puttaswamy, Gabriel H. Loh	Scalability of 3D-Integrated Arithmetic Units in High-Performance Microprocessors.	DAC	2007	DBLP DOI BibTeX RDF
14	Nathan Clark	Customizing the Computation Capabilities of Microprocessors.		2007	RDF
14	Nicholas J. Wang	Cost Effective Soft Error Mitigation in Microprocessors		2007	RDF
14	Michael Bedford Taylor	Tiled microprocessors.		2007	RDF
14	Georgios N. Dimitrakopoulos	Data processing units for high performance microprocessors, Μονάδες επεξεργασίας δεδομένων για μικροεπεξεργαστές υψηλών αποδόσεων		2007	RDF
14	Jacques Jean-Alain Michael Fournier	Vector microprocessors for cryptography.		2007	RDF
14	Joonhyuk Yoo	Harnessing Checker Hierarchy for Reliable Microprocessors.		2007	RDF
14	Alper Sen 0001	Error Diagnosis in Equivalence Checking of High Performance Microprocessors.	V&D@FLoC	2006	DBLP DOI BibTeX RDF
14	Allen C. Cheng, Gary S. Tyson	High-quality ISA synthesis for low-power cache designs in embedded microprocessors.	IBM J. Res. Dev.	2006	DBLP DOI BibTeX RDF
14	Yehuda Sadeh Weinraub, Shlomo Weiss	Power-aware out-of-order issue logic in high-performance microprocessors.	Microprocess. Microsystems	2006	DBLP DOI BibTeX RDF
14	Annie (Yujuan) Zeng, Kenneth Rose, Ronald J. Gutmann	Memory performance prediction for high-performance microprocessors at deep submicrometer technologies.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
14	Richard McDougall, James Laudon	Multi-Core Microprocessors Are Here.	login Usenix Mag.	2006	DBLP BibTeX RDF
14	Janusz Sosnowski	Software-based self-testing of microprocessors.	J. Syst. Archit.	2006	DBLP DOI BibTeX RDF
14	Kiran Puttaswamy, Gabriel H. Loh	Implementing Register Files for High-Performance Microprocessors in a Die-Stacked (3D) Technology.	ISVLSI	2006	DBLP DOI BibTeX RDF
14	Vinod Viswanath, Jacob A. Abraham, Warren A. Hunt Jr.	Automatic insertion of low power annotations in RTL for pipelined microprocessors.	DATE	2006	DBLP DOI BibTeX RDF
14	Jörg Platte, Edwin Naroska, Kai Grundmann	A Cache Design for a Security Architecture for Microprocessors (SAM).	ARCS	2006	DBLP DOI BibTeX RDF
14	Shuliang Lei, Alan Palazzolo	Real Time Digital Control of Magnetic Bearings with Microprocessors.	ICICIC (2)	2006	DBLP DOI BibTeX RDF
14	Yuan-Long Jeang, Ching-Ta Chen, Chih-Chung Tai	A New and Efficient Real-Time Address Tracer for Embedded Microprocessors.	ICICIC (2)	2006	DBLP DOI BibTeX RDF
14	Koji Inoue	Supporting A Dynamic Program Signature: An Intrusion Detection Framework for Microprocessors.	ICECS	2006	DBLP DOI BibTeX RDF
14	Yuan-Long Jeang, Tzuu-Shaang Wey, Hung-Yu Wang, Ching-Ta Chen	A Pre-processing Based Real-Time Address Tracer for Embedded Microprocessors.	ICECS	2006	DBLP DOI BibTeX RDF
14	Yung-Yuan Chen, Kuen-Long Leu, Li-Wen Lin	Hybrid Error-Detection Approach with No Detection Latency for High-Performance Microprocessors.	CDES	2006	DBLP BibTeX RDF
14	Chengyi Zhang, Hongwei Zhou, Minxuan Zhang, Zuocheng Xing	An Architectural Leakage Power Reduction Method for Instruction Cache in Ultra Deep Submicron Microprocessors.	Asia-Pacific Computer Systems Architecture Conference	2006	DBLP DOI BibTeX RDF	Periodically Drowsy Speculative Recover, Adaptive, Leakage Power, Drowsy cache
14	Alok Garg, Fernando Castro, Michael C. Huang 0001, Daniel Chaver, Luis Piñuel, Manuel Prieto 0001	Substituting associative load queue with simple hash tables in out-of-order microprocessors.	ISLPED	2006	DBLP DOI BibTeX RDF	LSQ, scalability, hash table, memory disambiguation
14	Marta Portela-García, Luca Sterpone, Celia López-Ongil, Matteo Sonza Reorda, Massimo Violante	A Fault Injection Environment for SoPC's Embedded Microprocessors.	LATW	2006	DBLP BibTeX RDF
14	Wei-Lun Hung, Greg M. Link, Yuan Xie 0001, Narayanan Vijaykrishnan, Mary Jane Irwin	Interconnect and Thermal-aware Floorplanning for 3D Microprocessors.	ISQED	2006	DBLP DOI BibTeX RDF
14	B. M. Malashevich	The Microprocessors, Mini- and Micro-computers with Architecture "Electronics NC" in Zelenograd.	SoRuCom	2006	DBLP DOI BibTeX RDF
14	Yuan-Long Jeang, Tzuu-Shaang Wey, Hung-Yu Wang, Chih-Chung Tai	A Single-Stream Pipelined Instruction Decompression System for Embedded Microprocessors.	IIH-MSP	2006	DBLP DOI BibTeX RDF
14	Yale N. Patt	Computer Architecture Research and Future Microprocessors: Where Do We Go from Here?	ISCA	2006	DBLP DOI BibTeX RDF
14	Jörg Platte, Raúl Durán Díaz, Edwin Naroska	An Operating System Design for the Security Architecture for Microprocessors.	ICICS	2006	DBLP DOI BibTeX RDF	Encrypted Programs, Secure Processors, Secure Operating Systems, Certified Execution
14	Rajarshi Mukherjee, Seda Ogrenci Memik	Systematic temperature sensor allocation and placement for microprocessors.	DAC	2006	DBLP DOI BibTeX RDF	sensor, placement, allocation, temperature
14	Giuseppe Desoli, Thierry Strudel, Jean-Philippe Cousin, Kaushik Saha	Current and future trends in embedded VLIW microprocessors applied to multimedia and signal processing.	EUSIPCO	2006	DBLP BibTeX RDF
14	Jayanth Srinivasan	Lifetime Reliability Aware Microprocessors		2006	RDF
14	Jessica H. Tseng	Banked microarchitectures for complexity-effective superscalar microprocessors.		2006	RDF
14	Pradip Bose	Designing microprocessors with robust functionality and performance.	IEEE Micro	2005	DBLP DOI BibTeX RDF	Reliability-aware microarchitecture, power-efficient design, microprocessor design