|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 843 occurrences of 474 keywords
|
|
|
Results
Found 1151 publication records. Showing 1151 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Claas Cornelius, Frank Sill, Hagen Sämrow, Jakob Salzmann, Dirk Timmermann, Diógenes Cecilio da Silva Jr. |
Encountering gate oxide breakdown with shadow transistors to increase reliability. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
gate oxide breakdown, modeling, redundancy, logic design, nanotechnology, organic computing, transistor |
1 | Eduardo Conrad Jr., Fernando da Rocha Paixão Cortes, Sergio Bampi, Alessandro Girardi |
Early voltage and saturation voltage improvement in deep sub-micron technologies using associations of transistors. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
TAT, TST, association of transistors, measurements, device modeling |
1 | Levent Aksoy, Ece Olcay Günes |
An approximate algorithm for the multiple constant multiplications problem. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
graph-based technique, multiple constant multiplications problem, multiplierless filter design, approximate algorithm |
1 | Marcio Barbosa Lucks, Nobuo Oki |
RBF circuits based on folded cascode differential pairs. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
folded cascode topology, artificial neural networks, radial basis function |
1 | Gustavo Wilke, Renan Fonseca, Cecilia Mezzomo, Ricardo Reis 0001 |
A novel scheme to reduce short-circuit power in mesh-based clock architectures. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
clock mesh, power, clock skew, short-circuit |
1 | Fabrício Vivas Andrade, Leandro Maia Silva, Antônio Otávio Fernandes |
BenCGen: a digital circuit generation tool for benchmarks. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
benchmarks, sat solvers, combinational equivalence checking |
1 | Gordon W. Roberts, Mohammed Ali-Bakhshian |
Time-domain analog signal processing techniques. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
time-domain analog signal processing, process variation |
1 | Juan Mateus, Elkim Roa, Hugo Daniel Hernández, Wilhelmus A. M. Van Noije |
A 2.7ua sub1-v voltage reference. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
very low power, weak inversion, low voltage, voltage reference |
1 | Giancarlo Covolo Heck, Roberto A. Hexsel |
The performance of pollution control victim cache for embedded systems. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
pollution control victim cache, embedded systems |
1 | Marcelo Schiavon Porto, Sergio Bampi, Altamiro Amadeu Susin, Luciano Volcan Agostini |
Architectural design for the new QSDS with dynamic iteration control motion estimation algorithm targeting HDTV. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
motion estimation, architectural design, fast algorithm |
1 | Bruno Zatt, Altamiro Amadeu Susin, Sergio Bampi, Luciano Volcan Agostini |
High throughput architecture for H.264/AVC motion compensation sample interpolator for HDTV. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
video coding, H.264/AVC, motion compensation, hardware architectures |
1 | Conrado Pilotto, José Rodrigo Azambuja, Fernanda Lima Kastensmidt |
Synchronizing triple modular redundant designs in dynamic partial reconfiguration applications. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
fault tolerance, FPGA, TMR, dynamic partial reconfiguration |
1 | Julien Lallet, Sébastien Pillement, Olivier Sentieys |
Efficient dynamic reconfiguration for multi-context embedded FPGA. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
FPGA, dynamic reconfiguration, multi-context |
1 | Helano Castro, Alexandre Augusto Coelho, Ricardo Jardel Silveira |
Fault-tolerance in FPGA's through CRC voting. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
cyclic redundancy check, fault tolerance, FPGA, partial reconfiguration |
1 | Laurent Remy, Philippe Coll, Fabrice Picot, Philippe Mico, Jean-Michel Portal |
Metal filling impact on standard cells: definition of the metal fill corner concept. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
metal filling, modelization, interconnect, design of experiment, dispersion, standard cells, capacitance, corners, ring oscillators |
1 | Giovanni De Micheli |
System-level design technologies for heterogeneous distributed systems. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
integrated circuits design |
1 | Andre Vilas Boas, Eduardo Ribeiro, Alfredo Olmos, Ricardo Maltione |
Self-adaptable slew rate control output buffer for embedded microcontroller port applications. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
I/O pad, slew rate control, self-adaptable, microcontroller, output buffer |
1 | Luciano Severino de Paula, Altamiro Amadeu Susin, Sergio Bampi |
A wide band CMOS differential voltage-controlled ring oscillator. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
SSB mixer, wide-band oscillators, voltage-controlled oscillator, frequency synthesizer |
1 | Naveen K. Yanduru |
Highly integrated, re-configurable RF front-ends in deep sub-micron CMOS: (with an example of a WCDMA, GSM/GPRS/EDGE receiver without inter-stage SAW filter). |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
RF design |
1 | Rafaella Fiorelli, Fernando Silveira, Eduardo J. Peralías, Diego Vázquez, Adoración Rueda, José Luis Huertas |
A 2.4GHz LNA in a 90-nm CMOS technology designed with ACM model. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
ACM model, design methodology, low noise amplifier, radio-frequency |
1 | Jorge Oliveros, Dwight Cabrera, Elkim Roa, Wilhelmus A. M. Van Noije |
An improved and automated design tool for the optimization of CMOS OTAs using geometric programming. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
OTA design, analog CAD, analog circuit optimization, design methodologies, geometric programming |
1 | Wagner Vieira Silvério, Janaína Domingues Costa, João Leonardo Fragoso, Julio Leão Silva Jr. |
Low-area ASIC implementation for configurable coefficients FIR pulse shape filters of digital TV systems. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
communication filters, digital communications, area optimization |
1 | Victor Ariel Leal Sobral, Roberto Espinheira da Costa Bomfim, Robson Nunes de Lima, Ana Isabela Araújo Cunha |
Systematic methodology for the design of Seevinck's CMOS log-domain integrators. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
CMOS integrators, companding circuits, log-domain integrators |
1 | David Z. Pan |
Synergistic modeling and optimization for nanometer IC design/manufacturing integration. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
design for manufacturing |
1 | Fernando da Rocha Paixão Cortes, Sergio Bampi |
A 40mhz 70db gain variable gain amplifier design using the gm/id design method. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
Variable Gain Amplifier (VGA), cmos analog design, rf front-end, amplifier |
1 | Marcelo Lubaszewski, Michel Renovell, Rajesh K. Gupta 0001 (eds.) |
Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2008, Gramado, Brazil, September 1-4, 2008 |
SBCCI |
2008 |
DBLP BibTeX RDF |
|
1 | André Borin Soares, Alexsandro Cristovão Bonatto, Altamiro Amadeu Susin |
A new march sequence to fit DDR SDRAM test in burst mode. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
DDR SDRAM, march algorithms, built-in self test, system on chip, memory test |
1 | Gustavo Rau de Almeida Callou, Paulo Romero Martins Maciel, Ermeson Carneiro de Andrade, Bruno Costa e Silva Nogueira, Eduardo Antonio Guimarães Tavares |
A coloured petri net based approach for estimating execution time and energy consumption in embedded systems. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
simulation, energy consumption, embedded software, coloured petri net, execution time |
1 | Luciano Ost, Fernando Gehm Moraes, Leandro Möller, Leandro Soares Indrusiak, Manfred Glesner, Sanna Määttä, Jari Nurmi |
A simplified executable model to evaluate latency and throughput of networks-on-chip. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
performance evaluation, modeling, networks-on-chip |
1 | Ricardo P. Jacobi, Reinaldo A. Bergamaschi |
Challenges of the nanoscale era. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
integrated circuits |
1 | Ronaldo Husemann, Altamiro Amadeu Susin, Valter Roesler |
A new pipelined architecture of an H.264/MPEG-4 AVC deblocking filter. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
H.264, programmable logic, video encoder, deblocking filter |
1 | Levent Aksoy, Ece Olcay Günes |
Area optimization algorithms in high-speed digital FIR filter synthesis. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
high-speed filter design, multiple constant multiplications, subexpression sharing, area optimization, carry-save adders |
1 | Rafael Soares, Ney Laert Vilar Calazans, Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert |
Evaluating the robustness of secure triple track logic through prototyping. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
logic style, FPGA, side-channel attacks, DPA, DES, CPA |
1 | Pietro Maris Ferreira, José Gabriel Rodríguez Carneiro Gomes, Antonio Petraglia |
Current mode read-out circuit for infrared photodiode applications in 0.35 mum cmos. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
infra-red, read-out, image sensor, current-mode |
1 | Eduardo Luis Rhod, Luigi Carro |
An efficient test and characterization approach for nanowire-based architectures. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
nanoPLA, test, yield, characterization, nanowires |
1 | Dieison Antonello Deprá, Vagner Santos Da Rosa, Sergio Bampi |
A novel hardware architecture design for binary arithmetic decoder engines based on bitstream flow analysis. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
CABAD, hardware dedicated architecture, H.264/AVC, entropy coding, CABAC |
1 | Gordon W. Roberts |
Test Methods For Sigma-Delta Data Converters and Related Devices. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
sigma-delta converter, mixed-signal testing |
1 | André V. Fidalgo, Gustavo R. Alves, Manuel G. Gericota, José Manuel Martins Ferreira |
A comparative analysis of fault injection methods via enhanced on-chip debug infrastructures. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
real time systems, dependability, fault injection |
1 | Ahmed Maine Jerraya |
System design for 3D Silicon integration. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
CAD, 3D-integration |
1 | Felipe Ghellar, Marcelo Lubaszewski |
A novel AES cryptographic core highly resistant to differential power analysis attacks. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
dpa, rijndael, isomorphisms, aes |
1 | Paul G. A. Jespers |
Sizing CMOS circuits by means of the gm/ID methodology and a compact model. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
circuit sizing |
1 | David Z. Pan |
Lithography friendly routing: from construct-by-correction to correct-by-construction. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
routing |
1 | Yanming Jia, Yici Cai, Xianlong Hong |
Full-chip routing system for reducing Cu CMP & ECP variation. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
electroplating, routing, chemical mechanical polishing |
1 | Dominique Borrione, Amr Helmy, Laurence Pierre, Julien Schmaltz |
Executable formal specification and validation of NoC communication infrastructures. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
simulation, verification, theorem proving |
1 | Betty Prince |
Embedded non-volatile memories. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
FeRAM, MONOS, PC-RAM, SONOS, floating gate memory, nanocrystal memory, nitride storage memory, trapping site memory, flash memory, embedded memory, non-volatile memory, MRAM |
1 | Júlio C. B. de Mattos, Luigi Carro |
Object and method exploration for embedded systems applications. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
object-oriented, design space exploration, embedded software |
1 | Christoforos Kachris, Stamatis Vassiliadis |
A reconfigurable platform for multi-service edge routers. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
edge routers, FPGA, reconfigurable logic |
1 | Lorenzo Petroli, Carlos Arthur Lang Lisbôa, Fernanda Lima Kastensmidt, Luigi Carro |
Using majority logic to cope with long duration transient faults. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
long duration transient faults, majority logic |
1 | Christophe Bobda, Thomas Haller, Felix Mühlbauer, Dennis Rech, Simon Jung |
Design of adaptive multiprocessor on chip systems. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
FPGA, reconfigurability, MPSoC, NoC |
1 | Germano Guimarães, João Paulo Silva do Monte Lima, João Marcelo X. N. Teixeira, Guilherme D. Silva, Veronica Teichrieb, Judith Kelner |
FPGA infrastructure for the development of augmented reality applications. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
FPGA, real time, augmented reality, image processing algorithms |
1 | Subhomoy Chattopadhyay |
Low power design techniques for nanometer design processes: 65 nm and smaller. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
65 nm, low power, embedded design |
1 | Letícia Maria Veiras Bolzani, Edgar E. Sánchez, Matteo Sonza Reorda |
A software-based methodology for the generation of peripheral test sets based on high-level descriptions. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
RT-level test metrics, code coverage metrics, gate-level test metrics, test block, fault coverage, SoC testing |
1 | Gustavo Liñán Cembrano |
Focal plane processors & pixel level processing: mimicking natural vision systems to solve image processing problems. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
analog image processing, neural networks, CMOS image sensors, focal plane |
1 | Julio Saldaña Pumarica, Emílio Del Moral Hernandez, Carlos Silva Cárdenas |
CMOS encoder for scale-independent pattern recognition. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
logarithmic encoding, neuromorphic, pulsed neural network |
1 | Hugo de Lemos Haas, José Gabriel Rodríguez Carneiro Gomes, Antonio Petraglia |
Viability of analog inner product operations in CMOS imagers. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
CMOS analog hardware, analog image processing, vector quantization |
1 | Leomar S. da Rosa Jr., André Inácio Reis, Renato P. Ribas, Felipe de Souza Marques, Felipe Ribeiro Schneider |
A comparative study of CMOS gates with minimum transistor stacks. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
PTL, unateness, BDDs, technology mapping, switch theory, logical effort, CMOS gates |
1 | Jordana L. Seixas, Edson Barbosa, Stelita M. da Silva, Paulo Sérgio B. do Nascimento, Vinícius Kursancew, Remy Eskinazi Sant'Anna, Edna Barros, Manoel Eusébio de Lima |
Aquarius: a dynamically reconfigurable computing platform. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
?CLinux, FPGAs, prototyping, dynamic reconfiguration, tasks scheduling, device driver, bitstream |
1 | Carlos Fernando Teodósio Soares, Antonio Petraglia |
A systematic method to approximate capacitance ratios to improve capacitance matching in SC filters. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
capacitance matching, design method, switched-capacitor filters |
1 | Sudhakar Maddi, M. B. Srinivas |
A unified and reconfigurable Montgomery Multiplier architecture without four-to-two CSA. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
sum-carry logic, RSA, ECC, reconfigurable architectures, montgomery multiplication, unified architectures |
1 | Mohammed Ismail 0001 |
First-pass-silicon radio IPs for B3G wireless networks. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
low power, wireless, 4G, RF |
1 | A. A. Mariano, B. Boumballa, Dominique Dallet, Yann Deval, Jean-Baptiste Bégueret |
High-speed CMOS analog-to-digital converter for front-end receiver applications. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
flash structure, analog-to-digital converter, data-conversion |
1 | George Sobral Silveira, Karina R. G. da Silva, Elmar U. K. Melcher |
Functional verification of an MPEG-4 decoder design using a random constrained movie generator. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
VeriSC, randmovie, stimuli, verification, SystemC, movie, functional coverage |
1 | Fernando P. H. de Miranda, João Navarro Jr., Wilhelmus A. M. Van Noije |
A 4.1 GHz prescaler using double data throughput E-TSPC structures. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
TSPC, high speed digital circuit, prescaler |
1 | Dimitrios N. Loizos, Paul-Peter Sotiriadis, Gert Cauwenberghs |
High-speed, model-free adaptive control using parallel synchronous detection. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
VLSI optimization, high-speed control, model-free, multi-dithering, synchronous detection, translinear circuits, adaptive control |
1 | Antonio J. Ginés, Eduardo J. Peralías, Adoración Rueda |
Novel swapping technique for background calibration of capacitor mismatching in pipeline ADCS. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
analogue-to-digital converter, background (on-line) calibration, capacitor swapping technique, foreground (off-line) calibration, adaptive system, pipeline ADC |
1 | M. Jamal Deen |
Highly sensitive, low-cost integrated biosensors. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
BioFETs, integrated circuits, MOSFETs, noise analysis |
1 | Jørgen Andreas Michaelsen, Dag T. Wisland |
Suppression of delta-sigma DAC quantisation noise by bandwidth adaptation. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
D/A converters, quantisation noise, MPEG audio, delta-sigma modulators |
1 | Dalton M. Colombo, Gilson I. Wirth, Sergio Bampi |
Trim range limited by noise in bandgap voltage references. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
bandgap, trim circuit, noise, CMOS, voltage reference |
1 | Antonio Petraglia, Volnei A. Pedroni, Gert Cauwenberghs (eds.) |
Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2007, Copacabana, Rio de Janeiro, Brazil, September 3-6, 2007 |
SBCCI |
2007 |
DBLP BibTeX RDF |
|
1 | Eduardo Tavares, Paulo Romero Martins Maciel, Bruno Silva 0001, Meuse N. Oliveira Jr. |
A time petri net-based approach for hard real-time systems scheduling considering dynamic voltage scaling, overheads, precedence and exclusion relations. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
petri nets, dynamic voltage scaling, formal models, hard real-time systems |
1 | Costas Argyrides, Carlos Arthur Lang Lisbôa, Luigi Carro, Dhiraj K. Pradhan |
A soft error robust and power aware memory design. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
robustness, memory, soft error, power aware |
1 | Filipe Costa Beber Vieira, César Augusto Prior, Cesar Ramos Rodrigues, Leonardo Perin, João Baptista dos Santos Martins |
Current mode instrumentation amplifier with rail-to-rail input and output. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
current mode instrumentation amplifier, rail-to-rail input and output, analog integrated circuits |
1 | Emilena Specht, Ricardo Miotto Redin, Luigi Carro, Luís da Cunha Lamb, Érika F. Cota, Flávio Rech Wagner |
Analysis of the use of declarative languages for enhanced embedded system software development. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
embedded software, modeling languages, system level modeling, system level synthesis |
1 | Leandro Soares Indrusiak, Manfred Glesner |
Specification of alternative execution semantics of UML sequence diagrams within actor-oriented models. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
actor-orientation, UML, embedded systems, sequence diagram, message sequence charts, electronic system level |
1 | Alexandre Nentchev, Siegfried Selberherr |
Three-dimensional on-chip inductance and resistance extraction. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
on-chip resistance and inductance extraction, FEM |
1 | Monica Magalhães Pereira, Bruno Cruz de Oliveira, Ivan Saraiva Silva |
RoSA: a reconfigurable stream-based architecture. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
stream-based, reconfigurable architecture, coarse-grained |
1 | Juan Pablo Martinez Brito, Sergio Bampi |
Design of a digital FM demodulator based on a 2nddegree order all-digital phase-locked loop. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
all-digital phase-locked loop (ADPLL), digital FM demodulator, frequency modulation (FM), FPGA, VHDL, software-defined radio (SDR), reconfigurable logic |
1 | César A. M. Marcon, José Carlos S. Palma, Fabiano Hessel, Eduardo A. Bezerra, Guilherme Rohde, Carlos Eduardo Reif, Luciano Azevedo, Carolina Metzler |
A 915 MHz UHF low power RFID tag. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
RFID systems, low power consumption, synchronization algorithms |
1 | Marcio F. da S. Oliveira, Eduardo Wenzel Brião, Francisco Assis Moreira do Nascimento, Flávio Rech Wagner |
Model driven engineering for MPSOC design space exploration. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
model driven engineering, design space exploration, multi-processor system-on-chip |
1 | Takayasu Sakurai |
Meeting with the forthcoming IC design. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
3D chip stack, large-area electronics, organic circuits, scaling issues, SiP |
1 | Leo Huf Campos Braga, Suzana Domingues, Milton F. Rocha, Leonardo Bruno de Sá, Fernando de Souza Campos, Filipe V. Santos, Antonio Carneiro de Mesquita Filho, Mário Vaz Silva, Jacobus W. Swart |
Layout techniques for radiation hardening of standard CMOS active pixel sensors. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
radiation hardeness, CMOS, active pixel sensor |
1 | Ahmed A. Youssef |
RF architectures in CMOS for the emerging wireless technologies: challenges and opportunities. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
integrated mobile communication systems, wireless, CMOS, RF |
1 | Gustavo Girão, Bruno Cruz de Oliveira, Rodrigo Soares, Ivan Saraiva Silva |
Cache coherency communication cost in a NoC-based MPSoC platform. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
cache coherence, MPSoC, NoC, directory |
1 | Florian Dittmann 0001, Achim Rettberg, Raphael Weber |
Optimization techniques for a reconfigurable, self-timed, and bit-serial architecture. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
optimization, high-level synthesis, bit-serial architecture |
1 | Everton Carara, Fernando Moraes 0001, Ney Calazans |
Router architecture for high-performance NoCs. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
session layer, switching modes, networks on chip, virtual channels |
1 | Pietro Maris Ferreira, Antonio Petraglia, Fernando Antonio Pinto Barúqui |
A CMOS AM demodulator for instrumentation applications. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
AM demodulator, cavitation detector, ideal rectifier, integrated circuits |
1 | Jose M. Marulanda, Ashok Kumar Srivastava, Ashwani K. Sharma |
Transfer characteristics and high frequency modeling of logic gates using carbon nanotube field effect transistors (CNT-FETs). |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
CNT-logic, cut-off frequency, small signal model, transfer characteristics, carbon nanotubes |
1 | Alfredo Arnaud, Martin Bremermann, Joel Gak, Matías R. Miguez |
On the design of ultra low noise amplifiers for ENG recording. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
low power, CMOS, analog design, low noise |
1 | Egas Henes Neto, Fernanda Lima Kastensmidt, Gilson I. Wirth |
A built-in current sensor for high speed soft errors detection robust to process and temperature variations. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
fault-tolerance, process variations, built-in current sensor |
1 | Xiangrong Zhou, Peter Petrov |
The interval page table: virtual memory support in real-time and memory-constrained embedded systems. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
memory management, real-time embedded systems, page table |
1 | Humberto Campanella, Arantxa Uranga, Pascal Nouet, Pedro De Paco Sanchez, Núria Barniol, Jaume Esteve |
Instantaneous de-embedding of the on-wafer equivalent-circuit parameters of acoustic resonator (FBAR) for integrated circuit applications. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
RF circuit design, parameter extraction and fitting, thin-film bulk acoustic wave resonators (FBAR), MEMS |
1 | Nathaniel Ross Pinckney, David Money Harris |
Parallelized radix-4 scalable montgomery multipliers. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
cryptography, RSA, Montgomery Multiplication |
1 | Betty Prince |
Nanotechnology and emerging memories. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
FeRAM, ferroelectric, floating body, nanocrystal, nitride storage, scaling issues, single electron memories, memory, variability, scaling, SRAM, MEMs, DRAM, flash, MRAM, phase change, non-volatile, molecular memory |
1 | Chithrupa Ramesh, Ana Rusu, Mohammed Ismail 0001, Mikael Skoglund |
TrACS: transceiver architecture and wireless channel simulator. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
transceiver circuits, wireless sensor node design, simulator, system level design, receiver, performance verification |
1 | Daniel Barcelos, Eduardo Wenzel Brião, Flávio Rech Wagner |
A hybrid memory organization to enhance task migration and dynamic task allocation in NoC-based MPSoCs. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
energy, MPSoC, NoC, task migration, memory organization |
1 | Letícia Maria Veiras Bolzani, Paolo Bernardi, Matteo Sonza Reorda |
An optimized hybrid approach to provide fault detection and correction in SoCs. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
fault correction, SoCs, fault detection, hybrid approach |
1 | Filipe G. Ramos, Laercio Caldeira, Tales Cleber Pimenta |
A programmable voltage reference optimized for power management applications. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
DC/DC converter, programmable voltage reference, power management, voltage reference |
1 | Peterson R. Agostinho, Sandro A. P. Haddad, Jader A. De Lima, Wouter A. Serdijn, Osamu Saotome |
A ultra low power CMOS pA/V transconductor and its application to wavelet filters. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
pa/V, transconductor, low-power |
1 | Hugo Daniel Hernández, Wilhelmus A. M. Van Noije, Elkim Roa, João Navarro Jr. |
A small area 8bits 50MHz CMOS DAC for bluetooth transmitter. |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
current-steering segmented, low area, bluetooth |
1 | Mohammed Ismail 0001 |
WiMAX: a competing or complementary technology to 3G? |
SBCCI |
2007 |
DBLP DOI BibTeX RDF |
low power, wireless, 3G, 4G, RF |
Displaying result #601 - #700 of 1151 (100 per page; Change: ) Pages: [ <<][ 1][ 2][ 3][ 4][ 5][ 6][ 7][ 8][ 9][ 10][ 11][ 12][ >>] |
|