Search results for "SOI"

Hits ?▲	Authors	Title	Venue	Year	Link
13	Yoshio Mita, Eric Lebrasseur, Akio Higo	In-Plane SOI MEMS as a Mechanical Material for Time and Frequency Studies on Vibration.	EWME	2018	DBLP DOI BibTeX RDF
13	Philippe Galy, R. Lethiecq, Maryline Bawedin	Optimized in situ heating control on a new MOS device structure in 28nm UTBB FD-SOI CMOS technology.	ICICDT	2018	DBLP DOI BibTeX RDF
13	Jheng-Yi Chen, Ming-Yu Chang, Shi-Hao Chen, Jia-Wei Lee, Meng-Hsueh Chiang	Body-biasing assisted vmin optimization for 5nm-node multi-Vt FD-SOI 6T-SRAM.	ISQED	2018	DBLP DOI BibTeX RDF
13	Arif Siddiqi, Navneet Jain, Mahbub Rashed	Back-bias generator for post-fabrication threshold voltage tuning applications in 22nm FD-SOI process.	ISQED	2018	DBLP DOI BibTeX RDF
13	Jill C. Mayeda, Donald Y. C. Lie, Jerry Lopez	A 24-28GHz Reconfigurable CMOS Power Amplifier in 22nm FD-SOI for Intelligent SoC Applications.	ISOCC	2018	DBLP DOI BibTeX RDF
13	Tanmay Chavan, S. Dutta, Nihar R. Mohapatra, Udayan Ganguly	An Ultra Energy Efficient Neuron enabled by Tunneling in Sub-threshold Regime on a Highly Manufacturable 32 nm SOI CMOS Technology.	DRC	2018	DBLP DOI BibTeX RDF
13	Dibyendu Chatterjee, Anil Kottantharayil	An Improved 1T-DRAM Cell Using TiO2as the Source and Drain of an n-Channel PD-SOI MOSFET.	DRC	2018	DBLP DOI BibTeX RDF
13	K. R. Khiangte Amlta, A. Laha, S. Mahapatra, U. Gangway	Epitaxial Gd2O3on Si (111) Substrate by Sputtering to Enable Low Cost SOI.	DRC	2018	DBLP DOI BibTeX RDF
13	Rodrigo B. Capeleiro, Marcelino B. Santos	Low noise, high efficiency, segmented LCD drivers for ultra-low power applications in 22 nm FD-SOI.	DCIS	2018	DBLP DOI BibTeX RDF
13	Trang Le Dinh Dang, Dongkyu Seo, Jin-Woo Han, Jinsang Kim, Ik-Joon Chang	A 28mn FD-SOI 4KB Radiation-hardened 12T SRAM Macro with 0.6 ~ 1V Wide Dynamic Voltage Scaling for Space Applications.	A-SSCC	2018	DBLP DOI BibTeX RDF
13	Guenole Lallement, Fady Abouzeid, Thierry Di Gilio, Philippe Roche, Jean-Luc Autran	A 140 nW, 32.768 kHz, 1.9 ppm/°C Leakage-Based Digitally Relocked Clock Reference with 0.1 ppm Long-Term Stability in 28nm FD-SOI.	A-SSCC	2018	DBLP DOI BibTeX RDF
13	Benjamin Willsch, Marius te Heesen, Julia Hauser, Stefan Dreiner, Holger Kappert, Holger Vogt	Evaluation of a median threshold based EEPROM-PUF concept implemented in a high temperature SOI CMOS technology.	DTIS	2018	DBLP DOI BibTeX RDF
13	Zbigniew Jaworski	High Resolution Latched Comparator Implemented in 22 nm FD-SOI Process.	MIXDES	2018	DBLP DOI BibTeX RDF
13	Zahit Evren Kaya, Salih Ergun	High-Speed Random Number Generator Design in 22nm FD-SOI Process.	APCCAS	2018	DBLP DOI BibTeX RDF
13	Meng Huang, Xiaoping Cao, Shuang Zheng, Lesi Yang, Xiangfeng Peng, Shuhui Li 0005, Li Shen, Jian Wang 0060	2 µm 2×2 Optical Switch based on a Thermo-Optically Tunable Multimode Interference SOI Waveguide.	ECOC	2018	DBLP DOI BibTeX RDF
13	Antonin Gallet, Karim Hassan, Christophe Jany, T. Card, J. DaFonseca, V. Rebeyrol, Nils Girard, Alexandre Shen, Dalila Make, Jean-Guy Provost, Jean Decobert, Viviane Muffato, Antoine Coquiard, Stephane Malhouitre, Ségolène Olivier, Helene Debregeas, Guang-Hua Duan, Frédéric Grillot	Design, Fabrication and Characterization of Hybrid III-V/SOI Phase-Shift Free DFB Laser with Tapered Silicon Waveguide.	ECOC	2018	DBLP DOI BibTeX RDF
13	Prajith Kumar Poongodan, Pragoti Pran Bora, David Borggreve, Frank Vanselow, Linus Maurer	A low power, offset compensated, CMOS only bandgap reference in 22 nm FD-SOI technology.	MOCAST	2018	DBLP DOI BibTeX RDF
13	Guoli Li, Nicolas André, Pierre Gérard, Syed Zeeshan Ali, Florin Udrea, Laurent A. Francis, Yun Zeng, Denis Flandre	Multiple-Wavelength Detection in SOI Lateral PIN Diodes With Backside Reflectors.	IEEE Trans. Ind. Electron.	2017	DBLP DOI BibTeX RDF
13	Ke Han, Guohui Qiao, Zhongliang Deng, Qingbo Li, Huashuai Xing	The optimal geometry parameters and impact of parasitic capacitance and resistance of sub-14nm SOI multi-fin FinFETs.	J. Intell. Fuzzy Syst.	2017	DBLP DOI BibTeX RDF
13	Hamed Gheidi, Toshifumi Nakatani, Vincent W. Leung, Peter M. Asbeck	A 1-3 GHz Delta-Sigma-Based Closed-Loop Fully Digital Phase Modulator in 45-nm CMOS SOI.	IEEE J. Solid State Circuits	2017	DBLP DOI BibTeX RDF
13	Tolga Dinc, Aravind Nagulu, Harish Krishnaswamy	A Millimeter-Wave Non-Magnetic Passive SOI CMOS Circulator Based on Spatio-Temporal Conductivity Modulation.	IEEE J. Solid State Circuits	2017	DBLP DOI BibTeX RDF
13	Sajjad Moazeni, Sen Lin, Mark T. Wade, Luca Alloatti, Rajeev J. Ram, Milos A. Popovic, Vladimir Stojanovic	A 40-Gb/s PAM-4 Transmitter Based on a Ring-Resonator Optical DAC in 45-nm SOI CMOS.	IEEE J. Solid State Circuits	2017	DBLP DOI BibTeX RDF
13	Ben Keller, Martin Cochet, Brian Zimmer, Jaehwa Kwak, Alberto Puggelli, Yunsup Lee, Milovan Blagojevic, Stevo Bailey, Pi-Feng Chiu, Daniel Palmer Dabbelt, Colin Schmidt 0001, Elad Alon, Krste Asanovic, Borivoje Nikolic	A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI.	IEEE J. Solid State Circuits	2017	DBLP DOI BibTeX RDF
13	Man-Chia Chen, Aldo Pena Perez, Sri-Rajasekhar Kothapalli, Philippe Cathelin, Andreia Cathelin, Sanjiv Sam Gambhir, Boris Murmann	A Pixel Pitch-Matched Ultrasound Receiver for 3-D Photoacoustic Imaging With Integrated Delta-Sigma Beamformer in 28-nm UTBB FD-SOI.	IEEE J. Solid State Circuits	2017	DBLP DOI BibTeX RDF
13	Hasan Al-Rubaye, Gabriel M. Rebeiz	W-Band Direct-Modulation >20-Gb/s Transmit and Receive Building Blocks in 32-nm SOI CMOS.	IEEE J. Solid State Circuits	2017	DBLP DOI BibTeX RDF
13	Ashish Kumar 0001, Chandrajit Debnath, Pratap Narayan Singh, Vivek Bhatia, Shivani Chaudhary, Vigyan Jain, Stéphane Le Tual, Rakesh Malik	A 0.065-mm2 19.8-mW Single-Channel Calibration-Free 12-b 600-MS/s ADC in 28-nm UTBB FD-SOI Using FBB.	IEEE J. Solid State Circuits	2017	DBLP DOI BibTeX RDF
13	Varun Kumar, Harpinder Kaur, Mukesh Kumar	Narrow-core hollow optical waveguide with nanostructured SOI as ultra-low loss platform for efficient photodetection.	Photonic Netw. Commun.	2017	DBLP DOI BibTeX RDF
13	Can Baltaci, Yusuf Leblebici	Thermal aware design and comparative analysis of a high performance 64-bit adder in FD-SOI and bulk CMOS technologies.	Integr.	2017	DBLP DOI BibTeX RDF
13	Yaakov Mandelbaum, Ilan Gadasi, Avraham Chelly, Zeev Zalevsky, Avi Karsenty	Small Signals' Study of Thermal Induced Current in Nanoscale SOI Sensor.	J. Sensors	2017	DBLP DOI BibTeX RDF
13	Yaakov Mandelbaum, Ariel Zev, Avraham Chelly, Zeev Zalevsky, Avi Karsenty	Study of the Photo- and Thermoactivation Mechanisms in Nanoscale SOI Modulator.	J. Sensors	2017	DBLP DOI BibTeX RDF
13	Ngoc Le Ba, Tony Tae-Hyoung Kim	Design of Temperature-Aware Low-Voltage 8T SRAM in SOI Technology for High-Temperature Operation (25 %C-300 %C).	IEEE Trans. Very Large Scale Integr. Syst.	2017	DBLP DOI BibTeX RDF
13	Nobutaro Shibata, Mayumi Watanabe, Takako Ishihara	A SOI Multi-VDD Dual-Port SRAM Macro for Serial Access Applications.	IEICE Trans. Electron.	2017	DBLP DOI BibTeX RDF
13	Siti Sarah Md Sallah, Sawal Hamid Md. Ali, P. Susthitha Menon, Nurjuliana Juhari, Md. Shabiul Islam	Comparative Performances of SOI-Based Optical Interconnect vs. Electrical Interconnect in Analog Electronic Applications.	IEICE Trans. Electron.	2017	DBLP DOI BibTeX RDF
13	Even Låte, Ali Asghar Vatanjou, Trond Ytterdal, Snorre Aunet	Extended Comparative Analysis of Flip-Flop Architectures for Subthreshold Applications in 28 nm FD-SOI.	Microprocess. Microsystems	2017	DBLP DOI BibTeX RDF
13	Jubal Saji, Shoaib Kamal	GDI logic implementation of uniform sized CSLA architectures in 45 nm SOI technology.	Microprocess. Microsystems	2017	DBLP DOI BibTeX RDF
13	Mehdi Rajabi Asadabadi	A developed slope order index (SOI) for bottlenecks in projects and production lines.	Comput. Manag. Sci.	2017	DBLP DOI BibTeX RDF
13	Carolina Mora Lopez, Jan Putzeys, Bogdan C. Raducanu, Marco Ballini, Shiwei Wang 0001, Alexandru Andrei, Veronique Rochus, Roeland Vandebriel, Simone Severi, Chris Van Hoof, Silke Musa, Nick Van Helleputte, Refet Firat Yazicioglu, Srinjoy Mitra	A Neural Probe With Up to 966 Electrodes and Up to 384 Configurable Channels in 0.13 µm SOI CMOS.	IEEE Trans. Biomed. Circuits Syst.	2017	DBLP DOI BibTeX RDF
13	Konstantin O. Petrosyants, Lev M. Sambursky, Igor A. Kharitonov, Boris G. Lvov	Radiation-Induced Fault Simulation of SOI/SOS CMOS LSI's Using Universal Rad-SPICE MOSFET Model.	J. Electron. Test.	2017	DBLP DOI BibTeX RDF
13	V. Jegadheesan, K. Sivasankaran	RF stability performance of SOI junctionless FinFET and impact of process variation.	Microelectron. J.	2017	DBLP DOI BibTeX RDF
13	Azzedin D. Es-Sakhi, Masud H. Chowdhury	Analysis of device capacitance and subthreshold behavior of Tri-gate SOI FinFET.	Microelectron. J.	2017	DBLP DOI BibTeX RDF
13	Md Sakib Hasan, Touhidur Rahman, Syed K. Islam, Benjamin B. Blalock	Numerical modeling and implementation in circuit simulator of SOI four-gate transistor (G4FET) using multidimensional Lagrange and Bernstein polynomial.	Microelectron. J.	2017	DBLP DOI BibTeX RDF
13	Fanny Georges	Stratégies d'automédiation: de l'expression de soi au jeu des intersubjectivités : Etude de la représentation de l'usager dans Livejournal et Touchgraph.	CoRR	2017	DBLP BibTeX RDF
13	Wei Cai, Cheng Li, ShiWei Luan	SOI RF Switch for Wireless Sensor Network.	CoRR	2017	DBLP BibTeX RDF
13	Pascal Giard, Alexios Balatsoukas-Stimming, Thomas Christoph Müller, Andrea Bonetti, Claude Thibeault, Warren J. Gross, Philippe Flatresse, Andreas Burg	PolarBear: A 28-nm FD-SOI ASIC for Decoding of Polar Codes.	CoRR	2017	DBLP BibTeX RDF
13	Essia Ben Abdallah, Serge Bories, Dominique Nicolas, Alexandre Giry, Christophe Delaveaud	Large-Signal Analysis and Characterization of a RF SOI-based Tunable Notch Antenna for LTE in TV White Space Frequency Spectrum.	EAI Endorsed Trans. Cogn. Commun.	2017	DBLP DOI BibTeX RDF
13	Konstantin O. Petrosyants, Igor A. Kharitonov, Sergey V. Lebedev, Lev M. Sambursky, Sergey O. Safonov, Veniamin G. Stakhin	Electrical characterization and reliability of submicron SOI CMOS technology in the extended temperature range (to 300 °C).	Microelectron. Reliab.	2017	DBLP DOI BibTeX RDF
13	Bruna Cardoso Paz, Renan Trevisoli Doria, Mikaël Cassé, Sylvain Barraud, Gilles Reimbold, Maud Vinet, Olivier Faynot, Marcelo Antonio Pavanello	Harmonic distortion analysis of triple gate SOI nanowire MOSFETS down to 100 K.	Microelectron. Reliab.	2017	DBLP DOI BibTeX RDF
13	Changqing Chen, Ghim Boon Ang, Peng Tiong Ng, Francis Rivai, Soh Ping Neo, Dayanand Nagalingam, Kim Hong Yip, Jeffery Lam, Zhihong Mai	Application of Scanning Capacitance Microscopy on SOI device with wafer edge low yield pattern.	Microelectron. Reliab.	2017	DBLP DOI BibTeX RDF
13	Chao Peng, Yunfei En, Zhengxuan Zhang, Yuan Liu, Zhifeng Lei	Radiation induced transconductance overshoot in the 130 nm partially-depleted SOI MOSFETs.	Microelectron. Reliab.	2017	DBLP DOI BibTeX RDF
13	Lei Song, Zhiyuan Hu, Mengying Zhang, Xiaonian Liu, Lihua Dai, Zhengxuan Zhang, Shichang Zou	Influences of silicon-rich shallow trench isolation on total ionizing dose hardening and gate oxide integrity in a 130 nm partially depleted SOI CMOS technology.	Microelectron. Reliab.	2017	DBLP DOI BibTeX RDF
13	Pascal Giard, Alexios Balatsoukas-Stimming, Thomas Christoph Müller, Andrea Bonetti, Claude Thibeault, Warren J. Gross, Philippe Flatresse, Andreas Burg	PolarBear: A 28-nm FD-SOI ASIC for Decoding of Polar Codes.	IEEE J. Emerg. Sel. Topics Circuits Syst.	2017	DBLP DOI BibTeX RDF
13	Maria Malits, Yael Nemirovsky	Nanometric Integrated Temperature and Thermal Sensors in CMOS-SOI Technology.	Sensors	2017	DBLP DOI BibTeX RDF
13	Hao Cai, You Wang 0002, Lirida Alves de Barros Naviner, Weisheng Zhao	Robust Ultra-Low Power Non-Volatile Logic-in-Memory Circuits in FD-SOI Technology.	IEEE Trans. Circuits Syst. I Regul. Pap.	2017	DBLP DOI BibTeX RDF
13	Kai Yu 0008, Sizhen Li, Gary Zhang, Zhi-hao Zhang, Qiaoling Tong, Xuecheng Zou	Design Considerations of Charge Pump for Antenna Switch Controller With SOI CMOS Technology.	IEEE Trans. Circuits Syst. II Express Briefs	2017	DBLP DOI BibTeX RDF
13	Rakesh Gangarajaiah, Ove Edfors, Liang Liu 0002	An Adaptive QR Decomposition Processor for Carrier-Aggregated LTE-A in 28-nm FD-SOI.	IEEE Trans. Circuits Syst. I Regul. Pap.	2017	DBLP DOI BibTeX RDF
13	Yasuo Arai, Ikuo Kurachi	Radiation Imaging Detectors Using SOI Technology		2017	DOI RDF
13	Sunil Satish Rao, Benjamin Prautsch, Ashish Shrivastava, Torsten Reich	Body biasing for analog design: Practical experiences in 22 nm FD-SOI.	DDECS	2017	DBLP DOI BibTeX RDF
13	Kyung Hwa Lee, Maryline Bawedin, Hyungjin Park, Mukta Singh Parihar, Sorin Cristoloveanu	Carrier lifetime evaluation in FD-SOI layers.	ESSDERC	2017	DBLP DOI BibTeX RDF
13	Alfio Di Mauro, Davide Rossi, Antonio Pullini, Philippe Flatresse, Luca Benini	Temperature and process-aware performance monitoring and compensation for an ULP multi-core cluster in 28nm UTBB FD-SOI technology.	PATMOS	2017	DBLP DOI BibTeX RDF
13	Jen-Chieh Hsueh, Vanessa H.-C. Chen, Jean-Olivier Plouchart	An ultra-high bandwidth sub-ranging ADC with programmable dynamic range in 32nm CMOS SOI.	MWSCAS	2017	DBLP DOI BibTeX RDF
13	Mohammad Jaafar Ayoub, Mostafa Alloush, Ali Mohsen, Adnan Harb, Nathalie Deltimple, Abraham Serhane	Class AB vs. class J 5G power amplifier in 28-nm UTBB FD-SOI technology for high efficiency operation.	ICM	2017	DBLP DOI BibTeX RDF
13	Kimiyoshi Usami, Shunsuke Kogure, Yusuke Yoshida, Ryo Magasaki, Hideharu Amano	Level-shifter-less approach for multi-VDD design to use body bias control in FD-SOI.	VLSI-SoC	2017	DBLP DOI BibTeX RDF
13	Kimiyoshi Usami, Shunsuke Kogure, Yusuke Yoshida, Ryo Magasaki, Hideharu Amano	Level-Shifter-Less Approach for Multi-VDD SoC Design to Employ Body Bias Control in FD-SOI.	VLSI-SoC (Selected Papers)	2017	DBLP DOI BibTeX RDF
13	Igor A. Kharitonov	Electro-thermo-rad SPICE models for SOI/SOS MOSFETs.	EWDTS	2017	DBLP DOI BibTeX RDF
13	R. Sumi, Nandita DasGupta, Bijoy Krishna Das	Integrated optical Mach-Zehnder interferometer with a sensing arm of sub-wavelength grating waveguide in SOI.	IEEE SENSORS	2017	DBLP DOI BibTeX RDF
13	Mohammad Maroufi, Michael G. Ruppert, Anthony G. Fowler, S. O. Reza Moheimani	Design and control of a single-chip SOI-MEMS atomic force microscope.	ACC	2017	DBLP DOI BibTeX RDF
13	Rana Azhar Shaheen, Rehman Akbar, Alok Sethi, Janne P. Aikio, Timo Rahkonen, Aarno Pärssinen	A 45nm CMOS SOI, four element phased array receiver supporting two MIMO channels for 5G.	NORCAS	2017	DBLP DOI BibTeX RDF
13	Janne P. Aikio, Alok Sethi, Rana Azhar Shaheen, Rehman Akbar, Timo Rahkonen, Aarno Pärssinen	A fully integrated 13 GHz CMOS SOI stacked power amplifier for 5G wireless systems.	NORCAS	2017	DBLP DOI BibTeX RDF
13	Tony Hanna, Nathalie Deltimple, Sébastien Fregonese	A class-J power amplifier for 5G applications in 28nm CMOS FD-SOI technology.	SBCCI	2017	DBLP DOI BibTeX RDF
13	Marten Vohrmann, Philippe Geisler, Thorsten Jungeblut, Ulrich Rückert 0001	Design-space exploration of ultra-low power CMOS logic gates in a 28 nm FD-SOI technology.	ECCTD	2017	DBLP DOI BibTeX RDF
13	Boris Moret, Vincent Knopik, Eric Kerherve	A 28GHz self-contained power amplifier for 5G applications in 28nm FD-SOI CMOS.	LASCAS	2017	DBLP DOI BibTeX RDF
13	Pragoti Pran Bora, David Borggreve, Frank Vanselow, Erkan Isa, Linus Maurer	Low-voltage low-distortion sampling switch design in 22 nm FD-SOI CMOS technology.	ICECS	2017	DBLP DOI BibTeX RDF
13	Mattias Palm, Daniele Mastantuono, Roland Strandberg, Lars Sundström, Sven Mattisson	A 12b, 1 GSps TI pipelined-SAR converter with 65 dB SFDR through buffer linearization and gain mismatch correction in 28nm FD-SOI.	ESSCIRC	2017	DBLP DOI BibTeX RDF
13	Marcel A. Kossel, Christian Menolfi, Pier Andrea Francese, Lukas Kull, Thomas Morf, Thomas Toifl, Matthias Braendli, Alessandro Cevrero, Danny Luu, Ilter Özkaya, Hazar Yueksel	DDR4 transmitter with AC-boost equalization and wide-band voltage regulators for thin-oxide protection in 14-nm SOI CMOS technology.	ESSCIRC	2017	DBLP DOI BibTeX RDF
13	Christian Elgaard, Lars Sundström	A 491.52 MHz 840 uW crystal oscillator in 28 nm FD-SOI CMOS for 5G applications.	ESSCIRC	2017	DBLP DOI BibTeX RDF
13	Guenole Lallement, Fady Abouzeid, Martin Cochet, Jean-Marc Daveau, Philippe Roche, Jean-Luc Autran	A 2.7pJ/cycle 16MHz SoC with 4.3nW power-off ARM Cortex-M0+ core in 28nm FD-SOI.	ESSCIRC	2017	DBLP DOI BibTeX RDF
13	Staffan Ek, Tony Påhlsson, Anders Carlsson, Andreas Axholt, Anna-Karin Stenman, Henrik Sjöland	A 16-20 GHz LO system with 115 fs jitter for 24-30 GHz 5G in 28 nm FD-SOI CMOS.	ESSCIRC	2017	DBLP DOI BibTeX RDF
13	Philipp Salz, A. Frisch, Wolfgang Penth, J. Noack, T. Kalla, Rolf Sautter, Michael Kugel, Otto A. Torreiter, G. Sapp, Mike Lee, Eric Fluhr, A. Rozenfeld, Jürgen Pille, Dieter F. Wendel	A system of array families and synthesized soft arrays for the POWER9™ processor in 14nm SOI FinFET technology.	ESSCIRC	2017	DBLP DOI BibTeX RDF
13	Lourembam Beloni Devi, Kundan Singh, Asutosh Srivastava	Study of substrate bias effect in Symmetric Lateral Bipolar Nano Scale Transistor on SOI for mixed signal applications.	NEMS	2017	DBLP DOI BibTeX RDF
13	Liao Wang, Soichi Hirokawa, Ryo Harada, Masanori Hashimoto	Contributions of SRAM, FF and combinational circuit to chip-level neutron-induced soft error rate: - Bulk vs. FD-SOI at 0.5 and 1.0V -.	NEWCAS	2017	DBLP DOI BibTeX RDF
13	Andreia Cathelin	RF/analog and mixed-signal design techniques in FD-SOI technology.	CICC	2017	DBLP DOI BibTeX RDF
13	SungWon Chung, Hooman Abediasl, Hossein Hashemi 0001	15.4 A 1024-element scalable optical phased array in 0.18µm SOI CMOS.	ISSCC	2017	DBLP DOI BibTeX RDF
13	Sajjad Moazeni, Sen Lin, Mark T. Wade, Luca Alloatti, Rajeev J. Ram, Milos A. Popovic, Vladimir Stojanovic	29.3 A 40Gb/s PAM-4 transmitter based on a ring-resonator optical DAC in 45nm SOI CMOS.	ISSCC	2017	DBLP DOI BibTeX RDF
13	Hemanth Prabhu, Joachim Neves Rodrigues, Liang Liu 0002, Ove Edfors	3.6 A 60pJ/b 300Mb/s 128×8 Massive MIMO precoder-detector in 28nm FD-SOI.	ISSCC	2017	DBLP DOI BibTeX RDF
13	Giuseppe Desoli, Nitin Chawla, Thomas Boesch, Surinder Pal Singh, Elio Guidetti, Fabio De Ambroggi, Tommaso Majo, Paolo Zambotti, Manuj Ayodhyawasi, Harvinder Singh, Nalin Aggarwal	14.1 A 2.9TOPS/W deep convolutional neural network SoC in FD-SOI 28nm for intelligent embedded systems.	ISSCC	2017	DBLP DOI BibTeX RDF
13	Ramiro Taco, Itamar Levi, Marco Lanuzza, Alexander Fish	Evaluation of Dual Mode Logic in 28nm FD-SOI technology.	ISCAS	2017	DBLP DOI BibTeX RDF
13	Alexandre Mas, Eric Andre, Caroline Lelandais-Perrault, Filipe Vinci dos Santos, Philippe Bénabès	Analog bandwidth mismatch compensation for time-interleaved ADCs using FD-SOI technology.	ISCAS	2017	DBLP DOI BibTeX RDF
13	Zheng Yong, Stefan Shopov, Jared C. Mikkelsen, Robert Mallard, Jason C. C. Mak, Sorin P. Voinigescu, Joyce K. S. Poon	A 44Gbps high extinction ratio silicon Mach-Zehnder modulator with a 3D-integrated 28nm FD-SOI CMOS driver.	OFC	2017	DBLP BibTeX RDF
13	Parimal Sah, Bijoy Krishna Das	Broadband wavelength filter device using a sidewall grating in multimode SOI Rib waveguide.	OFC	2017	DBLP BibTeX RDF
13	Qiang Zhang, Shengmeng Fu, Jiangwei Man, Zhiwei Li, Matteo Cherchi, Paivi Heimala, Mikko Harjanne, Fei Sun, Marianne Hiltunen, Timo Aalto, Li Zeng	Low-loss and polarization-insensitive photonic integrated circuit based on micron-scale SOI platform for high density TDM PONs.	OFC	2017	DBLP BibTeX RDF
13	Valentina Cristofori, Francesco Da Ros, Mohamed E. Chaibi, Yunhong Ding, Laurent Bramerie, Alexandre Shen, Antonin Gallet, Guang-Hua Duan, Leif K. Oxenløwe, Christophe Peucheret	Directly modulated and ER enhanced hybrid IH-V/SOI DFB laser operating up to 20 Gb/s for extended reach applications in PONs.	OFC	2017	DBLP BibTeX RDF
13	Shinji Matsuo	High-performance lasers on InP-SOI platform.	OFC	2017	DBLP BibTeX RDF
13	Walter Schwarzenbach, Manuel Sellier, Bich-Yen Nguyen, Christophe Girard, Christophe Maleville	FD-SOI material enabling CMOS technology disruption from 65nm to 12nm and beyond.	ICICDT	2017	DBLP DOI BibTeX RDF
13	Louis Hutin, Benoit Bertrand, Romain Maurand, Matias Urdampilleta, Baptiste Jadot, H. Bohuslavskyi, L. Bourdet, Yann-Michel Niquet, Xavier Jehl, Sylvain Barraud, C. Bauerle, Tristan Meunier, Marc Sanquer, Silvano De Franceschi, Maud Vinet	SOI CMOS technology for quantum information processing.	ICICDT	2017	DBLP DOI BibTeX RDF
13	Louise De Conti, Thomas Bedecarrats, Maud Vinet, Sorin Cristoloveanu, Philippe Galy	Toward Gated-Diode-BIMOS for thin silicon ESD protection in advanced FD-SOI CMOS technologies.	ICICDT	2017	DBLP DOI BibTeX RDF
13	Hao Cai, You Wang 0002, Lirida A. B. Naviner, Wang Kang 0001, Weisheng Zhao	Energy Efficient Magnetic Tunnel Junction Based Hybrid LSI Using Multi-Threshold UTBB-FD-SOI Device.	ACM Great Lakes Symposium on VLSI	2017	DBLP DOI BibTeX RDF
13	Chaojiang Li, Min Wang, Taiyun Chi, Arvind Kumar, Myra Boenke, Dawn Wang, Ned Cahoon, Anirban Bandyopadhyay, Alvin J. Joseph, Hua Wang 0006	5G mm-Wave front-end-module design with advanced SOI process.	ASICON	2017	DBLP DOI BibTeX RDF
13	Hongwei Zhu, Qiuliang Li, Hao Sun, Zhipeng Wang, Ran Liu, Yi Liu	Ultra low loss and high linearity RF switch using 130nm SOI CMOS process.	ASICON	2017	DBLP DOI BibTeX RDF
13	Sitansusekhar Roymohapatra, Ganesh R. Gore, Akanksha Yadav, Mahesh B. Patil, Krishnan S. Rengrajan, Maryam Shojaei Baghini	Enhanced Look-Up Table Approach for Modeling of Floating Body SOI MOSFET.	iNIS	2017	DBLP DOI BibTeX RDF
13	Himanshu Thapliyal, T. S. S. Varun, S. Dinesh Kumar	UTB-SOI based adiabatic computing for low-power and secure IoT devices.	CISRC	2017	DBLP DOI BibTeX RDF