Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
18 | Qing-Lian Lin, Hu-Chen Liu, Duo-Jin Wang, Long Liu |
Integrating systematic layout planning with fuzzy constraint theory to design and optimize the facility layout for operating theatre in hospitals. |
J. Intell. Manuf. |
2015 |
DBLP DOI BibTeX RDF |
|
18 | Ivan W. M. Chan, Martyn Pinfold, C. K. Kwong 0001, W. H. Szeto |
Automation and optimisation of Family Mould Cavity and Runner Layout Design (FMCRLD) using genetic algorithms and mould layout design grammars. |
Comput. Aided Des. |
2014 |
DBLP DOI BibTeX RDF |
|
18 | Jun Wang 0001, Lu Cheng, Lizhe Wang 0001 |
Concentric layout, a new scientific data layout for matrix data-set in Hadoop file system. |
Int. J. Parallel Emergent Distributed Syst. |
2013 |
DBLP DOI BibTeX RDF |
|
18 | Karuppasamy Chandrasekar, Ponnusamy Venkumar |
A Simulated Annealing Approach for Integrating Cell Formation with Machine Layout and Cell Layout. |
Int. J. Robotics Autom. |
2013 |
DBLP DOI BibTeX RDF |
|
18 | Rebecca M. C. Roberts, Coenrad J. Fourie |
Layout-to-schematic as a step towards layout-versus-schematic verification of SFQ integrated circuit layouts. |
AFRICON |
2013 |
DBLP DOI BibTeX RDF |
|
18 | V. Madhusudanan Pillai, Krishna Mohan Thazhathu Valiyaveettil |
Detailed Dynamic Layout Planning: An Adaptive Layout Approach. |
MIM |
2013 |
DBLP DOI BibTeX RDF |
|
18 | István Albert, Hassan Charaf, László Lengyel |
Layout definition considerations for a content-driven template-based layout system. |
EUROCON |
2013 |
DBLP DOI BibTeX RDF |
|
18 | Ching-Yu Chin, Po-Cheng Pan, Hung-Ming Chen, Tung-Chieh Chen, Jou-Chun Lin |
Efficient analog layout prototyping by layout reuse with routing preservation. |
ICCAD |
2013 |
DBLP DOI BibTeX RDF |
|
18 | Christine P. Tan, Congshu Zhou, Yi Tian, Chang Liu, Hein-Mun Lam, Jian Zhang, Mark Lu |
Design for manufacturing layout analyses correlate layout to physico-chemical yield loss mechanisms. |
CICC |
2013 |
DBLP DOI BibTeX RDF |
|
18 | Clemens Zeidler, Christof Lutteroth, Wolfgang Stürzlinger, Gerald Weber |
The auckland layout editor: an improved GUI layout specification process. |
UIST |
2013 |
DBLP DOI BibTeX RDF |
|
18 | Seyedeh Sabereh Hosseini, Seyed Ali Mirzapour, Kuan Yew Wong |
Improving Multi-Floor Facility Layout Problems Using Systematic Layout Planning and Simulation. |
IAIT |
2013 |
DBLP DOI BibTeX RDF |
|
18 | Sonja Maier, Mark Minas |
Layout Improvement in Diagram Editors by Automatic Ad-hoc Layout. |
Electron. Commun. Eur. Assoc. Softw. Sci. Technol. |
2012 |
DBLP DOI BibTeX RDF |
|
18 | Reinhard Koenig, Sven Schneider 0004 |
Hierarchical structuring of layout problems in an interactive evolutionary layout system. |
Artif. Intell. Eng. Des. Anal. Manuf. |
2012 |
DBLP DOI BibTeX RDF |
|
18 | Clemens Zeidler, Christof Lutteroth, Gerald Weber, Wolfgang Stürzlinger |
The Auckland layout editor: an improved GUI layout specification process. |
CHINZ |
2012 |
DBLP DOI BibTeX RDF |
|
18 | Yusuke Araki, Yuko Osana |
Office layout support system for polygonal space using interactive genetic algorithm - Generation of Layout Plans for Workspace -. |
SMC |
2012 |
DBLP DOI BibTeX RDF |
|
18 | Amith Singhee, Emrah Acar, Mohammad Imran Younus, Rama N. Singh, Aditya Bansal |
DRC-free high density layout exploration with layout morphing and patterning quality assessment, with application to SRAM. |
ISQED |
2012 |
DBLP DOI BibTeX RDF |
|
18 | Tadashi Yasufuku, Yasumi Nakamura, Piao Zhe, Makoto Takamiya, Takayasu Sakurai |
Power Supply Voltage Dependence of Within-Die Delay Variation of Regular Manual Layout and Irregular Place-and-Route Layout. |
IEICE Trans. Electron. |
2011 |
DBLP DOI BibTeX RDF |
|
18 | V. Madhusudanan Pillai, Irappa Basappa Hunagund, Krishna K. Krishnan |
Design of robust layout for Dynamic Plant Layout Problems. |
Comput. Ind. Eng. |
2011 |
DBLP DOI BibTeX RDF |
|
18 | Junzhou Huo, Wei Sun 0030, Jing Chen, Xu Zhang |
Disc cutters plane layout design of the full-face rock tunnel boring machine (TBM) based on different layout patterns. |
Comput. Ind. Eng. |
2011 |
DBLP DOI BibTeX RDF |
|
18 | Kaname Kojima, Masao Nagasaki, Satoru Miyano |
An efficient biological pathway layout algorithm combining grid-layout and spring embedder for complicated cellular location information. |
BMC Bioinform. |
2010 |
DBLP DOI BibTeX RDF |
|
18 | Arnaud Quirin, Oscar Cordón |
Vmap-Layout, a Layout Algorithm for Drawing Scientograms. |
Computational Social Network Analysis |
2010 |
DBLP DOI BibTeX RDF |
|
18 | Gerald Weber |
A Reduction of Grid-Bag Layout to Auckland Layout. |
Australian Software Engineering Conference |
2010 |
DBLP DOI BibTeX RDF |
|
18 | Ryota Tachikawa, Yuko Osana |
Office layout support system using genetic algorithm - generation of layout plans for polygonal space -. |
NaBIC |
2010 |
DBLP DOI BibTeX RDF |
|
18 | Sven Schneider 0004, Jan-Ruben Fischer, Reinhard König |
Rethinking Automated Layout Design: Developing a Creative Evolutionary Design Method for the Layout Problems in Architecture and Urban Design. |
DCC |
2010 |
DBLP DOI BibTeX RDF |
|
18 | Arshia Ahi, Mir-Bahador Aryanezhad, Behzad Ashtiani, Ahmad Makui |
A novel approach to determine cell formation, intracellular machine layout and cell layout in the CMS problem based on TOPSIS method. |
Comput. Oper. Res. |
2009 |
DBLP DOI BibTeX RDF |
|
18 | Imran Sarwar Bajwa, M. Imran Siddique, M. Abbas Choudhary |
Web Layout Mining (WIM): A New Paradigm for Intelligent Web Layout Design. |
Egypt. Comput. Sci. J. |
2007 |
DBLP BibTeX RDF |
|
18 | Seyed-Mahmoud Aghazadeh |
An experimental approach to improve retail layout: shoppers reactions to layout. |
Int. J. Serv. Stand. |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Matthew Hurst, Tetsuya Nasukawa |
Layout and Language: Integrating Spatial and Linguistic Knowledge for Layout Understanding Tasks. |
COLING |
2000 |
DBLP BibTeX RDF |
|
18 | Naveed A. Sherwani, Prashant Sawkar |
Embedded Tutorial: Layout Driven Synthesis or Synthesis Driven Layout. |
VLSI Design |
1998 |
DBLP DOI BibTeX RDF |
|
18 | Winfried Graf |
Intelligent multimedia layout: A reference architecture for the constraint-based spatial layout of multimedia presentations. |
Comput. Stand. Interfaces |
1997 |
DBLP DOI BibTeX RDF |
|
18 | Fang-Jou Liu, John Lillis, Chung-Kuan Cheng |
A new layout-driven timing model for incremental layout optimization. |
ASP-DAC |
1997 |
DBLP DOI BibTeX RDF |
|
18 | Richard L. Grimsdale, C. W. Chang |
The Layout Design Language: A Technique for Generating Layout Plans. |
Comput. Graph. Forum |
1996 |
DBLP DOI BibTeX RDF |
|
18 | Ugur Dogrusöz, Brendan Madden, Patrick Madden |
Circular Layout in the Graph Layout Toolkit. |
GD |
1996 |
DBLP DOI BibTeX RDF |
|
18 | Kazuo Sugihara, Kazunari Yamamoto, Koji Takeda, Mitsuyuki Inaba |
Layout-by-Example: A Fuzzy Visual Language for Specifying Stereotypes of Diagram Layout. |
VL |
1992 |
DBLP DOI BibTeX RDF |
|
18 | C. C. Chen, S.-L. Chow |
The Layout Synthesizer: An Automatic Netlist-to-Layout System. |
DAC |
1989 |
DBLP DOI BibTeX RDF |
|
18 | Jon A. Solworth |
Generic: a Programming Language for Vlsi Layout and Layout Manipulation. |
|
1987 |
RDF |
|
18 | James E. Hassett |
Automated layout in ASHLAR: An approach to the problems of "General Cell" layout for VLSI. |
DAC |
1982 |
DBLP DOI BibTeX RDF |
|
18 | G. Persky, C. Enger, D. M. Selove |
The Hughes Automated Layout System - automated LSI/VLSI layout based on channel routing. |
DAC |
1981 |
DBLP BibTeX RDF |
|
17 | Kazi Shah Nawaz Ripon, Kyrre Glette, Mats Høvin, Jim Tørresen |
Multi-objective evolutionary approach for solving facility layout problem using local search. |
SAC |
2010 |
DBLP DOI BibTeX RDF |
jumping gene genetic algorithm (JGGA), pareto optimality |
17 | Loïc Lecerf, Boris Chidlovskii |
Scalable indexing for layout based document retrieval and ranking. |
SAC |
2010 |
DBLP DOI BibTeX RDF |
|
17 | Chunyang Gou, Georgi Kuzmanov, Georgi Gaydadjiev |
SAMS multi-layout memory: providing multiple views of data to boost SIMD performance. |
ICS |
2010 |
DBLP DOI BibTeX RDF |
|
17 | Jae-Seok Yang, Krit Athikulwongse, Young-Joon Lee, Sung Kyu Lim, David Z. Pan |
TSV stress aware timing analysis with applications to 3D-IC layout optimization. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
mobility variation, timing analysis, stress, TSV, 3DIC |
17 | Michael Douma, Grzegorz Ligierko, Ovidiu Ancuta, Pavel Gritsai, Sean Liu |
SpicyNodes: Radial Layout Authoring for the General Public. |
IEEE Trans. Vis. Comput. Graph. |
2009 |
DBLP DOI BibTeX RDF |
|
17 | Albert Gordo, Ernest Valveny |
The Diagonal Split: A Pre-segmentation Step for Page Layout Analysis and Classification. |
IbPRIA |
2009 |
DBLP DOI BibTeX RDF |
|
17 | Muhieddine El Kaissi, Ming Jia, Dirk Reiners, Julie A. Dickerson, Eve Syrkin Wurtele |
Reaction Centric Layout for Metabolic Networks. |
ISVC (2) |
2009 |
DBLP DOI BibTeX RDF |
|
17 | Takuto Yanagida, Hidetoshi Nonaka, Masahito Kurihara |
Personalizing graphical user interfaces on flexible widget layout. |
EICS |
2009 |
DBLP DOI BibTeX RDF |
flexible widget layouts, fuzzy constraint satisfaction problems, personalization of graphical user interfaces, optimization, adaptive user interfaces |
17 | Zhiqiang Lin, Ryan D. Riley, Dongyan Xu |
Polymorphing Software by Randomizing Data Structure Layout. |
DIMVA |
2009 |
DBLP DOI BibTeX RDF |
|
17 | Pratik J. Shah, Jiang Hu |
Impact of lithography-friendly circuit layout. |
ACM Great Lakes Symposium on VLSI |
2009 |
DBLP DOI BibTeX RDF |
cd variation, lithography, wirelength, routing congestion |
17 | Almitra Pradhan, Ranga Vemuri |
Efficient Synthesis of a Uniformly Spread Layout Aware Pareto Surface for Analog Circuits. |
VLSI Design |
2009 |
DBLP DOI BibTeX RDF |
|
17 | Itaru Tatsumi, Hitoshi Habe, Masatsugu Kidode |
Context-oriented Layout Optimization of Large-Print Textbooks. |
ICDAR |
2009 |
DBLP DOI BibTeX RDF |
|
17 | Hosung Kim, John Lillis |
A Layout-Level Logic Restructuring Framework for LUT-Based FPGAs. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
17 | Hua Xiang 0001, Kai-Yuan Chao, Ruchir Puri, Martin D. F. Wong |
Is Your Layout-Density Verification Exact? - A Fast Exact Deep Submicrometer Density Calculation Algorithm. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
17 | Sying-Jyan Wang, Kuo-Lin Peng, Kuang-Cyun Hsiao, Katherine Shu-Min Li |
Layout-aware scan chain reorder for launch-off-shift transition test coverage. |
ACM Trans. Design Autom. Electr. Syst. |
2008 |
DBLP DOI BibTeX RDF |
scan chain ordering, test generation, transition faults, Scan test |
17 | Daniel G. Aliaga, Carlos A. Vanegas, Bedrich Benes |
Interactive example-based urban layout synthesis. |
ACM Trans. Graph. |
2008 |
DBLP DOI BibTeX RDF |
content-aware image editing, texture and image synthesis, procedural modeling, example-based |
17 | Atsuhiro Takasu, Kenro Aihara |
Information extraction from scanned documents by stochastic page layout analysis. |
SAC |
2008 |
DBLP DOI BibTeX RDF |
|
17 | Ashutosh Chakraborty, Sean X. Shi, David Z. Pan |
Layout Level Timing Optimization by Leveraging Active Area Dependent Mobility of Strained-Silicon Devices. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
17 | Jeremy Lee, Sumit Narayan, Mike Kapralos, Mohammad Tehranipoor |
Layout-Aware, IR-Drop Tolerant Transition Fault Pattern Generation. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
17 | Xingbo Jiang, Xiaoqing Lu, Chengcheng Liu, Monan Li |
A Hybrid Algorithm for Solving the Optimal Layout Problem of Rectangular Pieces. |
ICYCS |
2008 |
DBLP DOI BibTeX RDF |
|
17 | Hosung (Leo) Kim, John Lillis |
A framework for layout-level logic restructuring. |
ISPD |
2008 |
DBLP DOI BibTeX RDF |
logic resynthesis, timing optimization |
17 | Frank Riddick, Y. Tina Lee |
Representing layout information in the CMSD specification. |
WSC |
2008 |
DBLP DOI BibTeX RDF |
|
17 | Roberto Toccaceli, Francesco Quaglia |
DyMeLoR: Dynamic Memory Logger and Restorer Library for Optimistic Simulation Objects with Generic Memory Layout. |
PADS |
2008 |
DBLP DOI BibTeX RDF |
|
17 | Sandro Castronovo, Jochen Frey, Peter Poller |
A Generic Layout-Tool for Summaries of Meetings in a Constraint-Based Approach. |
MLMI |
2008 |
DBLP DOI BibTeX RDF |
|
17 | Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada |
Timing-Aware Cell Layout De-Compaction for Yield Optimization by Critical Area Minimization. |
IEEE Trans. Very Large Scale Integr. Syst. |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Janko Calic, David P. Gibson, Neill W. Campbell |
Efficient Layout of Comic-Like Video Summaries. |
IEEE Trans. Circuits Syst. Video Technol. |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Moshe Ben-Ezra, Zhouchen Lin, Bennett Wilburn |
Penrose Pixels Super-Resolution in the Detector Layout Domain. |
ICCV |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Allan Gu, Avideh Zakhor |
Lossless Compression Algorithms for Post-OPC IC Layout. |
ICIP (2) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Joseph B. Manzano, Ziang Hu, Yi Jiang, Ge Gan, Hyo-Jung Song, Jung-Gyu Park |
Toward an Automatic Code Layout Methodology. |
IWOMP |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Sonja Maier, Mark Minas |
A Generic Layout Algorithm for Meta-model Based Editors. |
AGTIVE |
2007 |
DBLP DOI BibTeX RDF |
|
17 | T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindarajan |
MODLEX: A Multi Objective Data Layout EXploration Framework for Embedded Systems-on-Chip. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Jinseong Jeon, Keoncheol Shin, Hwansoo Han |
Layout Transformations for Heap Objects Using Static Access Patterns. |
CC |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Hua Xiang 0001, Kai-Yuan Chao, Ruchir Puri, Martin D. F. Wong |
Is your layout density verification exact?: a fast exact algorithm for density calculation. |
ISPD |
2007 |
DBLP DOI BibTeX RDF |
fix-dissection, DFM, density |
17 | Samee Ullah Khan, Munib Ahmed |
A Bottleneck Eliminating Approximate Algorithm for PON Layout. |
ITNG |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Guoqiang Yang, Mei Yang, Yulu Yang, Yingtao Jiang |
On the Physicl Layout of PRDT-Based NoCs. |
ITNG |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Henry H. Y. Chan, Zeljko Zilic |
A Performance Driven Layout Compaction Optimization Algorithm for Analog Circuits. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Anastasia Bezerianos |
Using alternative views for layout, comparison and context switching tasks in wall displays. |
OZCHI |
2007 |
DBLP DOI BibTeX RDF |
alternative views, interaction, wall displays |
17 | Wu Ruizhe, Han Fei, Ren Li |
Optimizing the Wire Layout in Wireless Mesh Network. |
ICIW |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Takashi Hirano, Yuichi Okano, Yasuhiro Okada, Fumio Yoda |
Text and Layout Information Extraction from Document Files of Various Formats Based on the Analysis of Page Description Language. |
ICDAR |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Melanie Lemaitre, Emmanuele Grosicki, Françoise J. Prêteux |
Preliminary experiments in layout analysis of handwritten letters based on textural and spatial information and a 2D Markovian approach. |
ICDAR |
2007 |
DBLP DOI BibTeX RDF |
|
17 | Kenny Wong, Dabo Sun |
On evaluating the layout of UML diagrams for program comprehension. |
Softw. Qual. J. |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Vito Dai, Avideh Zakhor |
Lossless compression of VLSI layout image data. |
IEEE Trans. Image Process. |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Apostolos Antonacopoulos, Dimosthenis Karatzas, David Bridson |
Ground Truth for Layout Analysis Performance Evaluation. |
Document Analysis Systems |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Barbara T. Theodorides, Walter A. Burkhard |
B: Disk Array Data Layout Tolerating Multiple Failures. |
MASCOTS |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Claudio Menezes, Cristina Meinhardt, Ricardo Reis 0001, Reginaldo Tavares |
A Regular Layout Approach for ASICs. |
ISVLSI |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Mario Inostroza-Ponta, Regina Berretta, Alexandre Mendes, Pablo Moscato |
An automatic graph layout procedure to visualize correlated data. |
IFIP AI |
2006 |
DBLP DOI BibTeX RDF |
|
17 | David Liu 0001, Datong Chen, Tsuhan Chen |
Latent Layout Analysis for Discovering Objects in Images. |
ICPR (2) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Tatsuya Ishihara, Hironobu Takagi, Takashi Itoh, Chieko Asakawa |
Analyzing visual layout for a non-visual presentation-document interface. |
ASSETS |
2006 |
DBLP DOI BibTeX RDF |
alternative interface, metadata, diagram, visual analysis |
17 | Shweta Shah, Nazanin Mansouri, Adrián Núñez-Aldana |
Pre-Layout Estimation of Interconnect Lengths for Digital Integrated Circuits. |
CONIELECOMP |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Guangqiang Li, Fengqiang Zhao, Chen Guo 0001, Hongfei Teng |
Parallel Hybrid PSO-GA Algorithm and Its Application to Layout Design. |
ICNC (1) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Simone Marinai, Emanuele Marino, Giovanni Soda |
Tree clustering for layout-based document image retrieval. |
DIAL |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Jinyao Zhang, Miodrag Vujkovic, David Wadkins, Carl Sechen |
Post-layout energy-delay analysis of parallel multipliers. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Pawel Sniatala, R. Rudnicki |
Automated design and layout generation for switched current circuits. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Xiong Fu, Yu Zhang 0086, Yiyun Chen |
Data-Layout Optimization Using Reuse Distance Distribution. |
EUC Workshops |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Narender Hanchate, Nagarajan Ranganathan |
Post-Layout Gate Sizing for Interconnect Delay and Crosstalk Noise Optimization. |
ISQED |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Jianxi Chen, Dan Feng 0001, Zhan Shi 0001 |
iVISA: A Framework for Flexible Layout Block-level Storage System. |
AINA (2) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Jie Song 0001, Tiezheng Nie, Daling Wang, Ge Yu 0001 |
An Effective Web Page Layout Adaptation for Various Resolutions. |
APWeb |
2006 |
DBLP DOI BibTeX RDF |
|
17 | M. Cecelia Buchanan, Polle Zellweger |
Automatic temporal layout mechanisms revisited. |
ACM Trans. Multim. Comput. Commun. Appl. |
2005 |
DBLP DOI BibTeX RDF |
temporal formatting, multimedia authoring, Multimedia documents, temporal specification |
17 | Nattawut Thepayasuwan, Alex Doboli |
Layout conscious approach and bus architecture synthesis for hardware/software codesign of systems on chip optimized for speed. |
IEEE Trans. Very Large Scale Integr. Syst. |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Herman Schmit, Vikas Chandra |
Layout techniques for FPGA switch blocks. |
IEEE Trans. Very Large Scale Integr. Syst. |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Yoonseo Choi, Taewhan Kim, Hwansoo Han |
Memory layout techniques for variables utilizing efficient DRAM access modes in embedded system design. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Umut Rifat Tuzkaya, Tijen Ertay, Da Ruan 0001 |
Simulated Annealing Approach for the Multi-objective Facility Layout Problem. |
Intelligent Data Mining |
2005 |
DBLP DOI BibTeX RDF |
|