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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 769 occurrences of 468 keywords
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Results
Found 898 publication records. Showing 898 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
9 | Ying Huang, Santhosh Kumaran, Jen-Yao Chung |
A Service Management Framework for Service-Oriented Enterprises. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CEC ![In: 2004 IEEE International Conference on E-Commerce Technology (CEC 2004), 6-9 July 2004, San Diego, CA, USA, pp. 181-186, 2004, IEEE Computer Society, 0-7695-2098-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
9 | Haridimos T. Vergos, Dimitris Nikolos, Maciej Bellos, Costas Efstathiou |
Deterministic BIST for RNS Adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 52(7), pp. 896-906, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
deterministic and pseudorandom tests, formal test sets, Built-In Self-Test, Residue Number System |
9 | Victor V. Kuliamin, Alexander K. Petrenko, Nick V. Pakoulin, Alexander S. Kossatchev, Igor B. Bourdonov |
Integration of Functional and Timed Testing of Real-Time and Concurrent Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ershov Memorial Conference ![In: Perspectives of Systems Informatics, 5th International Andrei Ershov Memorial Conference, PSI 2003, Akademgorodok, Novosibirsk, Russia, July 9-12, 2003, Revised Papers, pp. 450-461, 2003, Springer, 3-540-20813-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
9 | Jianping Wu, Zhongjie Li, Xia Yin |
Towards Modeling and Testing of IP Routing Protocols. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TestCom ![In: Testing of Communicating Systems, 15th IFIP International Conference, TestCom 2003, Sophia Antipolis, France, May 26-28, 2003, Proceedings, pp. 49-62, 2003, Springer, 3-540-40123-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
9 | MingHung Lee, TingTing Hwang, Shi-Yu Huang |
Decomposition of Extended Finite State Machine for Low Power Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 11152-11153, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
9 | Jianqiang Jia, Weidong Chen 0001, Yugeng Xi |
A Rule-Driven Autonomous Robotic System Operating in a Time-Varying Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RoboCup ![In: RoboCup 2003: Robot Soccer World Cup VII, pp. 487-494, 2003, Springer, 3-540-22443-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
9 | Tatsuo Yotsukura, Shigeo Morishima, Satoshi Nakamura 0001 |
Model-based talking face synthesis for anthropomorphic spoken dialog agent system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Multimedia ![In: Proceedings of the Eleventh ACM International Conference on Multimedia, Berkeley, CA, USA, November 2-8, 2003, pp. 351-354, 2003, ACM, 1-58113-722-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
anthropomorphic dialog agent, face image synthesis, facial animation, lip synchronization |
9 | Piotr Dziurzanski |
Modelling of Complex Systems Given as a Mealy Machine with Linear Decision Diagrams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Computational Science ![In: Computational Science - ICCS 2003, International Conference, Melbourne, Australia and St. Petersburg, Russia, June 2-4, 2003. Proceedings, Part II, pp. 758-765, 2003, Springer, 3-540-40195-4. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
9 | Sobeeh Almukhaizim, Thomas Verdel, Yiorgos Makris |
Cost-Effective Graceful Degradation in Speculative Processor Subsystems: The Branch Prediction Case. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 21st International Conference on Computer Design (ICCD 2003),VLSI in Computers and Processors, 13-15 October 2003, San Jose, CA, USA, Proceedings, pp. 194-197, 2003, IEEE Computer Society, 0-7695-2025-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
9 | Ravishankar K. Iyer, Shuo Chen 0001, Jun Xu 0003, Zbigniew Kalbarczyk |
Security Vulnerabilities - From Data Analysis to Protection Mechanisms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WORDS Fall ![In: 9th IEEE International Workshop on Object-Oriented Real-Time Dependable Systems (WORDS Fall 2003), 1-3 October 2003, Anacapri (Capri Island), Italy, pp. 331-338, 2003, IEEE Computer Society, 0-7695-2054-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
9 | Amit K. Chopra, Munindar P. Singh |
Nonmonotonic Commitment Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Workshop on Agent Communication Languages ![In: Advances in Agent Communication, International Workshop on Agent Communication Languages, ACL 2003, Melbourne, Australia, July 14, 2003, pp. 183-200, 2003, Springer, 3-540-20769-4. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
9 | K. Satya Sai Prakash, S. V. Raghavan |
User Relevancy Improvisation Protocol. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWDC ![In: Distributed Computing - IWDC 2003, 5th International Workshop, Kolkata, India, December 27-30, 2003, Proceedings, pp. 91-101, 2003, Springer, 3-540-20745-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
9 | Emil Dumitrescu, Dominique Borrione |
Symbolic Simulation as a Simplifying Strategy for SoC Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June - 2 July 2003, Calgary, Alberta, Canada, pp. 378-383, 2003, IEEE Computer Society, 0-7695-1944-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
9 | Jessica Chen, Suganthan Subramaniam |
Specification-based Testing for Gui-based Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Softw. Qual. J. ![In: Softw. Qual. J. 10(3), pp. 205-224, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
java AWT and swing, finite state machines, specification-based testing, capture/replay |
9 | Fabrizio Ferrandi, Michele Rendine, Donatella Sciuto |
Functional Verification for SystemC Descriptions Using Constraint Solving. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2002 Design, Automation and Test in Europe Conference and Exposition (DATE 2002), 4-8 March 2002, Paris, France, pp. 744-751, 2002, IEEE Computer Society, 0-7695-1471-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
9 | Prabhat Mishra 0001, Nikil D. Dutt, Alexandru Nicolau, Hiroyuki Tomiyama |
Automatic Verification of In-Order Execution In Microprocessors with Fragmented Pipelines and Multicycle Functional Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2002 Design, Automation and Test in Europe Conference and Exposition (DATE 2002), 4-8 March 2002, Paris, France, pp. 36-43, 2002, IEEE Computer Society, 0-7695-1471-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
9 | Paul Amblard, Fabienne Lagnier, Michel Lévy |
Using Formal Tools to Study Complex Circuits Behaviour. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), Systems-on-Chip, 4-6 September 2002, Dortmund, Germany, pp. 180-186, 2002, IEEE Computer Society, 0-7695-1790-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
9 | Xiaoming Chen, Geok-Soon Hong |
A Simulation Study of the Predictive p-Persistent CSMA Protocol. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Annual Simulation Symposium ![In: Proceedings 35th Annual Simulation Symposium (ANSS-35 2002), San Diego, California, USA, 14-18 April 2002, pp. 345-351, 2002, IEEE Computer Society, 0-7695-1552-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
9 | Grégory Lestiennes, Marie-Claude Gaudel |
Testing Processes from Formal Specifications with Inputs, Outputs and Data Types. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSRE ![In: 13th International Symposium on Software Reliability Engineering (ISSRE 2002), 12-15 November 2002, Annapolis, MD, USA, pp. 3-14, 2002, IEEE Computer Society, 0-7695-1763-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
9 | Wilson Rosa de Oliveira, Marcílio Carlos Pereira de Souto, Teresa Bernarda Ludermir |
Turing Machines with Finite Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBRN ![In: 7th Brazilian Symposium on Neural Networks (SBRN 2002), 11-14 November 2002, Recife, Brazil, pp. 67-73, 2002, IEEE Computer Society, 0-7695-1709-9. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
9 | Shanq-Jang Ruan, Rung-Ji Shang, Feipei Lai, Kun-Lin Tsai |
A bipartition-codec architecture to reduce power in pipelinedcircuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(2), pp. 343-348, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
9 | R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili, S. Y. A. Shah |
A Low Power Approach to Floating Point Adder Design for DSP Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 27(3), pp. 195-213, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
digital-CMOS, power-consumption-model, VLSI, low-power-design, computer-arithmetic, floating-point, switching-activity |
9 | Rajeev Alur, Mihalis Yannakakis |
Model checking of hierarchical state machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Program. Lang. Syst. ![In: ACM Trans. Program. Lang. Syst. 23(3), pp. 273-303, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
model checking, temporal logic, statecharts, Hierarchical state machines |
9 | Igor B. Bourdonov, Alexey V. Demakov, Andrew A. Jarov, Alexander S. Kossatchev, Victor V. Kuliamin, Alexander K. Petrenko, Sergey V. Zelenov |
Java Specification Extension for Automated Test Development. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ershov Memorial Conference ![In: Perspectives of System Informatics, 4th International Andrei Ershov Memorial Conference, PSI 2001, Akademgorodok, Novosibirsk, Russia, July 2-6, 2001, Revised Papers, pp. 301-307, 2001, Springer, 3-540-43075-X. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
9 | Po-Hung Chen, Shanq-Jang Ruan, Kuen-Pin Wu, Dai-Xun Hu, Feipei Lai, Kun-Lin Tsai |
An entropy-based algorithm to reduce area overhead for bipartition-codec architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 49-52, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
9 | Cristiana Bolchini, R. Montandon, Fabio Salice, Donatella Sciuto |
Design of VHDL-based totally self-checking finite-state machine and data-path descriptions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 8(1), pp. 98-103, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
9 | Hideo Fujiwara |
A New Class of Sequential Circuits with Combinational Test Generation Complexity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 49(9), pp. 895-905, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
complexity, test generation, design for testability, sequential circuits, reducibility, partial scan, Balanced structure |
9 | Shi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen, Chung-Yang Huang, Forrest Brewer |
AQUILA: An Equivalence Checking System for Large Sequential Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 49(5), pp. 443-464, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
state exploration, formal verification, Design verification, equivalence checking |
9 | Satoshi Ohtake, Toshimitsu Masuzawa, Hideo Fujiwara |
A Non-Scan Approach to DFT for Controllers Achieving 100% Fault Efficiency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 16(5), pp. 553-566, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
non-scan design for testability, complete fault efficiency, controllers, at-speed test |
9 | William M. Spears, Diana F. Gordon |
Evolving Finite-State Machine Strategies for Protecting Resources. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMIS ![In: Foundations of Intelligent Systems, 12th International Symposium, ISMIS 2000, Charlotte, NC, USA, October 11-14, 2000, Proceedings, pp. 166-175, 2000, Springer, 3-540-41094-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
9 | Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero |
Evolving Cellular Automata for Self-Testing Hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICES ![In: Evolvable Systems: From Biology to Hardware, Third International Conference, ICES 2000, Edinburgh, Scotland, UK, April 17-19, 2000, Proceedings, pp. 31-40, 2000, Springer, 3-540-67338-5. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
9 | Wander O. Cesário, Zoltan Sugar, Imed Moussa, Ahmed Amine Jerraya |
Efficient Integration of Behavioral Synthesis with Existing Design Flows. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSS ![In: Proceedings of the 13th International Symposium on System Synthesis, ISSS'00, Madrid, Spain, September 20-22, 2000., pp. 85-90, 2000, ACM / IEEE Computer Society, 0-7695-0765-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
9 | Wander O. Cesário, Ahmed Amine Jerraya, Zoltan Sugar, Imed Moussa |
Rethinking Behavioral Synthesis for a Better Integration within Existing Design Flows. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, ICCD '00, Austin, Texas, USA, September 17-20, 2000, pp. 513-518, 2000, IEEE Computer Society, 0-7695-0801-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
9 | Yang Xia, Pranav Ashar |
Verification of a Combinational Loop Based Arbitration Scheme in a System-On-Chip Integration Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 13th International Conference on VLSI Design (VLSI Design 2000), 4-7 January 2000, Calcutta, India, pp. 449-, 2000, IEEE Computer Society, 0-7695-0487-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Combinational Loop, Model Checking, Formal Verification, Temporal Logic, Time Division Multiplexing, Token Ring, Computational Tree Logic, Bus Protocol |
9 | Gianpiero Cabodi, Stefano Quer, Fabio Somenzi |
Optimizing sequential verification by retiming transformations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 37th Conference on Design Automation, Los Angeles, CA, USA, June 5-9, 2000., pp. 601-606, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
9 | Loe M. G. Feijs |
Generating FSMs from Interworkings. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Distributed Comput. ![In: Distributed Comput. 12(1), pp. 31-40, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Sequence chart, Synthesis, Finite state machine, Process algebra |
9 | Subhasish Mitra, LaNae J. Avra, Edward J. McCluskey |
An output encoding problem and a solution technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(6), pp. 761-768, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
9 | Vamsi Boppana, Sreeranga P. Rajan, Koichiro Takayama, Masahiro Fujita |
Model Checking Based on Sequential ATPG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 11th International Conference, CAV '99, Trento, Italy, July 6-10, 1999, Proceedings, pp. 418-430, 1999, Springer, 3-540-66202-2. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
9 | Winfried Nöth, Reiner Kolla |
Spanning Tree-based State Encoding for Low Power Dissipation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 1999 Design, Automation and Test in Europe (DATE '99), 9-12 March 1999, Munich, Germany, pp. 168-174, 1999, IEEE Computer Society / ACM, 0-7695-0078-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
9 | Marine Tabourier, Ana R. Cavalli, Melania Ionescu |
A GSM-MAP Protocol Experiment Using Passive Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
World Congress on Formal Methods ![In: FM'99 - Formal Methods, World Congress on Formal Methods in the Development of Computing Systems, Toulouse, France, September 20-24, 1999, Proceedings, Volume I, pp. 915-934, 1999, Springer, 3-540-66587-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
9 | Chung-Shyan Liu |
A Program Generator for Object-based Implementation of Communication Protocol Software. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISADS ![In: The Fourth International Symposium on Autonomous Decentralized Systems, ISADS 1999, Tokyo, Japan, March 20-23, 1999, pp. 384-387, 1999, IEEE Computer Society, 0-7695-0137-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
9 | François Pêcheux, Yannick Hervé |
DIPS for MIPS: An Instrumented VHDL/Corba Kernel for Distributed Learning in EECS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSE ![In: IEEE International Conference on Microelectronic Systems Education, MSE 1999, Arlington, Virginia, USA, July 19-21, 1999, pp. 30-31, 1999, IEEE Computer Society, 0-7695-0312-8. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
9 | In-Ho Moon, James H. Kukula, Thomas R. Shiple, Fabio Somenzi |
Least fixpoint approximations for reachability analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999, San Jose, California, USA, November 7-11, 1999, pp. 41-44, 1999, IEEE Computer Society, 0-7803-5832-5. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
9 | Shanq-Jang Ruan, Rung-Ji Shang, Feipei Lai, Shyh-Jong Chen, Xian-Jun Huang |
A bipartition-codec architecture to reduce power in pipelined circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999, San Jose, California, USA, November 7-11, 1999, pp. 84-90, 1999, IEEE Computer Society, 0-7803-5832-5. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
9 | Jens Schönherr, Ingo Schreiber, Eva Fordran, Bernd Straube |
Hazard Checking in Pipelined Processor Designs Using Symbolic Model Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 25th EUROMICRO '99 Conference, Informatics: Theory and Practice for the New Millenium, 8-10 September 1999, Milan, Italy, pp. 1075-, 1999, IEEE Computer Society, 0-7695-0321-7. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
9 | Young Moo Lee, Kyu Ho Park |
Unified Modeling Graph for Specifying and Synthesizing Chip-Level Interfaces. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 25th EUROMICRO '99 Conference, Informatics: Theory and Practice for the New Millenium, 8-10 September 1999, Milan, Italy, pp. 1388-1389, 1999, IEEE Computer Society, 0-7695-0321-7. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
9 | Pranav Ashar, Anand Raghunathan, Aarti Gupta, Subhrajit Bhattacharya |
Verification of Scheduling in the Presence of Loops Using Uninterpreted Symbolic Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design, VLSI in Computers and Processors, ICCD '99, Austin, Texas, USA, October 10-13, 1999, pp. 458-466, 1999, IEEE Computer Society, 0-7695-0406-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
9 | Peter Bodorik, Dawn N. Jutla, A. Agarwal |
Recoverable Virtual Memory through the Multi-View Memory Computer System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS ![In: 32nd Annual Hawaii International Conference on System Sciences (HICSS-32), January 5-8, 1999, Maui, Hawaii, USA, 1999, IEEE Computer Society, 0-7695-0001-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Recoverable Virtual Memory, Multi-view Virtual Memory, Protection Architecture, Architectural Support for Operating Systems, Access Control |
9 | Prabhas Chongstitvatana, Chatchawit Aporntewan |
Improving Correctness of Finite-State Machine Synthesis from Multiple Partial Input/Output Sequences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Evolvable Hardware ![In: 1st NASA / DoD Workshop on Evolvable Hardware (EH '99), July 19-21, 1999, Pasadena, CA, USA, pp. 262-, 1999, IEEE Computer Society, 0-7695-0256-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
9 | Rashmi Goswami, V. Srinivasan, M. Balakrishnan |
MPEG-2 Video Data Simulator: A Case Study in Constrained HW-SW Codesign. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 12th International Conference on VLSI Design (VLSI Design 1999), 10-13 January 1999, Goa, India, pp. 128-132, 1999, IEEE Computer Society, 0-7695-0013-7. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
9 | Cesare Alippi, Franco Fummi, Vincenzo Piuri, Mariagiovanna Sami, Donatella Sciuto |
Testability analysis and behavioral testing of the Hopfield neural paradigm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 6(3), pp. 507-511, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
9 | Rajeev Alur, Mihalis Yannakakis |
Model Checking of Hierarchical State Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGSOFT FSE ![In: Proceedings of the ACM SIGSOFT International Symposium on Foundations of Software Engineering, SIGSOFT 1998, Lake Buena Vista, Florida, USA, November 3-5, 1998, pp. 175-188, 1998, ACM, 978-1-58113-108-6. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
9 | Dawn N. Jutla, Peter Bodorik |
Architectural Support for Synchronization of Threads Accessing Variable-Sized Units of Virtual Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (3) ![In: Thirty-First Annual Hawaii International Conference on System Sciences, Kohala Coast, Hawaii, USA, January 6-9, 1998, pp. 197-206, 1998, IEEE Computer Society, 0-8186-8255-8. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
9 | Wilsin Gosti, Alberto L. Sangiovanni-Vincentelli, Tiziano Villa, Alexander Saldanha |
An Exact Input Encoding Algorithm for BDDs Representing FSMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 19-21 February 1998, Lafayette, LA, USA, pp. 294-300, 1998, IEEE Computer Society, 0-8186-8409-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
input encoding, finite state machines, binary decision diagrams, multi-valued decision diagrams |
9 | Youpyo Hong, Peter A. Beerel, Luciano Lavagno, Ellen Sentovich |
Don't Care-Based BDD Minimization for Embedded Software. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 35th Conference on Design Automation, Moscone center, San Francico, California, USA, June 15-19, 1998., pp. 506-509, 1998, ACM Press, 0-89791-964-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
low power, synthesis, placement, flip-flops, voltage scaling, codec, MPEG4, level converters, design automatian |
9 | Pai H. Chou, Gaetano Borriello |
Modal Processes: Towards Enhanced Retargetability Through Control Composition of Distributed Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 35th Conference on Design Automation, Moscone center, San Francico, California, USA, June 15-19, 1998., pp. 88-93, 1998, ACM Press, 0-89791-964-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
9 | Shankar G. Govindaraju, David L. Dill, Alan J. Hu, Mark Horowitz |
Approximate Reachability with BDDs Using Overlapping Projections. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 35th Conference on Design Automation, Moscone center, San Francico, California, USA, June 15-19, 1998., pp. 451-456, 1998, ACM Press, 0-89791-964-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
transceiver, spread spectrum communication, RF CMOS, digital radio, ISM frequency band |
9 | Timothy Kam, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
Theory and algorithms for state minimization of nondeterministic FSMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(11), pp. 1311-1322, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
9 | Wayne H. Wolf |
Redundancy Removal during High-Level Synthesis Using Scheduling Don't-Cares. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 11(3), pp. 211-225, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
scheduling dont-care, high-level synthesis, redundancy |
9 | Hiroaki Iwashita, Tsuneo Nakata |
Forward model checking techniques oriented to buggy designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1997, San Jose, CA, USA, November 9-13, 1997, pp. 400-404, 1997, IEEE Computer Society / ACM, 0-8186-8200-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
symbolic state traversal, forward model checking, formal verification, symbolic model checking |
9 | Antonio Lioy, Enrico Macii, Massimo Poncino, Massimo Rossello |
Accurate Entropy Calculation for Large Logic Circuits Based on Output Clustering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 7th Great Lakes Symposium on VLSI (GLS-VLSI '97), 13-15 March 1997, Urbana, IL, USA, pp. 70-, 1997, IEEE Computer Society, 0-8186-7904-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
9 | Mandyam-Komar Srinivas, James Jacob, Vishwani D. Agrawal |
Functional test generation for synchronous sequential circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(7), pp. 831-843, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
9 | Enrique Alba 0001, José M. Troya |
Genetic Algorithms for Protocol Validation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPSN ![In: Parallel Problem Solving from Nature - PPSN IV, International Conference on Evolutionary Computation. The 4th International Conference on Parallel Problem Solving from Nature, Berlin, Germany, September 22-26, 1996, Proceedings, pp. 870-879, 1996, Springer, 3-540-61723-X. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
9 | Uwe Wildner |
Compiler Assisted Self-checking of Structural Integrity Using Return Address Hashing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDCC ![In: Dependable Computing - EDCC-2, Second European Dependable Computing Conference, Taormina, Italy, October 2-4, 1996, Proceedings, pp. 161-177, 1996, Springer, 3-540-61772-8. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
9 | Ellen Sentovich, Horia Toma, Gérard Berry |
Latch optimization in circuits generated from high-level descriptions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1996, San Jose, CA, USA, November 10-14, 1996, pp. 428-435, 1996, IEEE Computer Society / ACM, 0-8186-7597-7. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
sequential optimisation, high-level synthesis, state assignment |
9 | K. Vijayananda |
Distributed fault detection in communication protocols using extended finite state machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 1996 International Conference on Parallel and Distributed Systems (ICPADS '96), June 3-6, 1996, Tokyo, Japan, Proceedings, pp. 310-318, 1996, IEEE Computer Society, 0-8186-7267-6. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
distributed fault detection, run-time fault detection, coding defects, memory problems, protocol faults, vocabulary faults, sequencing faults, parallel decomposition method, multiple observers, distributed fault detection mechanism, fault tolerant computing, finite state machines, transport protocols, encoding, communication protocols, fault coverage, extended finite state machines |
9 | Jun Bi, Jianping Wu |
A STREAMS based high performance IP/X.25 router. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPAN ![In: 1996 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '96), June 12-14, 1996, Beijing, China, pp. 268-273, 1996, IEEE Computer Society, 0-8186-7460-1. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
IP/X.25, TCP/IP networks, connection oriented subnetwork, performance evaluation, STREAMS, finite state machine, interconnection, Unix, transport protocols, high performance, internetworking, internetworking, interoperability testing, communication software |
9 | Murali M. R. Gala, Don E. Ross, Karan L. Watson, Beena Vasudevan, Peter Utama |
Built-in self test for C-testable ILA's. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(11), pp. 1388-1398, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
9 | Luis Entrena-Arrontes, Kwang-Ting Cheng |
Combinational and sequential logic optimization by redundancy addition and removal. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(7), pp. 909-916, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
9 | Sukumar Nandi, Parimal Pal Chaudhuri |
Theory and applications of cellular automata for synthesis of easily testable combinational logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 4th Asian Test Symposium (ATS '95), November 23-24, 1995. Bangalore, India, pp. 146-152, 1995, IEEE Computer Society, 0-8186-7129-7. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
testable combinational logic, combinational logic blocks, test machine, data path synthesis phase, autonomous mode, aliasing error probability, associated lines, test application overheads, test parallelism, simultaneous testing, multiple combinational modules, graph theory, fault diagnosis, logic testing, high level synthesis, test generation, cellular automata, cellular automata, design for testability, combinational circuits, logic CAD, stuck-at faults, shift registers, cost effectiveness, registers, test vectors, test responses, state transition graph |
9 | Heikki Saastamoinen, George M. White |
On handling exceptions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
COOCS ![In: Proceedings of the Conference on Organizational Computing Systems, COOCS 1995, Milpitas, California, USA, August 13-16, 1995, pp. 302-310, 1995, ACM, 978-0-89791-706-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
9 | Tan-Li Chou, Kaushik Roy 0001 |
Estimation of sequential circuit activity considering spatial and temporal correlations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings, pp. 577-582, 1995, IEEE Computer Society, 0-8186-7165-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
sequential circuit activity estimation, signal activity, internal nodes, sequential logic circuits, logic signals, ESTG, extended state transition graph, exact signal probabilities, large circuits, state logic, logic simulation results, graph theory, finite state machines, finite state machine, sequential circuits, spatial correlations, circuit switching, switching activities, approximate method, temporal correlations |
9 | Said Amellal, Bozena Kaminska |
Functional synthesis of digital systems with TASS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(5), pp. 537-552, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
9 | Luca Benini, Polly Siegel, Giovanni De Micheli |
Saving Power by Synthesizing Gated Clocks for Sequential Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 11(4), pp. 32-41, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
9 | Adnan Aziz, Thomas R. Shiple, Vigyan Singhal |
Formula-Dependent Equivalence for Compositional CTL Model Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 6th International Conference, CAV '94, Stanford, California, USA, June 21-23, 1994, Proceedings, pp. 324-337, 1994, Springer, 3-540-58179-0. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
9 | Chuan-Jin Shi, Janusz A. Brzozswski |
An efficient algorithm for constrained encoding and its applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(12), pp. 1813-1826, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
9 | Kwang-Ting Cheng, Srinivas Devadas, Kurt Keutzer |
Delay-fault test generation and synthesis for testability under a standard scan design methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(8), pp. 1217-1231, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
9 | Hyunwoo Cho, Gary D. Hachtel, Fabio Somenzi |
Redundancy identification/removal and test generation for sequential circuits using implicit state enumeration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(7), pp. 935-945, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
9 | Irith Pomeranz, Kwang-Ting Cheng |
STOIC: state assignment based on output/input functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(8), pp. 1123-1131, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
9 | Margot Karam, Gabriele Saucier |
Functional versus random test generation for sequential circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 4(1), pp. 33-41, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
simulation, Finite state machine, functional testing, graph traversal |
9 | Toshimasa Watanabe, Toshiya Mashima, Satoshi Taoka |
The k-Edge-Connectivity Augmentation Problem of Weighted Graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISAAC ![In: Algorithms and Computation, Third International Symposium, ISAAC '92, Nagoya, Japan, December 16-18, 1992, Proceedings, pp. 31-40, 1992, Springer, 3-540-56279-6. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
9 | Abhijit Ghosh, Srinivas Devadas, A. Richard Newton |
Test generation and verification for highly sequential circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(5), pp. 652-667, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
9 | Fabrizio Lombardi, Yinan N. Shen, Hannu H. Kari |
On a new approach for enhancing the fault coverage of conformance testing of protocols. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPDP ![In: Proceedings of the Third IEEE Symposium on Parallel and Distributed Processing, SPDP 1991, 2-5 December 1991, Dallas, Texas, USA, pp. 428-435, 1991, IEEE Computer Society, 0-8186-2310-1. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
9 | Tiziano Villa, Alberto L. Sangiovanni-Vincentelli |
NOVA: state assignment of finite state machines for optimal two-level logic implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(9), pp. 905-924, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
9 | David Binger, David Knapp |
Automatic synthesis of a dual-PLA controller with a counter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 23rd Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1990, Orlando, Florida, USA, November 27-29, 1990, pp. 149-157, 1990, ACM/IEEE, 0-89791-413-9. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP BibTeX RDF |
|
9 | Vishwani D. Agrawal, Kwang-Ting Cheng |
An architecture for synthesis of testable finite state machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EURO-DAC ![In: European Design Automation Conference, EURO-DAC 1990, Glasgow, Scotland, UK, March 12-15, 1990, pp. 612-616, 1990, IEEE Computer Society, 0-8186-2024-2. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
9 | Siegfried I. Mensch, Hans Martin Lipp |
Fuzzy specification of finite state machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EURO-DAC ![In: European Design Automation Conference, EURO-DAC 1990, Glasgow, Scotland, UK, March 12-15, 1990, pp. 622-626, 1990, IEEE Computer Society, 0-8186-2024-2. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
9 | Kassem Saleh, Robert L. Probert |
Synthesis of Error-Recoverable Protocol Specifications from Service Specifications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCI ![In: Advances in Computing and Information - ICCI'90, International Conference on Computing and Information, Niagara Falls, Canada, May 23-26, 1990, Proceedings, pp. 415-424, 1990, Springer, 3-540-53504-7. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
syntactic correctness, synthesis, error-recovery, protocol design, semantic correctness, Communication software |
9 | Pranav Ashar, Srinivas Devadas, A. Richard Newton |
A Unified Approach to the Decomposition and Re-Decomposition of Sequential Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, Florida, USA, June 24-28, 1990., pp. 601-606, 1990, IEEE Computer Society Press, 0-89791-363-9. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
9 | Abhijit Ghosh, Srinivas Devadas, A. Richard Newton |
Verification of Interacting Sequential Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, Florida, USA, June 24-28, 1990., pp. 213-219, 1990, IEEE Computer Society Press, 0-89791-363-9. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
9 | Dwight D. Hill, Bryan Preas |
Benchmarks for Cell Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, Florida, USA, June 24-28, 1990., pp. 317-320, 1990, IEEE Computer Society Press, 0-89791-363-9. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
9 | Doron Drusinsky, David Harel |
Using statecharts for hardware description and synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(7), pp. 798-807, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
9 | Alexandre Bronstein, Carolyn L. Talcott |
Formal Verification of Synchronous Circuits based on String-Functional Semantics: The 7 Paillet Circuits in Boyer-Moore. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Automatic Verification Methods for Finite State Systems ![In: Automatic Verification Methods for Finite State Systems, International Workshop, Grenoble, France, June 12-14, 1989, Proceedings, pp. 317-333, 1989, Springer, 3-540-52148-8. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
9 | Tiziano Villa, Alberto L. Sangiovanni-Vincentelli |
NOVA: State Assignment of Finite State Machines for Optimal Two-level Logic Implementations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 26th ACM/IEEE Design Automation Conference, Las Vegas, Nevada, USA, June 25-29, 1989., pp. 327-332, 1989, ACM Press. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
9 | Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli |
MUSTANG: state assignment of finite state machines targeting multilevel logic implementations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(12), pp. 1290-1300, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
9 | Franz Pichler |
Finite State Machine Modelling of Cryptographic Systems in Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCRYPT ![In: Advances in Cryptology - EUROCRYPT '87, Workshop on the Theory and Application of of Cryptographic Techniques, Amsterdam, The Netherlands, April 13-15, 1987, Proceedings, pp. 65-73, 1987, Springer, 3-540-19102-X. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
|
9 | Rainer Brück 0001, Bernd Kleinjohann, Thomas Kathöfer, Franz J. Rammig |
Synthesis of concurrent modular controllers from algorithmic descriptions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, NV, USA, June, 1986., pp. 285-292, 1986, IEEE Computer Society Press. The full citation details ...](Pics/full.jpeg) |
1986 |
DBLP DOI BibTeX RDF |
|
9 | Krishan K. Sabnani, Anton T. Dahbura |
A new technique for generating protocol test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGCOMM ![In: Proceedings of the Ninth Symposium on Data Communications, SIGCOMM 1985, Whistler Moutain, British Columbia, Canada, September 10-12, 1985, pp. 36-43, 1985, ACM, 0-89791-164-4. The full citation details ...](Pics/full.jpeg) |
1985 |
DBLP DOI BibTeX RDF |
|
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