|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 570 occurrences of 350 keywords
|
|
|
Results
Found 2262 publication records. Showing 2262 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | John Demme, Simha Sethumadhavan |
Rapid identification of architectural bottlenecks via precise event counting. |
ISCA |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Boris Grot, Joel Hestness, Stephen W. Keckler, Onur Mutlu |
Kilo-NOC: a heterogeneous network-on-chip architecture for scalability and service guarantees. |
ISCA |
2011 |
DBLP DOI BibTeX RDF |
|
1 | David Meisner, Christopher M. Sadler, Luiz André Barroso, Wolf-Dietrich Weber, Thomas F. Wenisch |
Power management of online data-intensive services. |
ISCA |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Mehrtash Manoochehri, Murali Annavaram, Michel Dubois 0001 |
CPPC: correctable parity protected cache. |
ISCA |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Susmit Biswas, Mohit Tiwari, Timothy Sherwood, Luke Theogarajan, Frederic T. Chong |
Fighting fire with fire: modeling the datacenter-scale effects of targeted superlattice thermal management. |
ISCA |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Youngjin Kwon, Changdae Kim, Seungryoul Maeng, Jaehyuk Huh 0001 |
Virtualizing performance asymmetric multi-core systems. |
ISCA |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Rishi Agarwal, Pranav Garg 0001, Josep Torrellas |
Rebound: scalable checkpointing for coherent shared memory. |
ISCA |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Guangyu Sun 0003, Christopher J. Hughes, Changkyu Kim, Jishen Zhao, Cong Xu, Yuan Xie 0001, Yen-Kuang Chen |
Moguls: a model to explore the memory hierarchy for bandwidth improvements. |
ISCA |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Atif Hashmi, Hugues Berry, Olivier Temam, Mikko H. Lipasti |
Automatic abstraction and fault tolerance in cortical microachitectures. |
ISCA |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Niket Kumar Choudhary, Salil V. Wadhavkar, Tanmay A. Shah, Hiran Mayukh, Jayneel Gandhi, Brandon H. Dwiel, Sandeep Navada, Hashem Hashemi Najaf-abadi, Eric Rotenberg |
FabScalar: composing synthesizable RTL designs of arbitrary cores within a canonical superscalar template. |
ISCA |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Aaron Carpenter, Jianyun Hu, Jie Xu, Michael C. Huang 0001, Hui Wu 0007 |
A case for globally shared-medium on-chip interconnect. |
ISCA |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Jungju Oh, Milos Prvulovic, Alenka G. Zajic |
TLSync: support for multiple fast barriers using on-chip transmission lines. |
ISCA |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Rishi Agarwal, Josep Torrellas |
FlexBulk: intelligently forming atomic blocks in blocked-execution multiprocessors to minimize squashes. |
ISCA |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Erika Gunadi, Mikko H. Lipasti |
CRIB: consolidated rename, issue, and bypass. |
ISCA |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Nathan L. Binkert, Al Davis, Norman P. Jouppi, Moray McLaren, Naveen Muralimanohar, Robert Schreiber, Jung Ho Ahn |
The role of optics in future high radix switch design. |
ISCA |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Daniel Sánchez 0003, Christos Kozyrakis |
Vantage: scalable and efficient fine-grain cache partitioning. |
ISCA |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Hadi Esmaeilzadeh, Emily R. Blem, Renée St. Amant, Karthikeyan Sankaralingam, Doug Burger |
Dark silicon and the end of multicore scaling. |
ISCA |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Omid Azizi, Aqeel Mahesri, Benjamin C. Lee, Sanjay J. Patel, Mark Horowitz |
Energy-performance tradeoffs in processor architecture and circuit design: a marginal cost analysis. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
co-optimization, design trade-offs, optimization, energy efficiency, design space exploration, microarchitecture |
1 | Gwendolyn Voskuilen, Faraz Ahmad, T. N. Vijaykumar |
Timetraveler: exploiting acyclic races for optimizing memory race recording. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
race recording, debugging, determinism, replay |
1 | William J. Dally |
Moving the needle, computer architecture research in academe and industry. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
research |
1 | Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bird, Krste Asanovic, David A. Patterson 0001 |
A case for FAME: FPGA architecture model execution. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
simulation, fpga, microprocessors |
1 | Scott Beamer, Chen Sun 0003, Yong-Jin Kwon, Ajay Joshi, Christopher Batten, Vladimir Stojanovic, Krste Asanovic |
Re-architecting DRAM memory systems with monolithically integrated silicon photonics. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
dram architecture, energy-efficiency, silicon photonics |
1 | Stijn Eyerman, Lieven Eeckhout |
Modeling critical sections in Amdahl's law and its implications for multicore design. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
synchronization, critical sections, analytical performance modeling, Amdahl's law |
1 | Marc de Kruijf, Shuou Nomura, Karthikeyan Sankaralingam |
Relax: an architectural framework for software recovery of hardware faults. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
software recovery, reliability |
1 | Dan Gibson, David A. Wood 0001 |
Forwardflow: a scalable core for power-constrained CMPs. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
scalable core, chip multiprocessor (cmp), power |
1 | Jiayuan Meng, David Tarjan, Kevin Skadron |
Dynamic warp subdivision for integrated branch and memory divergence tolerance. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
branch divergence, memory divergence, cache, warp, latency hiding, simd |
1 | Aniruddha N. Udipi, Naveen Muralimanohar, Niladrish Chatterjee, Rajeev Balasubramonian, Al Davis, Norman P. Jouppi |
Rethinking DRAM design and organization for energy-constrained multi-cores. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
chipkill, dram architecture, subarrays, energy-efficiency, locality |
1 | Thomas W. Barr, Alan L. Cox, Scott Rixner |
Translation caching: skip, don't walk (the page table). |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
page walk caching, memory management, tlb |
1 | Victor W. Lee, Changkyu Kim, Jatin Chhugani, Michael Deisher, Daehyun Kim 0001, Anthony D. Nguyen, Nadathur Satish, Mikhail Smelyanskiy, Srinivas Chennupaty, Per Hammarlund, Ronak Singhal, Pradeep Dubey |
Debunking the 100X GPU vs. CPU myth: an evaluation of throughput computing on CPU and GPU. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
cpu architecture, gpu architecture, throughput computing, performance analysis, performance measurement, software optimization |
1 | Vijayaraghavan Soundararajan, Jennifer M. Anderson |
The impact of management operations on the virtualized datacenter. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
datacenter management, management workload, virtual machine management, cloud computing |
1 | Guihai Yan, Xiaoyao Liang, Yinhe Han 0001, Xiaowei Li 0001 |
Leveraging the core-level complementary effects of PVT variations to reduce timing emergencies in multi-core processors. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
complimentary effects, delay sensor, pvt variations, timing emergency, thread migration |
1 | Olivier Temam |
The rebirth of neural networks. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
neural networks |
1 | Timothy Pritchett, Mithuna Thottethodi |
SieveStore: a highly-selective, ensemble-level disk cache for cost-performance. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
selective allocation, storage ensembles, flash memory, storage, solid state disks, disk cache |
1 | Ruirui C. Huang, G. Edward Suh |
IVEC: off-chip memory integrity protection for both security and reliability. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
security, fault tolerance, reliability, error detection, error correction, memory systems |
1 | Vilas Sridharan, David R. Kaeli |
Using hardware vulnerability factors to enhance AVF analysis. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
architectural vulnerability factor, fault tolerance, reliability |
1 | Enric Herrero, José González 0002, Ramon Canal |
Elastic cooperative caching: an autonomous dynamically adaptive memory hierarchy for chip multiprocessors. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
elastic cooperative caching, tiled microarchitectures, chip multiprocessors, memory hierarchy |
1 | Aamer Jaleel, Kevin B. Theobald, Simon C. Steely Jr., Joel S. Emer |
High performance cache replacement using re-reference interval prediction (RRIP). |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
scan resistance, thrashing, shared cache, replacement |
1 | Sunpyo Hong, Hyesoon Kim |
An integrated GPU power and performance model. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
GPU architecture, performance, energy, analytical model, CUDA, power estimation |
1 | Colin Blundell, Arun Raghavan, Milo M. K. Martin |
RETCON: transactional repair without replay. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
parallel programming, transactional memory |
1 | Charles P. Thacker |
Improving the future by examining the past. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
turing award |
1 | Pranay Koka, Michael O. McCracken, Herb Schwetman, Xuezhe Zheng, Ron Ho, Ashok V. Krishnamoorthy |
Silicon-photonic network architectures for scalable, power-efficient multi-chip systems. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
interconnection networks, nanophotonics |
1 | Jeffrey Stuecheli, Dimitris Kaseridis, David Daly, Hillery C. Hunter, Lizy K. John |
The virtual write queue: coordinating DRAM and last-level cache policies. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
cmp many-core, ddr ddr2 ddr3, dram-parameters, memory-scheduling writeback, page-mode, write-queue, write-scheduling, dram, cache-replacement, last-level-cache |
1 | Nak Hee Seong, Dong Hyuk Woo, Hsien-Hsin S. Lee |
Security refresh: prevent malicious wear-out and increase durability for phase-change memory with dynamically randomized address mapping. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
dynamic address remapping, security, phase change memory, wear leveling |
1 | Brandon Lucia, Luis Ceze, Karin Strauss, Shaz Qadeer, Hans-Juergen Boehm |
Conflict exceptions: simplifying concurrent language semantics with precise hardware exceptions for data-races. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
multicores, threads, data-races, memory consistency models, bug detection |
1 | Janghaeng Lee, Haicheng Wu, Madhumitha Ravichandran, Nathan Clark |
Thread tailor: dynamically weaving threads together for efficient, adaptive parallel applications. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
managed parallelism, threading, dynamic compilation |
1 | Rehan Hameed, Wajahat Qadeer, Megan Wachs, Omid Azizi, Alex Solomatnikov, Benjamin C. Lee, Stephen Richardson, Christos Kozyrakis, Mark Horowitz |
Understanding sources of inefficiency in general-purpose chips. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
tensilica, energy efficiency, chip multiprocessor, customization, ASIC, h.264, high performance |
1 | Yunji Chen, Weiwu Hu, Tianshi Chen 0002, Ruiyang Wu |
LReplay: a pending period based deterministic replay scheme. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
global clock, pending period, physical time order, multi-core processor, deterministic replay, dfd |
1 | Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott A. Mahlke |
Necromancer: enhancing system throughput by animating dead cores. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
execution abstraction, heterogeneous core coupling, manufacturing defects |
1 | Stuart E. Schechter, Gabriel H. Loh, Karin Strauss, Doug Burger |
Use ECP, not ECC, for hard failures in resistive memories. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
hard failures, resistive memories, memory, error correction, phase change memory |
1 | Yasuko Watanabe, John D. Davis, David A. Wood 0001 |
WiDGET: Wisconsin decoupled grid execution tiles. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
instruction steering, power proportional computing, performance, hardware, power efficiency |
1 | Mary Jane Irwin |
Shared caches in multicores: the good, the bad, and the ugly. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
caches, multicore |
1 | Srimat T. Chakradhar, Murugan Sankaradass, Venkata Jakkula, Srihari Cadambi |
A dynamically configurable coprocessor for convolutional neural networks. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
dynamic reconfiguration, parallel computer architecture, convolutional neural networks |
1 | Brandon Lucia, Luis Ceze, Karin Strauss |
ColorSafe: architectural support for debugging and dynamically avoiding multi-variable atomicity violations. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
bug avoidance, concurrency errors, data coloring, multi-variable, debugging, atomicity violations |
1 | M. Aater Suleman, Onur Mutlu, José A. Joao, Khubaib, Yale N. Patt |
Data marshaling for multi-core architectures. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
staged execution, pipelining, cmp, critical sections |
1 | John H. Kelm, Daniel R. Johnson, William Tuohy, Steven S. Lumetta, Sanjay J. Patel |
Cohesion: a hybrid memory model for accelerators. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
computer architecture, cache coherence, accelerator |
1 | Xiaochen Guo, Engin Ipek, Tolga Soyata |
Resistive computation: avoiding the power wall with low-leakage, STT-MRAM based computing. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
STT-MRAM, power-efficiency |
1 | Moinuddin K. Qureshi, Michele Franceschini, Luis Alfonso Lastras-Montaño, John P. Karidis |
Morphable memory system: a robust architecture for exploiting multi-level phase change memories. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
morphable memory, multi-level cell, phase change memory |
1 | Eric Keller, Jakub Szefer, Jennifer Rexford, Ruby B. Lee |
NoHype: virtualized cloud infrastructure without the virtualization. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
security, cloud computing, virtualization, multi-core, system architecture, hypervisor, many-core |
1 | Geoffrey Blake, Ronald G. Dreslinski, Trevor N. Mudge, Krisztián Flautner |
Evolution of thread-level parallelism in desktop applications. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
benchmarking, multi-core, thread level parallelism, desktop applications |
1 | Arrvindh Shriraman, Sandhya Dwarkadas |
Sentry: light-weight auxiliary memory access control. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
sentry, access control, multiprocessors, safety, cache coherence, memory protection, protection domains |
1 | Chris Wilkerson, Alaa R. Alameldeen, Zeshan Chishti, Wei Wu 0024, Dinesh Somasekhar, Shih-Lien Lu |
Reducing cache power with low-cost, multi-bit error-correcting codes. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
ecc, edram, idle power, idle states, multi-bit ecc, refresh power, vccmin, dram |
1 | Reetuparna Das, Onur Mutlu, Thomas Moscibroda, Chita R. Das |
Aérgia: exploiting packet latency slack in on-chip networks. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
multi-core, packet scheduling, memory systems, arbitration, prioritization, on-chip networks |
1 | Jing Xue, Alok Garg, Berkehan Ciftcioglu, Jianyun Hu, Shang Wang, Ioannis Savidis, Manish Jain, Rebecca Berman, Peng Liu 0016, Michael C. Huang 0001, Hui Wu, Eby G. Friedman, Gary Wicks, Duncan Moore |
An intra-chip free-space optical interconnect. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
free-space optical interconnect, intra-chip, 3d |
1 | Vijay Janapa Reddi, Benjamin C. Lee, Trishul M. Chilimbi, Kushagra Vaid |
Web search using mobile cores: quantifying and mitigating the price of efficiency. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
bing, mobile cores, energy efficiency, web search |
1 | André Seznec, Uri C. Weiser, Ronny Ronen (eds.) |
37th International Symposium on Computer Architecture (ISCA 2010), June 19-23, 2010, Saint-Malo, France |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Dennis Abts, Michael R. Marty, Philip M. Wells, Peter Klausler, Hong Liu |
Energy proportional datacenter networks. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
datacenter networks, low-power networking, interconnection networks |
1 | Marco Paolieri, Eduardo Quiñones, Francisco J. Cazorla, Guillem Bernat, Mateo Valero |
Hardware support for WCET analysis of hard real-time multicore systems. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
wcet, interconnection network, multicore, hard real-time, real-time embedded systems, cache partitioning, analyzability |
1 | Ali G. Saidi, Nathan L. Binkert, Steven K. Reinhardt, Trevor N. Mudge |
End-to-end performance forecasting: finding bottlenecks before they happen. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
performance analysis, critical path analysis |
1 | Mark Whitney, Nemanja Isailovic, Yatish Patel, John Kubiatowicz |
A fault tolerant, area efficient architecture for Shor's factoring algorithm. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
ion trap, control, quantum computing, layout, cad |
1 | Ping Zhou, Bo Zhao 0007, Jun Yang 0002, Youtao Zhang |
A durable and energy efficient main memory using phase change memory technology. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
low power, phase change memory, endurance |
1 | Javier Carretero, Pedro Chaparro, Xavier Vera, Jaume Abella 0001, Antonio González 0001 |
End-to-end register data-flow continuous self-test. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
end-to-end protection, online testing, degradation, design errors, control logic |
1 | Colin Blundell, Milo M. K. Martin, Thomas F. Wenisch |
InvisiFence: performance-transparent memory ordering in conventional multiprocessors. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
parallel programming, memory consistency |
1 | Mark Woh, Sangwon Seo, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner |
AnySP: anytime anywhere anyway signal processing. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
fully programmable architecture, high-end signal processing, single-instruction multiple-data parallelism, software defined radio, low-power architecture, simd |
1 | Michel A. Kinsy, Myong Hyon Cho, Tina Wen, G. Edward Suh, Marten van Dijk, Srinivas Devadas |
Application-aware deadlock-free oblivious routing. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
systems-on-chip, oblivious routing, on-chip interconnection networks |
1 | Nan Jiang 0009, John Kim, William J. Dally |
Indirect adaptive routing on large scale interconnection networks. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
dragonfly, routing, interconnection networks |
1 | Susmit Biswas, Diana Franklin, Alan Savage, Ryan Dixon, Timothy Sherwood, Frederic T. Chong |
Multi-execution: multicore caching for data-similar executions. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
data similar execution, multicore cache design, cmp |
1 | Cagdas Dirik, Bruce L. Jacob |
The performance of PC solid-state disks (SSDs) as a function of bandwidth, concurrency, device architecture, and system organization. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
performance, flash memory, storage systems, solid state disks |
1 | Doe Hyun Yoon, Mattan Erez |
Memory mapped ECC: low-cost error protection for last level caches. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
reliability, error correction, soft error, last-level caches |
1 | Yan Pan, Prabhat Kumar 0002, John Kim, Gokhan Memik, Yu Zhang 0034, Alok N. Choudhary |
Firefly: illuminating future network-on-chip with nanophotonics. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
interconnection networks, topology, hierarchical network, nanophotonics |
1 | Michael D. Powell, Arijit Biswas, Shantanu Gupta, Shubhendu S. Mukherjee |
Architectural core salvaging in a multi-core processor for hard-error tolerance. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
core salvaging, hard errors, reliability, redundancy |
1 | Sunpyo Hong, Hyesoon Kim |
An analytical model for a GPU architecture with memory-level and thread-level parallelism awareness. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
GPU architecture, warp level parallelism, analytical model, performance estimation, cuda, memory level parallelism |
1 | Shailender Chaudhry, Robert Cypher, Magnus Ekman, Martin Karlsson, Anders Landin, Sherman Yip, Håkan Zeffer, Marc Tremblay |
Simultaneous speculative threading: a novel pipeline architecture implemented in sun's rock processor. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
checkpoint-based architecture, hardware speculation, sst, chip multiprocessor, cmp, instruction-level parallelism, processor architecture, memory-level parallelism |
1 | Abhishek Bhattacharjee, Margaret Martonosi |
Thread criticality predictors for dynamic performance, power, and resource management in chip multiprocessors. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
intel tbb, thread criticality prediction, parallel processing, caches, dvfs |
1 | Vijay Nagarajan, Rajiv Gupta 0001 |
ECMon: exposing cache events for monitoring. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
cache events, recording for replay, speculation past barriers |
1 | Mark J. Cianchetti, Joseph C. Kerekes, David H. Albonesi |
Phastlane: a rapid transit optical routing network. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
interconnection networks, multicore, optical interconnects, nanophotonics |
1 | Jinho Suh, Michel Dubois 0001 |
Dynamic MIPS rate stabilization in out-of-order processors. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
ooo processors, real-time systems, embedded systems, stabilization, variability |
1 | Yangchun Luo, Venkatesan Packirisamy, Wei-Chung Hsu, Antonia Zhai, Nikhil Mungre, Ankit Tarkas |
Dynamic performance tuning for speculative threads. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
parallelism, multicore, dynamic optimization, thread-level speculation |
1 | John H. Kelm, Daniel R. Johnson, Matthew R. Johnson 0003, Neal Clayton Crago, William Tuohy, Aqeel Mahesri, Steven S. Lumetta, Matthew I. Frank, Sanjay J. Patel |
Rigel: an architecture and scalable programming interface for a 1000-core accelerator. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
low-level programming interface, computer architecture, accelerator |
1 | Andrew D. Hilton, Amir Roth |
Decoupled store completion/silent deterministic replay: enabling scalable data memory for CPR/CFP processors. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
checkpoint processors, load-store queues |
1 | Andrew Putnam, Susan J. Eggers, Dave Bennett, Eric Dellinger, Jeff Mason, Henry Styles, Prasanna Sundararajan, Ralph Wittig |
Performance and power of cache-based reconfigurable computing. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
c-to-gates, c-to-hardware, co-processor accelerator, many-cache, synthesis compiler, fpga, caches |
1 | Stephen W. Keckler, Luiz André Barroso (eds.) |
36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
|
1 | Brian M. Rogers, Anil Krishna, Gordon B. Bell, Ken V. Vu, Xiaowei Jiang, Yan Solihin |
Scaling the bandwidth wall: challenges in and avenues for CMP scaling. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
analytical model, memory bandwidth, chip multi-processor |
1 | Amin Firoozshahian, Alex Solomatnikov, Ofer Shacham, Zain Asgar, Stephen Richardson, Christos Kozyrakis, Mark Horowitz |
A memory system design framework: creating smart memories. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
memory access protocol, protocol controller, transactional memory, reconfigurable architecture, cache coherence, memory systems, multi-core processors, stream programming |
1 | Kevin T. Lim, Jichuan Chang, Trevor N. Mudge, Parthasarathy Ranganathan, Steven K. Reinhardt, Thomas F. Wenisch |
Disaggregated memory for expansion and sharing in blade servers. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
disaggregated memory, memory blades, memory capacity expansion, power and cost efficiencies |
1 | Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, Jude A. Rivers |
Scalable high performance main memory system using phase-change memory technology. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
dram caching, phase change memory, wear leveling |
1 | James R. Hamilton |
Internet-scale service infrastructure efficiency. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
internet-scale, efficiency |
1 | José A. Joao, Onur Mutlu, Yale N. Patt |
Flexible reference-counting-based hardware acceleration for garbage collection. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
garbage collection, reference counting |
1 | Stephen Somogyi, Thomas F. Wenisch, Anastasia Ailamaki, Babak Falsafi |
Spatio-temporal memory streaming. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
prefetching, spatial correlation, temporal correlation |
1 | Abdullah Muzahid, Darío Suárez Gracia, Shanxiang Qi, Josep Torrellas |
SigRace: signature-based data race detection. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
SigRace, concurrency defect, signature, timestamp, data race, happened-before |
1 | Thomas Moscibroda, Onur Mutlu |
A case for bufferless routing in on-chip networks. |
ISCA |
2009 |
DBLP DOI BibTeX RDF |
routing, multi-core, memory systems, on-chip networks |
|
|