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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 19541 occurrences of 5230 keywords
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Results
Found 53773 publication records. Showing 53773 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
20 | David W. Currie, Xiushan Feng, Masahiro Fujita, Alan J. Hu, Mark Kwan, Sreeranga P. Rajan |
Embedded Software Verification Using Symbolic Execution and Uninterpreted Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Parallel Program. ![In: Int. J. Parallel Program. 34(1), pp. 61-91, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Formal verification, DSP, embedded software, VLIW |
20 | Jung Hee Cheon, Dong Hoon Lee 0002 |
Use of Sparse and/or Complex Exponents in Batch Verification of Exponentiations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 55(12), pp. 1536-1542, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
sparse exponent, modular exponentiation, Batch verification, Frobenius map |
20 | Bin Li 0053, David Zhang 0001, Kuanquan Wang |
Online signature verification based on null component analysis and principal component analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Pattern Anal. Appl. ![In: Pattern Anal. Appl. 8(4), pp. 345-356, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
NCA, K-L transform, Stable segment extraction, PCA, Signature verification |
20 | Oliver Pell |
Verification of FPGA Layout Generators in Higher-Order Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Autom. Reason. ![In: J. Autom. Reason. 37(1-2), pp. 117-152, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
layout description, circuit verification, FPGA, theorem proving |
20 | Tai-Kia Tan, Cheng-Leong Ng, Kar-Ann Toh, How-Lung Eng, Wei-Yun Yau, Dipti Srinivasan |
A Bimodal Palmprint Verification System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICB ![In: Advances in Biometrics, International Conference, ICB 2006, Hong Kong, China, January 5-7, 2006, Proceedings, pp. 737-743, 2006, Springer, 3-540-31111-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Multimodal Biometrics and Identity Verification, Biometrics, Palmprint Recognition |
20 | Yi-Hsiang Chao, Hsin-Min Wang, Ruei-Chuan Chang |
A Novel Alternative Hypothesis Characterization Using Kernel Classifiers for LLR-Based Speaker Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCSLP ![In: Chinese Spoken Language Processing, 5th International Symposium, ISCSLP 2006, Singapore, December 13-16, 2006, Proceedings, pp. 506-517, 2006, Springer, 3-540-49665-3. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Log-likelihood ratio, Kernel Fisher Discriminant, Support Vector Machine, Speaker verification |
20 | Igor Grudenic, Nikola Bogunovic |
Modeling and Verification of MPI Based Distributed Software. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PVM/MPI ![In: Recent Advances in Parallel Virtual Machine and Message Passing Interface, 13th European PVM/MPI User's Group Meeting, Bonn, Germany, September 17-20, 2006, Proceedings, pp. 123-132, 2006, Springer, 3-540-39110-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
MPI software modeling, MPI software verification, abstract state machines (ASMs) |
20 | Simon Bäumler, Michael Balser, Andriy Dunets, Wolfgang Reif, Jonathan Schmitt |
Verification of Medical Guidelines by Model Checking - A Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPIN ![In: Model Checking Software, 13th International SPIN Workshop, Vienna, Austria, March 30 - April 1, 2006, Proceedings, pp. 219-233, 2006, Springer, 3-540-33102-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Asbru, medical guidelines, Model checking, verification, formal methods, abstraction |
20 | Devinder Thapa, Chang Mok Park, Suraj Dangol, Gi-Nam Wang |
III-Phase Verification and Validation of IEC Standard Programmable Logic Controller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CIMCA/IAWTIC ![In: 2006 International Conference on Computational Intelligence for Modelling Control and Automation (CIMCA 2006), International Conference on Intelligent Agents, Web Technologies and Internet Commerce (IAWTIC 2006), 29 November - 1 December 2006, Sydney, Australia, pp. 111, 2006, IEEE Computer Society, 0-7695-2731-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Verification & Validation (V&V), Virtual Commissioning, Flexible Manufacturing System (FMS), Model Checking, PLC |
20 | Khandoker Asadul Islam, Yoshimichi Watanabe |
Maintaining Data Consistency of XML Databases Using Verification Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASIAN ![In: Advances in Computer Science - ASIAN 2006. Secure Software and Related Issues, 11th Asian Computing Science Conference, Tokyo, Japan, December 6-8, 2006, Revised Selected Papers, pp. 256-263, 2006, Springer, 978-3-540-77504-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Verification, XML Database |
20 | Harish Srinivasan, Sargur N. Srihari, Matthew J. Beal |
Machine Learning for Signature Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICVGIP ![In: Computer Vision, Graphics and Image Processing, 5th Indian Conference, ICVGIP 2006, Madurai, India, December 13-16, 2006, Proceedings, pp. 761-775, 2006, Springer, 3-540-68301-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
forensic signature examination, digital document processing, machine learning, biometrics, signature verification |
20 | Stephen J. Fink, Eran Yahav, Nurit Dor, G. Ramalingam, Emmanuel Geay |
Effective typestate verification in the presence of aliasing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSTA ![In: Proceedings of the ACM/SIGSOFT International Symposium on Software Testing and Analysis, ISSTA 2006, Portland, Maine, USA, July 17-20, 2006, pp. 133-144, 2006, ACM, 1-59593-263-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
program verification, alias analysis, typestate |
20 | Jianbin Tan, George S. Avrunin, Lori A. Clarke |
Managing space for finite-state verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSE ![In: 28th International Conference on Software Engineering (ICSE 2006), Shanghai, China, May 20-28, 2006, pp. 152-161, 2006, ACM, 1-59593-375-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
FLAVERS, ZDD, BDD, finite-state verification, LTSA |
20 | Basil Becker, Dirk Beyer 0001, Holger Giese, Florian Klein 0001, Daniela Schilling |
Symbolic invariant verification for systems with dynamic structural adaptation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSE ![In: 28th International Conference on Software Engineering (ICSE 2006), Shanghai, China, May 20-28, 2006, pp. 72-81, 2006, ACM, 1-59593-375-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
gormal verification, hraph transformation systems, structural invariants, transition invariants, embedded systems, mechatronics, symbolic algorithms |
20 | Alon Gluska |
Practical methods in coverage-oriented verification of the merom microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 332-337, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
logic design, coverage, logic verification, functional coverage |
20 | Giampaolo Bella, Fabio Massacci, Lawrence C. Paulson |
An overview of the verification of SET. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Inf. Sec. ![In: Int. J. Inf. Sec. 4(1-2), pp. 17-28, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Secure Electronic Transactions (SET), Formal verification, Computer security, Network protocols, Automated reasoning |
20 | Prasanna Padmanabhan, Robyn R. Lutz |
Tool-Supported Verification of Product Line Requirements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Autom. Softw. Eng. ![In: Autom. Softw. Eng. 12(4), pp. 447-465, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
requirements verification, feature-interaction resolution, variability, product line, consistency checking, product family, dependency constraints |
20 | Christian Jacobi 0002, Christoph Berg |
Formal Verification of the VAMP Floating Point Unit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Methods Syst. Des. ![In: Formal Methods Syst. Des. 26(3), pp. 227-266, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
IEEE standard 754, formal verification, theorem proving, PVS, floating point unit |
20 | Antonio Cerone, George J. Milne |
Property verification of asynchronous systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Innov. Syst. Softw. Eng. ![In: Innov. Syst. Softw. Eng. 1(1), pp. 25-40, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
asynchronous hardware, Formal verification, process algebra, constraint modelling |
20 | Vlad Rusu, Hervé Marchand, Thierry Jéron |
Automatic Verification and Conformance Testing for Validating Safety Properties of Reactive Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FM ![In: FM 2005: Formal Methods, International Symposium of Formal Methods Europe, Newcastle, UK, July 18-22, 2005, Proceedings, pp. 189-204, 2005, Springer, 3-540-27882-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
symbolic test generation, verification, conformance testing |
20 | Lee Pike, Steven D. Johnson |
The formal verification of a reintegration protocol. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EMSOFT ![In: EMSOFT 2005, September 18-22, 2005, Jersey City, NJ, USA, 5th ACM International Conference On Embedded Software, Proceedings, pp. 286-289, 2005, ACM, 1-59593-091-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
infinite-state bounded model-checking, reintegration protocol, real-time, formal verification, infinite-state systems |
20 | Steve A. Schneider, Helen Treharne, Neil Evans |
Chunks: Component Verification in CSP||B. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IFM ![In: Integrated Formal Methods, 5th International Conference, IFM 2005, Eindhoven, The Netherlands, November 29 - December 2, 2005, Proceedings, pp. 89-108, 2005, Springer, 3-540-30492-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Component based verification, decomposition, CSP, B-Method |
20 | Kazumi Nakamatsu, Seiki Akama, Jair Minoro Abe |
An Intelligent Safety Verification Based on a Paraconsistent Logic Program. ![Search on Bibsonomy](Pics/bibsonomy.png) |
KES (2) ![In: Knowledge-Based Intelligent Information and Engineering Systems, 9th International Conference, KES 2005, Melbourne, Australia, September 14-16, 2005, Proceedings, Part II, pp. 708-715, 2005, Springer, 3-540-28895-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
EVALPSN (Extended Vector Annotated Logic Program with Strong Negation), paraconsistent logic program, intelligent control, safety verification |
20 | Taehae Kim, Yongwha Chung, Seunghwan Jung, Daesung Moon |
Secure Remote Fingerprint Verification Using Dual Watermarks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DRMTICS ![In: Digital Rights Management: Technologies, Issues, Challenges and Systems, First International Conference, DRMTICS 2005, Sydney, Australia, October 31 - November 2, 2005, Revised Selected Papers, pp. 217-227, 2005, Springer, 3-540-35998-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Dual Watermarking, Biometrics, User Authentication, Fingerprint Verification |
20 | Shanyu Zhao, Virginia Mary Lo, Chris GauthierDickey |
Result Verification and Trust-Based Scheduling in Peer-to-Peer Grids. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Peer-to-Peer Computing ![In: Fifth IEEE International Conference on Peer-to-Peer Computing (P2P 2005), 31 August - 2 September 2005, Konstanz, Germany, pp. 31-38, 2005, IEEE Computer Society, 0-7695-2376-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Peer-to-Peer, Grid Computing, Trust, Reputation System, Result Verification |
20 | Henning Burchardt, Jens Oehlerking, Oliver E. Theel |
Towards Push-of-a-Button Stability Verification for Discrete-Time Hybrid Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PRDC ![In: 11th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2005), 12-14 December, 2005, Changsha, Hunan, China, pp. 374-378, 2005, IEEE Computer Society, 0-7695-2492-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Discrete-Time Hybrid Systems, Stability, LMIs, Automatic Verification, Lyapunov Theory |
20 | Anarosa Brandão, Viviane Torres da Silva, Carlos José Pereira de Lucena |
A knowledge-based approach to the specification and verification of MAS design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAMAS ![In: 4th International Joint Conference on Autonomous Agents and Multiagent Systems (AAMAS 2005), July 25-29, 2005, Utrecht, The Netherlands, pp. 1373, 2005, ACM, 1-59593-094-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
ontology, multi-agent systems, design verification |
20 | Dániel Varró |
Automated formal verification of visual modeling languages by model checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Softw. Syst. Model. ![In: Softw. Syst. Model. 3(2), pp. 85-113, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Model checking, Formal verification, Model transformation, Metamodeling, Graph transformation |
20 | Pao-Ann Hsiung, Shang-Wei Lin 0001, Chih-Hao Tseng, Trong-Yen Lee, Jih-Ming Fu, Win-Bin See |
VERTAF: An Application Framework for the Design and Verification of Embedded Real-Time Software. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 30(10), pp. 656-674, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
embedded real-time software, scheduling, formal verification, code generation, software components, Application framework, UML modeling, formal synthesis |
20 | Frances M. T. Brazier, Frank Cornelissen, Rune Gustavsson, Catholijn M. Jonker, Olle Lindeberg, Bianca Polak, Jan Treur |
Compositional Verification of a Multi-Agent System for One-to-Many Negotiation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Appl. Intell. ![In: Appl. Intell. 20(2), pp. 95-117, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
multi-agent system, verification, compositional, negotiation |
20 | Chin Keong Lee, C. G. Leedham |
A New Hybrid Approach to Handwritten Address Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Comput. Vis. ![In: Int. J. Comput. Vis. 57(2), pp. 107-120, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
handwritten postal address recognition, hybrid fusion approach, Singapore postal address sorting, postal automation, verification of postcode recognition |
20 | Danièle Beauquier, Tristan Crolard, Evguenia Prokofieva |
Automatic Parametric Verification of a Root Contention Protocol Based on Abstract State Machines and First Order Timed Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TACAS ![In: Tools and Algorithms for the Construction and Analysis of Systems, 10th International Conference, TACAS 2004, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2004, Barcelona, Spain, March 29 - April 2, 2004, Proceedings, pp. 372-387, 2004, Springer, 3-540-21299-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
IEEE 1394a standard, root contention protocol, Gurevich abstract state machines, predicate logic, real-time distributed systems, Parametric verification |
20 | Oskar Wibling, Joachim Parrow, Arnold Neville Pears |
Automatized Verification of Ad Hoc Routing Protocols. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FORTE ![In: Formal Techniques for Networked and Distributed Systems - FORTE 2004, 24th IFIP WG 6.1 International Conference, Madrid Spain, September 27-30, 2004, Proceedings, pp. 343-358, 2004, Springer, 3-540-23252-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
LUNAR, model checking, Mobile ad hoc networks, formal verification, routing protocols, SPIN, UPPAAL |
20 | Gergely Pintér, István Majzik |
Runtime Verification of Statechart Implementations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WADS ![In: Architecting Dependable Systems III [the book is a result of the ICSE 2004 and DSN 2004 workshops], pp. 148-172, 2004, Springer, 3-540-28968-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
temporal logic, Runtime verification, UML statecharts |
20 | John Harrison 0001 |
Formal Verification of Square Root Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Methods Syst. Des. ![In: Formal Methods Syst. Des. 22(2), pp. 143-153, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
formal verification, floating-point arithmetic, automated theorem proving |
20 | Stephen J. H. Yang, Jeffrey J. P. Tsai, Chyun-Chyi Chen |
Fuzzy Rule Base Systems Verification Using High-Level Petri Nets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Knowl. Data Eng. ![In: IEEE Trans. Knowl. Data Eng. 15(2), pp. 457-473, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
rules reasoning, rule verification, Petri nets, formalism, high-level Petri nets, fuzzy rules, certainty factors |
20 | Xiaoyi Jiang 0001, Daniel Mojon |
Adaptive Local Thresholding by Verification-Based Multithreshold Probing with Application to Vessel Detection in Retinal Images. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Pattern Anal. Mach. Intell. ![In: IEEE Trans. Pattern Anal. Mach. Intell. 25(1), pp. 131-137, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Adaptive local thresholding, threshold probing, hypotheses generation and verification, vessel segmentation, medical imaging, retinal imaging |
20 | David A. Basin, Stefan Friedrich 0001, Marek Gawkowski |
Bytecode Verification by Model Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Autom. Reason. ![In: J. Autom. Reason. 30(3-4), pp. 399-444, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
model checking, static analysis, type safety, bytecode verification |
20 | Xavier Leroy |
Java Bytecode Verification: Algorithms and Formalizations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Autom. Reason. ![In: J. Autom. Reason. 30(3-4), pp. 235-269, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
abstract interpretation, Java Virtual Machine, subroutines, dataflow analysis, bytecode verification |
20 | Stefan Blom, Natalia Ioustinova, Natalia Sidorova |
Timed Verification with µCRL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ershov Memorial Conference ![In: Perspectives of Systems Informatics, 5th International Andrei Ershov Memorial Conference, PSI 2003, Akademgorodok, Novosibirsk, Russia, July 9-12, 2003, Revised Papers, pp. 178-192, 2003, Springer, 3-540-20813-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
modelling, model checking, verification, discrete time, CRL |
20 | Shai Fine, Avi Ziv |
Coverage directed test generation for functional verification using bayesian networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 286-291, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
bayesian networks, functional verification, coverage analysis |
20 | Mila E. Majster-Cederbaum, Naijun Zhan, Harald Fecher |
Action Refinement from a Logical Point of View. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VMCAI ![In: Verification, Model Checking, and Abstract Interpretation, 4th International Conference, VMCAI 2003, New York, NY, USA, January 9-11, 2002, Proceedings, pp. 253-267, 2003, Springer, 3-540-00348-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
verification, specification, modal logics, reactive systems, action refinement |
20 | Gerard J. Holzmann, Margaret H. Smith |
An Automated Verification Method for Distributed Systems Software Based on Model Extraction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 28(4), pp. 364-377, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
call processing, model checking, formal methods, software testing, case studies, reactive systems, software verification, feature interaction |
20 | Ian Robertson, James Irvine 0001, Patrick Lysaght, David Robinson |
Timing verification of dynamically reconfigurable logic for the xilinx virtex FPGA series. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2002, Monterey, CA, USA, February 24-26, 2002, pp. 127-135, 2002, ACM, 1-58113-452-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
FPGA, verification, dynamic reconfiguration, run-time reconfiguration |
20 | Doug Goldson |
Formal Verification of mu-Charts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APSEC ![In: 9th Asia-Pacific Software Engineering Conference (APSEC 2002), 4-6 December 2002, Gold Coast, Queensland, Australia, pp. 129-, 2002, IEEE Computer Society, 0-7695-1850-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
µ-charts, formal verification, refinement, CSP |
20 | Françoise Bellegarde, Samir Chouali, Jacques Julliand |
Verification of Dynamic Constraints for B Event Systems under Fairness Assumptions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ZB ![In: ZB 2002: Formal Specification and Development in Z and B, 2nd International Conference of B and Z Users, Grenoble, France, January 23-25, 2002, Proceedings, pp. 477-496, 2002, Springer, 3-540-43166-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
B event systems1, fairness hypotheses, PLTL verification, specification |
20 | Amjad Hajjar, Tom Chen 0001 |
Improving the Efficiency and Quality of Simulation-Based Behavioral Model Verification Using Dynamic Bayesian Criteria. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 3rd International Symposium on Quality of Electronic Design, ISQED 2002, San Jose, CA, USA, March 18-21, 2002, pp. 304-309, 2002, IEEE Computer Society, 0-7695-1561-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Behavioral Model Verification, VHDL, Stopping Criteria |
20 | Hai Zhou 0001 |
Clock schedule verification with crosstalk. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Timing Issues in the Specification and Synthesis of Digital Systems ![In: Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, Monterey, California, USA, December 2-3, 2002, pp. 78-83, 2002, ACM, 1-58113-526-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
verification, delay, coupling, clock schedule |
20 | Scott Hazelhurst, Osnat Weissberg, Gila Kamhi, Limor Fix |
A hybrid verification approach: getting deep into the design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002, pp. 111-116, 2002, ACM, 1-58113-461-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
hybrid verification, symbolic model checking, symbolic trajectory evaluation |
20 | Tomohiro Yoneda, Tomoya Kitai, Chris J. Myers |
Automatic Derivation of Timing Constraints by Failure Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 14th International Conference, CAV 2002,Copenhagen, Denmark, July 27-31, 2002, Proceedings, pp. 195-208, 2002, Springer, 3-540-43997-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Trace theoretic verification, Timing constraints, Failure analysis, Timed circuits |
20 | Daniel Hirschkoff |
Bisimulation verification using the up to techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Softw. Tools Technol. Transf. ![In: Int. J. Softw. Tools Technol. Transf. 3(3), pp. 271-285, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Up to bisimulation, Verification, Bisimulation, Pi-calculus |
20 | Anne E. Haxthausen, Jan Peleska 0001 |
Formal Development and Verification of a Distributed Railway Control System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 26(8), pp. 687-701, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
verification, formal specification, Safety, stepwise refinement, railways, distributed control system, RAISE |
20 | Zsolt Miklós Kovács-Vajna |
A Fingerprint Verification System Based on Triangular Matching and Dynamic Time Warping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Pattern Anal. Mach. Intell. ![In: IEEE Trans. Pattern Anal. Mach. Intell. 22(11), pp. 1266-1276, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
triangular matching, NIST sdb 4, Fingerprint, dynamic time warping, fingerprint verification |
20 | Lina Khatib, Nicola Muscettola, Klaus Havelund |
Verification of Plan Models Using UPPAAL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FAABS ![In: Formal Approaches to Agent-Based Systems, First International Workshop, FAABS 2000 Greenbelt, MD, USA, April 5-7, 2000, Revised Papers, pp. 114-122, 2000, Springer, 3-540-42716-3. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Scheduling, Model Checking, Verification, Planning, Autonomy |
20 | Marco A. Peña, Jordi Cortadella, Enric Pastor, Alex Kondratyev |
Formal Verification of Safety Properties in Timed Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000), 2-6 April 2000, Eilat, Israel, pp. 2-11, 2000, IEEE Computer Society, 0-7695-0586-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Formal verification, asynchronous circuits, timing analysis |
20 | Oleg Botchkarev, Stavros Tripakis |
Verification of Hybrid Systems with Linear Differential Inclusions Using Ellipsoidal Approximations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HSCC ![In: Hybrid Systems: Computation and Control, Third International Workshop, HSCC 2000, Pittsburgh, PA, USA, March 23-25, 2000, Proceedings, pp. 73-88, 2000, Springer, 3-540-67259-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
ellipsoidal approximations, verification, hybrid systems, reachability analysis |
20 | Edson J. R. Justino, Abdenaim El Yacoubi, Flávio Bortolozzi, Robert Sabourin |
An Off-Line Signature Verification System using Hidden Markov Model and Cross-Validation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIBGRAPI ![In: 13th Brazilian Symposium on Computer Graphics and Image Processing (SIBGRAPI 2000), 17-20 October 2000, Gramado (RS), Brazil, pp. 105-112, 2000, IEEE Computer Society, 0-7695-0878-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
off-line signature verification system, pre-processing process, segmentation process, feature extraction process, random falsifications, false acceptance concept, false rejection concept, intrapersonal variation, interpersonal variation, automatic decision threshold derivation, hidden Markov model, handwriting recognition, cross-validation, learning process |
20 | Pierre-Alain Masson, Hassan Mountassir, Jacques Julliand |
Modular Verification for a Class of PLTL Properties. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IFM ![In: Integrated Formal Methods, Second International Conference, IFM 2000, Dagstuhl Castle, Germany, November 1-3, 2000, Proceedings, pp. 398-419, 2000, Springer, 3-540-41196-8. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Büchi automata, Propositional linear temporal logic PLTL, B specification, model-checking, Verification, Refinement, modularity |
20 | Sergej Sawitzki, Rainer G. Spallek, Jens Schönherr, Bernd Straube |
Formal Verification for Microprocessors with Extendable Instruction Set. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 12th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2000), 10-12 July 2000, Boston, MA, USA, pp. 47-55, 2000, IEEE Computer Society, 0-7695-0716-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
reconfigurable processor architecture, abstraction techniques, formal verification, pipeline processor |
20 | Dinos Moundanos, Jacob A. Abraham |
On Design Validation Using Verification Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 15(1-2), pp. 173-189, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
extracted control flow machine, verification, abstraction, test generation, coverage analysis, OBDDs |
20 | Peter Frey, Radharamanan Radhakrishnan, Philip A. Wilsey, Perry Alexander, Harold W. Carter |
An Extensible Formal Framework for the Specification and Verification of an Optimistic Simulation Protocol. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS ![In: 32nd Annual Hawaii International Conference on System Sciences (HICSS-32), January 5-8, 1999, Maui, Hawaii, USA, 1999, IEEE Computer Society, 0-7695-0001-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Software Engineering, Theorem Proving, Parallel Discrete Event Simulation, PVS, Formal specification and verification |
20 | Michelangelo Interesse, Roberto Dabbicco |
Experience Paper: Beyond Year 2000 Remediation: The Compliance Verification: A Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSM ![In: 1999 International Conference on Software Maintenance, ICSM 1999, Oxford, England, UK, August 30 - September 3, 1999, pp. 155-160, 1999, IEEE Computer Society, 0-7695-0016-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
y2k, verification, validation, compliance, independence, year 2000 |
20 | Howard Bowman, Giorgio P. Faconti, Joost-Pieter Katoen, Diego Latella, Mieke Massink |
Automatic Verification of a Lip-Synchronisation Protocol Using Uppaal. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Aspects Comput. ![In: Formal Aspects Comput. 10(5-6), pp. 550-575, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
Lip synchronisation, Model checking, Verification, Specification, Timed automata, Uppaal |
20 | Franz Regensburger, Aenne Barnard |
Formal Verification of SDL Systems at the Siemens Mobile Phone Department. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TACAS ![In: Tools and Algorithms for Construction and Analysis of Systems, 4th International Conference, TACAS '98, Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS'98, Lisbon, Portugal, March 28 - April 4, 1998, Proceedings, pp. 439-455, 1998, Springer, 3-540-64356-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
telecommunication protocols, model checking, formal verification, SDL |
20 | Mostafa M. Aref, Khaled M. Elleithy |
HOOVER: Hardware Object-Oriented Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 19-21 February 1998, Lafayette, LA, USA, pp. 351-355, 1998, IEEE Computer Society, 0-8186-8409-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
cell libraries, formal verification, Object oriented systems |
20 | Scott A. Taylor, Michael Quinn, Darren Brown, Nathan Dohm, Scot Hildebrandt, James Huggins, Carl Ramey |
Functional Verification of a Multiple-issue, Out-of-Order, Superscalar Alpha Processor - The DEC Alpha 21264 Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 35th Conference on Design Automation, Moscone center, San Francico, California, USA, June 15-19, 1998., pp. 638-643, 1998, ACM Press, 0-89791-964-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
21264, coverage anaysis, verification, architecture, validation, microprocessor, pseudo-random, Alpha |
20 | Adrian Evans, Allan Silburt, Gary Vrckovnik, Thane Brown, Mario Dufresne, Geoffrey Hall, Tung Ho, Ying Liu |
Functional Verification of Large ASICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 35th Conference on Design Automation, Moscone center, San Francico, California, USA, June 15-19, 1998., pp. 650-655, 1998, ACM Press, 0-89791-964-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
ASIC verification, simulation, emulation |
20 | Martin Keim, Michael Martin 0002, Bernd Becker 0001, Rolf Drechsler, Paul Molitor |
Polynomial Formal Verification of Multipliers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 15th IEEE VLSI Test Symposium (VTS'97), April 27-May 1, 1997, Monterey, California, USA, pp. 150-157, 1997, IEEE Computer Society, 0-8186-7810-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Binary Moment Diagram (BMD), Verification, Multiplier |
20 | Antti Valmari, Manu Setälä |
Visual Verification of Safety and Liveness. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FME ![In: FME '96: Industrial Benefit and Advances in Formal Methods, Third International Symposium of Formal Methods Europe, Co-Sponsored by IFIP WG 14.3, Oxford, UK, March 18-22, 1996, Proceedings, pp. 228-247, 1996, Springer, 3-540-60973-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
verification, process algebra, reduction, labelled transition system |
20 | Milica Barjaktarovic, Shiu-Kai Chin, Kamal Jabbour |
Formal specification and verification of communication protocols using automated tools . ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECCS ![In: 1st IEEE International Conference on Engineering of Complex Computer Systems (ICECCS '95), November 6-10, 1995, Fort Lauderdale, Florida, USA, pp. 246-253, 1995, IEEE Computer Society, 0-8186-7123-8. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
OSI protocol, large models, simulation, modelling, formal specification, formal specification, testing, protocols, formal verification, software tools, validation, theorem proving, process algebra, communication protocols, open systems, algebra, formal logic, automated tools, model checker, model testing, complex models, automated theorem prover |
20 | Rance Cleaveland, Joachim Parrow, Bernhard Steffen |
The Concurrency Workbench: A Semantics-Based Tool for the Verification of Concurrent Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Program. Lang. Syst. ![In: ACM Trans. Program. Lang. Syst. 15(1), pp. 36-72, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
concurrency, process algebra, automatic verification, finite-state systems |
20 | Hakim Lounis |
Integrating Machine-Learning Techniques in Knowledge-Based Systems Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMIS ![In: Methodologies for Intelligent Systems, 7th International Symposium, ISMIS '93, Trondheim, Norway, June 15-18, 1993, Proceedings, pp. 405-414, 1993, Springer, 3-540-56804-2. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
Revision Process, Machine Learning, Verification, Formal Specifications, Integrity Constraint, Production Rules, Semantic-Net |
20 | Alfred Bröckers, Volker Gruhn |
Computer-Aided Verification of Software Process Model Properties ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAiSE ![In: Advanced Information Systems Engineering, CAiSE'93, Paris, France, June 8-11, 1993, Proceedings, pp. 521-546, 1993, Springer, 3-540-56777-1. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
software process model verification, FUNSOFT nets, static and dynamic software process model properties, coverability trees, MELMAC |
20 | Che-Fn Yu, Virgil D. Gligor |
A Specification and Verification Method for Preventing Denial of Service. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 16(6), pp. 581-592, 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
failure absence, integrity violations, user agreements, simultaneity conditions, denial-of-service prevention, formal specification, concurrent programs, security of data, specification method, verification method |
20 | Tadashi Kanamori, Hiroshi Fujita |
Formulation of Induction Formulas in Verification of Prolog Programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CADE ![In: 8th International Conference on Automated Deduction, Oxford, England, July 27 - August 1, 1986, Proceedings, pp. 281-299, 1986, Springer, 3-540-16780-3. The full citation details ...](Pics/full.jpeg) |
1986 |
DBLP DOI BibTeX RDF |
Prolog, Program Transformation, Program Verification, Induction |
20 | Max Schäfer, Torbjörn Ekman 0001, Oege de Moor |
Challenge proposal: verification of refactorings. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLPV ![In: Proceedings of the 3rd ACM Workshop Programming Languages meets Program Verification, PLPV 2009, Savannah, GA, USA, January 20, 2009, pp. 67-72, 2009, ACM, 978-1-60558-330-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
refactoring, proof assistants, mechanical verification |
20 | Huu Hai Nguyen, Wei-Ngan Chin |
Enhancing Program Verification with Lemmas. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 20th International Conference, CAV 2008, Princeton, NJ, USA, July 7-14, 2008, Proceedings, pp. 355-369, 2008, Springer, 978-3-540-70543-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Lemma Proving, Lemma Application, Program Verification, Separation Logic, Entailment |
20 | Bican Xia, Lu Yang, Naijun Zhan |
Program Verification by Reduction to Semi-algebraic Systems Solving. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISoLA ![In: Leveraging Applications of Formal Methods, Verification and Validation, Third International Symposium, ISoLA 2008, Porto Sani, Greece, October 13-15, 2008. Proceedings, pp. 277-291, 2008, Springer, 978-3-540-88478-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Semi-Algebraic Systems, Program Verification, Invariants, Quantifier Elimination, Ranking Functions, Polynomial Programs |
20 | Leila Jemni Ben Ayed, Fatma Siala |
Specification and Verification of Multi-agent Systems Interaction Protocols Using a Combination of AUML and Event B. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSV-IS ![In: Interactive Systems. Design, Specification, and Verification, 15th International Workshop, DSV-IS 2008, Kingston, Canada, July 16-18, 2008, Revised Papers, pp. 102-107, 2008, Springer, 978-3-540-70568-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Multi-Agent System, verification, specification, Event B, AUML |
20 | Omar Ochoa, Irbis Gallegos, Steve Roach, Ann Q. Gates |
Towards a Tool for Generating Aspects from MEDL and PEDL Specifications for Runtime Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RV ![In: Runtime Verification, 7th International Workshop, RV 2007, Vancouver, Canada, March 13, 2007, Revised Selected Papers, pp. 75-86, 2007, Springer, 978-3-540-77394-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Java-MaC, Aspect Oriented Programming, Runtime Verification, Runtime Monitoring, Software Assurance |
20 | Guy Edward Gallasch, Jonathan Billington |
Using Parametric Automata for the Verification of the Stop-and-Wait Class of Protocols. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ATVA ![In: Automated Technology for Verification and Analysis, Third International Symposium, ATVA 2005, Taipei, Taiwan, October 4-7, 2005, Proceedings, pp. 457-473, 2005, Springer, 3-540-29209-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Stop and Wait Protocols, Symbolic Automata, Language Equivalence, Coloured Petri Nets, Parametric Verification, Symbolic Reachability Graphs |
19 | Hao Zheng 0001, Haiqiong Yao, Tomohiro Yoneda |
Modular Model Checking of Large Asynchronous Designs with Efficient Abstraction Refinement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 59(4), pp. 561-573, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
circuit verification, model checking, Formal methods, refinement, abstraction, modular verification, logic verification |
19 | Robert P. Kurshan, Vladimir Levin, Marius Minea, Doron A. Peled, Hüsnü Yenigün |
Verifying hardware in its software context. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1997, San Jose, CA, USA, November 9-13, 1997, pp. 742-749, 1997, IEEE Computer Society / ACM, 0-8186-8200-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
model-checking, verification, formal verification, co-design, partial order reduction, stepwise refinement, localization reduction, co-verification |
19 | Enrique Argones-Rúa, José Luis Alba-Castro, Carmen García-Mateo |
Quality-Based Score Normalization for Audiovisual Person Authentication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIAR ![In: Image Analysis and Recognition, 5th International Conference, ICIAR 2008, Póvoa de Varzim, Portugal, June 25-27, 2008. Proceedings, pp. 1003-1012, 2008, Springer, 978-3-540-69811-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Zhaozhong Ni, Dachuan Yu, Zhong Shao |
Using XCAP to Certify Realistic Systems Code: Machine Context Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TPHOLs ![In: Theorem Proving in Higher Order Logics, 20th International Conference, TPHOLs 2007, Kaiserslautern, Germany, September 10-13, 2007, Proceedings, pp. 189-206, 2007, Springer, 978-3-540-74590-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Íñigo Ugarte, Pablo Sanchez |
Assertion checking of control dominated systems with nonlinear solvers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: 4th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2006), 27-29 July 2006, Embassy Suites, Napa, California, USA, pp. 200, 2006, IEEE Computer Society, 1-4244-0421-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | A. Bernstein, M. Burton, Frank Ghenassia |
How to bridge the abstraction gap in system level modeling and design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2004 International Conference on Computer-Aided Design, ICCAD 2004, San Jose, CA, USA, November 7-11, 2004, pp. 910-914, 2004, IEEE Computer Society / ACM, 0-7803-8702-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Qiusong Yang, Mingshu Li 0001 |
A cut-off approach for bounded verification of parameterized systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSE (1) ![In: Proceedings of the 32nd ACM/IEEE International Conference on Software Engineering - Volume 1, ICSE 2010, Cape Town, South Africa, 1-8 May 2010, pp. 345-354, 2010, ACM, 978-1-60558-719-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
cut-off, bounded model checking, parameterized system |
19 | Natarajan Shankar |
Automated deduction for verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Comput. Surv. ![In: ACM Comput. Surv. 41(4), pp. 20:1-20:56, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | D. S. Guru, H. N. Prakash |
Online Signature Verification and Recognition: An Approach Based on Symbolic Representation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Pattern Anal. Mach. Intell. ![In: IEEE Trans. Pattern Anal. Mach. Intell. 31(6), pp. 1059-1073, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Xihui Chen, Ton van Deursen, Jun Pang 0001 |
Improving Automatic Verification of Security Protocols with XOR. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICFEM ![In: Formal Methods and Software Engineering, 11th International Conference on Formal Engineering Methods, ICFEM 2009, Rio de Janeiro, Brazil, December 9-12, 2009. Proceedings, pp. 107-126, 2009, Springer, 978-3-642-10372-8. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Yingpan Wu, Lixin Yu, Wei Zhuang, Jianyong Wang |
A Coverage-Driven Constraint Random-Based Functional Verification Method of Pipeline Unit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACIS-ICIS ![In: 8th IEEE/ACIS International Conference on Computer and Information Science, IEEE/ACIS ICIS 2009, June 1-3, 2009, Shanghai, China, pp. 1049-1054, 2009, IEEE Computer Society, 978-0-7695-3641-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Yunji Chen, Yi Lv, Weiwu Hu, Tianshi Chen 0002, Haihua Shen, Pengyu Wang, Hong Pan |
Fast complete memory consistency verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 14-18 February 2009, Raleigh, North Carolina, USA, pp. 381-392, 2009, IEEE Computer Society, 978-1-4244-2932-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Joseph Sifakis |
The Quest for Correctness-Beyond a Posteriori Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPIN ![In: Model Checking Software, 16th International SPIN Workshop, Grenoble, France, June 26-28, 2009. Proceedings, pp. 4, 2009, Springer, 978-3-642-02651-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Hongseok Yang |
Automatic Verification of Heap-Manipulating Programs Using Separation Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSR ![In: Computer Science - Theory and Applications, Fourth International Computer Science Symposium in Russia, CSR 2009, Novosibirsk, Russia, August 18-23, 2009. Proceedings, pp. 25, 2009, Springer, 978-3-642-03350-6. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Luciano Baresi, Domenico Bianculli, Sam Guinea, Paola Spoletini |
Keep It Small, Keep It Real: Efficient Run-Time Verification of Web Service Compositions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FMOODS/FORTE ![In: Formal Techniques for Distributed Systems, Joint 11th IFIP WG 6.1 International Conference FMOODS 2009 and 29th IFIP WG 6.1 International Conference FORTE 2009, Lisboa, Portugal, June 9-12, 2009. Proceedings, pp. 26-40, 2009, Springer, 978-3-642-02137-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Frédéric Vogels, Bart Jacobs 0002, Frank Piessens |
A Machine Checked Soundness Proof for an Intermediate Verification Language. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SOFSEM ![In: SOFSEM 2009: Theory and Practice of Computer Science, 35th Conference on Current Trends in Theory and Practice of Computer Science, Spindleruv Mlýn, Czech Republic, January 24-30, 2009. Proceedings, pp. 570-581, 2009, Springer, 978-3-540-95890-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Yasuhiro Ito, Yutaka Sugawara, Mary Inaba, Kei Hiraki |
CVC: The C to RTL compiler for callback-based verification model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2008, International Conference on Field Programmable Logic and Applications, Heidelberg, Germany, 8-10 September 2008, pp. 499-502, 2008, IEEE, 978-1-4244-1961-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Zhifang Wang, Yiyun Chen, Zhenming Wang, Wei Wang, Bo Tian |
Implementation of Pointer Logic for Automated Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICYCS ![In: Proceedings of the 9th International Conference for Young Computer Scientists, ICYCS 2008, Zhang Jia Jie, Hunan, China, November 18-21, 2008, pp. 2295-2301, 2008, IEEE Computer Society, 978-0-7695-3398-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Sharad Malik |
Hardware Verification: Techniques, Methodology and Solutions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TACAS ![In: Tools and Algorithms for the Construction and Analysis of Systems, 14th International Conference, TACAS 2008, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2008, Budapest, Hungary, March 29-April 6, 2008. Proceedings, pp. 1, 2008, Springer, 978-3-540-78799-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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|
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