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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 2784 occurrences of 1319 keywords
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Results
Found 4097 publication records. Showing 4097 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
12 | Lawrence T. Clark, Dan W. Patterson, Chandarasekaran Ramamurthy, Keith E. Holbert |
An Embedded Microprocessor Radiation Hardened by Microarchitecture and Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 65(2), pp. 382-395, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Mohamed Amine Boussadi, Thierry Tixier, Alexis Landrault, Jean-Pierre Dérutin |
HNCP: A many-core microprocessor ASIC approach dedicated to embedded image processing applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 47, pp. 333-346, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Roberto Urban, Heinrich Theodor Vierhaus, Mario Schölzel, Enrico Altmann, Horst Seelig |
Non-Cyclic Design Space Exploration for ASIPs - Compiler-Centered Microprocessor Design (CoMet). ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 25(3), pp. 1640012:1-1640012:16, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | A. S. Molyakov |
A prototype computer with non-von Neumann architecture based on strategic domestic J7 microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Autom. Control. Comput. Sci. ![In: Autom. Control. Comput. Sci. 50(8), pp. 682-686, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Tosiron Adegbija, Anita Rogacs, Chandrakant Patel, Ann Gordon-Ross |
Microprocessor Optimizations for the Internet of Things. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1603.02393, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP BibTeX RDF |
|
12 | Lukás Charvát, Ales Smrcka, Tomás Vojnar |
HADES: Microprocessor Hazard Analysis via Formal Verification of Parameterized Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMICS ![In: Proceedings 11th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science, MEMICS 2016, Telč, Czech Republic, 21st-23rd October 2016., pp. 87-93, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Brian Campbell 0001, Ian Stark |
Randomised testing of a microprocessor model using SMT-solver state generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sci. Comput. Program. ![In: Sci. Comput. Program. 118, pp. 60-76, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Zhenqiang Yong, Xiaoyan Xiang, Jianyi Meng, Chen Chen 0058 |
TBCT: Time-Borrowing and Clock Token based error correction and its application in microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 13(20), pp. 20160766, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Tony Nowatzki, Karthikeyan Sankaralingam |
Modularizing the microprocessor core to outperform traditional out-of-order. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Hot Chips Symposium ![In: 2016 IEEE Hot Chips 28 Symposium (HCS), Cupertino, CA, USA, August 21-23, 2016, pp. 1-4, 2016, IEEE, 978-1-5090-6208-9. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | |
17th International Workshop on Microprocessor and SOC Test and Verification, MTV 2016, Austin, TX, USA, December 12-13, 2016 ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![IEEE Computer Society, 978-1-4673-8924-2 The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP BibTeX RDF |
|
12 | Aymen Touati, Alberto Bosio, Patrick Girard 0001, Arnaud Virazel, Paolo Bernardi, Matteo Sonza Reorda |
Improving the Functional Test Delay Fault Coverage: A Microprocessor Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016, Pittsburgh, PA, USA, July 11-13, 2016, pp. 731-736, 2016, IEEE Computer Society, 978-1-4673-9039-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Irina Stotland, Danil Shpagilev, Nadezhda Starikovskaya |
UVM based approaches to functional verification of communication controllers of microprocessor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EWDTS ![In: 2016 IEEE East-West Design & Test Symposium, EWDTS 2016, Yerevan, Armenia, October 14-17, 2016, pp. 1-4, 2016, IEEE Computer Society, 978-1-5090-0693-9. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Andrei Tatarnikov |
An approach to instruction stream generation for functional verification of microprocessor designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EWDTS ![In: 2016 IEEE East-West Design & Test Symposium, EWDTS 2016, Yerevan, Armenia, October 14-17, 2016, pp. 1-4, 2016, IEEE Computer Society, 978-1-5090-0693-9. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Peter T. Breuer, Jonathan P. Bowen, Esther Palomar, Zhiming Liu 0001 |
A Practical Encrypted Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SECRYPT ![In: Proceedings of the 13th International Joint Conference on e-Business and Telecommunications (ICETE 2016) - Volume 4: SECRYPT, Lisbon, Portugal, July 26-28, 2016., pp. 239-250, 2016, SciTePress, 978-989-758-196-0. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Hippolyte Djonon Tsague, Bheki Twala |
A Robust Machine Learning Approach to Microprocessor Instructions Identification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICAI (2) ![In: Advances in Soft Computing - 15th Mexican International Conference on Artificial Intelligence, MICAI 2016, Cancún, Mexico, October 23-28, 2016, Proceedings, Part II, pp. 248-258, 2016, Springer, 978-3-319-62427-3. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Awais Yousaf, Shahid Masud |
Stochastic model based dynamic power estimation of microprocessor using Imperas simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SysCon ![In: Annual IEEE Systems Conference, SysCon 2016, Orlando, FL, USA, April 18-21, 2016, pp. 1-8, 2016, IEEE, 978-1-4673-9519-9. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Stefanos Valadimas, Angela Arapoyanni, Yiorgos Tsiatouhas |
Timing error mitigation in microprocessor cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 2016 IEEE International Conference on Electronics, Circuits and Systems, ICECS 2016, Monte Carlo, Monaco, December 11-14, 2016, pp. 772-775, 2016, IEEE, 978-1-5090-6113-6. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Jeremy Constantin, Andrea Bonetti, Adam Teman, Thomas Christoph Müller, Lorenz Schmid, Andreas Burg |
DynOR: A 32-bit microprocessor in 28 nm FD-SOI with cycle-by-cycle dynamic clock adjustment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, Lausanne, Switzerland, September 12-15, 2016, pp. 261-264, 2016, IEEE, 978-1-5090-2972-3. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Aaron Grenat, Sriram Sundaram, Stephen Kosonocky, Ravinder Rachala, Sriram Sambamurthy, Steven Liepe, Miguel Rodriguez, Tom Burd, Adam Clark, Michael Austin, Samuel Naffziger |
4.2 Increasing the performance of a 28nm x86-64 microprocessor through system power management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2016 IEEE International Solid-State Circuits Conference, ISSCC 2016, San Francisco, CA, USA, January 31 - February 4, 2016, pp. 74-75, 2016, IEEE, 978-1-4673-9466-6. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Matthew Tomei, Henry Duwe, Nam Sung Kim, Rakesh Kumar 0002 |
Bit Serializing a Microprocessor for Ultra-low-power. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2016 International Symposium on Low Power Electronics and Design, ISLPED 2016, San Francisco Airport, CA, USA, August 08 - 10, 2016, pp. 200-205, 2016, ACM, 978-1-4503-4185-1. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Anteneh Gebregiorgis, Mohammad Saber Golanbari, Saman Kiamehr, Fabian Oboril, Mehdi Baradaran Tahoori |
Maximizing Energy Efficiency in NTC by Variation-Aware Microprocessor Pipeline Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2016 International Symposium on Low Power Electronics and Design, ISLPED 2016, San Francisco Airport, CA, USA, August 08 - 10, 2016, pp. 272-277, 2016, ACM, 978-1-4503-4185-1. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Masanori Natsui, Akira Tamakoshi, Akira Mochizuki, Hiroki Koike, Hideo Ohno, Tetsuo Endoh, Takahiro Hanyu |
Stochastic behavior-considered VLSI CAD environment for MTJ/MOS-hybrid microprocessor design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montréal, QC, Canada, May 22-25, 2016, pp. 1878-1881, 2016, IEEE, 978-1-4799-5341-7. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Snehasish Kumar, William N. Sumner, Arrvindh Shriraman |
SPEC-AX and PARSEC-AX: extracting accelerator benchmarks from microprocessor benchmarks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IISWC ![In: 2016 IEEE International Symposium on Workload Characterization, IISWC 2016, Providence, RI, USA, September 25-27, 2016, pp. 117-127, 2016, IEEE Computer Society, 978-1-5090-3896-1. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Ehsan Aerabi, A. Elhadi Amirouche, Houda Ferradi, Rémi Géraud, David Naccache, Jean Vuillemin |
The Conjoined Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HOST ![In: 2016 IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2016, McLean, VA, USA, May 3-5, 2016, pp. 67-70, 2016, IEEE Computer Society, 978-1-4673-8826-9. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Peter T. Breuer, Jonathan P. Bowen |
A Fully Encrypted Microprocessor The Secret Computer is Nearly Here. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ANT/SEIT ![In: The 7th International Conference on Ambient Systems, Networks and Technologies (ANT 2016) / The 6th International Conference on Sustainable Energy Information Technology (SEIT-2016) / Affiliated Workshops, May 23-26, 2016, Madrid, Spain, pp. 1282-1287, 2016, Elsevier. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Sotiris Tselonis, Manolis Kaliorakis, Nikos Foutris, George Papadimitriou 0001, Dimitris Gizopoulos |
Microprocessor reliability-performance tradeoffs assessment at the microarchitecture level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | César O. Campos-Aguillón, Rene Celis-Cordova, Ismo K. Hänninen, Craig S. Lent, Alexei O. Orlov, Gregory L. Snider |
A Mini-MIPS microprocessor for adiabatic computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICRC ![In: IEEE International Conference on Rebooting Computing, ICRC 2016, San Diego, CA, USA, October 17-19, 2016, pp. 1-7, 2016, IEEE Computer Society, 978-1-5090-1370-8. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Bilgiday Yuce, Nahid Farhady Ghalaty, Chinmay Deshpande, Conor Patrick, Leyla Nazhandali, Patrick Schaumont |
FAME: Fault-attack Aware Microprocessor Extensions for Hardware Fault Detection and Software Fault Response. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HASP@ISCA ![In: Proceedings of the Hardware and Architectural Support for Security and Privacy 2016, HASP@ICSA 2016, Seoul, Republic of Korea, June 18, 2016, pp. 8:1-8:8, 2016, ACM, 978-1-4503-4769-3. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Timothy Hayes 0001, Oscar Palomar, Osman S. Unsal, Adrián Cristal, Mateo Valero |
Future Vector Microprocessor Extensions for Data Aggregations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 43rd ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2016, Seoul, South Korea, June 18-22, 2016, pp. 418-430, 2016, IEEE Computer Society, 978-1-4673-8947-1. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Doowon Lee, Tom Kolan, Arkadiy Morgenshtein, Vitali Sokhin, Ronny Morad, Avi Ziv, Valeria Bertacco |
Probabilistic bug-masking analysis for post-silicon tests in microprocessor verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 53rd Annual Design Automation Conference, DAC 2016, Austin, TX, USA, June 5-9, 2016, pp. 24:1-24:6, 2016, ACM, 978-1-4503-4236-0. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Ravi Suppiah, Ng Siew Qee Shaun |
Introducing microprocessor-based systems design on an ARM softcore using a FPGA and a teaching auxiliary board. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDUCON ![In: 2016 IEEE Global Engineering Education Conference, EDUCON 2016, Abu Dhabi, United Arab Emirates, April 10-13, 2016, pp. 751-756, 2016, IEEE, 978-1-4673-8633-3. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Buse Ustaoglu, Berna Örs Yalçin |
Reliability analysis of MIPS-32 microprocessor register files designed with different fault tolerant techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIU ![In: 24th Signal Processing and Communication Application Conference, SIU 2016, Zonguldak, Turkey, May 16-19, 2016, pp. 2073-2076, 2016, IEEE, 978-1-5090-1679-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Omar Amin, Youssef Ramzy, Omar Ibrahem, Ahmed Fouad 0001, Khaled Mohamed, Mohamed Abdelsalam |
System Verilog Assertions Synthesis Based Compiler. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 17th International Workshop on Microprocessor and SOC Test and Verification, MTV 2016, Austin, TX, USA, December 12-13, 2016, pp. 65-70, 2016, IEEE Computer Society, 978-1-4673-8924-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Senwen Kan, Matthew Lam, Tyler Porter, Jennifer Dworak |
A Case Study: Pre-Silicon SoC RAS Validation for NoC Server Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 17th International Workshop on Microprocessor and SOC Test and Verification, MTV 2016, Austin, TX, USA, December 12-13, 2016, pp. 19-24, 2016, IEEE Computer Society, 978-1-4673-8924-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Xiaolong Guo, Raj Gautam Dutta, Prabhat Mishra 0001, Yier Jin |
Automatic RTL-to-Formal Code Converter for IP Security Formal Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 17th International Workshop on Microprocessor and SOC Test and Verification, MTV 2016, Austin, TX, USA, December 12-13, 2016, pp. 35-38, 2016, IEEE Computer Society, 978-1-4673-8924-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Ahmed El-Yamany, Sameh El-Ashry, Khaled Salah 0001 |
Coverage Closure Efficient UVM Based Generic Verification Architecture for Flash Memory Controllers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 17th International Workshop on Microprocessor and SOC Test and Verification, MTV 2016, Austin, TX, USA, December 12-13, 2016, pp. 30-34, 2016, IEEE Computer Society, 978-1-4673-8924-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Sainath Karlapalem, Shashank Venugopal |
Scalable, Constrained Random Software Driven Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 17th International Workshop on Microprocessor and SOC Test and Verification, MTV 2016, Austin, TX, USA, December 12-13, 2016, pp. 71-76, 2016, IEEE Computer Society, 978-1-4673-8924-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Yang Xie, Chongxi Bao, Yuntao Liu 0001, Ankur Srivastava 0001 |
2.5D/3D Integration Technologies for Circuit Obfuscation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 17th International Workshop on Microprocessor and SOC Test and Verification, MTV 2016, Austin, TX, USA, December 12-13, 2016, pp. 39-44, 2016, IEEE Computer Society, 978-1-4673-8924-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Vibarajan Viswanathan, Juliet Runhaar, Doug Reed, Jun Zhao |
Tough Bugs vs. Smart Tools - L2/L3 Cache Verification Using System Verilog, UVM and Verdi Transaction Debugging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 17th International Workshop on Microprocessor and SOC Test and Verification, MTV 2016, Austin, TX, USA, December 12-13, 2016, pp. 25-29, 2016, IEEE Computer Society, 978-1-4673-8924-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Khaled Fathy, Khaled Salah 0001 |
An Efficient Scenario Based Testing Methodology Using UVM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 17th International Workshop on Microprocessor and SOC Test and Verification, MTV 2016, Austin, TX, USA, December 12-13, 2016, pp. 57-60, 2016, IEEE Computer Society, 978-1-4673-8924-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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12 | Haytham Saafan, M. Watheq El-Kharashi, Ashraf Salem |
Formal Based Methodology for Inferring Memory Mapped Registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 17th International Workshop on Microprocessor and SOC Test and Verification, MTV 2016, Austin, TX, USA, December 12-13, 2016, pp. 15-18, 2016, IEEE Computer Society, 978-1-4673-8924-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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12 | Amr B. Darwish, Magdy A. El-Moursy, Mohamed Dessouky |
Transaction Level Power Modeling (TLPM) Methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 17th International Workshop on Microprocessor and SOC Test and Verification, MTV 2016, Austin, TX, USA, December 12-13, 2016, pp. 61-64, 2016, IEEE Computer Society, 978-1-4673-8924-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Liwei Zhou, Yiorgos Makris |
Hardware-Based Workload Forensics and Malware Detection in Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 17th International Workshop on Microprocessor and SOC Test and Verification, MTV 2016, Austin, TX, USA, December 12-13, 2016, pp. 45-50, 2016, IEEE Computer Society, 978-1-4673-8924-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Wei Hu 0008, Alric Althoff, Armita Ardeshiricham, Ryan Kastner |
Towards Property Driven Hardware Security. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 17th International Workshop on Microprocessor and SOC Test and Verification, MTV 2016, Austin, TX, USA, December 12-13, 2016, pp. 51-56, 2016, IEEE Computer Society, 978-1-4673-8924-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Saddam Jamil Quirem, Prasad Krishna Saravu |
Fake CPU: A Flexible and Simulation Cost-Effective UVC for Testing Shared Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 17th International Workshop on Microprocessor and SOC Test and Verification, MTV 2016, Austin, TX, USA, December 12-13, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8924-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
12 | Prasad Krishna Saravu |
Multi-processor Memory Scoreboard: A Multi-processor Memory Ordering and Data Consistency Checker. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 17th International Workshop on Microprocessor and SOC Test and Verification, MTV 2016, Austin, TX, USA, December 12-13, 2016, pp. 7-14, 2016, IEEE Computer Society, 978-1-4673-8924-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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12 | Ahmed El-Yamany |
Echoing the "Generality Concept" through the Bus Functional Model Architecture in Universal Verification Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 17th International Workshop on Microprocessor and SOC Test and Verification, MTV 2016, Austin, TX, USA, December 12-13, 2016, pp. 77-80, 2016, IEEE Computer Society, 978-1-4673-8924-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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12 | Seongjong Kim, Mingoo Seok |
Variation-Tolerant, Ultra-Low-Voltage Microprocessor With a Low-Overhead, Within-a-Cycle In-Situ Timing-Error Detection and Correction Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 50(6), pp. 1478-1490, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
12 | Lieven Eeckhout |
Hot Chips in an Increasingly Diverse Microprocessor Landscape. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 35(2), pp. 2-3, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Chang-Chih Chen, Linda S. Milor |
Microprocessor Aging Analysis and Reliability Modeling Due to Back-End Wearout Mechanisms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 23(10), pp. 2065-2076, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Mohammad Abdur Rouf, Soontae Kim |
Low-Cost Control Flow Protection via Available Redundancies in the Microprocessor Pipeline. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 23(1), pp. 131-141, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Michail Maniatakos, Maria K. Michael, Yiorgos Makris |
Multiple-Bit Upset Protection in Microprocessor Memory Arrays Using Vulnerability-Based Parity Optimization and Interleaving. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 23(11), pp. 2447-2460, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Brian W. Curran, Christian Jacobi 0002, J. J. Bonanno, D. A. Schroter, K. J. Alexander, A. Puranik, Markus M. Helms |
The IBM z13 multithreaded microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IBM J. Res. Dev. ![In: IBM J. Res. Dev. 59(4/5), 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
12 | Sai Manoj P. D., Hao Yu 0001, Kanwen Wang |
3D Many-Core Microprocessor Power Management by Space-Time Multiplexing Based Demand-Supply Matching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 64(11), pp. 3022-3036, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
12 | Steve Kerrison, Kerstin Eder |
Energy Modeling of Software for a Hardware Multithreaded Embedded Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 14(3), pp. 56:1-56:25, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Fabian Oboril, Mehdi Baradaran Tahoori |
Exploiting Instruction Set Encoding for Aging-Aware Microprocessor Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 21(1), pp. 5:1-5:26, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
12 | Taizhi Liu, Chang-Chih Chen, Woongrae Kim, Linda Milor |
Comprehensive reliability and aging analysis on SRAMs within microprocessor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 55(9-10), pp. 1290-1296, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Ehsan Aerabi, A. Elhadi Amirouche, Houda Ferradi, Rémi Géraud, David Naccache, Jean Vuillemin |
The Conjoined Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IACR Cryptol. ePrint Arch. ![In: IACR Cryptol. ePrint Arch. 2015, pp. 974, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP BibTeX RDF |
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12 | Jim Esch |
Spin-Based Computing: Device Concepts, Current Status, and a Case Study on a High-Performance Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Proc. IEEE ![In: Proc. IEEE 103(1), pp. 103-105, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Jongyeon Kim, Ayan Paul, Paul A. Crowell, Steven J. Koester, Sachin S. Sapatnekar, Jianping Wang 0006, Chris H. Kim |
Spin-Based Computing: Device Concepts, Current Status, and a Case Study on a High-Performance Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Proc. IEEE ![In: Proc. IEEE 103(1), pp. 106-130, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Xianhe Huang, Dong Liu, Yan Wang, Pingping Chen, Wei Fu |
100-MHz Low-Phase-Noise Microprocessor Temperature-Compensated Crystal Oscillator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 62-II(7), pp. 636-640, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Chen Sun 0003, Mark T. Wade, Yunsup Lee, Jason S. Orcutt, Luca Alloatti, Michael Georgas, Andrew Waterman, Jeffrey M. Shainline, Rimas Avizienis, Sen Lin, Benjamin Moss, Rajesh Kumar, Fabio Pavanello, Amir H. Atabaki, Henry Cook, Albert J. Ou, Jonathan C. Leu, Yu-Hsin Chen, Krste Asanovic, Rajeev J. Ram, Milos A. Popovic, Vladimir Marko Stojanovic |
Single-chip microprocessor that communicates directly using light. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Nat. ![In: Nat. 528(7581), pp. 534-538, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Ismo K. Hänninen, César O. Campos-Aguillón, Rene Celis-Cordova, Gregory L. Snider |
Design and Fabrication of a Microprocessor Using Adiabatic CMOS and Bennett Clocking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RC ![In: Reversible Computation - 7th International Conference, RC 2015, Grenoble, France, July 16-17, 2015, Proceedings, pp. 173-185, 2015, Springer, 978-3-319-20859-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Roberto Urban, Mario Schölzel, Heinrich Theodor Vierhaus, Enrico Altmann, Horst Seelig |
Compiler-Centred Microprocessor Design (CoMet) - From C-Code to a VHDL Model of an ASIP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 17-22, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
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12 | |
16th International Workshop on Microprocessor and SOC Test and Verification, MTV 2015, Austin, TX, USA, December 3-4, 2015 ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![IEEE Computer Society, 978-1-5090-0885-8 The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP BibTeX RDF |
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12 | Michal Mackowski, Michal Niezabitowski |
Power Consumption Analysis of Microprocessor Unit Based on Software Realization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSCS ![In: 20th International Conference on Control Systems and Computer Science, CSCS 2015, Bucharest, Romania, May 27-29, 2015, pp. 493-498, 2015, IEEE, 978-1-4799-1780-8. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Irina Stotland, Aleksey Meshkov, Vitaly Kutsevol |
Standalone functional verification of multicore microprocessor memory subsystem units based on application of memory subsystem models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EWDTS ![In: 2015 IEEE East-West Design & Test Symposium, EWDTS 2015, Batumi, Georgia, September 26-29, 2015, pp. 1-4, 2015, IEEE Computer Society, 978-1-4673-7776-8. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Cyril Bottoni, Benjamin Coeffic, Jean-Marc Daveau, Gilles Gasiot, Fady Abouzeid, Sylvain Clerc, Lirida A. B. Naviner, Philippe Roche |
Frequency and voltage effects on SER on a 65nm Sparc-V8 microprocessor under radiation test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IRPS ![In: IEEE International Reliability Physics Symposium, IRPS 2015, Monterey, CA, USA, April 19-23, 2015, pp. 12, 2015, IEEE, 978-1-4673-7362-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Pong-Fei Lu, Keith A. Jenkins, K. Paul Muller, Ralf Schaufler |
Long-term data for BTI degradation in 32nm IBM microprocessor using HKMG technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IRPS ![In: IEEE International Reliability Physics Symposium, IRPS 2015, Monterey, CA, USA, April 19-23, 2015, pp. 6, 2015, IEEE, 978-1-4673-7362-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Lei Wang 0011, Yuxing Tang, Yu Deng 0001, Fangyan Qin, Qiang Dou, Guangda Zhang, Feipeng Zhang |
A Scalable and Fast Microprocessor Design Space Exploration Methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCSoC ![In: IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2015, Turin, Italy, September 23-25, 2015, pp. 33-40, 2015, IEEE Computer Society, 978-1-4799-8670-5. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Andrea Höller, Tobias Rauter, Johannes Iber, Christian Kreiner |
Diverse Compiling for Microprocessor Fault Detection in Temporal Redundant Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CIT/IUCC/DASC/PICom ![In: 15th IEEE International Conference on Computer and Information Technology, CIT 2015; 14th IEEE International Conference on Ubiquitous Computing and Communications, IUCC 2015; 13th IEEE International Conference on Dependable, Autonomic and Secure Computing, DASC 2015; 13th IEEE International Conference on Pervasive Intelligence and Computing, PICom 2015, Liverpool, United Kingdom, October 26-28, 2015, pp. 1928-1935, 2015, IEEE, 978-1-5090-0154-5. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Tiago Reimann, Cliff C. N. Sze, Ricardo Reis 0001 |
Gate sizing and threshold voltage assignment for high performance microprocessor designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: The 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, Chiba, Japan, January 19-22, 2015, pp. 214-219, 2015, IEEE, 978-1-4799-7792-5. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Sukrat Gupta, Neel Gala, G. S. Madhusudan, V. Kamakoti 0001 |
SHAKTI-F: A Fault Tolerant Microprocessor Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ATS ![In: 24th IEEE Asian Test Symposium, ATS 2015, Mumbai, India, November 22-25, 2015, pp. 163-168, 2015, IEEE Computer Society, 978-1-4673-9739-1. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Cyril Bottoni, Benjamin Coeffic, Jean-Marc Daveau, Lirida A. B. Naviner, Philippe Roche |
Partial triplication of a SPARC-V8 microprocessor using fault injection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LASCAS ![In: IEEE 6th Latin American Symposium on Circuits & Systems, LASCAS 2015, Montevideo, Uruguay, February 24-27, 2015, pp. 1-4, 2015, IEEE, 978-1-4799-8332-2. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Buse Ustaoglu, Berna Örs Yalçin |
Fault tolerant register file design for MIPS AES-crypto microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 2015 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2015, Cairo, Egypt, December 6-9, 2015, pp. 442-445, 2015, IEEE, 978-1-5090-0246-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Riccardo Cantoro, Marco Gaudesi, Ernesto Sánchez 0001, Giovanni Squillero |
Exploiting Evolutionary Computation in an Industrial Flow for the Development of Code-Optimized Microprocessor Test Programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GECCO (Companion) ![In: Genetic and Evolutionary Computation Conference, GECCO 2015, Madrid, Spain, July 11-15, 2015, Companion Material Proceedings, pp. 1465-1466, 2015, ACM, 978-1-4503-3488-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Naoya Onizawa, Akira Mochizuki, Akira Tamakoshi, Takahiro Hanyu |
A sudden power-outage resilient nonvolatile microprocessor for immediate system recovery. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NANOARCH ![In: Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2015, Boston, MA, USA, July 8-10, 2015, pp. 39-44, 2015, IEEE Computer Society, 978-1-4673-7849-9. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Praveen Mosalikanti, Nasser A. Kurd, Christopher Mozak, Takao Oshita |
Low power analog circuit techniques in the 5th generation intel coreTM microprocessor (broadwell). ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: 2015 IEEE Custom Integrated Circuits Conference, CICC 2015, San Jose, CA, USA, September 28-30, 2015, pp. 1-4, 2015, IEEE, 978-1-4799-8682-8. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Vinay Vashishtha, Lawrence T. Clark, Srivatsan Chellappa, Anudeep R. Gogulamudi, Aditya Gujja, Chad Farnsworth |
A soft-error hardened process portable embedded microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: 2015 IEEE Custom Integrated Circuits Conference, CICC 2015, San Jose, CA, USA, September 28-30, 2015, pp. 1-4, 2015, IEEE, 978-1-4799-8682-8. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Vladimir Ruchkin, Vitaly Romanchuk, Vladimir Fulin, Boris Kostrov, Ekaterina Ruchkina |
Parallelism in embedded microprocessor systems based on clustering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MECO ![In: 4th Mediterranean Conference on Embedded Computing, MECO 2015, Budva, Montenegro, June 14-18, 2015, pp. 45-50, 2015, IEEE, 978-1-4799-8999-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Kosta Luria, Joseph Shor, Michael Zelikson, Alex Lyakhov |
8.7 Dual-use low-drop-out regulator/power gate with linear and on-off conduction modes for microprocessor on-die supply voltages in 14nm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2015 IEEE International Solid-State Circuits Conference, ISSCC 2015, Digest of Technical Papers, San Francisco, CA, USA, February 22-26, 2015, pp. 1-3, 2015, IEEE, 978-1-4799-6223-5. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | James D. Warnock, Brian W. Curran, John Badar, Gregory Fredeman, Donald W. Plass, Yuen H. Chan, Sean M. Carey, Gerard Salem, Friedrich Schroeder, Frank Malgioglio, Guenter Mayer, Christopher J. Berry, Michael H. Wood, Yiu-Hing Chan, Mark D. Mayo, John Isakson, Charudhattan Nagarajan, Tobias Werner 0001, Leon J. Sigal, Ricardo Nigaglioni, Mark Cichanowski, Jeffrey A. Zitz, Matthew M. Ziegler, Tim Bronson, Gerald Strevig, Daniel Dreps, Ruchir Puri, Douglas Malone, Dieter F. Wendel, Pak-kin Mak, Michael A. Blake |
4.1 22nm Next-generation IBM System z microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2015 IEEE International Solid-State Circuits Conference, ISSCC 2015, Digest of Technical Papers, San Francisco, CA, USA, February 22-26, 2015, pp. 1-3, 2015, IEEE, 978-1-4799-6223-5. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Sheng Wang 0005, Xiaoyan Xiang, Chen Chen 0058, Jianyi Meng |
An energy-efficient microprocessor using multilevel error correction for timing error tolerance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASICON ![In: 2015 IEEE 11th International Conference on ASIC, ASICON 2015, Chengdu, China, November 3-6, 2015, pp. 1-4, 2015, IEEE, 978-1-4799-8483-1. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Lukás Charvát, Ales Smrcka, Tomás Vojnar |
Microprocessor Hazard Analysis Via Formal Verification of Parameterized Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCAST ![In: Computer Aided Systems Theory - EUROCAST 2015 - 15th International Conference, Las Palmas de Gran Canaria, Spain, February 8-13, 2015, Revised Selected Papers, pp. 605-614, 2015, Springer, 978-3-319-27339-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Mohammad Hashem Haghbayan, Sami Teravainen, Amir-Mohammad Rahmani, Pasi Liljeberg, Hannu Tenhunen |
Adaptive fault simulation on many-core microprocessor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFTS ![In: 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015, pp. 151-154, 2015, IEEE Computer Society, 978-1-4799-8606-4. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Quintin Verzosa, Wah A. Lee Alex |
Testing microprocessor-based numerical transformer differential protection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IAS ![In: 2015 IEEE Industry Applications Society Annual Meeting, Addison, TX, USA, October 18-22, 2015, pp. 1-9, 2015, IEEE, 978-1-4799-8394-0. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Jean-Luc Dekeyser, A. Shadi Aljendi |
Adopting new learning strategies for computer architecture in higher education: case study: building the S3 microprocessor in 24 hours. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WCAE ![In: Proceedings of the Workshop on Computer Architecture Education, WCAE@ISCA 2015, Portland, Oregon, USA, June 13, 2015, pp. 6:1-6:8, 2015, ACM, 978-1-4503-3717-5. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Pradeepkumar Krishnamoorthy, Cheng Siong Chin, Zuchang Gao, Weipeng Lin |
A multi-hop microprocessor based prototype system for remote vibration and image monitoring of underwater offshore platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RAM/CIS ![In: 7th International Conference on Cybernetics and Intelligent Systems, CIS 2015, and IEEE Conference on Robotics, Automation and Mechatronics, RAM 2015, Siem Reap, Cambodia, July 15-17, 2015, pp. CIS:268-275, 2015, IEEE, 978-1-4673-7337-1. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Matthew R. Johnson 0003 |
Fast, accurate power measurement and optimization for microprocessor platforms ![Search on Bibsonomy](Pics/bibsonomy.png) |
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2015 |
RDF |
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12 | Yang Lin |
Cost-effective radiation hardened techniques for microprocessor pipelines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
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2015 |
RDF |
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12 | Amandeep Sharan, Ashish Gupta |
Hybrid Post Silicon Validation Methodology for Layerscape SoCs involving Secure Boot: Boot (Secure & Non-secure) and Kernel Integration with Randomized Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 16th International Workshop on Microprocessor and SOC Test and Verification, MTV 2015, Austin, TX, USA, December 3-4, 2015, pp. 38-41, 2015, IEEE Computer Society, 978-1-5090-0885-8. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Mikhail M. Chupilko, Alexander S. Kamkin, Artem Kotsynyak, Alexander Protsenko, Sergey A. Smolov, Andrei Tatarnikov |
Specification-Based Test Program Generation for ARM VMSAv8-64 Memory Management Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 16th International Workshop on Microprocessor and SOC Test and Verification, MTV 2015, Austin, TX, USA, December 3-4, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-5090-0885-8. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Xiaolong Guo, Raj Gautam Dutta, Yier Jin |
Hierarchy-Preserving Formal Verification Methods for Pre-silicon Security Assurance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 16th International Workshop on Microprocessor and SOC Test and Verification, MTV 2015, Austin, TX, USA, December 3-4, 2015, pp. 48-53, 2015, IEEE Computer Society, 978-1-5090-0885-8. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Mark Nelson 0004, Peter-Michael Seidel |
Modeling and Analysis of Trusted Boot Processes Based on Actor Network Procedures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 16th International Workshop on Microprocessor and SOC Test and Verification, MTV 2015, Austin, TX, USA, December 3-4, 2015, pp. 54-59, 2015, IEEE Computer Society, 978-1-5090-0885-8. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Harshit Goyal, Vishwani D. Agrawal |
Characterizing Processors for Energy and Performance Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 16th International Workshop on Microprocessor and SOC Test and Verification, MTV 2015, Austin, TX, USA, December 3-4, 2015, pp. 67-72, 2015, IEEE Computer Society, 978-1-5090-0885-8. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Sourav Roy, Nikhil Jain, Sandeep Jain, Robert Page |
Leveraging Virtual Prototype Models for Hardware Verification of an Accelerated Network Packet Processing Engine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 16th International Workshop on Microprocessor and SOC Test and Verification, MTV 2015, Austin, TX, USA, December 3-4, 2015, pp. 15-19, 2015, IEEE Computer Society, 978-1-5090-0885-8. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Bicky Shakya, Fahim Rahman, Mark M. Tehranipoor, Domenic Forte |
Harnessing Nanoscale Device Properties for Hardware Security. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 16th International Workshop on Microprocessor and SOC Test and Verification, MTV 2015, Austin, TX, USA, December 3-4, 2015, pp. 42-47, 2015, IEEE Computer Society, 978-1-5090-0885-8. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Jeremy Ridgeway |
Performance of a SystemVerilog Sudoku Solver with VCS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 16th International Workshop on Microprocessor and SOC Test and Verification, MTV 2015, Austin, TX, USA, December 3-4, 2015, pp. 60-66, 2015, IEEE Computer Society, 978-1-5090-0885-8. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | Taylor Holmes, Andrew Passerelli, John Connor |
SoC Development and Prototype with VDK. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 16th International Workshop on Microprocessor and SOC Test and Verification, MTV 2015, Austin, TX, USA, December 3-4, 2015, pp. 10-14, 2015, IEEE Computer Society, 978-1-5090-0885-8. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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12 | John Hudson, Gunaranjan Kurucheti |
Enhancing the Stress and Efficiency of RIS Tools Using Coverage Metrics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 16th International Workshop on Microprocessor and SOC Test and Verification, MTV 2015, Austin, TX, USA, December 3-4, 2015, pp. 7-9, 2015, IEEE Computer Society, 978-1-5090-0885-8. The full citation details ...](Pics/full.jpeg) |
2015 |
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