Search results for "10-Gbps"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
77	David C. Keezer, Dany Minier, F. Binette	Modular Extension of ATE to 5 Gbps.	ITC	2004	DBLP DOI BibTeX RDF
56	Shubha Bommalingaiahnapallya, Kin-Joe Sham, Mahmoud Reza Ahmadi, Ramesh Harjani	High-Speed Circuits for a Multi-Lane 12 Gbps CMOS PRBS Generator.	ISCAS	2007	DBLP DOI BibTeX RDF
56	David C. Keezer, Dany Minier, Marie-Christine Caron	A Production-Oriented Multiplexing System for Testing above 2.5 Gbps.	ITC	2003	DBLP DOI BibTeX RDF
51	Hiroyuki Kimiyama, Kenji Shimizu, Tetsuo Kawano, Tsuyoshi Ogura, Mitsuru Maruyama	Real-time Processing Method for an Ultra High-Speed Streaming Server Running PC Linux.	AINA (2)	2004	DBLP DOI BibTeX RDF
46	Hidekazu Taoka, Kenichi Higuchi, Mamoru Sawahashi	Field Experiments on Real-Time 1-Gbps High-Speed Packet Transmission in MIMO-OFDM Broadband Packet Radio Access.	VTC Spring	2006	DBLP DOI BibTeX RDF
46	David C. Keezer, Dany Minier, Marie-Christine Caron	Multiplexing ATE Channels for Production Testing at 2.5 Gbps.	IEEE Des. Test Comput.	2004	DBLP DOI BibTeX RDF
41	Motohiko Matsuda, Tomohiro Kudoh, Yuetsu Kodama, Ryousei Takano, Yutaka Ishikawa	The design and implementation of MPI collective operations for clusters in long-and-fast networks.	Clust. Comput.	2008	DBLP DOI BibTeX RDF	Allreduce, Grid, Broadcast, Message passing interface (MPI), Wide-area network, Collective communication
41	Akashi Satoh, Takeshi Sugawara 0001, Naofumi Homma, Takafumi Aoki	High-Performance Concurrent Error Detection Scheme for AES Hardware.	CHES	2008	DBLP DOI BibTeX RDF
41	Motohiko Matsuda, Tomohiro Kudoh, Yuetsu Kodama, Ryousei Takano, Yutaka Ishikawa	Efficient MPI Collective Operations for Clusters in Long-and-Fast Networks.	CLUSTER	2006	DBLP DOI BibTeX RDF
36	Jiawen Hu	A clock recovery circuit for blind equalization multi-Gbps serial data links.	ISCAS	2006	DBLP DOI BibTeX RDF
36	Ching-Te Chiu, Chun-Chieh Chang, Shih-Min Chen, Hou-Cheng Tzeng, Ming-Chang Du, Yu-Ho Hsu, Jen-Ming Wu, Kai-Ming Feng	A 20 Gbps Scalable Load-Balanced TDM Switch with CODEC for High Speed Networking Applications.	IWSOC	2005	DBLP DOI BibTeX RDF
36	Nelson Ou, Touraj Farahmand, Andy Kuo, Sassan Tabatabaei, André Ivanov	Jitter Models for the Design and Test of Gbps-Speed Serial Interconnects.	IEEE Des. Test Comput.	2004	DBLP DOI BibTeX RDF
36	Mohamed M. Hafed, Antonio H. Chan, Geoffrey D. Duerden, Bardia Pishdad, Clarence Tam, Sébastien Laberge, Gordon W. Roberts	A High-Throughput 5 GBps Timing and Jitter Test Module Featuring Localized Processing.	ITC	2004	DBLP DOI BibTeX RDF
36	Máire McLoone, John V. McCanny	Very High Speed 17 Gbps SHACAL Encryption Architecture.	FPL	2003	DBLP DOI BibTeX RDF	SHACAL, NESSIE
36	Niraj Jain, Mischa Schwartz, Theodore R. Bashkow	Transport Protocol Processing at GBPS Rates.	SIGCOMM	1990	DBLP DOI BibTeX RDF
31	Oreste Villa, Daniel G. Chavarría-Miranda, Kristyn J. Maschhoff	Input-independent, scalable and fast string matching on the Cray XMT.	IPDPS	2009	DBLP DOI BibTeX RDF
31	Vijay Khawshe, Kapil Vyas, Renu Rangnekar, Prateek Goyal, Vijay Krishna, Kashinath Prabhu, Pravin Kumar Venkatesan, Leneesh Raghavan, Rajkumar Palwai, M. Thrivikraman, Kunal Desai, Abhijit Abhyankar	A 2.4Gbps-4.8Gbps XDR-DRAM I/O (XIO) Link.	VLSI Design	2009	DBLP DOI BibTeX RDF
31	James Moscola, John W. Lockwood, Young H. Cho	Reconfigurable content-based router using hardware-accelerated language parser.	ACM Trans. Design Autom. Electr. Syst.	2008	DBLP DOI BibTeX RDF	parser hardware, XML, pattern matching, Parsing, regular expressions, content-based routing
31	Candy Yiu, Suresh Singh	High Data Rate WLAN.	VTC Spring	2008	DBLP DOI BibTeX RDF
31	Yu-Hao Hsu, Ming-Hao Lu, Ping-Ling Yang, Fanta Chen, You-Hung Li, Min-Sheng Kao, Chih-Hsing Lin, Ching-Te Chiu, Jen-Ming Wu, Shuo-Hung Hsu, Yarsun Hsu	A 28Gbps 4×4 switch with low jitter SerDes using area-saving RF model in 0.13µm CMOS technology.	ISCAS	2008	DBLP DOI BibTeX RDF
31	Akashi Satoh	ASIC hardware implementations for 512-bit hash function Whirlpool.	ISCAS	2008	DBLP DOI BibTeX RDF
31	Haixin Wang, Guoqiang Bai 0001, Hongyi Chen	Zodiac: System architecture implementation for a high-performance Network Security Processor.	ASAP	2008	DBLP DOI BibTeX RDF
31	Akashi Satoh	High-Speed Parallel Hardware Architecture for Galois Counter Mode.	ISCAS	2007	DBLP DOI BibTeX RDF
31	Young H. Cho, James Moscola, John W. Lockwood	Context-Free-Grammar based Token Tagger in Reconfigurable Devices.	ICDE Workshops	2006	DBLP DOI BibTeX RDF
31	Young H. Cho, James Moscola, John W. Lockwood	Context-free-grammar based token tagger in reconfigurable devices.	FPGA	2006	DBLP DOI BibTeX RDF
31	Hui Qin, Tsutomu Sasao, Yukihiro Iguchi	An FPGA design of AES encryption circuit with 128-bit keys.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	AES encryption, FPGA, pipeline
31	Hiroshi Nakashima, Hiroshi Nakamura, Mitsuhisa Sato, Taisuke Boku, Satoshi Matsuoka, Daisuke Takahashi, Yoshihiko Hotta	MegaProto: 1 TFlops/10kW Rack Is Feasible Even with Only Commodity Technology.	SC	2005	DBLP DOI BibTeX RDF
31	Herwin Chan, Alireza Hodjat, Jun Shi 0001, Richard D. Wesel, Ingrid Verbauwhede	Streaming Encryption for a Secure Wavelength and Time Domain Hopped Optical Network.	ITCC (2)	2004	DBLP DOI BibTeX RDF
31	Hiroyuki Kamezawa, Makoto Nakamura, Junji Tamatsukuri, Nao Aoshima, Mary Inaba, Kei Hiraki	Inter-Layer Coordination for Parallel TCP Streams on Long Fat Pipe Networks.	SC	2004	DBLP DOI BibTeX RDF
31	Akashi Satoh, Sumio Morioka	Hardware-Focused Performance Comparison for the Standard Block Ciphers AES, Camellia, and Triple-DES.	ISC	2003	DBLP DOI BibTeX RDF
31	Navin K. Ramamoorthy, Jayabharath Reddy M, Vishwanath Muniyappa	High Speed Serial Link Transmitter for 10Gig Ethernet Applications.	VLSI Design	2010	DBLP DOI BibTeX RDF	SerDes I/O, tap co-efficients, Gigabits per second(Gbps), Equalization, Transmitter, ISI, CML
31	Cary Gunn	CMOS Photonics for High-Speed Interconnects.	IEEE Micro	2006	DBLP DOI BibTeX RDF	CMOS photonics, high-speed optical communications, Luxtera, 10-Gbps
31	Fei Yuan	A new power-area efficient 4-PAM full-clock CMOS pre-emphasis transmitter for 10Gb/s serial links.	ACM Great Lakes Symposium on VLSI	2006	DBLP DOI BibTeX RDF	Gbps serial link transmitters
30	Cheng Cheng, Sovan Das, Stefan Videv, Adrian Sparks, Sina Babadi, Aravindh Krishnamoorthy, Changmin Lee 0002, Daniel Grieder, Kathleen Hartnett, Paul Rudy, James Raring, Marzieh Najafi, Vasilis K. Papanikolaou, Robert Schober, Harald Haas	100 Gbps Indoor Access and 4.8 Gbps Outdoor Point-to-Point LiFi Transmission Systems using Laser-based Light Sources.	CoRR	2024	DBLP DOI BibTeX RDF
30	Daniele Pirrone, Antonio Ferraro, Dimitrios C. Zografopoulos, Walter Fuscaldo, Pascal Szriftgiser, Guillaume Ducournau, Romeo Beccherelli	Metasurface-Based Filters for High Data Rate THz Wireless Communication: Experimental Validation of a 14 Gbps OOK and 104 Gbps QAM-16 Wireless Link in the 300 GHz Band.	IEEE Trans. Wirel. Commun.	2022	DBLP DOI BibTeX RDF
30	Hong Chen 0002, Dengjie Wang, Ziqiang Wang, Shuai Yuan 0005, Chun Zhang, Zhihua Wang 0001	An 11.05 mW/Gbps Quad-Channel 1.25-10.3125 Gbps Serial Transceiver With a 2-Tap Adaptive DFE and a 3-Tap Transmit FFE in 40 nm CMOS.	IEEE Access	2021	DBLP DOI BibTeX RDF
30	Yilun Wang, Yong Zhang, Zhibin Jiang, Wentao Deng, Xinyu Huang, Qizhi Yan, Liao Chen, Xiang Li, Lei Ye, Xinliang Zhang	128 Gbps NRZ and 224 Gbps PAM-4 Signals Reception in Graphene Plasmonic PDM Receiver.	OFC	2020	DBLP BibTeX RDF
30	Toshiki Kishi, Munehiko Nagatani, Shigeru Kanazawa, Kota Shikama, Takuro Fujii, Hidetaka Nishi, Hiroshi Yamazaki, Norio Sato, Hideyuki Nosaka, Shinji Matsuo	A 0.57-mW/Gbps, 2ch × 53-Gbps Low-Power PAM4 Transmitter Front-End Flip-Chip-Bonded 1.3-µm LD-Array-on-Si.	OFC	2020	DBLP BibTeX RDF
30	Hideki Maeda, Hiroki Kawahara, Kohei Saito, Takeshi Seki, Takeo Sasai, Fukutaro Hamaoka	Real-Time Demonstration of 500-Gbps/Lambda and 600-Gbps/Lambda WDM Transmission on Field-Installed Fibers.	OFC	2020	DBLP BibTeX RDF
30	Chia-Yu Su, Wei-Chun Wang, Huai-Yung Wang, Li-Yin Chen, Gong-Ru Lin	Violet Laser Diode based 25-Gbps Point-to-Point and 12-Gbps MEH/BBEHP Converted white Lighting QAM-OFDM Link.	OFC	2019	DBLP BibTeX RDF
30	Hui Li, Xiaolong Chen, Tao Song, Haiyin Chen, Hao Chen	Performance of the 25 Gbps/100 Gbps Fullmesh RoCE Network Using Mellanox ConnetX-4 Lx Adapter and Ruijie S6500 Ethernet Switch.	AINA Workshops	2019	DBLP DOI BibTeX RDF
30	Toru Yazaki, Norio Chujo, Takeshi Takemoto, Hiroki Yamashita, Akira Hyogo	25-Gbps 3-mW/Gbps/ch VCSEL Driver Circuit in 65-nm CMOS for Multichannel Optical Transmitter.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2018	DBLP DOI BibTeX RDF
30	Guiqiang Peng, Leibo Liu, Sheng Zhou 0001, Shouyi Yin, Shaojun Wei	A 1.58 Gbps/W 0.40 Gbps/mm2 ASIC Implementation of MMSE Detection for $128\times 8~64$ -QAM Massive MIMO in 65 nm CMOS.	IEEE Trans. Circuits Syst. I Regul. Pap.	2018	DBLP DOI BibTeX RDF
30	Pablo Torres-Ferrera, Valter Ferrero, Roberto Mercinelli, Roberto Gaudino	Experimental Demonstration of DSP-Assisted Electrical Duobinary Optimization for High Speed PON 25+ Gbps Using 10 Gbps APD Receiver.	ECOC	2018	DBLP DOI BibTeX RDF
30	Xinying Li, Jianjun Yu, Kaihui Wang, Yuming Xu, Long Chen, Li Zhao 0008, Wen Zhou	Bidirectional delivery of 54-Gbps 8QAM W-band signal and 32-Gbps 16QAM K-band signal over 20-km SMF-28 and 2500-m wireless distance.	OFC	2017	DBLP BibTeX RDF
30	Chuan Qin 0010, Vincent Houtsma, Doutje T. van Veen, Jeffrey Lee, Hungkei Keith Chow, Peter Vetter	40 Gbps PON with 23 dB power budget using 10 Gbps optics and DMT.	OFC	2017	DBLP BibTeX RDF
30	Shinsuke Tanaka, Takasi Simoyama, Tsuyoshi Aoki, Toshihiko Mori, Shigeaki Sekiguchi, Seok-Hwan Jeong, Tatsuya Usuki, Yu Tanaka, Ken Morito	Ultra-Low-Power (1.59 mW/Gbps), 56-Gbps PAM4 Operation of Si Photonic Transmitter Integrating Segmented PIN Mach-Zehnder Modulator and 28-nm CMOS Driver.	ECOC	2017	DBLP DOI BibTeX RDF
30	Namik Kocaman, Tamer A. Ali 0001, Lakshmi P. Rao, Ullas Singh, Mohammed M. Abdul-Latif, Yang Liu, Amr Amin Hafez, Henry Park, Anand Vasani, Zhi Huang, Arvindh Iyer, Bo Zhang 0029, Afshin Momtaz	A 3.8 mW/Gbps Quad-Channel 8.5-13 Gbps Serial Link With a 5 Tap DFE and a 4 Tap Transmit FFE in 28 nm CMOS.	IEEE J. Solid State Circuits	2016	DBLP DOI BibTeX RDF
30	Hideki Maeda, Takashi Kotanigawa, Kohei Saito, Masahiro Yokota, Shuto Yamamoto, Fukutaro Hamaoka, Mitsuteru Yoshida, Masahiro Suzuki, Takeshi Seki	Field trial of simultaneous 100-Gbps and 400-Gbps transmission using advanced digital coherent technologies.	OFC	2016	DBLP BibTeX RDF
30	Hao Hu, R. Asif, Feihong Ye, Simon Gross, Michael J. Withford, Toshio Morioka, Leif Katsuo Oxenløwe	Bidirectional 120 Gbps SDM-WDM-PON with colourless ONU using 10 Gbps optical components without DSP.	OFC	2016	DBLP BibTeX RDF
30	Cheng-Ting Tsai, Shuo Chang, Chun-Yen Pong, Shan-Fong Liang, Yu-Chieh Chi, Chao-Hsin Wu, Tien-Tsorng Shih, Jian Jang Huang, Hao-Chung Kuo, Wood-Hi Cheng, Gong-Ru Lin	RIN suppressed multimode 850-nm VCSEL for 56-Gbps 16-QAM OFDM and 22-Gbps PAM-4 transmission.	OFC	2016	DBLP BibTeX RDF
30	Mengdi Song	WDM transmission of 400 Gbps and beyond using multi-band OFDM & Nyquist-WDM. (Transmission WDM à 400 Gbps et au-delà au moyen de modulations multi-bandes OFDM & Nyquist-WDM).		2016	RDF
30	Tamer A. Ali 0001, Lakshmi P. Rao, Ullas Singh, Mohammed M. Abdul-Latif, Yang Liu, Amr Amin Hafez, Henry Park, Anand Vasani, Zhi Huang, Arvindh Iyer, Bo Zhang 0029, Afshin Momtaz, Namik Kocaman	A 3.8 mW/Gbps quad-channel 8.5-13 Gbps serial link with a 5-tap DFE and a 4-tap transmit FFE in 28 nm CMOS.	VLSIC	2015	DBLP DOI BibTeX RDF
30	Kenichiro Yashiki, Yasuyuki Suzuki, Yasuhiko Hagihara, Mitsuru Kurihara, Masatoshi Tokushima, Junichi Fujikata, Akio Ukita, Koichi Takemura, Takanori Shimizu, Daisuke Okamoto, Jun Ushida, Shigeki Takahashi, Toshinori Uemura, Makoto Okano, Junichi Tsuchida, Takaaki Nedachi, Makoto Fushimi, Ichiro Ogura, Jun Inasaka, Kazuhiko Kurata	5 mW/Gbps hybrid-integrated Si-photonics-based optical I/O cores and their 25-Gbps/ch error-free operation with over 300-m MMF.	OFC	2015	DBLP DOI BibTeX RDF
30	Vincent Houtsma, Doutje T. van Veen	Demonstration of symmetrical 25 Gbps TDM-PON with 31.5 dB optical power budget using only 10 Gbps optical components.	ECOC	2015	DBLP DOI BibTeX RDF
30	Takushi Hashida, Yasumoto Tomita, Yuuki Ogata, Kosuke Suzuki, Shigeto Suzuki, Takanori Nakao, Yuji Terao, Satofumi Honda, Sota Sakabayashi, Ryuichi Nishiyama, Akihiko Konmoto, Yoshitomo Ozeki, Hiroyuki Adachi, Hisakatsu Yamaguchi, Yoichi Koyanagi, Hirotaka Tamura	A 36 Gbps 16.9 mW/Gbps transceiver in 20-nm CMOS with 1-tap DFE and quarter-rate clock distribution.	VLSIC	2014	DBLP DOI BibTeX RDF
30	Krzysztof Szczerba, Petter Westbergh, Magnus Karlsson 0001, Peter A. Andrekson, Anders Larsson	70 Gbps 4-PAM and 56 Gbps 8-PAM using an 850 nm VCSEL.	ECOC	2014	DBLP DOI BibTeX RDF
30	Julie Karaki	100 Gbps coherent MB-OFDM for long-haul WDM optical transmission. (Transmission optique longue distance avec le format MB-OFDM cohérent à 100 Gbps).		2013	RDF
30	Thomas Toifl, Christian Menolfi, Michael Ruegg, Robert Reutemann, Daniel Dreps, Troy J. Beukema, Andrea Prati 0002, Daniele Gardellini, Marcel A. Kossel, Peter Buchmann, Matthias Braendli, Pier Andrea Francese, Thomas Morf	A 2.6 mW/Gbps 12.5 Gbps RX With 8-Tap Switched-Capacitor DFE in 32 nm CMOS.	IEEE J. Solid State Circuits	2012	DBLP DOI BibTeX RDF
30	Delong Cui, Bharath Raghavan, Ullas Singh, Anand Vasani, Zhi Chao Huang, Deyi Pi, Mehdi Khanpour, Ali Nazemi, Hassan Maarefi, Wei Zhang, Tamer A. Ali 0001, Nick Huang, Bo Zhang 0029, Afshin Momtaz, Jun Cao 0001	A Dual-Channel 23-Gbps CMOS Transmitter/Receiver Chipset for 40-Gbps RZ-DQPSK and CS-RZ-DQPSK Optical Transmission.	IEEE J. Solid State Circuits	2012	DBLP DOI BibTeX RDF
30	Navin K. Mishra, Manish Jain, Phuong Le, Sanku Mukherjee, Arul Sendhil, Amir Amirkhany	An output structure for a bi-modal 6.4-Gbps GDDR5 and 2.4-Gbps DDR3 compatible memory interface.	CICC	2011	DBLP DOI BibTeX RDF
30	Tomas Geurts, Wim Rens, Jan Crols, Shoichiro Kashiwakura, Yuichi Segawa	A 2.5 Gbps - 3.125 Gbps multi-core serial-link transceiver in 0.13 μm CMOS.	ESSCIRC	2004	DBLP DOI BibTeX RDF
25	Domenic Teuchert, Simon Hauger	A Pipelined IP Address Lookup Module for 100 Gbps Line Rates and beyond.	EUNICE	2009	DBLP DOI BibTeX RDF
25	Jeffrey M. Gilbert, Chinh H. Doan, Sohrab Emami, C. Bernard Shung	A 4-Gbps Uncompressed Wireless HD A/V Transceiver Chipset.	IEEE Micro	2008	DBLP DOI BibTeX RDF	uncompressed, HDMI, multimedia, networking, wireless, video, CMOS, high-definition, 60 GHz
25	Chin-Sean Sum, Ryuhei Funada, Junyi Wang, Tuncer Baykas, Ming Lei, Yoshinori Nishiguchi, Ryota Kimura, Yozo Shoji, Hiroshi Harada, Shuzo Kato	Adjacent channel interference resistance of a multi-Gbps millimeter-wave WPAN system.	PIMRC	2008	DBLP DOI BibTeX RDF
25	Andrea M. Tonello, Pierre Siohan, Ahmed Zeddam, Xavier Mongaboure	Challenges for 1 Gbps power line communications in home networks.	PIMRC	2008	DBLP DOI BibTeX RDF
25	Ming Lei, Ismail Lakkis, Chin-Sean Sum, Tuncer Baykas, Junyi Wang, Mohammad Azizur Rahman, Ryota Kimura, Ryuhei Funada, Yozo Shoji, Hiroshi Harada, Shuzo Kato	Hardware Impairments on LDPC Coded SC-FDE and OFDM in Multi-Gbps WPAN (IEEE 802.15.3c).	WCNC	2008	DBLP DOI BibTeX RDF
25	Yang Sun 0001, Joseph R. Cavallaro	A low-power 1-Gbps reconfigurable LDPC decoder design for multiple 4G wireless standards.	SoCC	2008	DBLP DOI BibTeX RDF
25	Yu-Hao Hsu, Min-Sheng Kao, Hou-Cheng Tzeng, Ching-Te Chiu, Jen-Ming Wu, Shuo-Hung Hsu	A 20 Gbps Scalable Load Balanced Birkhoff-von Neumann Symmetric TDM Switch IC with SERDES Interfaces.	ASP-DAC	2007	DBLP DOI BibTeX RDF	Birkhoff-von Neumann symmetric TDM switch IC, SERDES interfaces, load-balanced TDM switch IC, digital TDM switch, 8B10B CODEC, analog SERDES I/O interfaces, dual-mode SERDES, half-rate architectures, all static CMOS gates, wide-band CML buffer, PMOS active load scheme, 20 Gbit/s, high speed networking, CMOS technology, low power consumption, 0.18 micron
25	Jian Hong Jiang, Weixin Gai, Akira Hattori, Yasuo Hidaka, Takeshi Horie, Yoichi Koyanagi, Hideki Osone	Design Consideration of 6.25 Gbps Signaling for High-Performance Server.	ASP-DAC	2007	DBLP DOI BibTeX RDF
25	Wai-Yeung Yip, Scott Best, Wendemagegnehu T. Beyene, Ralf Schmitt	System Co-Design and Co-Analysis Approach to Implementing the XDR Memory System of the Cell Broadband Engine Processor; Realizing 3.2 Gbps Data Rate per Memory Lane in Low Cost, High Volume Production.	ASP-DAC	2007	DBLP DOI BibTeX RDF
25	Maria Spyropoulou, Konstantinos Yiannopoulos, Stelios Sygletos, Kyriakos Vlachos, Ioannis Tomkos	160 Gbps Simulation of a Quantum Dot Semiconductor Optical Amplifier Based Optical Buffer.	ONDM	2007	DBLP DOI BibTeX RDF	Quantum Dot Semiconductor Optical Amplifiers, Programmable Delays, Optical packet switching, Optical buffers, Wavelength Converters
25	Jing-Shiun Lin, Chung-Kung Lee, Ming-Der Shieh, Jun-Hong Chen	High-speed CRC design for 10 Gbps applications.	ISCAS	2006	DBLP DOI BibTeX RDF
25	Wei-Zen Chen, Guan-Sheng Huang	A low power programmable PRBS generator and a clock multiplier unit for 10 Gbps serdes applications.	ISCAS	2006	DBLP DOI BibTeX RDF
25	Ignacio Algredo-Badillo, Claudia Feregrino Uribe, René Cumplido	Design and Implementation of an FPGA-Based 1.452-Gbps Non-pipelined AES Architecture.	ICCSA (3)	2006	DBLP DOI BibTeX RDF
25	Ryan Bespalko, Brian Frank	Analysis and Design of a 10 Gbps Transimpedance Amplifier using 0.18µm CMOS technology.	CCECE	2006	DBLP DOI BibTeX RDF
25	Akinori Shinmyo, Masanori Hashimoto, Hidetoshi Onodera	Design and measurement of 6.4 Gbps 8: 1 multiplexer in 0.18µm CMOS process.	ASP-DAC	2005	DBLP DOI BibTeX RDF
25	A. M. Majid, David C. Keezer, J. V. Karia	A 5 Gbps Wafer-Level Tester.	Asian Test Symposium	2005	DBLP DOI BibTeX RDF
25	Jaejin Park, Ruifeng Sun, L. Rick Carley, C. Patrick Yue	A 10-Gbps, 8-PAM parallel interface with crosstalk cancellation for future hard disk drive channel ICs.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
25	Sumio Morioka, Akashi Satoh	A 10-Gbps full-AES crypto design with a twisted BDD S-Box architecture.	IEEE Trans. Very Large Scale Integr. Syst.	2004	DBLP DOI BibTeX RDF
25	T. M. Mak, Mike Tripp, Anne Meixner	Testing Gbps Interfaces without a Gigahertz Tester.	IEEE Des. Test Comput.	2004	DBLP DOI BibTeX RDF
25	Stefano Camatel, Valter Ferrero, Roberto Gaudino, Pierluigi Poggiolini	2.5 Gbps 2-PSK Ultra-Dense WDM Homodyne Coherent Detection Using a Sub-Carrier Based Optical Phase-Locked Loop.	OpNeTec	2004	DBLP DOI BibTeX RDF
25	Miguel Ângelo M. Madureira, Paulo M. P. Monteiro, Rui L. Aguiar, Manuel Violas, M. Gloanec, E. Leclerc, Bernard Lefebvre	Broad-band transimpedance amplifier for multigigabit-per-second (40 Gbps) optical communication systems in 0.135µm PHEMT technology.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
25	George Kornaros, Theofanis Orphanoudakis, Ioannis Papaefstathiou	Active flow identifiers for scalable, QoS scheduling in 10-Gbps network processors.	ISCAS (2)	2003	DBLP DOI BibTeX RDF
25	Jongsun Kim, Zhiwei Xu 0003, Mau-Chung Frank Chang	Reconfigurable memory bus systems using multi-Gbps/pin CDMA I/O transceivers.	ISCAS (2)	2003	DBLP DOI BibTeX RDF
25	Xiaofeng Lin, Guangbin Zhang, Jin Liu 0004	Pulse extraction: a digital power spectrum estimation method for adaptation of Gbps equalizers.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
25	Sumio Morioka, Akashi Satoh	A 10 Gbps Full-AES Crypto Design with a Twisted-BDD S-Box Architecture.	ICCD	2002	DBLP DOI BibTeX RDF
25	Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, Louis Malarsie, Hirobumi Musha	Timing Jitter Measurement of 10 Gbps Bit Clock Signals Using Frequency Division.	VTS	2002	DBLP DOI BibTeX RDF
25	Ahmed M. Shams, Magdy A. Bayoumi	A 108 Gbps, 1.5 GHz 1D-DCT Architecture.	ASAP	2000	DBLP DOI BibTeX RDF
25	Steven Trimberger, Raymond Pang, Amit Singh	A 12 Gbps DES Encryptor/Decryptor Core in an FPGA.	CHES	2000	DBLP DOI BibTeX RDF
21	Zhichun Li, Gao Xia, Hongyu Gao, Yi Tang 0002, Yan Chen 0004, Bin Liu 0001, Junchen Jiang, Yuezhou Lv	NetShield: massive semantics-based vulnerability signature matching for high-speed networks.	SIGCOMM	2010	DBLP DOI BibTeX RDF	vulnerability signature, intrusion detection, deep packet inspection, signature matching
21	Yadi Ma, Suman Banerjee 0001, Shan Lu 0001, Cristian Estan	Leveraging parallelism for multi-dimensional packetclassification on software routers.	SIGMETRICS	2010	DBLP DOI BibTeX RDF	storm, parallelism, packet classification
21	Lotfi Mhamdi	On the Integration of Unicast and Multicast Cell Scheduling in Buffered Crossbar Switches.	IEEE Trans. Parallel Distributed Syst.	2009	DBLP DOI BibTeX RDF
21	Tian Song, Dongsheng Wang 0002, Zhizhong Tang	A parameterized multilevel pattern matching architecture on FPGAs for network intrusion detection and prevention.	Sci. China Ser. F Inf. Sci.	2009	DBLP DOI BibTeX RDF	network intrusion prevention, network security, pattern matching, network intrusion detection
21	Daniele Paolo Scarpazza, Gregory F. Russell	High-performance regular expression scanning on the Cell/B.E. processor.	ICS	2009	DBLP DOI BibTeX RDF	multi-core, regular expressions, cell processor
21	Miroslav Knezevic, Ingrid Verbauwhede	Hardware evaluation of the Luffa hash family.	WESS	2009	DBLP DOI BibTeX RDF	Luffa hash algorithm, SHA-3 competition, ASIC implementations
21	Haoyu Song 0001, Murali S. Kodialam, Fang Hao, T. V. Lakshman	Scalable IP Lookups using Shape Graphs.	ICNP	2009	DBLP DOI BibTeX RDF
21	Hidekazu Taoka, Ki Dai, Kenichi Higuchi, Mamoru Sawahashi	Field Experiments on MIMO Multiplexing with Peak Frequency Efficiency of 50 Bit/Second/Hz Using MLD Based Signal Detection for OFDM High-Speed Packet Access.	IEEE J. Sel. Areas Commun.	2008	DBLP DOI BibTeX RDF
21	Duo Liu, Zheng Chen, Bei Hua, Nenghai Yu, Xinan Tang	High-performance packet classification algorithm for multithreaded IXP network processor.	ACM Trans. Embed. Comput. Syst.	2008	DBLP DOI BibTeX RDF	architecture, multithreading, Network processor, packet classification, thread-level parallelism, embedded system design
21	Antonis Nikitakis, Ioannis Papaefstathiou	A Multi Gigabit FPGA-Based 5-tuple Classification System.	ICC	2008	DBLP DOI BibTeX RDF