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GrowBag graphs for keyword ? (Num. hits/coverage)
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Found 143 publication records. Showing 143 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
137 | Balachander Krishnamurthy, Craig E. Wills |
Proxy Cache Coherency and Replacement - Towards a More Complete Picture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDCS ![In: Proceedings of the 19th International Conference on Distributed Computing Systems, Austin, TX, USA, May 31 - June 4, 1999, pp. 332-339, 1999, IEEE Computer Society, 0-7695-0222-9. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
97 | Sandhya Narayan, Julee Pandya, Prasant Mohapatra, Dipak Ghosal |
Analysis of Windowing and Peering Schemes for Cache Coherency in Mobile Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NETWORKING ![In: NETWORKING 2005: Networking Technologies, Services, and Protocols; Performance of Computer and Communication Networks; Mobile and Wireless Communication Systems, 4th International IFIP-TC6 Networking Conference, Waterloo, Canada, May 2-6, 2005, Proceedings, pp. 240-251, 2005, Springer, 3-540-25809-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
89 | Yang Zeng, Santosh G. Abraham |
Partitioning regular grid applications with irregular boundaries for cache-coherent multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: Proceedings of IPPS '95, The 9th International Parallel Processing Symposium, April 25-28, 1995, Santa Barbara, California, USA, pp. 222-228, 1995, IEEE Computer Society, 0-8186-7074-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
partitioning regular grid applications, irregular boundaries, cache-coherent multiprocessors, regular grid, domain decomposition techniques, message passing multiprocessors, false coherency traffic, cache line, coalescing algorithm, domain decomposition algorithm, Indian Ocean circulation application, KSR1 multiprocessor, coherency traffic, message passing, multiprocessing systems, interprocessor communication |
85 | John A. Reisner, Tom S. Wailes |
A Cache Coherency Protocol for Optically Connected Parallel Computer Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Second International Symposium on High-Performance Computer Architecture, San Jose, CA, USA, February 3-7, 1996, pp. 222-231, 1996, IEEE Computer Society, 0-8186-7237-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
parallel processing, Cache coherency, computer simulation, wavelength division multiplexing, time division multiplexing, optical interconnection networks |
83 | Jih-Fu Tu |
Cache Management for Discrete Processor Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPA ![In: Parallel and Distributed Processing and Applications, Third International Symposium, ISPA 2005, Nanjing, China, November 2-5, 2005, Proceedings, pp. 205-215, 2005, Springer, 3-540-29769-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Discrete processor architectures, write-invalidate (WI) and cache block, multithreading, cache coherency, shared cache, memory latency |
83 | Evgeny Bolotin, Zvika Guz, Israel Cidon, Ran Ginosar, Avinoam Kolodny |
The Power of Priority: NoC Based Distributed Cache Coherency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: First International Symposium on Networks-on-Chips, NOCS 2007, 7-9 May 2007, Princeton, New Jersey, USA, Proceedings, pp. 117-126, 2007, IEEE Computer Society, 978-0-7695-2773-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
71 | Chun-Mok Chung, Jihong Kim 0001, Dohyung Kim |
Reducing snoop-energy in shared bus-based mpsocs by filtering useless broadcasts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007, pp. 126-131, 2007, ACM, 978-1-59593-605-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
broadcast filtering, low-energy cache coherency, MPSoC |
70 | Avi Mendelson, Freddy Gabbay |
The effect of seance communication on multiprocessing systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Comput. Syst. ![In: ACM Trans. Comput. Syst. 19(2), pp. 252-281, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
multicache systems, seance communication, performance analysis, cache coherency protocols |
67 | Kenin Coloma, Alok N. Choudhary, Wei-keng Liao, Lee Ward, Eric Russell, Neil Pundit |
Scalable High-level Caching for Parallel I/O. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), CD-ROM / Abstracts Proceedings, 26-30 April 2004, Santa Fe, New Mexico, USA, 2004, IEEE Computer Society, 0-7695-2132-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
63 | Gustavo Girão, Bruno Cruz de Oliveira, Rodrigo Soares, Ivan Saraiva Silva |
Cache coherency communication cost in a NoC-based MPSoC platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2007, Copacabana, Rio de Janeiro, Brazil, September 3-6, 2007, pp. 288-293, 2007, ACM, 978-1-59593-816-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
cache coherence, MPSoC, NoC, directory |
63 | Michel Dubois 0001, Faye A. Briggs |
Effects of cache coherency in multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 9th International Symposium on Computer Architecture (ISCA 1982), Austin, TX, USA, April 26-29, 1982, pp. 299-308, 1982, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1982 |
DBLP BibTeX RDF |
|
59 | KyungOh Ohn, Haengrae Cho |
Maintaining Cache Coherency for B+ Tree Indexes in a Shared Disks Cluster. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VECPAR ![In: High Performance Computing for Computational Science - VECPAR 2004, 6th International Conference, Valencia, Spain, June 28-30, 2004, Revised Selected and Invited Papers, pp. 410-423, 2004, Springer, 3-540-25424-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Cluster and Grid Computing, Data Processing, Parallel and Distributed Computing |
58 | Hai Wan, Lei Li 0022 |
Design and Implementation of Semantic Caching Coherency Control Scheme Toward Distributed Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APPT ![In: Advanced Parallel Processing Technologies, 6th International Workshop, APPT 2005, Hong Kong, China, October 27-28, 2005, Proceedings, pp. 41-51, 2005, Springer, 3-540-29639-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
56 | John P. Sustersic, Ali R. Hurson |
A Quality of Service (QoS) Implementation of Internet Cache Coherence. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AINA (1) ![In: 18th International Conference on Advanced Information Networking and Applications (AINA 2004), 29-31 March 2004, Fukuoka, Japan, pp. 41-47, 2004, IEEE Computer Society, 0-7695-2051-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
56 | Michael S. Allen, W. Kurt Lewchuk, J. D. Coddington |
A high performance bus and cache controller for PowerPC multiprocessing systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings, pp. 204-211, 1995, IEEE Computer Society, 0-8186-7165-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
high performance bus, cache controller, PowerPC 620 microprocessor, system bus interface, ECC protected, server-class systems, physical address bus, data bus, address transfer rates, address snoop response, direct cache-to-cache data transfers, 2 GByte/s, 133 MHz, 128 MB, performance evaluation, pipelining, multiprocessing systems, multiprocessing systems, pipeline processing, cache storage, microprocessor chips, coprocessors, cache coherency protocol, data transfer, PowerPC, system buses, co-processor |
55 | Andreas Nowatzyk, Gunes Aybay, Michael C. Browne, Edmund J. Kelly, Michael Parkin, Bill Radke, Sanjay Vishin |
Exploiting Parallelism in Cache Coherency Protocol Engines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par '95 Parallel Processing, First International Euro-Par Conference, Stockholm, Sweden, August 29-31, 1995, Proceedings, pp. 269-286, 1995, Springer, 3-540-60247-X. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
55 | Diana Hecht, Krishna M. Kavi, Rhonda Kay Gaede, Constantine Katsinis |
Fault-Tolerance Using Cache-Coherent Distributed Shared Memory Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPAN ![In: 1999 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '99), 23-25 June 1999, Fremantle, Australia, pp. 100-105, 1999, IEEE Computer Society, 0-7695-0231-8. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Backward recovery, Directory-Based Protocols, Checkpointing, Distributed Shared Memory, Conversations, Cache-Coherency, Recovery Blocks |
52 | Song Gao, Wee Siong Ng, Weining Qian, Aoying Zhou |
CC-Buddy: an adaptive framework for maintaining cache coherency using peers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WWW (Alternate Track Papers & Posters) ![In: Proceedings of the 13th international conference on World Wide Web - Alternate Track Papers & Posters, WWW 2004, New York, NY, USA, May 17-20, 2004, pp. 330-331, 2004, ACM, 1-58113-912-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
peer-to-peer, cache coherency, dynamic data |
52 | Amy P. Felty, Frank A. Stomp |
Cache Coherency in SCI: Specification and a Sketch of Correctness. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Formal Aspects Comput. ![In: Formal Aspects Comput. 11(5), pp. 475-497, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
SCI (Scalable Coherent Interface), Distributed systems, Formal verification, Temporal logic, Cache coherency, IEEE standard |
52 | Santosh G. Abraham, David E. Hudak |
Compile-Time Partitioning of Iterative Parallel Loops to Reduce Cache Coherency Traffic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 2(3), pp. 318-328, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
adaptive data partitioning, iterative parallel loops, cache coherency traffic, ADP, communication-reducing back end, machine-specific partitioner, multiprocessor model, programexecution factors, vector notation, global data set, arrayaccesses, underlying system architecture, cache line sizes, hexagonal partitions, parallel programming, parallel machines, program compilers, parallelizing compilers, buffer storage, interprocessor communication, interprocessor communication, communication patterns, parallelprograms |
49 | Jun Cai, Kian-Lee Tan |
Energy-efficient selective cache invalidation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Wirel. Networks ![In: Wirel. Networks 5(6), pp. 489-502, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
47 | Cosmin E. Oancea, Alan Mycroft |
A Lightweight Model for Software Thread-Level Speculation (TLS). ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), Brasov, Romania, September 15-19, 2007, pp. 419, 2007, IEEE Computer Society, 0-7695-2944-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
46 | Alexander Heinecke, Carsten Trinitis, Josef Weidendorfer |
Porting existing cache-oblivious linear algebra HPC modules to larrabee architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 7th Conference on Computing Frontiers, 2010, Bertinoro, Italy, May 17-19, 2010, pp. 91-92, 2010, ACM, 978-1-4503-0044-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
accelerator space-filling curve, openmp, matrix multiplication, cache-oblivious, lu decomposition, manycore |
44 | Jan Willem van den Brand, Marco Bekooij |
Streaming consistency: a model for efficient MPSoC design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Tenth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2007), 29-31 August 2007, Lübeck, Germany, pp. 27-34, 2007, IEEE Computer Society, 0-7695-2978-X. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
44 | Freddy Gabbay, Avi Mendelson |
Smart: An Advanced Shared-Memory Simulator - Towards a System-Level Simulation Environmen. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MASCOTS ![In: MASCOTS 1997, Proceedings of the Fifth International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems, January 12-15, 1997 Haifa, Israel, pp. 131-, 1997, IEEE Computer Society, 0-8186-7758-9. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Multi-cache simulator, Performance analysis, Cache coherency protocols |
44 | Shigeaki Iwasa, Shung Ho Shing, Hisashi Mogi, Hiroshi Nozuwe, Hiroo Hayashi, Osamu Wakamori, Takashi Ohmizo, Kuninori Tanaka, Hiroshi Sakai, Mitsuo Saito |
SSM-MP: more scalability in shared-memory multi-processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings, pp. 558-563, 1995, IEEE Computer Society, 0-8186-7165-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
SSM-MP, shared-memory multi-processor, cache refill latency, bus bottle neck problem, MTag, scalability, shared memory systems, cache coherency, memory architecture, multi-processor system |
41 | Anne Bracy, Kshitij Doshi, Quinn Jacobson |
Disintermediated Active Communication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Comput. Archit. Lett. ![In: IEEE Comput. Archit. Lett. 5(2), 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
41 | Karen A. Tomko, Santosh G. Abraham |
Data and program restructuring of irregular applications for cache-coherent multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Supercomputing ![In: Proceedings of the 8th international conference on Supercomputing, ICS 1994, Manchester, UK, July 11-15, 1994, pp. 214-225, 1994, ACM, 0-89791-665-4. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
41 | Frédéric Pétrot, Alain Greiner, Pascal Gomez |
On Cache Coherency and Memory Consistency Issues in NoC Based Shared Memory Multiprocessor SoC Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August - 1 September 2006, Dubrovnik, Croatia, pp. 53-60, 2006, IEEE Computer Society, 0-7695-2609-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
41 | Haengrae Cho |
Performance of Cache Coherency Schemes in a Shared Disks Transaction Environment . ![Search on Bibsonomy](Pics/bibsonomy.png) |
FTDCS ![In: 6th IEEE Workshop on Future Trends of Distributed Computer Systems (FTDCS '97), 29-31 October 1997, Tunis, Tunisia, Proceedings, pp. 154-161, 1997, IEEE Computer Society, 0-8186-8153-5. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
40 | Krishna M. Kavi, Wentong Li, Ali R. Hurson |
A Non-blocking Multithreaded Architecture with Support for Speculative Threads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICA3PP ![In: Algorithms and Architectures for Parallel Processing, 8th International Conference, ICA3PP 2008, Cyprus, June 9-11, 2008, Proceedings, pp. 173-184, 2008, Springer, 978-3-540-69500-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Cache Coherency, Thread Level Speculation, Multithreaded Architectures, Decoupled Architecture |
40 | Sangho Lee, KyungOh Ohn, Haengrae Cho |
Feasibility and Performance Study of a Shared Disks Cluster for Real-Time Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AIS ![In: Artificial Intelligence and Simulation, 13th International Conference on AI, Simulation, and Planning in High Autonomy Systems, AIS 2004, Jeju Island, Korea, October 4-6, 2004, Revised Selected Papers, pp. 518-527, 2004, Springer, 3-540-24476-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Performance evaluation, cluster computing, transaction processing, cache coherency, real-time processing |
40 | Stephen Lucci, Izidor Gertner, Anil Gupta, Uday Hegde |
Reflective-memory multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (1) ![In: 28th Annual Hawaii International Conference on System Sciences (HICSS-28), January 3-6, 1995, Kihei, Maui, Hawaii, USA, pp. 85-94, 1995, IEEE Computer Society, 0-8186-6945-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
reflective-memory multiprocessor, hardware-supported data replication, multiple computers, memory semantics, reflective memory implementation, Encore Infinity, spinlocks, cache coherency problems, massive replication, recovery procedure, crashed nodes, reliability, fault tolerant computing, shared memory systems, distributed memory systems, system recovery, cache storage, cached architectures, distributed shared memory multiprocessor |
37 | Vijay Nagarajan, Rajiv Gupta 0001 |
Architectural support for shadow memory in multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VEE ![In: Proceedings of the 5th International Conference on Virtual Execution Environments, VEE 2009, Washington, DC, USA, March 11-13, 2009, pp. 1-10, 2009, ACM, 978-1-60558-375-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
coupled coherence, shadow memory |
34 | Martti Forsell |
Reducing the associativity and size of step caches in CRCW operation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Arun S. Nair, Aboli Vijayan Pai, Biju K. Raveendran, Geeta Patil |
MOESIL: A Cache Coherency Protocol for Locked Mixed Criticality L1 Data Cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DS-RT ![In: 25th IEEE/ACM International Symposium on Distributed Simulation and Real Time Applications, DS-RT 2021, Valencia, Spain, September 27-29, 2021, pp. 1-8, 2021, IEEE, 978-1-6654-3326-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
33 | Daniel Hackenberg, Daniel Molka, Wolfgang E. Nagel |
Comparing cache architectures and coherency protocols on x86-64 multicore SMP systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), December 12-16, 2009, New York, New York, USA, pp. 413-422, 2009, ACM, 978-1-60558-798-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Nehalem, Shanghai, benchmark, multi-core, coherency |
33 | Rajdeep Bhowmik, Chaitali Gupta, Madhusudhan Govindaraju, Aneesh Aggarwal |
Optimizing XML processing for grid applications using an emulation framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 22nd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, Miami, Florida USA, April 14-18, 2008, pp. 1-11, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
30 | Mikhail Mikhailov, Craig E. Wills |
Evaluating a new approach to strong web cache consistency with snapshots of collected content. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WWW ![In: Proceedings of the Twelfth International World Wide Web Conference, WWW 2003, Budapest, Hungary, May 20-24, 2003, pp. 599-608, 2003, ACM, 1-58113-680-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
change characteristics, collected content, object relationships, server invalidation, web caching, cache consistency, object composition |
30 | Andreas Apostolakis, Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis |
Functional Self-Testing for Bus-Based Symmetric Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 1304-1309, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Chinnakrishnan S. Ballapuram, Ahmad Sharif, Hsien-Hsin S. Lee |
Exploiting access semantics and program behavior to reduce snoop power in chip multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: Proceedings of the 13th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2008, Seattle, WA, USA, March 1-5, 2008, pp. 60-69, 2008, ACM, 978-1-59593-958-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
MESI protocol, internal and external snoops, self-modifying code, chip multiprocessors |
26 | Anant Agarwal, David A. Kranz, Rajeev Barua, Venkat Natarajan |
Optimal Tiling for Minimizing Communication in Distributed Shared-Memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Compiler Optimizations for Scalable Parallel Systems Languages ![In: Compiler Optimizations for Scalable Parallel Systems Languages, Compilation Techniques, and Run Time Systems, pp. 285-338, 2001, Springer, 3-540-41945-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
26 | Hiroaki Fujii, Yoshiko Yasuda, Hideya Akashi, Yasuhiro Inagami, Makoto Koga, Osamu Ishihara, Masamori Kashiyama, Hideo Wada, Tsutomu Sumimoto |
Architecture and Performance of the Hitachi SR2201 Massively Parallel Processor System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: 11th International Parallel Processing Symposium (IPPS '97), 1-5 April 1997, Geneva, Switzerland, Proceedings, pp. 233-241, 1997, IEEE Computer Society, 0-8186-7792-9. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
26 | Koen Langendoen, Henk L. Muller, Louis O. Hertzberger |
Evaluation of Futurebus Hierarchical Caching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARLE (1) ![In: PARLE '91: Parallel Architectures and Languages Europe, Volume I: Parallel Architectures and Algorithms, Eindhoven, The Netherlands, June 10-13, 1991, Proceedings, pp. 52-68, 1991, Springer, 3-540-54151-9. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
26 | Abishek Ramdas, Michael Giardino, Runbin Shi, Adam Turowski, David A. Cock, Gustavo Alonso, Timothy Roscoe |
ECI: a Customizable Cache Coherency Stack for Hybrid FPGA-CPU Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2208.07124, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
26 | Arthur Vianès, Frédéric Pétrot, Frédéric Rousseau 0001 |
A Case for Second-Level Software Cache Coherency on Many-Core Accelerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RSP ![In: IEEE International Workshop on Rapid System Prototyping, RSP 2022, Shanghai, China, October 13, 2022, pp. 29-35, 2022, IEEE, 979-8-3503-9851-9. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
26 | Seungwon Min, Sitao Huang, Mohamed El-Hadedy 0001, Jinjun Xiong, Deming Chen, Wen-Mei Hwu |
Analysis and Optimization of I/O Cache Coherency Strategies for SoC-FPGA Device. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1908.01261, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
|
26 | Seungwon Min, Sitao Huang, Mohamed El-Hadedy 0001, Jinjun Xiong, Deming Chen, Wen-Mei Hwu |
Analysis and Optimization of I/O Cache Coherency Strategies for SoC-FPGA Device. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 29th International Conference on Field Programmable Logic and Applications, FPL 2019, Barcelona, Spain, September 8-12, 2019, pp. 301-306, 2019, IEEE, 978-1-7281-4884-7. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
26 | Jussara Marandola, Stéphane Louise, Loïc Cudennec |
Pattern Based Cache Coherency Architecture for Embedded Manycores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCS ![In: Graph-Based Representation and Reasoning - 22nd International Conference on Conceptual Structures, ICCS 2016, Annecy, France, July 5-7, 2016, Proceedings, pp. 1542-1553, 2016, Springer, 978-3-319-40984-9. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
26 | Paolo Grani, Robert Hendry, Sandro Bartolini, Keren Bergman |
Boosting multi-socket cache-coherency with low-latency silicon photonic interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICNC ![In: International Conference on Computing, Networking and Communications, ICNC 2015, Garden Grove, CA, USA, February 16-19, 2015, pp. 830-836, 2015, IEEE Computer Society, 978-1-4799-6959-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
26 | Julio Pérez Acle, Riccardo Cantoro, Ernesto Sánchez 0001, Matteo Sonza Reorda |
On the functional test of the cache coherency logic in multi-core systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LASCAS ![In: IEEE 6th Latin American Symposium on Circuits & Systems, LASCAS 2015, Montevideo, Uruguay, February 24-27, 2015, pp. 1-4, 2015, IEEE, 978-1-4799-8332-2. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
26 | José L. Abellán, Alberto Ros 0001, Juan Fernández Peinador, Manuel E. Acacio |
ECONO: Express coherence notifications for efficient cache coherency in many-core CMPs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSAMOS ![In: 2013 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2013, Agios Konstantinos, Samos Island, Greece, July 15-18, 2013, pp. 237-244, 2013, IEEE. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
26 | Omar Hammami, Xinyu Li |
NOC based MPSOC directory based cache coherency with OCP-IP protocol. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IDT ![In: 8th International Design and Test Symposium, IDT 2013, Marrakesh, Morocco, 16-18 December, 2013, pp. 1-3, 2013, IEEE. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
26 | José L. Abellán, Alberto Ros 0001, Juan Fernández 0001, Manuel E. Acacio |
Efficient Dir0B Cache Coherency for Many-Core CMPs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCS ![In: Conceptual Structures for STEM Research and Education, 20th International Conference on Conceptual Structures, ICCS 2013, Mumbai, India, January 10-12, 2013. Proceedings, pp. 2545-2548, 2013, Springer, 978-3-642-35785-5. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
26 | John Shield, Jean-Philippe Diguet, Guy Gogniat |
Asymmetric Cache Coherency: Policy Modifications to Improve Multicore Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 5(3), pp. 12:1-12:12, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
26 | Freek Verbeek, Julien Schmaltz |
Towards the formal verification of cache coherency at the architectural level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 17(3), pp. 20:1-20:16, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
26 | John Shield, Jean-Philippe Diguet, Guy Gogniat |
Asymmetric cache coherency: Improving multicore performance for non-uniform workloads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReCoSoC ![In: Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2011, Montpellier, France, 20-22 June, 2011, pp. 1-8, 2011, IEEE, 978-1-4577-0640-0. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
26 | Hajer Chtioui |
Gestion de la cohérence des données dans les systèmes multiprocesseurs sur puce. (Managing cache coherency of shared data in shared memory multiprocessor systems-on-chip). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2011 |
RDF |
|
26 | Daniel Molka, Daniel Hackenberg, Robert Schöne, Matthias S. Müller |
Memory Performance and Cache Coherency Effects on an Intel Nehalem Multiprocessor System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: PACT 2009, Proceedings of the 18th International Conference on Parallel Architectures and Compilation Techniques, 12-16 September 2009, Raleigh, North Carolina, USA, pp. 261-270, 2009, IEEE Computer Society, 978-0-7695-3771-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
26 | Hajer Chtioui, Rabie Ben Atitallah, Smaïl Niar, Jean-Luc Dekeyser, Mohamed Abid |
A Dynamic Hybrid Cache Coherency Protocol for Shared-Memory MPSoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2009, 27-29 August 2009, Patras, Greece, pp. 3-10, 2009, IEEE Computer Society, 978-0-7695-3782-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
26 | Alberto Ros 0001, Manuel E. Acacio, José M. García 0001 |
DiCo-CMP: Efficient cache coherency in tiled CMP architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 22nd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, Miami, Florida USA, April 14-18, 2008, pp. 1-11, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Hui Wang, Sandeep Baldawa, Rama Sangireddy |
Dynamic Error Detection for Dependable Cache Coherency in Multicore Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India, pp. 279-285, 2008, IEEE Computer Society, 0-7695-3083-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
26 | Robert Kunz, Mark Horowitz |
The case for simple, visible cache coherency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSPC ![In: Proceedings of the 2008 ACM SIGPLAN workshop on Memory Systems Performance and Correctness: held in conjunction with the Thirteenth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS '08), Seattle, Washington, USA, March 2, 2008, pp. 31-35, 2008, ACM, 978-1-60558-049-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
SpecOMP2001, shared-memory multiprocessor, FLASH, coherence protocol, cc-NUMA, software optimization, performance bottlenecks |
26 | Austin Hung, William D. Bishop, Andrew A. Kennings |
Enabling Cache Coherency for N-Way SMP Systems on Programmable Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ERSA ![In: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'04, June 21-24, 2004, Las Vegas, Nevada, USA, pp. 312, 2004, CSREA Press, 1-932415-42-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP BibTeX RDF |
|
26 | José Aguilar 0001, Ernst L. Leiss |
A General Adaptive Cache Coherency-Replacement Scheme for Distributed Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IICS ![In: Innovative Internet Computing Systems, International Workshop IICS 2001, Ilmenau, Germany, June 21-22, 2001, Proceedings, pp. 116-125, 2001, Springer, 3-540-42275-7. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
26 | José Aguilar 0001, Ernst L. Leiss |
A Web Proxy Cache Coherency and Replacement Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Web Intelligence ![In: Web Intelligence: Research and Development, First Asia-Pacific Conference, WI 2001, Maebashi City, Japan, October 23-26, 2001, Proceedings, pp. 75-84, 2001, Springer, 3-540-42730-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
26 | Adam Belloum, Bob Hertzberger |
Maintaining Web cache coherency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Inf. Res. ![In: Inf. Res. 6(1), 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP BibTeX RDF |
|
26 | Freddy Gabbay, Avi Mendelson |
The "Smart" simulation environment - A tool-set to develop new cache coherency protocols. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Syst. Archit. ![In: J. Syst. Archit. 45(8), pp. 619-632, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
26 | Jianliang Xu, Xueyan Tang, Dik Lun Lee, Qinglong Hu |
Cache Coherency in Location-Dependent Information Services for Mobile Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MDA ![In: Mobile Data Access, First International Conference, MDA'99, Hong Kong, China, December 16-17, 1999, Proceedings, pp. 182-193, 1999, Springer, 3-540-66878-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
26 | Balachander Krishnamurthy, Craig E. Wills |
Piggyback Server Invalidation for Proxy Cache Coherency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Networks ![In: Comput. Networks 30(1-7), pp. 185-193, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
26 | Haengrae Cho, Jang-Suk Park |
Maintaining cache coherency in a multisystem data sharing environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Syst. Archit. ![In: J. Syst. Archit. 45(4), pp. 285-303, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
26 | Hakim Kahlouche, César Viho, Massimo Zendri |
An Industrial Experiment in Automatic Generation of Executable Test Suites for a Cache Coherency Protocol. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWTCS ![In: Testing of Communicating Systems, IFIP TC6 11th International Workshop on Testing Communicating Systems (IWTCS), August 31 - September 2, 1998, Tomsk, Russia, pp. 211-226, 1998, Kluwer, 0-412-84430-3. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP BibTeX RDF |
|
26 | Fernando de Ferreira Rezende, Victoria Hall |
A Cache Coherency Strategy for a Client/Server KBMS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Datenbank Rundbr. ![In: Datenbank Rundbr. 19, pp. 63-64, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP BibTeX RDF |
|
26 | Jun Cai, Kian-Lee Tan, Beng Chin Ooi |
On Incremental Cache Coherency Schemes in Mobile Computing Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDE ![In: Proceedings of the Thirteenth International Conference on Data Engineering, April 7-11, 1997, Birmingham, UK, pp. 114-123, 1997, IEEE Computer Society, 0-8186-7807-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
26 | Andreas Listl, Giannis Bozas |
Performance Gains Using Subpages for Cache Coherency Control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DEXA Workshops ![In: Eighth International Workshop on Database and Expert Systems Applications, DEXA '97, Toulouse, France, September 1-2, 1997, Proceedings., pp. 754-760, 1997, IEEE Computer Society, 0-8186-8147-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
26 | Craig Anderson 0001, Anna R. Karlin |
Two Adaptive Hybrid Cache Coherency Protocols. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Second International Symposium on High-Performance Computer Architecture, San Jose, CA, USA, February 3-7, 1996, pp. 303-313, 1996, IEEE Computer Society, 0-8186-7237-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
26 | Boris Klots |
Cache Coherency in Oracle Parallel Server. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLDB ![In: VLDB'96, Proceedings of 22th International Conference on Very Large Data Bases, September 3-6, 1996, Mumbai (Bombay), India, pp. 583, 1996, Morgan Kaufmann, 1-55860-382-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP BibTeX RDF |
|
26 | John C. Chu, Kwan AuYeung, Patrick W. Dowd |
Interaction Of Cache Coherency And Media Access Protocols In The Optically Interconnected Distributed Memory Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Annual Simulation Symposium ![In: Proceedings 26th Annual Simulation Symposium, ANSS 1993, Arlington, Virginia, USA, March 29 - April 1, 1993, pp. 95-104, 1993, IEEE, 0-8186-3620-3. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
26 | Alan L. Cox, Robert J. Fowler |
Adaptive Cache Coherency for Detecting Migratory Shared Data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 20th Annual International Symposium on Computer Architecture, San Diego, CA, USA, May 1993, pp. 98-108, 1993, ACM, 0-8186-3810-9. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
26 | Jen-Tien Yen, Behrooz A. Shirazi, Krishna M. Kavi |
A New Cache Coherency and Address Translation Consistency Protocol. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP (1) ![In: Proceedings of the 1992 International Conference on Parallel Processing, University of Michigan, An Arbor, Michigan, USA, August 17-21, 1992. Volume I: Architecture., pp. 18-21, 1992, CRC Press, 0-8493-0781-3. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP BibTeX RDF |
|
26 | Wisam Michael |
Directory-based cache coherency protocol for a ring-connected multiprocessor-array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 19th Annual International Symposium on Computer Architecture. Gold Coast, Australia, May 1992, pp. 437, 1992, ACM, 0-89791-509-7. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
26 | Jack E. Veenstra, Robert J. Fowler |
A Performance Evaluation of Optimal Hybrid Cache Coherency Protocols. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: ASPLOS-V Proceedings - Fifth International Conference on Architectural Support for Programming Languages and Operating Systems, Boston, Massachusetts, USA, October 12-15, 1992., pp. 149-160, 1992, ACM Press, 0-89791-534-8. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
26 | Norman S. Matloff |
An argument against scalable cache coherency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGARCH Comput. Archit. News ![In: SIGARCH Comput. Archit. News 19(4), pp. 117-123, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
26 | Susan J. Eggers |
Simplicity Versus Accuracy in a Model of Cache Coherency Overhead. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 40(8), pp. 893-906, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
26 | Gautam Dewan, Prasenjit Biswas |
A snooping cache coherency protocol for hierarchically organized multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocessing and Microprogramming ![In: Microprocessing and Microprogramming 31(1-5), pp. 105-111, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
26 | Kanad Ghose, Sreenivas Simhadri |
A Cache Coherency Mechanism with Limited Combining Capabilities for MIN-Based Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP (1) ![In: Proceedings of the International Conference on Parallel Processing, ICPP '91, Austin, Texas, USA, August 1991. Volume I: Architecture/Hardware., pp. 296-300, 1991, CRC Press. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP BibTeX RDF |
|
26 | Bett Koch, Tracy Schunke, Alan Dearle, Francis Vaughan, Chris D. Marlin, Ruth Fazakerley, Chris J. Barter |
Cache Coherency and Storage Management in a Persistent Object System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
POS ![In: Implementing Persistent Object Bases, Principles and Practice, Proceedings of the Fourth International Workshop on Persistent Objects, 23-27 September 1990, Martha's Vineyard, MA, USA, pp. 103-113, 1990, Morgan Kaufmann, 1-55860-168-6. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP BibTeX RDF |
|
26 | Susan J. Eggers, Randy H. Katz |
Evaluating the Performance of Four Snooping Cache Coherency Protocols. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 16th Annual International Symposium on Computer Architecture. Jerusalem, Israel, June 1989, pp. 2-15, 1989, ACM, 0-89791-319-1. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
26 | Michel Dubois 0001, Faye A. Briggs |
Effects of Cache Coherency in Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 31(11), pp. 1083-1099, 1982. The full citation details ...](Pics/full.jpeg) |
1982 |
DBLP DOI BibTeX RDF |
|
26 | Li Zhang 0034, Chris R. Jesshope |
On-Chip COMA Cache-Coherence Protocol for Microgrids of Microthreaded Cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par Workshops ![In: Euro-Par 2007 Workshops: Parallel Processing, HPPC 2007, UNICORE Summit 2007, and VHPC 2007, Rennes, France, August 28-31, 2007, Revised Selected Papers, pp. 38-48, 2007, Springer, 978-3-540-78472-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
26 | Victor Melamed, Harry Stuimer, David Wilkins, Lawrence Chang, Kevin Normoyle, Sutikshan Bhutani |
Innovative Verification Techniques Used in the Implementation of a Third-Generation 1.1GHz 64b Microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FORTE ![In: Formal Techniques for Networked and Distributed Systems - FORTE 2002, 22nd IFIP WG 6.1 International Conference Houston, Texas, USA, November 11-14, 2002, Proceedings, pp. 360-363, 2002, Springer, 3-540-00141-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
26 | Paul J. Roy, David B. Noveck, W. J. Bryant |
State Management in a Distributed UNIX System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (1) ![In: 29th Annual Hawaii International Conference on System Sciences (HICSS-29), January 3-6, 1996, Maui, Hawaii, USA, pp. 170-180, 1996, IEEE Computer Society, 0-8186-7324-9. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
26 | Ásgeir Th. Eiríksson, Kenneth L. McMillan |
Using Formal Verification/Analysis Methods on the Critical Path in System Design: A Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 7th International Conference, Liège, Belgium, July, 3-5, 1995, Proceedings, pp. 367-380, 1995, Springer, 3-540-60045-0. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
26 | Paul E. West, Yuval Peress, Gary S. Tyson, Sally A. McKee |
Core monitors: monitoring performance in multicore processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 6th Conference on Computing Frontiers, 2009, Ischia, Italy, May 18-20, 2009, pp. 31-40, 2009, ACM, 978-1-60558-413-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
scheduling, debugging, profiling, multicore, cache coherency, performance monitoring, realtime |
26 | Stéphane Zuckerman, Marc Pérache, William Jalby |
Fine Tuning Matrix Multiplications on Multicore. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2008, 15th International Conference, Bangalore, India, December 17-20, 2008. Proceedings, pp. 30-41, 2008, Springer, 978-3-540-89893-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
multicore, cache coherency, BLAS |
26 | John R. Feehrer, Paul Rotker, Milton Shih, Paul Gingras, Peter Yakutis, Stephen Phillips, John Heath, Sebastian Turullols |
Coherency Hub Design for Multi-Node Victoria Falls Server Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Hot Interconnects ![In: 16th Annual IEEE Symposium on High Performance Interconnects (HOTI 2008), 26-28 August 2008, Stanford, CA, USA, pp. 43-50, 2008, IEEE Computer Society, 978-0-7695-3380-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
multi-threaded processor cores, multi-node CMT systems, serial interconnects, packet switching, cache coherency |
26 | Razvan Cheveresan, Matthew Ramsay, Chris Feucht, Ilya Sharapov |
Characteristics of workloads used in high performance and technical computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 21th Annual International Conference on Supercomputing, ICS 2007, Seattle, Washington, USA, June 17-21, 2007, pp. 73-82, 2007, ACM, 978-1-59593-768-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
instruction decomposition, cache coherency, workload characterization, HPC, data locality, software prefetch |
26 | KyungOh Ohn, Haengrae Cho |
Dynamic Affinity Cluster Allocation in a Shared Disks Cluster. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 37(1), pp. 47-69, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
transaction routing, affinity clustering, load balancing, cluster computing, transaction processing, cache coherency, shared disks |
26 | Gerrit Saylor, Badriddine Khessib |
Large scale Itanium® 2 processor OLTP workload characterization and optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DaMoN ![In: Workshop on Data Management on New Hardware, DaMoN 2006, Chicago, Illinois, USA, June 25, 2006, pp. 3, 2006, ACM, 1-59593-466-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
cache coherency, data partitioning, performance characterization, profile guided optimization, OLTP, software optimization, Itanium, ccNUMA |
26 | Roger Espasa, Federico Ardanaz, Julio Gago, Roger Gramunt, Isaac Hernandez, Toni Juan, Joel S. Emer, Stephen Felix, P. Geoffrey Lowney, Matthew Mattina, André Seznec |
Tarantula: A Vector Extension to the Alpha Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 29th International Symposium on Computer Architecture (ISCA 2002), 25-29 May 2002, Anchorage, AK, USA, pp. 281-292, 2002, IEEE Computer Society, 0-7695-1605-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Power, Microprocessor, Bandwidth, High Performance, Cache Coherency, Virtual Memory, Instruction Set Architecture, Vector Processor |
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