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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 49 occurrences of 47 keywords
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Results
Found 58 publication records. Showing 58 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
35 | Angshuman Parashar, Sudhanva Gurumurthi, Anand Sivasubramaniam |
A Complexity-Effective Approach to ALU Bandwidth Enhancement for Instruction-Level Temporal Redundancy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 31st International Symposium on Computer Architecture (ISCA 2004), 19-23 June 2004, Munich, Germany, pp. 376-386, 2004, IEEE Computer Society, 0-7695-2143-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Complexity-effective design, Temporal Redundancy, Instruction Reuse |
30 | Carmelo Acosta, Ayose Falcón, Alex Ramírez, Mateo Valero |
A Complexity-Effective Simultaneous Multithreading Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 34th International Conference on Parallel Processing (ICPP 2005), 14-17 June 2005, Oslo, Norway, pp. 157-164, 2005, IEEE Computer Society, 0-7695-2380-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Complexity-Effective, Heterogeneity-Awareness, Mapping Policies, Clustering, CMP, SMT |
20 | Oliverio J. Santana, Ayose Falcón, Alex Ramírez, Mateo Valero |
Branch predictor guided instruction decoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: 15th International Conference on Parallel Architectures and Compilation Techniques (PACT 2006), Seattle, Washington, USA, September 16-20, 2006, pp. 202-211, 2006, ACM, 1-59593-264-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
complexity-effective, instruction decoding, branch predictor |
20 | Rajesh Vivekanandham, Bharadwaj S. Amrutur, R. Govindarajan |
A scalable low power issue queue for large instruction window processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 20th Annual International Conference on Supercomputing, ICS 2006, Cairns, Queensland, Australia, June 28 - July 01, 2006, pp. 167-176, 2006, ACM, 1-59593-282-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
complexity-effective architecture, wakeup logic, low-power architecture, issue logic |
20 | Ravi Bhargava, Lizy Kurian John |
Latency and energy aware value prediction for high-frequency processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 16th international conference on Supercomputing, ICS 2002, New York City, NY, USA, June 22-26, 2002, pp. 45-56, 2002, ACM, 1-58113-483-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
complexity-effective design, trace cache processors, low power, data speculation |
20 | Dan Ernst, Todd M. Austin |
Efficient Dynamic Scheduling Through Tag Elimination. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 29th International Symposium on Computer Architecture (ISCA 2002), 25-29 May 2002, Anchorage, AK, USA, pp. 37-46, 2002, IEEE Computer Society, 0-7695-1605-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
complexity-effective architecture, last-tag prediction, dynamic scheduling, low-power architecture |
20 | Ramon Canal, Antonio González 0001 |
Reducing the complexity of the issue logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 15th international conference on Supercomputing, ICS 2001, Sorrento, Napoli, Italy, June 16-21, 2001, pp. 312-320, 2001, ACM, 1-58113-410-X. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
complexity-effective design, instruction issue logic, wide-issue superscalar, out-of-order issue |
15 | Yu-Ting Kuo, Tay-Jyi Lin, Wei-Han Chang, Yueh-Tai Li, Chih-Wei Liu, Shuenn-Tsong Young |
Complexity-effective auditory compensation for digital hearing aids. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 1472-1475, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
15 | Michael Sung, Ronny Krashinsky, Krste Asanovic |
Multithreading decoupled architectures for complexity-effective general purpose computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGARCH Comput. Archit. News ![In: SIGARCH Comput. Archit. News 29(5), pp. 56-61, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
13 | George L. Yuan, Ali Bakhoda, Tor M. Aamodt |
Complexity effective memory access scheduling for many-core accelerator architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), December 12-16, 2009, New York, New York, USA, pp. 34-44, 2009, ACM, 978-1-60558-798-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
graphics processors, on-chip interconnection networks, memory controller |
10 | Kirandeep Chahal, Tillal Eldabi |
Applicability of hybrid simulation to different modes of governance in UK healthcare. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WSC ![In: Proceedings of the 2008 Winter Simulation Conference, Global Gateway to Discovery, WSC 2008, InterContinental Hotel, Miami, Florida, USA, December 7-10, 2008, pp. 1469-1477, 2008, WSC, 978-1-4244-2708-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
10 | Tongwei Zhang, Guangjie Han, Lei Yan, Yan Peng 0001 |
Low-Complexity Effective Sound Velocity Algorithm for Acoustic Ranging of Small Underwater Mobile Vehicles in Deep-Sea Internet of Underwater Things. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Internet Things J. ![In: IEEE Internet Things J. 10(1), pp. 563-574, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
10 | Reoma Matsuo, Toru Koizumi 0001, Hidetsugu Irie, Shuichi Sakai, Ryota Shioya |
TURBULENCE: Complexity-effective Out-of-order Execution on GPU with Distance-based ISA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2023, Antwerp, Belgium, April 17-19, 2023, pp. 1-2, 2023, IEEE, 978-3-9819263-7-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
10 | Amund Bergland Kvalsvik, Pavlos Aimoniotis, Stefanos Kaxiras, Magnus Själander |
Doppelganger Loads: A Safe, Complexity-Effective Optimization for Secure Speculation Schemes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 50th Annual International Symposium on Computer Architecture, ISCA 2023, Orlando, FL, USA, June 17-21, 2023, pp. 53:1-53:13, 2023, ACM. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
10 | Young-Hwan You, Yong-An Jung, Sung-Chan Choi, Intae Hwang |
Complexity-Effective Sequential Detection of Synchronization Signal for Cellular Narrowband IoT Communication Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Internet Things J. ![In: IEEE Internet Things J. 8(4), pp. 2900-2909, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
10 | Young-Hwan You, Jong-Hong Park, Il-Yeup Ahn |
Complexity Effective Sequential Detection of Secondary Synchronization Signal for 5G New Radio Communication Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Syst. J. ![In: IEEE Syst. J. 15(3), pp. 3382-3390, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
10 | Yong-An Jung, Young-Hwan You |
Complexity Effective Sampling Frequency Offset Estimation Method for OFDM-Based HomePlug Green PHY Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Symmetry ![In: Symmetry 10(11), pp. 544, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
10 | Mingxing Tan, Gai Liu, Ritchie Zhao, Steve Dai, Zhiru Zhang |
ElasticFlow: A Complexity-Effective Approach for Pipelining Irregular Loop Nests. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2015, Austin, TX, USA, November 2-6, 2015, pp. 78-85, 2015, IEEE, 978-1-4673-8389-9. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
10 | Mohammad Khavari Tavana, Divya Pathak, Mohammad Hossein Hajkazemi, Maria Malik, Ioannis Savidis, Houman Homayoun |
Realizing complexity-effective on-chip power delivery for many-core platforms by exploiting optimized mapping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 33rd IEEE International Conference on Computer Design, ICCD 2015, New York City, NY, USA, October 18-21, 2015, pp. 581-588, 2015, IEEE Computer Society, 978-1-4673-7166-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
10 | Seung-Hun Kim, Dongmin Choi, Won Woo Ro, Jean-Luc Gaudiot |
Complexity-Effective Contention Management with Dynamic Backoff for Transactional Memory Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 63(7), pp. 1696-1708, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
10 | Won-Jae Shin, Hyun Yang, Seongjoo Lee, Young-Hwan You |
Complexity Effective Integer Frequency Offset and Sector Cell Detection Scheme for LTE Downlink System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Wirel. Pers. Commun. ![In: Wirel. Pers. Commun. 75(4), pp. 2371-2381, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
10 | Kuo-Chiang Chang, Ching-Hao Lin, Chih-Wei Liu |
Complexity-effective implementation of programmable FIR filters using simplified canonic signed digit multiplier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-DAT ![In: Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2014, Hsinchu, Taiwan, April 28-30, 2014, pp. 1-4, 2014, IEEE. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
10 | Zichao Xie, Dong Tong 0001, Mingkai Huang, Qinqing Shi, Xu Cheng 0001 |
SWIP Prediction: Complexity-Effective Indirect-Branch Prediction Using Pointers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. Technol. ![In: J. Comput. Sci. Technol. 27(4), pp. 754-768, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
10 | Alberto Ros 0001, Stefanos Kaxiras |
Complexity-effective multicore coherence. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: International Conference on Parallel Architectures and Compilation Techniques, PACT '12, Minneapolis, MN, USA - September 19 - 23, 2012, pp. 241-252, 2012, ACM, 978-1-4503-1182-3. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
10 | Shyang-Chyun Chen, Chao-Chuan Chen, Wen-Chi Guo, Tay-Jyi Lin, Ching-Wei Yeh |
Complexity-effective Hilbert-Huang transform (HHT) IP for embedded real-time applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 17th Asia and South Pacific Design Automation Conference, ASP-DAC 2012, Sydney, Australia, January 30 - February 2, 2012, pp. 473-474, 2012, IEEE, 978-1-4673-0770-3. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
10 | Ya-Ting Chang, Kuo-Chiang Chang, Yu-Ting Kuo, Chih-Wei Liu |
Complexity-effective auditory compensation with a controllable filter for digital hearing aids. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 17th Asia and South Pacific Design Automation Conference, ASP-DAC 2012, Sydney, Australia, January 30 - February 2, 2012, pp. 557-558, 2012, IEEE, 978-1-4673-0770-3. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
10 | Cesare Ferri, Samantha Wood, Tali Moreshet, R. Iris Bahar, Maurice Herlihy |
Embedded-TM: Energy and complexity-effective hardware transactional memory for embedded multicore systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Parallel Distributed Comput. ![In: J. Parallel Distributed Comput. 70(10), pp. 1042-1052, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
10 | Görkem Asilioglu, Emine Merve Kaya, Oguz Ergin |
Complexity-Effective Rename Table Design for Rapid Speculation Recovery. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARCS ![In: Architecture of Computing Systems - ARCS 2010, 23rd International Conference, Hannover, Germany, February 22-25, 2010. Proceedings, pp. 15-24, 2010, Springer, 978-3-642-11949-1. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
10 | Kuo-Chiang Chang, Yu-Ting Kuo, Tay-Jyi Lin, Chih-Wei Liu |
Complexity-effective dynamic range compression for digital hearing aids. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France, pp. 2378-2381, 2010, IEEE, 978-1-4244-5308-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
10 | Aneesh Aggarwal |
Complexity Effective Bypass Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Trans. High Perform. Embed. Archit. Compil. ![In: Transactions on High-Performance Embedded Architectures and Compilers II, pp. 201-221, 2009, Springer, 978-3-642-00903-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
10 | Salvador Petit Marti, Julio Sahuquillo Borrás, Pedro Juan López Rodríguez, Rafael Ubal Tena, José Duato Marín |
A Complexity-Effective Out-of-Order Retirement Microarchitecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 58(12), pp. 1626-1639, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
10 | Oliverio J. Santana, Ayose Falcón, Alex Ramírez, Mateo Valero |
DIA: A Complexity-Effective Decoding Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 58(4), pp. 448-462, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
10 | Won Woo Ro, Jean-Luc Gaudiot |
A complexity-effective microprocessor design with decoupled dispatch queues and prefetching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Parallel Comput. ![In: Parallel Comput. 35(5), pp. 255-268, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
10 | Tay-Jyi Lin, Shin-Kai Chen, Yu-Ting Kuo, Chih-Wei Liu, Pi-Chen Hsiao |
Design and Implementation of a High-Performance and Complexity-Effective VLIW DSP for Multimedia Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 51(3), pp. 209-223, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
register organization, VLIW, digital signal processor, micro-architecture, instruction encoding |
10 | Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, Ken Mai |
A complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, FPGA 2008, Monterey, California, USA, February 24-26, 2008, pp. 77-86, 2008, ACM, 978-1-59593-934-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
simulator, FPGA, prototype, multiprocessor, multicore, emulator |
10 | Ian Michael Caulfield |
Complexity-effective superscalar embedded processors using instruction-level distributed processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2007 |
RDF |
|
10 | Olivier Rochecouste, Gilles Pokam, André Seznec |
A case for a complexity-effective, width-partitioned microarchitecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 3(3), pp. 295-326, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Power analysis |
10 | Jared C. Smolens, Brian T. Gold, Babak Falsafi, James C. Hoe |
Reunion: Complexity-Effective Multicore Redundancy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 9-13 December 2006, Orlando, Florida, USA, pp. 223-234, 2006, IEEE Computer Society, 0-7695-2732-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
10 | Jessica H. Tseng |
Banked microarchitectures for complexity-effective superscalar microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2006 |
RDF |
|
10 | Gurhan Kucuk, Dmitry Ponomarev 0001, Oguz Ergin, Kanad Ghose |
Complexity-Effective Reorder Buffer Designs for Superscalar Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 53(6), pp. 653-665, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
10 | Chi F. Chen, Se-Hyun Yang, Babak Falsafi, Andreas Moshovos |
Accurate and Complexity-Effective Spatial Pattern Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 10th International Conference on High-Performance Computer Architecture (HPCA-10 2004), 14-18 February 2004, Madrid, Spain, pp. 276-287, 2004, IEEE Computer Society, 0-7695-2053-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
10 | Pradeep Rao, S. K. Nandy 0001, M. N. V. Satya Kiran |
Simultaneous MultiStreaming for Complexity-Effective VLIW Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 8th Asia-Pacific Conference, ACSAC 2003, Aizu-Wakamatsu, Japan, September 23-26, 2003, Proceedings, pp. 166-179, 2003, Springer, 3-540-20122-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
10 | M. N. V. Satya Kiran, M. N. Jayram, Pradeep Rao, S. K. Nandy 0001 |
A complexity effective communication model for behavioral modeling of signal processing applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 412-415, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
10 | André Seznec, Eric Toullec, Olivier Rochecouste |
Register write specialization register read specialization: a path to complexity-effective wide-issue superscalar processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 35th Annual International Symposium on Microarchitecture, Istanbul, Turkey, November 18-22, 2002, pp. 383-394, 2002, ACM/IEEE Computer Society, 0-7695-1859-1. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
10 | Subbarao Palacharla, Norman P. Jouppi, James E. Smith 0001 |
Complexity-Effective Superscalar Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 24th International Symposium on Computer Architecture, Denver, Colorado, USA, June 2-4, 1997, pp. 206-218, 1997, ACM, 0-89791-901-7. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
7 | Rajeev Balasubramonian |
Cluster prefetch: tolerating on-chip wire delays in clustered microarchitectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 18th Annual International Conference on Supercomputing, ICS 2004, Saint Malo, France, June 26 - July 01, 2004, pp. 326-335, 2004, ACM, 1-58113-839-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
communication-bound processors, effective address and memory dependence prediction, processor, data prefetch, distributed caches, clustered microarchitectures |
6 | Yi Ma, Hongliang Gao, Martin Dimitrov, Huiyang Zhou |
Optimizing Dual-Core Execution for Power Efficiency and Transient-Fault Recovery. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 18(8), pp. 1080-1093, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Multiple data stream architectures, fault tolerance, low-power design |
4 | Pedro Chaparro, José González 0002, Grigorios Magklis, Qiong Cai, Antonio González 0001 |
Understanding the Thermal Implications of Multi-Core Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 18(8), pp. 1055-1065, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Activity Migration, Dynamic Voltage, Multi-Core Architectures, Frequency Scaling, Dynamic Thermal Management |
4 | María Jesús Garzarán, Milos Prvulovic, José María Llabería, Víctor Viñals, Lawrence Rauchwerger, Josep Torrellas |
Tradeoffs in buffering speculative memory state for thread-level speculation in multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 2(3), pp. 247-279, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Caching and buffering support, memory hierarchies, shared-memory multiprocessors, thread-level speculation, coherence protocol |
4 | María Jesús Garzarán, Milos Prvulovic, José María Llabería, Víctor Viñals, Lawrence Rauchwerger, Josep Torrellas |
Tradeoffs in Buffering Memory State for Thread-Level Speculation in Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Ninth International Symposium on High-Performance Computer Architecture (HPCA'03), Anaheim, California, USA, February 8-12, 2003, pp. 191-202, 2003, IEEE Computer Society, 0-7695-1871-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
4 | Yoshimitsu Yanagawa, Luong Dinh Hung, Chitaka Iwama, Niko Demus Barli, Shuichi Sakai, Hidehiko Tanaka |
Complexity Analysis of a Cache Controller for Speculative Multithreading Chip Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2003, 10th International Conference, Hyderabad, India, December 17-20, 2003, Proceedings, pp. 393-404, 2003, Springer, 3-540-20626-4. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
3 | Arrvindh Shriraman, Sandhya Dwarkadas |
Sentry: light-weight auxiliary memory access control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 37th International Symposium on Computer Architecture (ISCA 2010), June 19-23, 2010, Saint-Malo, France, pp. 407-418, 2010, ACM, 978-1-4503-0053-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
sentry, access control, multiprocessors, safety, cache coherence, memory protection, protection domains |
3 | Hui Wang, Rama Sangireddy, Sandeep Baldawa |
Optimizing Instruction Scheduling through Combined In-Order and O-O-O Execution in SMT Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 20(3), pp. 389-403, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
3 | Ronny Krashinsky, Christopher Batten, Krste Asanovic |
Implementing the scale vector-thread processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 13(3), pp. 41:1-41:24, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
hybrid C++/Verilog simulation, iterative VLSI design flow, procedural datapath pre-placement, vector-thread processors, multithreaded processors, Vector processors |
3 | Alejandro García, Oliverio J. Santana, Enrique Fernández, Pedro Medina, Mateo Valero |
LPA: A First Approach to the Loop Processor Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings, pp. 273-287, 2008, Springer, 978-3-540-77559-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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3 | Grzegorz M. Wójcik, Wieslaw A. Kaminski, Piotr Matejanka |
Self-organised Criticality in a Model of the Rat Somatosensory Cortex. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PaCT ![In: Parallel Computing Technologies, 9th International Conference, PaCT 2007, Pereslavl-Zalessky, Russia, September 3-7, 2007, Proceedings, pp. 468-476, 2007, Springer, 978-3-540-73939-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
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3 | Yi Ma, Hongliang Gao, Huiyang Zhou |
Using Indexing Functions to Reduce Conflict Aliasing in Branch Prediction Tables. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 55(8), pp. 1057-1061, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Processor architectures |
3 | Dennis Abts, Steve Scott, David J. Lilja |
So Many States, So Little Time: Verifying Memory Coherence in the Cray X1. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings, pp. 11, 2003, IEEE Computer Society, 0-7695-1926-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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