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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 3 occurrences of 3 keywords
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Results
Found 50 publication records. Showing 50 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
36 | Zsolt J. Horváth, Péter Basa |
New Trends in Non-volatile Semiconductor Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Towards Intelligent Engineering and Information Technology ![In: Towards Intelligent Engineering and Information Technology, pp. 323-333, 2009, Springer, 978-3-642-03736-8. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
nanocrystal memories, SONOS, FeRAMs, flash memories, phase-change memories, MRAMs |
26 | Shamiul Alam, William Mitchell Hunter, Nazmul Amin, Md. Mazharul Islam 0006, Sumeet Kumar Gupta, Ahmedullah Aziz |
Design Space Exploration for Phase Transition Material-Augmented MRAMs With Separate Read-Write Paths. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(1), pp. 151-160, January 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
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26 | Ariana Musello, Esteban Garzón, Marco Lanuzza, Luis-Miguel Prócel, Ramiro Taco |
XNOR-Bitcount Operation Exploiting Computing-In-Memory With STT-MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 70(3), pp. 1259-1263, March 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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26 | Sicong Yuan, Mottaqiallah Taouil, Moritz Fieback, Hanzhi Xun, Erik Jan Marinissen, Gouri Sankar Kar, Sidharth Rao, Sebastien Couet, Said Hamdioui |
Device-Aware Test for Back-Hopping Defects in STT-MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2023, Antwerp, Belgium, April 17-19, 2023, pp. 1-6, 2023, IEEE, 978-3-9819263-7-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
26 | Yu-Guang Chen, Po-Yeh Huang, Jin-Fu Li 0001 |
An On-Line Aging Detection and Tolerance Framework for Improving Reliability of STT-MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 28th Asia and South Pacific Design Automation Conference, ASPDAC 2023, Tokyo, Japan, January 16-19, 2023, pp. 13-18, 2023, ACM, 978-1-4503-9783-4. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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26 | Ahmed Aouichi, Sicong Yuan, Moritz Fieback, Siddharth Rao, Woojin Kim, Erik Jan Marinissen, Sebastien Couet, Mottaqiallah Taouil, Said Hamdioui |
Device Aware Diagnosis for Unique Defects in STT-MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ATS ![In: 32nd IEEE Asian Test Symposium, ATS 2023, Beijing, China, October 14-17, 2023, pp. 1-6, 2023, IEEE, 979-8-3503-0310-0. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
26 | Meng-Shan Wu, Yen-Lin Chua, Jin-Fu Li 0001, Yun-Ting Chuan, Shih-Hsu Huang |
Fault-Aware ECC Scheme for Enhancing the Read Reliability of STT-MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC-Asia ![In: IEEE International Test Conference in Asia, ITC-Asia 2023, Matsue, Japan, September 12-14, 2023, pp. 1-6, 2023, IEEE, 979-8-3503-1281-2. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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26 | Sicong Yuan, Z. Zhang, Moritz Fieback, Hanzhi Xun, Erik Jan Marinissen, Gouri Sankar Kar, Sidharth Rao, Sebastien Couet, M. Taouil, Said Hamdioui |
Magnetic Coupling Based Test Development for Contact and Interconnect Defects in STT-MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: IEEE International Test Conference, ITC 2023, Anaheim, CA, USA, October 7-15, 2023, pp. 236-245, 2023, IEEE, 979-8-3503-4325-0. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
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26 | Lizhou Wu, Siddharth Rao, Mottaqiallah Taouil, Erik Jan Marinissen, Gouri Sankar Kar, Said Hamdioui |
Characterization, Modeling, and Test of Intermediate State Defects in STT-MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 71(9), pp. 2219-2233, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
26 | Esteban Garzón, Raffaele De Rose, Felice Crupi, Lionel Trojman, Adam Teman, Marco Lanuzza |
Adjusting Thermal Stability in Double-Barrier MTJ for Energy Improvement in Cryogenic STT-MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2204.09395, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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26 | Yongjune Kim 0001, Yoocharn Jeon, Hyeokjin Choi, Cyril Guyot, Yuval Cassuto |
Optimizing Write Fidelity of MRAMs by Alternating Water-Filling Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Commun. ![In: IEEE Trans. Commun. 70(9), pp. 5825-5836, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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26 | Guihua Zhao, Xing Jin, Huafeng Ye, Yating Peng, Wei Liu, Ningyuan Yin, Weichong Chen, Jianjun Chen, Ximing Li 0003, Zhiyi Yu |
An in-memory computing multiply-and-accumulate circuit based on ternary STT-MRAMs for convolutional neural networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 19(20), pp. 20220399, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
26 | Esteban Garzón, Ramiro Taco, Luis-Miguel Prócel, Lionel Trojman, Marco Lanuzza |
Voltage and Technology Scaling of DMTJ-based STT-MRAMs for Energy-Efficient Embedded Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LASCAS ![In: 13th IEEE Latin America Symposium on Circuits and System, LASCAS 2022, Puerto Varas, Chile, March 1-4, 2022, pp. 1-4, 2022, IEEE, 978-1-6654-2008-2. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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26 | Anteneh Gebregiorgis, Lizhou Wu, Christopher Münch, Siddharth Rao, Mehdi B. Tahoori, Said Hamdioui |
Special Session: STT-MRAMs: Technology, Design and Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 40th IEEE VLSI Test Symposium, VTS 2022, San Diego, CA, USA, April 25-27, 2022, pp. 1-10, 2022, IEEE, 978-1-6654-1060-1. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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26 | Ze-Wei Pan, Jin-Fu Li 0001 |
DFT-Enhanced Test Scheme for Spin-Transfer-Torque (STT) MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: IEEE International Test Conference, ITC 2022, Anaheim, CA, USA, September 23-30, 2022, pp. 489-493, 2022, IEEE, 978-1-6654-6270-9. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
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26 | Yongjune Kim 0001, Yoocharn Jeon, Hyeokjin Choi, Cyril Guyot, Yuval Cassuto |
Optimizing Write Fidelity of MRAMs via Iterative Water-filling Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2112.02842, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP BibTeX RDF |
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26 | Esteban Garzón, Raffaele De Rose, Felice Crupi, Lionel Trojman, Giovanni Finocchio, Mario Carpentieri, Marco Lanuzza |
Assessment of STT-MRAMs based on double-barrier MTJs for cache applications by means of a device-to-system level simulation framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 71, pp. 56-69, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
26 | Govind Radhakrishnan, Youngki Yoon, Manoj Sachdev |
Monitoring Aging Defects in STT-MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12), pp. 4645-4656, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
26 | Yongjune Kim 0001, Yoocharn Jeon, Cyril Guyot, Yuval Cassuto |
Optimizing the Write Fidelity of MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2001.03803, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
|
26 | Mustafa Fayez Ali, Robert Andrawis, Kaushik Roy 0001 |
Dynamic Read Current Sensing With Amplified Bit-Line Voltage for STT-MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 67-II(3), pp. 551-555, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
26 | Yongjune Kim 0001, Yoocharn Jeon, Cyril Guyot, Yuval Cassuto |
Optimizing the Write Fidelity of MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISIT ![In: IEEE International Symposium on Information Theory, ISIT 2020, Los Angeles, CA, USA, June 21-26, 2020, pp. 792-797, 2020, IEEE, 978-1-7281-6432-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
26 | Lizhou Wu, Siddharth Rao, Mottaqiallah Taouil, Erik Jan Marinissen, Gouri Sankar Kar, Said Hamdioui |
Characterization, Modeling and Test of Synthetic Anti-Ferromagnet Flip Defect in STT-MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: IEEE International Test Conference, ITC 2020, Washington, DC, USA, November 1-6, 2020, pp. 1-10, 2020, IEEE, 978-1-7281-9113-3. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
26 | Govind Radhakrishnan, Youngki Yoon, Manoj Sachdev |
A Parametric DFT Scheme for STT-MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 27(7), pp. 1685-1696, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
26 | Mesut Atasoyu, Mustafa Altun, Serdar Özoguz |
Sensing schemes for STT-MRAMs structured with high TMR in low RA MTJs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 89, pp. 30-36, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
26 | Esteban Garzón, Raffaele De Rose, Felice Crupi, Lionel Trojman, Giovanni Finocchio, Mario Carpentieri, Marco Lanuzza |
Exploiting Double-Barrier MTJs for Energy-Efficient Nanoscaled STT-MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SMACD ![In: 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2019, Lausanne, Switzerland, July 15-18, 2019, pp. 85-88, 2019, IEEE, 978-1-7281-1201-5. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
26 | Marco Lanuzza, Raffaele De Rose, Esteban Garzón, Felice Crupi |
Evaluating the Energy Efficiency of STT-MRAMs Based on Perpendicular MTJs with Double Reference Layers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASICON ![In: 13th IEEE International Conference on ASIC, ASICON 2019, Chongqing, China, October 29 - November 1, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-0735-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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26 | Leila Bagheriye, Siroos Toofan, Roghayeh Saeidi, Farshad Moradi |
Offset-Compensated High-Speed Sense Amplifier for STT-MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 26(6), pp. 1051-1058, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
26 | Jean-Philippe Diguet, Naoya Onizawa, Mostafa Rizk, Martha Johanna Sepúlveda, Amer Baghdadi, Takahiro Hanyu |
Networked Power-Gated MRAMs for Memory-Based Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 26(12), pp. 2696-2708, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
26 | Kien Trinh Quang, Sergio Ruocco, Massimo Alioto |
Dynamic Reference Voltage Sensing Scheme for Read Margin Improvement in STT-MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(4), pp. 1269-1278, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
26 | Leila Bagheriye, Siroos Toofan, Roghayeh Saeidi, Farshad Moradi |
A Novel Sensing Circuit with Large Sensing Margin for Embedded Spin-Transfer Torque MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2018, 27-30 May 2018, Florence, Italy, pp. 1-5, 2018, IEEE, 978-1-5386-4881-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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26 | Kien Trinh Quang, Sergio Ruocco, Massimo Alioto |
Novel Time-Based Sensing Scheme for STT-MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2018, 27-30 May 2018, Florence, Italy, pp. 1-5, 2018, IEEE, 978-1-5386-4881-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
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26 | Raffaele De Rose, Greta Carangelo, Marco Lanuzza, Felice Crupi, Giovanni Finocchio, Mario Carpentieri |
Impact of voltage scaling on STT-MRAMs through a variability-aware simulation framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SMACD ![In: 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2017, Giardini Naxos, Italy, June 12-15, 2017, pp. 1-4, 2017, IEEE, 978-1-5090-5052-9. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
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26 | Tetsuo Endoh |
Embedded nonvolatile memory with STT-MRAMs and its application for nonvolatile brain-inspired VLSIs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-DAT ![In: 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017, Hsinchu, Taiwan, April 24-27, 2017, pp. 1-3, 2017, IEEE, 978-1-5090-3969-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
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26 | Shivam Verma, Brajesh Kumar Kaushik |
Low-Power High-Density STT MRAMs on a 3-D Vertical Silicon Nanowire Platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 24(4), pp. 1371-1376, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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26 | Zoha Pajouhi, Xuanyao Fong, Anand Raghunathan, Kaushik Roy 0001 |
Yield, Area, and Energy Optimization in STT-MRAMs Using Failure-Aware ECC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM J. Emerg. Technol. Comput. Syst. ![In: ACM J. Emerg. Technol. Comput. Syst. 13(2), pp. 20:1-20:20, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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26 | Kien Trinh Quang, Sergio Ruocco, Massimo Alioto |
Voltage Scaled STT-MRAMs Towards Minimum-Energy Write Access. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Emerg. Sel. Topics Circuits Syst. ![In: IEEE J. Emerg. Sel. Topics Circuits Syst. 6(3), pp. 305-318, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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26 | Kien Trinh Quang, Sergio Ruocco, Massimo Alioto |
Boosted sensing for enhanced read stability in STT-MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montréal, QC, Canada, May 22-25, 2016, pp. 1238-1241, 2016, IEEE, 978-1-4799-5341-7. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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26 | Zoha Pajouhi, Xuanyao Fong, Anand Raghunathan, Kaushik Roy 0001 |
Yield, Area and Energy Optimization in Stt-MRAMs using failure aware ECC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1509.08806, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP BibTeX RDF |
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26 | Ahmedullah Aziz, William Cane-Wissing, Moon Seok Kim, Suman Datta, Vijaykrishnan Narayanan, Sumeet Kumar Gupta |
Single-Ended and Differential MRAMs Based on Spin Hall Effect: A Layout-Aware Design Perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2015 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2015, Montpellier, France, July 8-10, 2015, pp. 333-338, 2015, IEEE Computer Society, 978-1-4799-8719-1. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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26 | Ahmedullah Aziz, Nikhil Shukla, Suman Datta, Sumeet Kumar Gupta |
COAST: Correlated material assisted STT MRAMs for optimized read operation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2015, Rome, Italy, July 22-24, 2015, pp. 1-6, 2015, IEEE, 978-1-4673-8009-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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26 | Joao Azevedo, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard 0001, Aida Todri-Sanial, Jérémy Alvarez-Herault, Ken Mackay |
A Complete Resistive-Open Defect Analysis for Thermally Assisted Switching MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 22(11), pp. 2326-2335, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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26 | Alireza Shafaei, Yanzhi Wang, Massoud Pedram |
Low write-energy STT-MRAMs using FinFET-based access transistors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 32nd IEEE International Conference on Computer Design, ICCD 2014, Seoul, South Korea, October 19-22, 2014, pp. 374-379, 2014, IEEE Computer Society, 978-1-4799-6492-5. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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26 | Stefano Di Carlo, Marco Indaco, Paolo Prinetto, Elena I. Vatajelu, Rosa Rodríguez-Montañés, Joan Figueras |
Reliability estimation at block-level granularity of spin-transfer-torque MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2014, Amsterdam, The Netherlands, October 1-3, 2014, pp. 75-80, 2014, IEEE Computer Society, 978-1-4799-6155-9. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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26 | Ki Chul Chun, Hui Zhao, Jonathan D. Harms, Tony Tae-Hyoung Kim, Jianping Wang 0006, Chris H. Kim |
A Scaling Roadmap and Performance Evaluation of In-Plane and Perpendicular MTJ Based STT-MRAMs for High-Density Cache Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 48(2), pp. 598-610, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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26 | Niladri Narayan Mojumder, Xuanyao Fong, Charles Augustine, Sumeet Kumar Gupta, Sri Harsha Choday, Kaushik Roy 0001 |
Dual pillar spin-transfer torque MRAMs for low power applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM J. Emerg. Technol. Comput. Syst. ![In: ACM J. Emerg. Technol. Comput. Syst. 9(2), pp. 14:1-14:17, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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26 | Ioan Lucian Prejbeanu, Ricardo C. Sousa, Bernard Dieny, Jean-Pierre Nozieres, S. Bandiera, Jérémy Alvarez-Herault, Q. Stainer, L. Lombard, Clarisse Ducruet, Y. Conraux, Ken Mackay |
Scalability and logic functionalities of TA-MRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NEWCAS ![In: IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013, Paris, France, June 16-19, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0618-5. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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26 | Arijit Raychowdhury |
Beyond charge based computation: Design space exploration of spin transfer torque based MRAMs for embedded applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: International Symposium on Low Power Electronics and Design (ISLPED), Beijing, China, September 4-6, 2013, pp. 135-138, 2013, IEEE, 978-1-4799-1235-3. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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26 | Sumeet Kumar Gupta, Sang Phill Park, Niladri Narayan Mojumder, Kaushik Roy 0001 |
Layout-aware optimization of stt mrams. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2012 Design, Automation & Test in Europe Conference & Exhibition, DATE 2012, Dresden, Germany, March 12-16, 2012, pp. 1455-1458, 2012, IEEE, 978-1-4577-2145-8. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
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26 | Sang Phill Park, Sumeet Kumar Gupta, Niladri Narayan Mojumder, Anand Raghunathan, Kaushik Roy 0001 |
Future cache design using STT MRAMs for improved energy efficiency: devices, circuits and architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: The 49th Annual Design Automation Conference 2012, DAC '12, San Francisco, CA, USA, June 3-7, 2012, pp. 492-497, 2012, ACM, 978-1-4503-1199-1. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
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26 | Yoann Guillemenet, Lionel Torres, Gilles Sassatelli, Nicolas Bruchon, Ilham Hassoune |
A non-volatile run-time FPGA using thermally assisted switching MRAMS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2008, International Conference on Field Programmable Logic and Applications, Heidelberg, Germany, 8-10 September 2008, pp. 421-426, 2008, IEEE, 978-1-4244-1961-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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