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Publication years (Num. hits)
1965-1975 (16) 1976-1978 (16) 1979-1982 (16) 1983-1984 (19) 1985 (17) 1986 (16) 1987 (28) 1988 (43) 1989 (32) 1990 (48) 1991 (21) 1992 (35) 1993 (35) 1994 (50) 1995 (81) 1996 (64) 1997 (93) 1998 (74) 1999 (113) 2000 (112) 2001 (143) 2002 (170) 2003 (232) 2004 (292) 2005 (344) 2006 (416) 2007 (383) 2008 (404) 2009 (327) 2010 (207) 2011 (168) 2012 (184) 2013 (223) 2014 (243) 2015 (254) 2016 (248) 2017 (322) 2018 (397) 2019 (425) 2020 (530) 2021 (695) 2022 (751) 2023 (814) 2024 (194)
Publication types (Num. hits)
article(3792) book(3) data(1) incollection(34) inproceedings(5387) phdthesis(78)
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The graphs summarize 3849 occurrences of 1991 keywords

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Found 9295 publication records. Showing 9295 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
97Zhenpei Li, Ping Li, Ming Wu Digital oil and gas pipeline visualization using X3D. Search on Bibsonomy Web3D The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Java native interface (JNI), OLE for process control (OPC), digital oil and gas pipeline, scene access interface (SAI), visualization, interaction, 3D modeling, extensible 3D (X3D)
85Asger Munk Nielsen, David W. Matula, Chung Nan Lyu, Guy Even Pipelined Packet-Forwarding Floating Point: II. An Adder. Search on Bibsonomy IEEE Symposium on Computer Arithmetic The full citation details ... 1997 DBLP  DOI  BibTeX  RDF pipelined packet forwarding floating point, floating point addition algorithm, adder pipeline design, packet forwarding pipeline paradigm, data hazards, deeply pipelined floating point pipelines, four stage execution phase pipeline, short clock period, fifteen logic levels, addition algorithm, standard binary floating point format, standard IEEE 754 rounded result, two cycle latency, cooperating multiplier pipeline, packet forwarding operand, IEEE 754 binary floating point compatibility, pipeline arithmetic
81Jinson Koppanalil, Prakash Ramrakhyani, Sameer Desai, Anu Vaidyanathan, Eric Rotenberg A case for dynamic pipeline scaling. Search on Bibsonomy CASES The full citation details ... 2002 DBLP  DOI  BibTeX  RDF configurable pipeline, fetch gating, power and energy management, shallow and deep pipelines, variable-depth pipeline, dynamic voltage scaling, clock gating
73Aristides Efthymiou, Jim D. Garside, Ioannis Papaefstathiou A Low-Power Processor Architecture Optimized forWireless Devices. Search on Bibsonomy ASAP The full citation details ... 2005 DBLP  DOI  BibTeX  RDF Pipeline depth, configurable pipeline, power-adaptive processors, Low power, asynchronous circuits
69Zeshan Chishti, T. N. Vijaykumar Optimal Power/Performance Pipeline Depth for SMT in Scaled Technologies. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Power Management, Performance of Systems, Multithreaded processors
69Hans M. Jacobson Improved clock-gating through transparent pipelining. Search on Bibsonomy ISLPED The full citation details ... 2004 DBLP  DOI  BibTeX  RDF adaptive pipeline depth, dynamic pipeline scaling, optimal pipeline clocking, pipeline stage unification, transparent pipeline, low power, high performance, microarchitecture, circuits, clock gating
68Chia-Hsing Chien, Mark A. Franklin, Tienyo Pan, Prithvi Prabhu ARAS: asynchronous RISC architecture simulator. Search on Bibsonomy ASYNC The full citation details ... 1995 DBLP  DOI  BibTeX  RDF asynchronous RISC architecture simulator, ARAS, pipeline instruction simulator, benchmark programs, pipeline configuration, asynchronous pipeline architectures, performance evaluation, parallel architectures, virtual machines, performance measurements, pipeline processing
60Heather Quinn, Laurie A. Smith King, Miriam Leeser, Waleed Meleis Runtime Assignment of Reconfigurable Hardware Components for Image Processing Pipelines. Search on Bibsonomy FCCM The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
60Aravindh Anantaraman, Kiran Seth, Kaustubh Patil, Eric Rotenberg, Frank Mueller 0001 Virtual Simple Architecture (VISA): Exceeding the Complexity Limit in Safe Real-Time Systems. Search on Bibsonomy ISCA The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
58Allan Hartstein, Thomas R. Puzak The Optimum Pipeline Depth for a Microprocessor. Search on Bibsonomy ISCA The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
58Mark S. Squillante, David R. Kaeli, Himanshu Sinh Analytic Models of Workload Behavior and Pipeline Performance. Search on Bibsonomy MASCOTS The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
58Svetlana P. Kartashev, Steven I. Kartashev Adaptable pipeline system with dynamic architecture. Search on Bibsonomy AFIPS National Computer Conference The full citation details ... 1981 DBLP  DOI  BibTeX  RDF
57Arthur Abnous, Nader Bagherzadeh Pipelining and Bypassing in a VLIW Processor. Search on Bibsonomy IEEE Trans. Parallel Distributed Syst. The full citation details ... 1994 DBLP  DOI  BibTeX  RDF VLIWprocessor, very long instruction word, pipeline data hazards, performance evaluation, performance, parallel architectures, computer architecture, pipeline processing, pipeline structure, bypassing
56Ing-Jer Huang Co-synthesis of pipelined structures and instruction reordering constraints for instruction set processors. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2001 DBLP  DOI  BibTeX  RDF compiler instruction optimization, instruction set processor, pipeline hazards, pipeline taxonomy, synthesis
56Viswanathan Subramanian, Arun K. Somani Conjoined Pipeline: Enhancing Hardware Reliability and Performance through Organized Pipeline Redundancy. Search on Bibsonomy PRDC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
55Sailesh Kumar, Michela Becchi, Patrick Crowley, Jonathan S. Turner CAMP: fast and efficient IP lookup architecture. Search on Bibsonomy ANCS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF IP lookup, longest prefix match, internet router
55Seongwoo Kim, Arun K. Somani SSD: An Affordable Fault Tolerant Architecture for Superscalar Processors. Search on Bibsonomy PRDC The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
53Tao Feng, Nohpill Park, Yong-Bin Kim, Fabrizio Lombardi, Fred J. Meyer Reliability Modeling and Assurance of Clockless Wave Pipeline. Search on Bibsonomy DFT The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
53Ayman M. El-Khashab, Earl E. Swartzlander Jr. An Architecture for a Radix-4 Modular Pipeline Fast Fourier Transform. Search on Bibsonomy ASAP The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
49Sang Ok Koo, Hyuk Don Kwon, Chang Geol Yoon, Won Seok Seo, Soon Ki Jung Visualization for a Multi-Sensor Data Analysis. Search on Bibsonomy CGIV The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
49Prabhat Mishra 0001, Nikil D. Dutt Modeling and validation of pipeline specifications. Search on Bibsonomy ACM Trans. Embed. Comput. Syst. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF Modeling of processor pipeline, pipeline validation, pipelined processor specification, architecture description language
49Masayuki Tsukisaka, Takashi Nanya A testable design for asynchronous fine-grain pipeline circuits. Search on Bibsonomy PRDC The full citation details ... 2000 DBLP  DOI  BibTeX  RDF asynchronous fine-grain pipeline circuits, dynamic gates, high-performance datapath design, pipeline latches, scan latch libraries, logic testing, logic CAD, SPICE, CMOS technology, scan path, SPICE simulation, testable design
48Shijing Wu, Qunli Li, Enyong Zhu, Jinjuan She, Ming Qin A Hybrid Intelligent System for Pipeline Robot Navigation in Unknown Environment. Search on Bibsonomy ICIRA (1) The full citation details ... 2008 DBLP  DOI  BibTeX  RDF pipeline robot, neural network, navigation, fuzzy controller
48John Biddiscombe, Berk Geveci, Ken Martin, Kenneth Moreland, David C. Thompson 0001 Time Dependent Processing in a Parallel Pipeline Architecture. Search on Bibsonomy IEEE Trans. Vis. Comput. Graph. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF data-parallel visualization pipeline, time-varying data
48Abhishek Tiwari 0002, Smruti R. Sarangi, Josep Torrellas ReCycle: : pipeline adaptation to tolerate process variation. Search on Bibsonomy ISCA The full citation details ... 2007 DBLP  DOI  BibTeX  RDF pipeline, process variation, clock skew
48Allan Hartstein, Thomas R. Puzak The optimum pipeline depth considering both power and performance. Search on Bibsonomy ACM Trans. Archit. Code Optim. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF Pipeline Depth, Power and Performance, Workload Specificity, Simulation
48Kerstin Eder, Geoff Barrett Achieving maximum performance: a method for the verification of interlocked pipeline control logic. Search on Bibsonomy DAC The full citation details ... 2002 DBLP  DOI  BibTeX  RDF interlock logic, pipeline stall, verification
47Shinichi Yamagiwa, Leonel Sousa Design and implementation of a tool for modeling and programming deadlock free meta-pipeline applications. Search on Bibsonomy IPDPS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
47Sudsanguan Ngamsuriyaroj, Ekasit Kijsipongse Optimal Placement of Pipeline Applications on Grid. Search on Bibsonomy ICPADS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
47Wook-Shin Han, Soon Ki Jung, Jeyong Shin, Jinsoo Lee, Mina Yoon, Chang Geol Yoon, Won Seok Seo, Sang Ok Koo A Scalable Pipeline Data Processing Framework Using Database and Visualization Techniques. Search on Bibsonomy ICIC (1) The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Scalable processing, Intelligent PIGs, Time series data
47Chang-Ching Yeh, Kuei-Chung Chang, Tien-Fu Chen, Chingwei Yeh Reducing Branch Misprediction Penalties Via Adaptive Pipeline Scaling. Search on Bibsonomy HiPEAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
47Abdel Ejnioui, Abdelhalim Alsharqawi Pipeline-Level Control of Self-Resetting Pipelines. Search on Bibsonomy DSD The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
45Animesh Datta, Swarup Bhunia, Saibal Mukhopadhyay, Nilanjan Banerjee, Kaushik Roy 0001 Statistical Modeling of Pipeline Delay and Design of Pipeline under Process Variation to Enhance Yield in sub-100nm Technologies. Search on Bibsonomy DATE The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
45Abdel Ejnioui, Abdelhalim Alsharqawi Self-resetting stage logic pipelines. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2004 DBLP  DOI  BibTeX  RDF clockless, self-resetting, pipeline, asynchronous
45Wei-keng Liao, Alok N. Choudhary, Donald D. Weiner, Pramod K. Varshney Design and Evaluation of I/O Strategies for Parallel Pipelined STAP Applications. Search on Bibsonomy IPDPS The full citation details ... 2000 DBLP  DOI  BibTeX  RDF space-time adaptive processing, parallel processing, parallel I/O, parallel file system, parallel pipeline
44Timothy J. Dysart, Branden J. Moore, Lambert Schaelicke, Peter M. Kogge Cache implications of aggressively pipelined high performance microprocessors. Search on Bibsonomy ISPASS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
43Alexandre Yakovlev, Victor Varshavsky, Vyacheslav Marakhovsky, Alexei L. Semenov Designing an asynchronous pipeline token ring interface. Search on Bibsonomy ASYNC The full citation details ... 1995 DBLP  DOI  BibTeX  RDF asynchronous pipeline token ring interface, speed-independent interface, reliable communication medium, on-board multicomputer, asynchronous buses, point-to-point interconnections, syntax-driven implementation, channel protocol controller, protocols, fairness, multiprocessor interconnection networks, local area networks, pipeline processing, deadlock-freedom, token networks
43Hai Zhao, Nicole Marie Sabine, Edwin Hsing-Mean Sha Improving self-timed pipeline ring performance through the addition of buffer loops. Search on Bibsonomy Great Lakes Symposium on VLSI The full citation details ... 1995 DBLP  DOI  BibTeX  RDF buffer circuits, self-timed pipeline ring performance, buffer loops, communication scheme, communication delay reduction, data communication delay, pace handshaking overhead, initial system configuration, performance evaluation, delays, timing, logic design, asynchronous circuits, pipeline processing
42Amy S. Bruckman, Maureen Biggers, Barbara Ericson, Tom McKlin, Jill P. Dimond, Betsy James DiSalvo, Mike Hewner, Lijun Ni, Sarita Yardi "Georgia computes!": improving the computing education pipeline. Search on Bibsonomy SIGCSE The full citation details ... 2009 DBLP  DOI  BibTeX  RDF computing education pipeline, summer camps, introductory courses
42Angeles G. Navarro, Rafael Asenjo, Siham Tabik, Calin Cascaval Load balancing using work-stealing for pipeline parallelism in emerging applications. Search on Bibsonomy ICS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF work-stealing, load imbalance, parallel pipeline
42Wu Liu, Min Li, Yi Liu, Yuan Xu, Xinglan Yang Decision of optimal scheduling scheme for gas field pipeline network based on hybrid genetic algorithm. Search on Bibsonomy GEC Summit The full citation details ... 2009 DBLP  DOI  BibTeX  RDF natural gas pipeline network, genetic algorithm, optimization, scheduling scheme, differential evolution algorithm
42Nary Subramanian Improving Security of Oil Pipeline SCADA Systems Using Service-Oriented Architectures. Search on Bibsonomy OTM Workshops The full citation details ... 2008 DBLP  DOI  BibTeX  RDF petroleum, security, architecture, pipeline, services, SCADA
42Che-Wei Lin, Jeen-Shing Wang, Chun-Chang Yu, Ting-Yu Chen Synchronous Pipeline Circuit Design for an Adaptive Neuro-fuzzy Network. Search on Bibsonomy ICIC (2) The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Synchronous pipeline design, neuro-fuzzy circuit, FPGA
42Arnab Roy 0001, Subrat Kumar Panda, Rajeev Kumar 0004, P. P. Chakrabarti 0001 A framework for systematic validation and debugging of pipeline simulators. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF Simulation-based verification, dataflow equivalence, pipeline validation, design space exploration, instruction scheduling, pipelined architectures
42Swarnalatha Radhakrishnan, Hui Guo 0001, Sri Parameswaran Dual-pipeline heterogeneous ASIP design. Search on Bibsonomy CODES+ISSS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF dual-pipeline, instruction set generation, ASIP, superscalar
42Tao Feng, Byoungjae Jin, J. Wang, Nohpill Park, Yong-Bin Kim, Fabrizio Lombardi Fault tolerant clockless wave pipeline design. Search on Bibsonomy Conf. Computing Frontiers The full citation details ... 2004 DBLP  DOI  BibTeX  RDF clockless wave pipeline, inter-wave fault, intra-wave fault, fault tolerance, reliability
42Jia Di, Jiann-Shiun Yuan Power-aware pipelined multiplier design based on 2-dimensional pipeline gating. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2003 DBLP  DOI  BibTeX  RDF 2-D pipeline gating, power-awareness, array multiplier
42Weirong Jiang, Qingbo Wang, Viktor K. Prasanna Beyond TCAMs: An SRAM-Based Parallel Multi-Pipeline Architecture for Terabit IP Lookup. Search on Bibsonomy INFOCOM The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
42Bassam Jamil Mohd, Adnan Aziz, Earl E. Swartzlander Jr. The hazard-free superscalar pipeline fast fourier transform algorithm and architecture. Search on Bibsonomy VLSI-SoC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
42Suryanarayana Tatapudi, José G. Delgado-Frias A mesochronous pipeline scheme for high performance low power digital systems. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
42Bing-Fei Wu, Chung-Fu Lin A high-performance and memory-efficient pipeline architecture for the 5/3 and 9/7 discrete wavelet transform of JPEG2000 codec. Search on Bibsonomy IEEE Trans. Circuits Syst. Video Technol. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
42Steve MacDonald, Duane Szafron, Jonathan Schaeffer Rethinking the Pipeline as Object-Oriented States with Transformations. Search on Bibsonomy HIPS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
42Seokwoo Lee, Shidhartha Das, Toan Pham, Todd M. Austin, David T. Blaauw, Trevor N. Mudge Reducing pipeline energy demands with local DVS and dynamic retiming. Search on Bibsonomy ISLPED The full citation details ... 2004 DBLP  DOI  BibTeX  RDF dynamic retiming with global DVS, local DVS, razor
42Chris Y. Chung, Ravi Managuli, Yongmin Kim 0001 Design and Evaluation of a Multimedia Computing Architecture Based on a 3D Graphics Pipeline. Search on Bibsonomy ASAP The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
42Michael Golden, Trevor N. Mudge A comparison of two pipeline organizations. Search on Bibsonomy MICRO The full citation details ... 1994 DBLP  DOI  BibTeX  RDF pipelines, cache memory, RISC, memory system, interlocks
40Sreeram Duvvuru, Siamak Arya Evaluation of a branch target address cache. Search on Bibsonomy HICSS (1) The full citation details ... 1995 DBLP  DOI  BibTeX  RDF branch target address cache evaluation, sequential flow, pipeline bubbles, branch penalty, cycles per instruction, multiple instruction issue processors, branch resolution scheme, target instruction fetch, unpredictable branches, fully predicated processor architecture, fetch stage, branch target caching policies, branch target address cache, register-relative branches, performance evaluation, interrupts, interrupt, program compilers, pipeline processing, cache storage, storage allocation, instructions, program control structures, cache sizes
40Shinichi Yamagiwa, Leonel Sousa, Tomás Brandão Meta-Pipeline: A New Execution Mechanism for Distributed Pipeline Processing. Search on Bibsonomy ISPDC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
38Kenneth Eguro, Scott Hauck Armada: timing-driven pipeline-aware routing for FPGAs. Search on Bibsonomy FPGA The full citation details ... 2006 DBLP  DOI  BibTeX  RDF pipeline FPGA, pipeline routing, reconfigurable computing
38Prathima Agrawal, Antony Ng Computing Network Flow on a Multiple Processor Pipeline. Search on Bibsonomy IEEE Trans. Parallel Distributed Syst. The full citation details ... 1994 DBLP  DOI  BibTeX  RDF multiple processor pipeline, Goldberg-Tarjan algorithm, network graph, six processors, distributed algorithms, graph theory, network flow, pipeline processing, parallel implementations, performance estimates, maximum flow, partitioned algorithm, message-passing multicomputer
37Kuan-Wei Cheng, Tzong-Yen Lin, Rong-Guey Chang Profile-based dynamic pipeline scaling. Search on Bibsonomy J. Supercomput. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF DPS, Pipeline mode, Loop region, DVS, IPC
37Allan MacKenzie-Graham, Arash Payan, Ivo D. Dinov, John D. Van Horn, Arthur W. Toga Neuroimaging Data Provenance Using the LONI Pipeline Workflow Environment. Search on Bibsonomy IPAW The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Grid, Workflow, Pipeline, Provenance, Neuroimaging
37Ding Feng 0001, Chaobin Huang, Kui Zhou, Peng Wang, Jin Liu, Shouyong Li Crucial Technology Research on Pipeline Jet Cleaning Robot. Search on Bibsonomy ICIRA (2) The full citation details ... 2008 DBLP  DOI  BibTeX  RDF crucial technology, robot, pipeline, cleaning
37Mahmoud Lotfi Anhar, Mohammad Ali Jabraeil Jamali The Optimum Location of Delay Latches Between Dynamic Pipeline Stages. Search on Bibsonomy APPT The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Minimum, MAL, Pipeline, Latency, Collision, Table, Reservation, Latch, Average
37Je-Hoon Lee, Seung-Sook Lee, Kyoung-Rok Cho Asynchronous ARM Processor Employing an Adaptive Pipeline Architecture. Search on Bibsonomy ARC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF adaptive pipeline, processor, Asynchronous design
37Jian Ruan, Zhiying Wang 0003, Kui Dai, Yong Li 0006 Latency Estimation of the Asynchronous Pipeline Using the Max-Plus Algebra. Search on Bibsonomy International Conference on Computational Science (4) The full citation details ... 2007 DBLP  DOI  BibTeX  RDF Asynchronous Pipeline, Timed Event Graph, Evolution Equation, Latency Estimation, Max-Plus Algebra
37Stavros Souravlas, Manos Roumeliotis A Pipeline Technique for Dynamic Data Transfer on a Multiprocessor Grid. Search on Bibsonomy Int. J. Parallel Program. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF Block-cyclic redistribution, processor classes, pipeline tasks, High Performance Fortran
37Nianmin Yao, Ming-Yang Zheng, Jiu-bin Ju Pipeline: a new architecture of high performance servers. Search on Bibsonomy ACM SIGOPS Oper. Syst. Rev. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF architecture, web, pipeline, high performance, server
37Kenneth J. Janik, Shih-Lien Lu, Michael F. Miller Advances of the Counterflow Pipeline Microarchitecture. Search on Bibsonomy HPCA The full citation details ... 1997 DBLP  DOI  BibTeX  RDF counterflow, CFPP, virtual register, architecture, pipeline, dataflow, VRP
37Val Donaldson, Jeanne Ferrante Determining Asynchronous Acyclic Pipeline Execution Times. Search on Bibsonomy IPPS The full citation details ... 1996 DBLP  DOI  BibTeX  RDF asynchronous pipelining, parallel execution time, loop parallelism, task graph scheduling, pipeline scheduling
36Peng Zhou, JiangHe Yao, JiuLing Pei Implementation of an energy-efficient scheduling scheme based on pipeline flux leak monitoring networks. Search on Bibsonomy Sci. China Ser. F Inf. Sci. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF dynamic modulation scaling, reclaiming scheme, sensor networks, real-time scheduling, EDF
36Rama Sangireddy, Jatan P. Shah Operand-Load-Based Split Pipeline Architecture for High Clock Rate and Commensurable IPC. Search on Bibsonomy IEEE Trans. Parallel Distributed Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
36Mohammad Ghasemazar, Massoud Pedram Minimizing the energy cost of throughput in a linear pipeline by opportunistic time borrowing. Search on Bibsonomy ICCAD The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
36Huaqing Mao, Fuling Bian Research on Constructing 3-D Pipeline Connection Model By Using OpenGL. Search on Bibsonomy CSSE (2) The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
36Zhongli Ma, Hongda Liu Pipeline defect detection and sizing based on MFL data using immune RBF neural networks. Search on Bibsonomy IEEE Congress on Evolutionary Computation The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
36Jinhai Liu, Huaguang Zhang, Jian Feng 0001, Heng Yue A New Fault Detection and Diagnosis Method for Oil Pipeline Based on Rough Set and Neural Network. Search on Bibsonomy ISNN (3) The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
36Pingli Huang, Yun Chiu A Gradient-Based Algorithm for Sampling Clock Skew Calibration of SHA-less Pipeline ADCs. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
36Abdel Ejnioui, Abdelhalim Alsharqawi Pipeline Design Based on Self-Resetting Stage Logic. Search on Bibsonomy ISVLSI The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
36Rob A. Rutenbar, Li-C. Wang, Kwang-Ting Cheng, Sandip Kundu Static statistical timing analysis for latch-based pipeline designs. Search on Bibsonomy ICCAD The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
36Allan Hartstein, Thomas R. Puzak Optimum Power/Performance Pipeline Depth. Search on Bibsonomy MICRO The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
36Brian A. Wandell Color Appearance and the Digital Imaging Pipeline. Search on Bibsonomy ICPR The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
36Christopher A. Healy, Robert D. Arnold, Frank Mueller 0001, David B. Whalley, Marion G. Harmon Bounding Pipeline and Instruction Cache Performance. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 1999 DBLP  DOI  BibTeX  RDF best case execution time, Real-time systems, pipelining, timing analysis, worst case execution time, instruction cache
35Kai Hwang 0001, Zhiwei Xu Multipipeline Networking for Compound Vector Processing. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 1988 DBLP  DOI  BibTeX  RDF compound vector processing, multipipeline networking, pipeline chaining, pipeline nets, run-time techniques, Livermore loops, performance evaluation, performance analysis, parallel programming, compilation, parallel architectures, programming, program compilers, pipeline processing, scientific programs, vector-processing, systolization
34Stijn Eyerman, Lieven Eeckhout, Tejas Karkhanis, James E. Smith 0001 A mechanistic performance model for superscalar out-of-order processors. Search on Bibsonomy ACM Trans. Comput. Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Superscalar out-of-order processor, balanced processor design, mechanistic modeling, overprovisioned processor design, pipeline depth, pipeline width, resource scaling, wide front-end dispatch processors, performance modeling, analytical modeling
34David W. Matula, Asger Munk Nielsen Pipelined Packet-Forwarding Floating Point: I. Foundations and a Rounder. Search on Bibsonomy IEEE Symposium on Computer Arithmetic The full citation details ... 1997 DBLP  DOI  BibTeX  RDF pipelined packet forwarding floating point, packet forwarding floating point format, rounder design, packet forwarding format, standard binary IEEE 754 floating point format, multiplication algorithms, ALU pipeline paradigm, data hazards, pipelined floating point operations, execution phases, multiplier packet forwarding pipelines, execution phase, logic levels, multiplier pipelines, forwarding pipelines, IEEE 754 binary floating point compatibility, pipeline arithmetic, data dependent operations
34Zbigniew M. Wójcik, Barbara E. Wójcik Rough Grammar For Efficient and Fault-Tolerant Computing on a Distributed System. Search on Bibsonomy IEEE Trans. Software Eng. The full citation details ... 1991 DBLP  DOI  BibTeX  RDF global load balancing, dynamic task scheduling, multiprocessor machine, rough grammar, rough grammar production rules, pipeline fashion, statically scheduled multiprocessor, decentralized methodology, scheduling, fault tolerance, parallel processing, distributed computation, fault-tolerant computing, fault tolerant computing, concurrent program, grammars, pipeline processing
34Weirong Jiang, Viktor K. Prasanna Multi-terabit ip lookup using parallel bidirectional pipelines. Search on Bibsonomy Conf. Computing Frontiers The full citation details ... 2008 DBLP  DOI  BibTeX  RDF ip lookup, terabit, pipeline, sram, bidirectional
34Reuven Bar-Yehuda, Craig Gotsman Time/Space Tradeoffs for Polygon Mesh Rendering. Search on Bibsonomy ACM Trans. Graph. The full citation details ... 1996 DBLP  DOI  BibTeX  RDF rendering, polygons, graphics pipeline
33Praveen Jayachandran, Tarek F. Abdelzaher Delay composition in preemptive and non-preemptive real-time pipelines. Search on Bibsonomy Real Time Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Pipelined distributed systems, Delay composition, Schedulability, End-to-end delay
33Montek Singh, Steven M. Nowick MOUSETRAP: High-Speed Transition-Signaling Asynchronous Pipelines. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
33Praveen Jayachandran, Tarek F. Abdelzaher A Delay Composition Theorem for Real-Time Pipelines. Search on Bibsonomy ECRTS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
33Haitham Akkary, Srikanth T. Srinivasan, Rajendar Koltur, Yogesh Patil, Wael Refaai Perceptron-Based Branch Confidence Estimation. Search on Bibsonomy HPCA The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
33Christopher W. Milner, Jack W. Davidson Quick piping: a fast, high-level model for describing processor pipelines. Search on Bibsonomy LCTES-SCOPES The full citation details ... 2002 DBLP  DOI  BibTeX  RDF embedded systems, pipelines, modeling of computer architecture
33Oswaldo Cadenas, Graham M. Megson Pipelining Considerations for an FPGA Case. Search on Bibsonomy DSD The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
32Daniel Pak-Kong Lun, Wan-Chi Siu A Pipeline Design for the Realization of the Prime Factor Algorithm Using the Extended Diagonal Structure. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 1994 DBLP  DOI  BibTeX  RDF pipeline design, prime factor algorithm, input data sequenc, data loading, parallel algorithms, parallel architectures, signal processing, digital signal processing, retrieval, Chinese Remainder Theorem, pipeline architecture, multidimensional array
32Veljko M. Milutinovic, David A. Fura, Walter A. Helbig Pipeline Design Tradeoffs in a 32-bit Gallium Arsenide Microprocessor. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 1991 DBLP  DOI  BibTeX  RDF instruction pipeline design, single-chip GaAs microprocessor, application-related parameters, pipelined memory pipeline, III-V semiconductors, performance evaluation, microprocessor chips, instruction sets, 32 bit, GaAs, gallium arsenide
32Richard G. Cooper The Distributed Pipeline. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 1977 DBLP  DOI  BibTeX  RDF Array of computers, distributed pipeline (DP), multiple-instruction multiple-data-stream (MIMD) computer, distributed computer, multiprocessor, pipeline, computer network, computer architecture, microprocessor, microcomputer
31Sherif Ghali Sense and sidedness in the graphics pipeline via a passage through a separable space. Search on Bibsonomy Vis. Comput. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Oriented projective geometry, Separability, Projective geometry, Homogeneous coordinates, Graphics pipeline
31Jarkko Ylipaavalniemi, Jyri Soppela Arabica: Robust ICA in a Pipeline. Search on Bibsonomy ICA The full citation details ... 2009 DBLP  DOI  BibTeX  RDF pipeline, ICA, bootstrapping, fMRI, Toolbox
31Álvaro García-Sánchez, Luis Miguel Arreche Bedia, Miguel Ortega-Mier Combining Simulation and Tabu Search for Oil-derivatives Pipeline Scheduling. Search on Bibsonomy Metaheuristics for Scheduling in Industrial and Manufacturing Applications The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Multi-commodity Pipeline, Real World Instances, Simulation, Scheduling, Tabu Search
31John Giacomoni, Tipp Moseley, Manish Vachharajani FastForward for efficient pipeline parallelism: a cache-optimized concurrent lock-free queue. Search on Bibsonomy PPoPP The full citation details ... 2008 DBLP  DOI  BibTeX  RDF fastforward, multiprocessors, multicore, queue, lock-free, linearizability, nonblocking synchronization, pipeline parallel
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