Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
126 | Steve Guccione |
Run-Time Reconfiguration at Xilinx. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS Workshops ![In: Parallel and Distributed Processing, 15 IPDPS 2000 Workshops, Cancun, Mexico, May 1-5, 2000, Proceedings, pp. 873-873, 2000, Springer, 3-540-67442-X. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
95 | Jim Harkin, T. Martin McGinnity, Liam P. Maguire |
Modeling and optimizing run-time reconfiguration using evolutionary computation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 3(4), pp. 661-685, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
FPGAs, Evolutionary computing, partitioning, run-time reconfiguration |
92 | Stefan Ihmor, Wolfram Hardt |
Runtime Reconfigurable Interfaces - The RTR-IFB Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), CD-ROM / Abstracts Proceedings, 26-30 April 2004, Santa Fe, New Mexico, USA, 2004, IEEE Computer Society, 0-7695-2132-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
79 | Rawat Siripokarpirom |
Platform Development for Run-Time Reconfigurable Co-Emulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: 17th IEEE International Workshop on Rapid System Prototyping (RSP 2006), 14-16 June 2006, Chania, Crete, Greece, pp. 179-185, 2006, IEEE Computer Society, 0-7695-2580-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
79 | James D. Hadley, Brad L. Hutchings |
Design methodologies for partially reconfigured systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 3rd IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '95), 19-21 April 1995, Napa Valley, CA, USA, pp. 78-84, 1995, IEEE Computer Society, 0-8186-7086-X. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
76 | Ray Bittner, Peter M. Athanas |
Computing kernels implemented with a wormhole RTR CCM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 5th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '97), 16-18 April 1997, Napa Valley, CA, USA, pp. 98-105, 1997, IEEE Computer Society, 0-8186-8159-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
63 | Cláudio F. Lima, Carlos M. Fernandes 0001, Fernando G. Lobo |
Investigating restricted tournament replacement in ECGA for non-stationary environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GECCO ![In: Genetic and Evolutionary Computation Conference, GECCO 2008, Proceedings, Atlanta, GA, USA, July 12-16, 2008, pp. 439-446, 2008, ACM, 978-1-60558-130-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
restricted tournament replacement, genetic algorithms, estimation of distribution algorithms, niching, diversity preservation, non-stationary environments |
63 | Sudarshan Banerjee, Elaheh Bozorgzadeh, Nikil D. Dutt, Juanjo Noguera |
Selective Band width and Resource Management in Scheduling for Dynamically Reconfigurable Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 771-776, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
63 | Sudarshan Banerjee, Elaheh Bozorgzadeh, Nikil D. Dutt |
PARLGRAN: parallelism granularity selection for scheduling task chains on dynamically reconfigurable architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006, pp. 491-496, 2006, IEEE, 0-7803-9451-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
granularity selection, linear placement, scheduling, data-parallelism, partial dynamic reconfiguration |
63 | Peter Bellows, Brad L. Hutchings |
Designing Run-Time Reconfigurable Systems with JHDL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 28(1-2), pp. 29-45, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
FPGAs, image processing, CAD, configurable computing |
63 | Cynthia Cousineau, François Laperle, Yvon Savaria |
Design of a JTAG Based Run Time Reconfigurable System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 21-23 April 1999, Napa, CA, USA, pp. 268-269, 1999, IEEE Computer Society, 0-7695-0375-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
63 | James G. Eldredge, Brad L. Hutchings |
Run-Time Reconfiguration: A method for enhancing the functional density of SRAM-based FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 12(1), pp. 67-86, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
60 | Valery Afanasiev, Dmitry Baigozin, Ilia Kazanski, Sergey Fomin, Stanislav V. Klimenko |
RTR-trees for space robotics behavior simulation and visualization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Vis. Comput. ![In: Vis. Comput. 23(5), pp. 347-358, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Robotics, Computer animation, Motion simulation |
59 | Sumanta Chaudhuri, Sylvain Guilley, Florent Flament, Philippe Hoogvorst, Jean-Luc Danger |
An 8x8 run-time reconfigurable FPGA embedded in a SoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008, pp. 120-125, 2008, ACM, 978-1-60558-115-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
FPGA, RTR |
47 | Jochen Strunk, Toni Volkmer, Klaus Stephan, Wolfgang Rehm, Heiko Schick |
Impact of run-time reconfiguration on design and speed - A case study based on a grid of run-time reconfigurable modules inside a FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 23rd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2009, Rome, Italy, May 23-29, 2009, pp. 1-8, 2009, IEEE. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
47 | Yuan Wang, Feng Xu 0007, Jian Lü 0001 |
Establishing recommendation trust relationships for internetwares. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM SIGSOFT Softw. Eng. Notes ![In: ACM SIGSOFT Softw. Eng. Notes 31(1), pp. 1-5, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
trust, recommendation, internetware |
47 | Sudarshan Banerjee, Elaheh Bozorgzadeh, Nikil D. Dutt |
Considering Run-Time Reconfiguration Overhead in Task Graph Transformations for Dynamically Reconfigurable Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 17-20 April 2005, Napa, CA, USA, Proceedings, pp. 273-274, 2005, IEEE Computer Society, 0-7695-2445-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
47 | Beverly Yang, Tyson Condie, Sepandar D. Kamvar, Hector Garcia-Molina |
Non-Cooperation in Competitive P2P Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDCS ![In: 25th International Conference on Distributed Computing Systems (ICDCS 2005), 6-10 June 2005, Columbus, OH, USA, pp. 91-100, 2005, IEEE Computer Society, 0-7695-2331-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
47 | Brian Leonard, Jeff Young, Ron Sass |
Online placement infrastructure to support run-time reconfiguration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, FPGA 2004, Monterey, California, USA, February 22-24, 2004, pp. 256, 2004, ACM, 1-58113-829-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
47 | Kazuyuki Maruo, Masayoshi Ichikawa, Naoto Miyamoto, Leo Karnan, Takahiro J. Yamaguchi, Koji Kotani, Tadahiro Ohmi |
A Dynamically-Reconfigurable Image Recognition Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), CD-ROM / Abstracts Proceedings, 26-30 April 2004, Santa Fe, New Mexico, USA, 2004, IEEE Computer Society, 0-7695-2132-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
47 | Nitin Srivastava, Jerry L. Trahan, Ramachandran Vaidyanathan, Suresh Rai |
Adaptive Image Filtering Using Run-Time Reconfiguration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings, pp. 180, 2003, IEEE Computer Society, 0-7695-1926-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
adaptive image filtering, image processing, run-time reconfiguration |
47 | Tero Rissa, Milan Vasilko, Jarkko Niittylahti |
System-Level Modelling and Implementation Technique for Run-Time Reconfigurable Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 10th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2002), 22-24 April 2002, Napa, CA, USA, Proceedings, pp. 295-296, 2002, IEEE Computer Society, 0-7695-1801-X. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
47 | Jean-Paul Heron, Roger F. Woods, Sakir Sezer, Richard H. Turner |
Development of a Run-Time Reconfiguration System with Low Reconfiguration Overhead. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 28(1-2), pp. 97-113, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
reconfiguration framework, dynamic reconfiguration, FIR filtering, FPGA implementation, high speed arithmetic |
47 | Oswaldo Cadenas, Graham M. Megson |
A n-Bit Reconfigurable Scalar Quantiser. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, 11th International Conference, FPL 2001, Belfast, Northern Ireland, UK, August 27-29, 2001, Proceedings, pp. 420-429, 2001, Springer, 3-540-42499-7. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
47 | Scott McMillan, Steve Guccione |
Partial Run-Time Reconfiguration Using JRTR. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, The Roadmap to Reconfigurable Computing, 10th International Workshop, FPL 2000, Villach, Austria, August 27-30, 2000, Proceedings, pp. 352-360, 2000, Springer, 3-540-67899-9. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
47 | Brandon Blodget |
Pre-route Assistant: A Routing Tool for Run-Time Reconfiguration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, The Roadmap to Reconfigurable Computing, 10th International Workshop, FPL 2000, Villach, Austria, August 27-30, 2000, Proceedings, pp. 797-800, 2000, Springer, 3-540-67899-9. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
44 | Weisheng Zhao, Eric Belhaire, Claude Chappert, Bernard Dieny, Guillaume Prenat |
TAS-MRAM-Based Low-Power High-Speed Runtime Reconfiguration (RTR) FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 2(2), pp. 8:1-8:19, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Look-Up Table (LUT), MTJ, TAS, multi-context configuration, nonvolatile, Simulation, FPGA, architecture, low power, dynamical reconfiguration, flip-flop, MRAM |
44 | Valery Afanasiev, Dmitry Baigozin, Ilia Kazanski, Sergey Fomin, Stanislav V. Klimenko |
RTR-Trees for Space Robotics Behavior Simulation and Visualization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CW ![In: 5th International Conference on Cyberworlds (CW 2006), 28-29 November 2006, Lausanne, Switzerland, pp. 115-122, 2006, IEEE Computer Society, 0-7695-2671-3. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
44 | Min Xu, Mark D. Hill, Rastislav Bodík |
A regulated transitive reduction (RTR) for longer memory race recording. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: Proceedings of the 12th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2006, San Jose, CA, USA, October 21-25, 2006, pp. 49-60, 2006, ACM, 1-59593-451-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
race recording, multithreading, determinism |
43 | Alireza Shoa, Shahram Shirani |
Run-Time Reconfigurable Systems for Digital Signal Processing Applications: A Survey. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 39(3), pp. 213-235, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
FPGA, DSP, Run-Time Reconfiguration (RTR) |
43 | Edson L. Horta, Sergio Takeo Kofuji |
A Run-Time Reconfigurable ATM Switch. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 15-19 April 2002, Fort Lauderdale, FL, USA, CD-ROM/Abstracts Proceedings, 2002, IEEE Computer Society, 0-7695-1573-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Partial RTR, ATM Switch, Reconfigurable Logic |
32 | Esam El-Araby, Iván González 0004, Tarek A. El-Ghazawi |
Exploiting Partial Runtime Reconfiguration for High-Performance Reconfigurable Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 1(4), pp. 21:1-21:23, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
field programmable gate arrays (FPGA), High performance computing, reconfigurable computing, dynamic partial reconfiguration |
32 | Pil Woo Chun, Lev Kirischian |
Architecture Synthesis Methodology for Run-Time Reconfigurable Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSE (2) ![In: Proceedings of the 12th IEEE International Conference on Computational Science and Engineering, CSE 2009, Vancouver, BC, Canada, August 29-31, 2009, pp. 903-908, 2009, IEEE Computer Society, 978-1-4244-5334-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
32 | Kolin Paul, Joël Porquet, Josep Llosa |
Silicon Compaction/Defragmentation for Partial Runtime Reconfiguration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Tenth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2007), 29-31 August 2007, Lübeck, Germany, pp. 317-324, 2007, IEEE Computer Society, 0-7695-2978-X. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
32 | Esam El-Araby, Iván González, Tarek A. El-Ghazawi |
Performance bounds of partial run-time reconfiguration in high-performance reconfigurable computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPRCTA ![In: Proceedings of the 1st international workshop on High-performance reconfigurable computing technology and applications, HPRCTA 2007,held in conjunction with SC07, Reno, Nevada, USA, November 11, 2007, pp. 11-20, 2007, ACM Press, 978-1-59593-894-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
field programmable gate arrays (FPGA), high performance computing, reconfigurable computing, dynamic partial reconfiguration |
32 | Carlos Nahas, Ricardo Villalobos Guevara, Voicu Groza |
Temporal Placement for Run-Time Reconfiguration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCECE ![In: Proceedings of the Canadian Conference on Electrical and Computer Engineering, CCECE 2006, May 7-10, 2006, Ottawa Congress Centre, Ottawa, Canada, pp. 1609-1612, 2006, IEEE, 1-4244-0038-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
32 | Björn Griese, Erik Vonnahme, Mario Porrmann, Ulrich Rückert 0001 |
Hardware Support for Dynamic Reconfiguration in Reconfigurable SoC Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings, pp. 842-846, 2004, Springer, 3-540-22989-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
32 | Peter Zipf, Manfred Glesner, Christine Bauer 0002, Hans Wojtkowiak |
Handling FPGA Faults and Configuration Sequencing Using a Hardware Extension. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, Reconfigurable Computing Is Going Mainstream, 12th International Conference, FPL 2002, Montpellier, France, September 2-4, 2002, Proceedings, pp. 586-595, 2002, Springer, 3-540-44108-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
32 | Edson L. Horta, John W. Lockwood, Sergio Takeo Kofuji |
Using PARBIT to Implement Partial Run-Time Reconfigurable Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, Reconfigurable Computing Is Going Mainstream, 12th International Conference, FPL 2002, Montpellier, France, September 2-4, 2002, Proceedings, pp. 182-191, 2002, Springer, 3-540-44108-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
32 | Michael J. Wirthlin, Brad L. Hutchings |
Improving functional density using run-time circuit reconfiguration [FPGAs]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 6(2), pp. 247-256, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
28 | Wen-Ze Shao, Hai-Song Deng, Qi Ge, Li-Qian Wang |
RTR-DPD: reweighted tikohonov regularization for blind deblurring via dual principles of discriminativeness. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multidimens. Syst. Signal Process. ![In: Multidimens. Syst. Signal Process. 34(1), pp. 291-320, March 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
28 | P. Mohan Anand, P. V. Sai Charan, Hrushikesh Chunduri, Sandeep K. Shukla |
RTR-Shield: Early Detection of Ransomware Using Registry and Trap Files. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPEC ![In: Information Security Practice and Experience - 18th International Conference, ISPEC 2023, Copenhagen, Denmark, August 24-25, 2023, Proceedings, pp. 209-229, 2023, Springer, 978-981-99-7031-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
28 | Haoyu Yi, Weidong Jiang, Xinyu Zhang 0010, Kai Huo |
Quartic Optimization for Ambiguity Function Shaping via RTR Algorithm under ADPM Framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCT ![In: 22nd IEEE International Conference on Communication Technology, ICCT 2022, Nanjing, China, November 11-14, 2022, pp. 1060-1064, 2022, IEEE, 978-1-6654-7067-4. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
28 | Fabrizio Ivan Apollonio, Riccardo Foschi, Marco Gaiani, Simone Garagnani |
How to Analyze, Preserve, and Communicate Leonardo's Drawing? A Solution to Visualize in RTR Fine Art Graphics Established from "the Best Sense". ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Journal on Computing and Cultural Heritage ![In: ACM Journal on Computing and Cultural Heritage 14(3), pp. 36:1-36:30, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
28 | Byron Navas, Ingo Sander, Johnny Öberg |
Towards cognitive reconfigurable hardware: Self-aware learning in RTR fault-tolerant SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReCoSoC ![In: 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2015, Bremen, Germany, June 29 - July 1, 2015, pp. 1-8, 2015, IEEE, 978-1-4673-7942-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
28 | Ying Zheng, David Shan-Hill Wong, Yanwei Wang, Huajing Fang |
Takagi-Sugeno Model Based Analysis of EWMA RtR Control of Batch Processes With Stochastic Metrology Delay and Mixed Products. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Cybern. ![In: IEEE Trans. Cybern. 44(7), pp. 1155-1168, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
28 | Byron Navas, Johnny Öberg, Ingo Sander |
On providing scalable self-healing adaptive fault-tolerance to RTR SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReConFig ![In: 2014 International Conference on ReConFigurable Computing and FPGAs, ReConFig14, Cancun, Mexico, December 8-10, 2014, pp. 1-6, 2014, IEEE, 978-1-4799-5944-0. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
28 | Kyoungha Kim, Ik-hyeon Jang, Yanggon Kim |
Evaluating the performance impact of RTR-BIRD in origin validation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RACS ![In: Proceedings of the 2014 Conference on Research in Adaptive and Convergent Systems, RACS 2014, Towson, Maryland, USA, October 5-8, 2014, pp. 198-203, 2014, ACM, 978-1-4503-3060-2. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
28 | D. Ling, Y. Zheng, H. J. Fang, H. J. Fan, J. Zhao |
ANOVA model based moving window approach for RtR control in high-mix semiconductor manufacturing industry. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECC ![In: 12th European Control Conference, ECC 2013, Zurich, Switzerland, July 17-19, 2013, pp. 3949-3954, 2013, IEEE. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
28 | Matthias Wählisch, Fabian Holler, Thomas C. Schmidt, Jochen H. Schiller |
Updates from the Internet Backbone: An RPKI/RTR Router Implementation, Measurements, and Analysis ![Search on Bibsonomy](Pics/bibsonomy.png) |
NDSS ![In: 20th Annual Network and Distributed System Security Symposium, NDSS 2013, San Diego, California, USA, February 24-27, 2013, 2013, The Internet Society. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP BibTeX RDF |
|
28 | Huang Lu, Jie Li 0002, Zhongping Dong, Yusheng Ji |
CRDMAC: An Effective Circular RTR Directional MAC Protocol for Wireless Ad Hoc Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSN ![In: Seventh International Conference on Mobile Ad-hoc and Sensor Networks, MSN 2011, Beijing, China, December 16-18, 2011, pp. 231-237, 2011, IEEE Computer Society, 978-1-4577-2178-6. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
28 | Guo Yi, David Atienza, Antonio Rius, Serni Ribo, Carles Ferrer 0001 |
HTPCP: GNSS-R multi-channel cross-correlation waveforms post-processing solution for GOLD-RTR instrument. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AHS ![In: 2010 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2010, Anaheim, California, USA, June 15-18, 2010, pp. 157-163, 2010, IEEE Computer Society, 978-1-4244-5887-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
28 | Stefan Ihmor, Wolfram Hardt |
Runtime reconfigurable interfaces: the RTR-IFB approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Embed. Syst. ![In: Int. J. Embed. Syst. 2(1/2), pp. 4-15, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
28 | Farshid Farshadjam, Mehdi Dehghan 0001, Mahmood Fathy, Majid Ahmadi |
A new compression based approach for reconfiguration overhead reduction in virtex based RTR systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Electr. Eng. ![In: Comput. Electr. Eng. 32(4), pp. 322-347, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
28 | V. O. Afanasiev |
Trees and linked lists with variable ordering relations (RTR structures). ![Search on Bibsonomy](Pics/bibsonomy.png) |
Program. Comput. Softw. ![In: Program. Comput. Softw. 32(6), pp. 324-337, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
28 | Oliver Diessel, Shannon Koh |
Enabling RTR for industry. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Dynamically Reconfigurable Architectures ![In: Dynamically Reconfigurable Architectures, 02.04. - 07.04.2006, 2006, Internationales Begegnungs- und Forschungszentrum fuer Informatik (IBFI), Schloss Dagstuhl, Germany. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP BibTeX RDF |
|
28 | Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon |
Automatic Task Scheduling / Loop Unrolling using Dedicated RTR Controllers in Coarse Grain Reconfigurable Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), CD-ROM / Abstracts Proceedings, 4-8 April 2005, Denver, CO, USA, 2005, IEEE Computer Society, 0-7695-2312-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
28 | Jesús Tabero, Julio Septién, Hortensia Mecha, Daniel Mozos |
A Low Fragmentation Heuristic for Task Placement in 2D RTR HW Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings, pp. 241-250, 2004, Springer, 3-540-22989-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
28 | Camel Tanougast, Yves Berviller, Philippe Brunet, Serge Weber |
Automated RTR Temporal Partitioning for Reconfigurable Embedded Real-Time System Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 22-26 April 2003, Nice, France, CD-ROM/Abstracts Proceedings, pp. 178, 2003, IEEE Computer Society, 0-7695-1926-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
28 | Meenakshi Kaul, Ranga Vemuri |
Integrated Block-Processing and Design-Space Exploration in Temporal Partitioning for RTR Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS/SPDP Workshops ![In: Parallel and Distributed Processing, 11 IPPS/SPDP'99 Workshops Held in Conjunction with the 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing, San Juan, Puerto Rico, USA, April 12-16, 1999, Proceedings, pp. 606-615, 1999, Springer, 3-540-65831-9. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
28 | Richard H. Turner, Roger F. Woods, Sakir Sezer, Jean-Paul Heron |
A Virtual Hardware Handler for RTR Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 21-23 April 1999, Napa, CA, USA, pp. 262-263, 1999, IEEE Computer Society, 0-7695-0375-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
28 | Joni da Silva Fraga, Jean-Marie Farines, Olinto Furtado |
RTR model: an approach for dealing with real-time programming in open distributed systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WORDS ![In: 3rd Workshop on Object-Oriented Real-Time Dependable Systems (WORDS '97), 5-7 February 1997, Newport Beach, CA, USA, pp. 240-247, 1997, IEEE Computer Society, 0-8186-8046-6. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
28 | Olinto J. V. Furtado |
RTR - uma abordagem reflexiva para programação de aplicações tempo real. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
1997 |
RDF |
|
28 | John J. Wallace, Walter W. Barnes |
Designing for Ultrahigh Availability: The Unix RTR Operating System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 17(8), pp. 31-39, 1984. The full citation details ...](Pics/full.jpeg) |
1984 |
DBLP DOI BibTeX RDF |
|
27 | Lev Kirischian, Victor Dumitriu, Pil Woo Chun |
Virtualization of Computing Resources in RCS for Multi-task Stream Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReConFig ![In: ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, Proceedings, pp. 368-373, 2009, IEEE Computer Society, 978-0-7695-3917-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Virtual component, component relocation, on-chip assembly, FPGA, Reconfigurable systems, Run-time reconfiguration (RTR), Virtual processor, Resources virtualization |
27 | Ian Robertson, James Irvine 0001 |
A design flow for partially reconfigurable hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 3(2), pp. 257-283, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
dynamically reconfigurable logic (DRL), FPGA, power estimation, run-time reconfiguration (RTR), Viterbi decoder, configuration control |
27 | Philippe Brunet, Camel Tanougast, Yves Berviller, Serge Weber |
Hardware Partitioning Software for Dynamically Reconfigurable SoC Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June - 2 July 2003, Calgary, Alberta, Canada, pp. 106-111, 2003, IEEE Computer Society, 0-7695-1944-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
FPGA Dynamic Reconfiguration RTR SOC |
27 | Edson L. Horta, John W. Lockwood, David E. Taylor, David B. Parlour |
Dynamic hardware plugins in an FPGA with partial run-time reconfiguration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 2002, pp. 343-348, 2002, ACM, 1-58113-461-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
FPG, partial RTR, platform computing, Internet, routing, network, modularity, reconfiguration, IP, hardware, packet |
16 | Mark Hauschild, Martin Pelikan |
Network crossover performance on NK landscapes and deceptive problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
GECCO ![In: Genetic and Evolutionary Computation Conference, GECCO 2010, Proceedings, Portland, Oregon, USA, July 7-11, 2010, pp. 713-720, 2010, ACM, 978-1-4503-0072-8. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
estimation of distribution algorithms, bayesian optimization algorithm, crossover operators, efficiency enhancement, hierarchical boa, learning from experience |
16 | Christian S. Jensen, Hua Lu 0001, Bin Yang 0002 |
Indexing the Trajectories of Moving Objects in Symbolic Indoor Space. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SSTD ![In: Advances in Spatial and Temporal Databases, 11th International Symposium, SSTD 2009, Aalborg, Denmark, July 8-10, 2009, Proceedings, pp. 208-227, 2009, Springer, 978-3-642-02981-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
16 | Yoann Guillemenet, Lionel Torres, Gilles Sassatelli, Nicolas Bruchon, Ilham Hassoune |
A non-volatile run-time FPGA using thermally assisted switching MRAMS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2008, International Conference on Field Programmable Logic and Applications, Heidelberg, Germany, 8-10 September 2008, pp. 421-426, 2008, IEEE, 978-1-4244-1961-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Michail Maniatakos, Songhua Xu, Willard L. Miranker |
Constraint-Based Placement and Routing for FPGAs Using Self-Organizing Maps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICTAI (2) ![In: 20th IEEE International Conference on Tools with Artificial Intelligence (ICTAI 2008), November 3-5, 2008, Dayton, Ohio, USA, Volume 2, pp. 465-469, 2008, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Ting Liu 0007, Camel Tanougast, Serge Weber |
A framework of architectural synthesis for dynamically reconfigurable FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoCC ![In: 21st Annual IEEE International SoC Conference, SoCC 2008, September 17-20, 2008, Radisson Hotel, Newport Beach, CA, USA, Proceedings, pp. 283-286, 2008, IEEE, 978-1-4244-2596-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Aric D. Blumer, Cameron D. Patterson |
Hardware/Software Process Migration and RTL Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007, pp. 585-588, 2007, IEEE, 1-4244-1060-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Sumanta Chaudhuri, Jean-Luc Danger, Sylvain Guilley |
Efficient Modeling and Floorplanning of Embedded-FPGA Fabric. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007, pp. 665-669, 2007, IEEE, 1-4244-1060-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Nicolas Bruchon, Lionel Torres, Gilles Sassatelli, Gaston Cambon |
New non-volatile FPGA concept using Magnetic Tunneling Junction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2-3 March 2006, Karlsruhe, Germany, pp. 269-276, 2006, IEEE Computer Society, 0-7695-2533-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Nicolas Bruchon, Lionel Torres, Gilles Sassatelli, Gaston Cambon |
Magnetic tunnelling junction based FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 14th International Symposium on Field Programmable Gate Arrays, FPGA 2006, Monterey, California, USA, February 22-24, 2006, pp. 123-130, 2006, ACM, 1-59593-292-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
magnetic tunneling junction, FPGA, non volatility |
16 | Sara Román Navarro, Hortensia Mecha, Daniel Mozos, Julio Septién |
Partition Based Dynamic 2D HW Multitasking Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August - 1 September 2006, Dubrovnik, Croatia, pp. 61-70, 2006, IEEE Computer Society, 0-7695-2609-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Krzysztof Tchon, Janusz Jakubiak |
A repeatable inverse kinematics algorithm with linear invariant subspaces for mobile manipulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Syst. Man Cybern. Part B ![In: IEEE Trans. Syst. Man Cybern. Part B 35(5), pp. 1051-1057, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
16 | Remy Eskinazi Sant'Anna, Manoel Eusébio de Lima, Paulo Romero Martins Maciel |
A left-edge algorithm approach for scheduling and allocation of hardware contexts in dynamically reconfigurable architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, FPGA 2004, Monterey, California, USA, February 22-24, 2004, pp. 259, 2004, ACM, 1-58113-829-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
16 | Marcos R. Boschetti, Sergio Bampi, Ivan Saraiva Silva |
Throughput and Reconfiguration Time Trade-Offs: From Static to Dynamic Reconfiguration in Dedicated Image Filters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings, pp. 474-483, 2004, Springer, 3-540-22989-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
16 | L. Kalyan Kumar, Amol J. Mupid, Aditya S. Ramani, V. Kamakoti 0001 |
A Novel Method for Online In-Place Detection and Location of Multiple Interconnect Faults in SRAM Based FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China, pp. 262-267, 2003, IEEE Computer Society, 0-7695-1951-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
16 | Richard H. Turner, Roger F. Woods |
Design Flow for Efficient FPGA Reconfiguration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings, pp. 972-975, 2003, Springer, 3-540-40822-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
16 | Markus Weinhardt, Wayne Luk |
Pipeline vectorization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(2), pp. 234-248, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
16 | Camel Tanougast, Yves Berviller, Serge Weber |
Optimization of Motion Estimator for Run-Time-Reconfiguration Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS Workshops ![In: Parallel and Distributed Processing, 15 IPDPS 2000 Workshops, Cancun, Mexico, May 1-5, 2000, Proceedings, pp. 959-965, 2000, Springer, 3-540-67442-X. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
16 | Lörinc Antoni, Régis Leveugle, Béla Fehér |
Using Run-Time Reconfiguration for Fault Injection in Hardware Prototypes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 25-27 October 2000, Yamanashi, Japan, Proceedings, pp. 405-413, 2000, IEEE Computer Society, 0-7695-0719-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
16 | Célio Estevan Morón |
Designing Adaptable Real-Time Fault-Tolerant Parallel Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: Proceedings of IPPS '96, The 10th International Parallel Processing Symposium, April 15-19, 1996, Honolulu, Hawaii, USA, pp. 754-758, 1996, IEEE Computer Society, 0-8186-7255-2. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
16 | Chunsik Yi, Steven Graham |
Real-Time Reasoning with PROLOG. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGSMALL/PC Symposium ![In: Proceedings of the 1990 ACM SIGSMALL/PC Symposium on Small Systems, March 28-30, 1990. Crystal City, VA, USA, pp. 94-97, 1990, ACM, 0-89791-347-7. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
Prolog |