Search results for "STT"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
142	Jing Huang 0019, Etienne Marcheret, Karthik Visweswariah, Vit Libal, Gerasimos Potamianos	The IBM Rich Transcription 2007 Speech-to-Text Systems for Lecture Meetings.	CLEAR	2007	DBLP DOI BibTeX RDF
77	Yiran Chen 0001, Hai Li 0001, Xiaobin Wang, Wenzhong Zhu, Wei Xu 0021, Tong Zhang 0002	Combined magnetic- and circuit-level enhancements for the nondestructive self-reference scheme of STT-RAM.	ISLPED	2010	DBLP DOI BibTeX RDF	STT-RAM, emerging memory, spintronic
77	Xiaochen Guo, Engin Ipek, Tolga Soyata	Resistive computation: avoiding the power wall with low-leakage, STT-MRAM based computing.	ISCA	2010	DBLP DOI BibTeX RDF	STT-MRAM, power-efficiency
77	Wei Xu 0021, Yiran Chen 0001, Xiaobin Wang, Tong Zhang 0002	Improving STT MRAM storage density through smaller-than-worst-case transistor sizing.	DAC	2009	DBLP DOI BibTeX RDF	STT MRAM, defect tolerance, transistor sizing
77	Jing Li 0073, Charles Augustine, Sayeef S. Salahuddin, Kaushik Roy 0001	Modeling of failure probability and statistical design of spin-torque transfer magnetic random access memory (STT MRAM) array for yield enhancement.	DAC	2008	DBLP DOI BibTeX RDF	STT MRAM, yield
71	Wing-Kai Hon, Ming-Yang Kao, Tak Wah Lam	Improved Phylogeny Comparisons: Non-shared Edges, Nearest Neighbor Interchanges, and Subtree Transfers.	ISAAC	2000	DBLP DOI BibTeX RDF
59	Mitchelle Rasquinha, Dhruv Choudhary, Subho Chatterjee, Saibal Mukhopadhyay, Sudhakar Yalamanchili	An energy efficient cache design using spin torque transfer (STT) RAM.	ISLPED	2010	DBLP DOI BibTeX RDF	(STT)RAM, memory technologies, cache design
53	Jingyu Hua, Mingchu Li, Kouichi Sakurai, Yizhi Ren	Efficient Intrusion Detection Based on Static Analysis and Stack Walks.	IWSEC	2009	DBLP DOI BibTeX RDF
53	Yoshiaki Asao, Masayoshi Iwayama, Kenji Tsuchida, Akihiro Nitayama, Hiroaki Yoda, Hisanori Aikawa, Sumio Ikegawa, Tatsuya Kishi	A Statistical Model for Assessing the Fault Tolerance of Variable Switching Currents for a 1Gb Spin Transfer Torque Magnetoresistive Random Access Memory.	DFT	2008	DBLP DOI BibTeX RDF
53	Jonathan G. Fiscus, Jerome Ajot, John S. Garofolo	The Rich Transcription 2007 Meeting Recognition Evaluation.	CLEAR	2007	DBLP DOI BibTeX RDF
53	Jing Huang 0019, Martin Westphal, Stanley F. Chen, Olivier Siohan, Daniel Povey, Vit Libal, Alvaro Soneiro, Henrik Schulz 0001, Thomas Ross, Gerasimos Potamianos	The IBM Rich Transcription Spring 2006 Speech-to-Text System for Lecture Meetings.	MLMI	2006	DBLP DOI BibTeX RDF
53	Sanun Srisuk, Maria Petrou, Werasak Kurutach, Alexander Kadyrov	A face authentication system using the trace transform.	Pattern Anal. Appl.	2005	DBLP DOI BibTeX RDF	Hausdorff context, Face authentication, Trace transform
53	Paula Vesterinen, Helena Hänninen, Matti Stenroos, Petri Korhonen, Terhi Husa, Ilkka Tierala, Heikki Väänänen, Lauri Toivonen	Spatial Inversion of Depolarization and Repolarization Waves in Body Surface Potential Mapping as Indicator of Old Myocardial Infarction.	FIMH	2005	DBLP DOI BibTeX RDF
53	Sanun Srisuk, Maria Petrou, Werasak Kurutach, Alexander Kadyrov	Face Authentication using the Trace Transform.	CVPR (1)	2003	DBLP DOI BibTeX RDF
53	Toshio Baba, Tetsuya Uemura	Multiple-Junction Surface Tunnel Transistors for Multiple-Valued Logic Circuits .	ISMVL	1997	DBLP DOI BibTeX RDF
45	Vijay Varadharajan, Yi Mu 0001	On The Design Of Secure Electronic Payment Schemes For Internet.	ACSAC	1996	DBLP DOI BibTeX RDF	secure electronic payment schemes, commercial electronic credit card transactions, iKP, STT, SEPP, permission-based payment protocol, PBP protocol, purchase request phase, payment phase, secret private key, Internet, disputes, EFTS
36	Wai Chee Yau, Dinesh Kant Kumar, Tharangini Chinnadurai	Lip-Reading Technique Using Spatio-Temporal Templates and Support Vector Machines.	CIARP	2008	DBLP DOI BibTeX RDF	support vector machines, feature selection, motion segmentation, Zernike moments, visual speech recognition
36	Jonathan G. Fiscus, Jerome Ajot, Martial Michel, John S. Garofolo	The Rich Transcription 2006 Spring Meeting Recognition Evaluation.	MLMI	2006	DBLP DOI BibTeX RDF
36	Jonathan G. Fiscus, Nicolas Radde, John S. Garofolo, Audrey N. Le, Jerome Ajot, Christophe Laprun	The Rich Transcription 2005 Spring Meeting Recognition Evaluation.	MLMI	2005	DBLP DOI BibTeX RDF
36	Sanun Srisuk, Maria Petrou, Rerkchai Fooprateepsiri, Khamron Sunat, Werasak Kurutach, Pichet Chopaka	A Combination of Shape and Texture Classifiers for a Face Verification System.	ICBA	2004	DBLP DOI BibTeX RDF
36	Mei Bai, Shuqian Luo	Improved Fiber Tracking for Diffusion Tensor MRI.	MIAR	2004	DBLP DOI BibTeX RDF
33	Jing Li 0073, Patrick Ndai, Ashish Goel, Haixin Liu, Kaushik Roy 0001	An alternate design paradigm for robust spin-torque transfer magnetic RAM (STT MRAM) from circuit/architecture perspective.	ASP-DAC	2009	DBLP DOI BibTeX RDF
33	Congying Li, Daquan Tang, Anli Shang, Wenjin Gu, Ruiqi Wang	Flatness based real-time trajectory generation for acceleration control of agile STT missile with constraints.	ICARCV	2004	DBLP DOI BibTeX RDF
31	Thi-Nhan Pham, Quang-Kien Trinh, Ik-Joon Chang, Massimo Alioto	STT-BNN: A Novel STT-MRAM In-Memory Computing Macro for Binary Neural Networks.	IEEE J. Emerg. Sel. Topics Circuits Syst.	2022	DBLP DOI BibTeX RDF
31	Van-Tinh Nguyen, Quang-Kien Trinh, Renyuan Zhang, Yasuhiko Nakashima	STT-BSNN: An In-Memory Deep Binary Spiking Neural Network Based on STT-MRAM.	IEEE Access	2021	DBLP DOI BibTeX RDF
31	Ben Perach, Shahar Kvatinsky	STT-ANGIE: Asynchronous True Random Number GEnerator Using STT-MTJ.	DATE	2019	DBLP DOI BibTeX RDF
31	Mounia Kharbouche-Harrari	Hybridation CMOS/STT-MRAM des circuits intégrés pour la sécurité matérielle de l'internet des Objets. (CMOS/STT-MRAM hybridization of integrated circuits for the hardware security of the Internet of Things).		2019	RDF
31	Sarath Mohanachandran Nair, Rajendra Bishnoi, Mohammad Saber Golanbari, Fabian Oboril, Fazal Hameed, Mehdi Baradaran Tahoori	VAET-STT: Variation Aware STT-MRAM Analysis and Design Space Exploration Tool.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2018	DBLP DOI BibTeX RDF
31	Yuanhui Ni, Weiwen Chen, Lei Wang, Keni Qiu	面向MLC STT-RAM的寄存器分配策略优化研究 (Optimization of Register Allocation Strategy for MLC STT-RAM).	计算机科学	2018	DBLP BibTeX RDF
31	Sarath Mohanachandran Nair, Rajendra Bishnoi, Mohammad Saber Golanbari, Fabian Oboril, Mehdi Baradaran Tahoori	VAET-STT: A variation aware estimator tool for STT-MRAM based memories.	DATE	2017	DBLP DOI BibTeX RDF
27	Yongbing Zhong, Jinfu Feng, Zhizhuan Peng, Xiaolong Liang	Research on Adaptive System of the BTT-45 Air-to-Air Missile Based on Multilevel Hierarchical Intelligent Controller.	ICES	2007	DBLP DOI BibTeX RDF	BTT, STT, Air-to-Air Missile, Reversing Design, “IC”
26	Takashi Nanya, Yoshihiro Tohma	On Universal Single Transition Time Asynchronous State Assignments.	IEEE Trans. Computers	1978	DBLP DOI BibTeX RDF	single transition time (STT) state assignments, universal, state assignments, Asynchronous sequential circuits
18	Donia Zheni, Ali Frihida, Henda Hajjami Ben Ghézala, Christophe Claramunt	A Semantic Approach for the Modeling of Trajectories in Space and Time.	ER Workshops	2009	DBLP DOI BibTeX RDF	Space-time modelling, trajectories, time-geography
18	Amit P. Sheth, Matthew Perry	Traveling the Semantic Web through Space, Time, and Theme.	IEEE Internet Comput.	2008	DBLP DOI BibTeX RDF
18	Wai Chee Yau, Dinesh Kant Kumar, Hans Weghorn	Visual Speech Recognition Using Motion Features and Hidden Markov Models.	CAIP	2007	DBLP DOI BibTeX RDF	hidden Markov models, Zernike moments, visual speech recognition
18	Matthias Zimmermann, Dilek Hakkani-Tür, Elizabeth Shriberg, Andreas Stolcke	Text Based Dialog Act Classification for Multiparty Meetings.	MLMI	2006	DBLP DOI BibTeX RDF
18	Ming Tang, Bu-Sung Lee, Xueyan Tang, Chai Kiat Yeo	Combining Data Replication Algorithms and Job Scheduling Heuristics in the Data Grid.	Euro-Par	2005	DBLP DOI BibTeX RDF
18	Guorong Zhao, Qingjiu Xu, Jinyong Yu, Wenjin Gu	Integrated guidance/autopilot scheme for anti-vessel missiles based on three channels independence design idea.	ICARCV	2004	DBLP DOI BibTeX RDF
18	Arun Sharma 0005, Dinesh Kant Kumar	Moments and Wavelets for Classification of Human Gestures Represented by Spatio-Temporal Templates.	Australian Conference on Artificial Intelligence	2004	DBLP DOI BibTeX RDF
18	Avishai Wool	Key management for encrypted broadcast.	ACM Trans. Inf. Syst. Secur.	2000	DBLP DOI BibTeX RDF	pay-per-view, conditional access
18	Tetsuya Uemura, Toshio Baba	Demonstration of a Novel Multiple-Valued T-Gate Using Multiple-Junction Surface Tunnel Transistors and Its Application to Three-Valued Data Flip-Flop.	ISMVL	2000	DBLP DOI BibTeX RDF	tunnel transistor, multiple-valued T-gate, D-FF, NDR
18	Michel Abdalla, Yuval Shavitt, Avishai Wool	Towards Making Broadcast Encryption Practical.	Financial Cryptography	1999	DBLP DOI BibTeX RDF
18	Wenbo Mao	On two Proposals for On-line Bankcard Payments using Open Networks: Problems and Solutions.	S&P	1996	DBLP DOI BibTeX RDF
16	De-Qi You, Yen-Cheng Chiu, Win-San Khwa, Chung-Yuan Li, Fang-Ling Hsieh, Yu-An Chien, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang	An 8b-Precision 8-Mb STT-MRAM Near-Memory-Compute Macro Using Weight-Feature and Input-Sparsity Aware Schemes for Energy-Efficient Edge AI Devices.	IEEE J. Solid State Circuits	2024	DBLP DOI BibTeX RDF
16	Takahiro Shimoi, Ken Matsubara, Tomoya Saito, Tomoya Ogawa, Yasuhiko Taito, Yoshinobu Kaneda, Masayuki Izuna, Koichi Takeda, Hidenori Mitani, Takashi Ito, Takashi Kono	A 22-nm 32-Mb Embedded STT-MRAM Macro Achieving 5.9-ns Random Read Access and 7.4-MB/s Write Throughput at up to 150 °C.	IEEE J. Solid State Circuits	2024	DBLP DOI BibTeX RDF
16	Belal Jahannia, Seyed Ali Ghasemi, Hamed Farbeh	Multi-Retention STT-MRAM Architectures for IoT: Evaluating the Impact of Retention Levels and Memory Mapping Schemes.	IEEE Access	2024	DBLP DOI BibTeX RDF
16	Saeed Seyedfaraji, Markus Bichl, Asad Aftab, Semeen Rehman	HOPE: Holistic STT-RAM Architecture Exploration Framework for Future Cross-Platform Analysis.	IEEE Access	2024	DBLP DOI BibTeX RDF
16	Alaba Yusuf, Tosiron Adegbija, Dhruv Gajaria	Domain-Specific STT-MRAM-Based In-Memory Computing: A Survey.	IEEE Access	2024	DBLP DOI BibTeX RDF
16	Sureum Choi, Daejin Han, Chanyeong Choi, Yeongkyo Seo	Layout-Aware Area Optimization of Transposable STT-MRAM for a Processing-In-Memory System.	IEEE Trans. Very Large Scale Integr. Syst.	2024	DBLP DOI BibTeX RDF
16	Yongliang Zhou, Zixuan Zhou, Yiming Wei, Zhen Yang, Xiao Lin, Chenghu Dai, Licai Hao, Chunyu Peng, Hao Cai, Xiulong Wu	A CFMB STT-MRAM-Based Computing-in-Memory Proposal With Cascade Computing Unit for Edge AI Devices.	IEEE Trans. Circuits Syst. I Regul. Pap.	2024	DBLP DOI BibTeX RDF
16	Belal Jahannia, Seyed Ali Ghasemi, Hamed Farbeh	An Energy Efficient Multi-Retention STT-MRAM Memory Architecture for IoT Applications.	IEEE Trans. Circuits Syst. II Express Briefs	2024	DBLP DOI BibTeX RDF
16	Chao Wang 0094, Zhaohao Wang, Zhongkui Zhang, Youguang Zhang, Weisheng Zhao	Area and Energy Efficient Short-Circuit-Logic-Based STT-MRAM Crossbar Array for Binary Neural Networks.	IEEE Trans. Circuits Syst. II Express Briefs	2024	DBLP DOI BibTeX RDF
16	Saeed Seyedfaraji, Markus Bichl, Asad Aftab, Semeen Rehman	HOPE: Holistic STT-RAM Architecture Exploration Framework for Future Cross-Platform Analysis.	CoRR	2024	DBLP DOI BibTeX RDF
16	Roberto Rodríguez-Rodríguez, Javier Díaz, Fernando Castro, Pablo Ibáñez, Daniel Chaver, Víctor Viñals, Juan Carlos Saez, Manuel Prieto-Matías, Luis Piñuel, Teresa Monreal, José María Llabería	Reuse Detector: Improving the Management of STT-RAM SLLCs.	CoRR	2024	DBLP DOI BibTeX RDF
16	Ku-Feng Lin, Hiroki Noguchi, Yi-Chun Shih, Perng-Fei Yuh, Yuan-Jen Lee, Tung-Cheng Chang, Sheng-Po Huang, Yu-Fan Lin, Chun-Ying Lee, Yen-Hsiang Huang, Jui-Che Tsai, Saman Adham, Peter Noel, Ramin Yazdi, Marat Gershoig, YangJae Shin, Vineet Joshi, Ted Wong, Meng-Ru Jiang, J. J. Wu, Chun-Tai Cheng, Yu-Jen Wang, Harry Chuang, Yu-Der Chih, Yih Wang, Tsung-Yung Jonathan Chang	15.9 A 16nm 16Mb Embedded STT-MRAM with a 20ns Write Time, a 1012 Write Endurance and Integrated Margin-Expansion Schemes.	ISSCC	2024	DBLP DOI BibTeX RDF
16	Tomoya Ogawa, Ken Matsubara, Yasuhiko Taito, Tomoya Saito, Masayuki Izuna, Koichi Takeda, Yoshinobu Kaneda, Takahiro Shimoi, Hidenori Mitani, Takashi Ito, Takashi Kono	15.8 A 22nm 10.8Mb Embedded STT-MRAM Macro Achieving over 200MHz Random-Read Access and a 10.4MB/s Write Throughput with an In-Field Programmable 0.3Mb MTJ-OTP for High-End MCUs.	ISSCC	2024	DBLP DOI BibTeX RDF
16	SatyaJaswanth Badri, Mukesh Saini, Neeraj Goel	Efficient placement and migration policies for an STT-RAM based hybrid L1 cache for intermittently powered systems.	Des. Autom. Embed. Syst.	2023	DBLP DOI BibTeX RDF
16	Tatiana Moposita, Esteban Garzón, Raffaele De Rose, Felice Crupi, Andrei Vladimirescu, Lionel Trojman, Marco Lanuzza	SIMPLY+: A Reliable STT-MRAM-Based Smart Material Implication Architecture for In-Memory Computing.	IEEE Access	2023	DBLP DOI BibTeX RDF
16	Tao Li 0005, Yitao Ma, Ko Yoshikawa, Tetsuo Endoh	Hybrid Signed Convolution Module With Unsigned Divide-and-Conquer Multiplier for Energy-Efficient STT-MRAM-Based AI Accelerator.	IEEE Trans. Very Large Scale Integr. Syst.	2023	DBLP DOI BibTeX RDF
16	Siqing Fu, Tiejun Li, Chunyuan Zhang, Hanqing Li, Sheng Ma, Jianmin Zhang, Ruiyi Zhang, Lizhou Wu	RHS-TRNG: A Resilient High-Speed True Random Number Generator Based on STT-MTJ Device.	IEEE Trans. Very Large Scale Integr. Syst.	2023	DBLP DOI BibTeX RDF
16	Tao Li 0005, Yitao Ma, Ko Yoshikawa, Tetsuo Endoh	Corrections to "Hybrid Signed Convolution Module With Unsigned Divide-and-Conquer Multiplier for Energy-Efficient STT-MRAM-Based AI Accelerator".	IEEE Trans. Very Large Scale Integr. Syst.	2023	DBLP DOI BibTeX RDF
16	Arash Salahvarzi, Mohsen Khosroanjam, Amir Mahdi Hosseini Monazzah, Hakem Beitollahi, Ümit Y. Ogras, Mahdi Fazeli	WiSE: When Learning Assists Resolving STT-MRAM Efficiency Challenges.	IEEE Trans. Emerg. Top. Comput.	2023	DBLP DOI BibTeX RDF
16	Guojie Li, Lei Liu, Jinguo Liu, Yanming Wu, Juanping Zhao	Three-dimensional low-order fixed-time integrated guidance and control for STT missile with strap-down seeker.	J. Frankl. Inst.	2023	DBLP DOI BibTeX RDF
16	An Yang, Zhilin Jiang, Zheng Huang, Zitong Zhang, Yanfeng Jiang	Double-Ended Superposition Anti-Noise Resistance Monitoring Write Termination Scheme for Reliable Write Operation in STT-MRAM.	IEEE Trans. Circuits Syst. I Regul. Pap.	2023	DBLP DOI BibTeX RDF
16	Ariana Musello, Esteban Garzón, Marco Lanuzza, Luis-Miguel Prócel, Ramiro Taco	XNOR-Bitcount Operation Exploiting Computing-In-Memory With STT-MRAMs.	IEEE Trans. Circuits Syst. II Express Briefs	2023	DBLP DOI BibTeX RDF
16	Byoungchan Oh, Nilmini Abeyratne, Nam Sung Kim, Jeongseob Ahn, Ronald G. Dreslinski, Trevor N. Mudge	Rethinking DRAM's Page Mode With STT-MRAM.	IEEE Trans. Computers	2023	DBLP DOI BibTeX RDF
16	Wei Zhao 0034, Dan Feng 0001, Wei Tong 0001, Jingning Liu, Zhangyu Chen, Bing Wu 0001, Chengning Wang	APPcache+: An STT-MRAM-Based Approximate Cache System With Low Power and Long Lifetime.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2023	DBLP DOI BibTeX RDF
16	Sheel Sindhu Manohar, Hemangee K. Kapoor	CAPMIG: Coherence-Aware Block Placement and Migration in Multiretention STT-RAM Caches.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2023	DBLP DOI BibTeX RDF
16	Wei Zhao 0034, Jie Xu 0013, Xueliang Wei, Bing Wu 0001, Chengning Wang, Weilin Zhu, Wei Tong 0001, Dan Feng 0001, Jingning Liu	A Low-Latency and High-Endurance MLC STT-MRAM-Based Cache System.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2023	DBLP DOI BibTeX RDF
16	Dawei Liu, Quan Chen	TEMT: A Transient Electronic-Magnetic-Thermal-Coupled Simulation Framework for STT-MTJs.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2023	DBLP DOI BibTeX RDF
16	Yueting Li, Wang Kang 0001, Kunyu Zhou, Keni Qiu, Weisheng Zhao	Experimental Demonstration of STT-MRAM-based Nonvolatile Instantly On/Off System for IoT Applications: Case Studies.	ACM Trans. Embed. Comput. Syst.	2023	DBLP DOI BibTeX RDF
16	Sourjya Roy, Cheng Wang, Anand Raghunathan	Evaluation of STT-MRAM as a Scratchpad for Training in ML Accelerators.	CoRR	2023	DBLP DOI BibTeX RDF
16	Siqing Fu, Tiejun Li, Chunyuan Zhang, Hanqing Li, Sheng Ma, Jianmin Zhang, Ruiyi Zhang, Lizhou Wu	RHS-TRNG: A Resilient High-Speed True Random Number Generator Based on STT-MTJ Device.	CoRR	2023	DBLP DOI BibTeX RDF
16	Ben Perach, Shahar Kvatinsky	An Asynchronous and Low-Power True Random Number Generator using STT-MTJ.	CoRR	2023	DBLP DOI BibTeX RDF
16	Hao Cai, Yaoru Hou, Mengdi Zhang, Bo Liu 0019, Lirida Alves de Barros Naviner	Dependable STT-MRAM With Emerging Approximation and Speculation Paradigms.	IEEE Des. Test	2023	DBLP DOI BibTeX RDF
16	Jinzhi Lai, Jueping Cai, Jie Chu	A congestion-aware hybrid SRAM and STT-RAM buffer design for network-on-chip router.	IEICE Electron. Express	2023	DBLP DOI BibTeX RDF
16	Fernando García-Redondo, S. Rao, M. Gupta, Manu Perumkunnil, Y. Xiang, D. Abdi, Simon Van Beek, S. Couet, Marie Garcia Bardon	STT-MRAM Stochastic and Defects-aware DTCO for Last Level Cache at Advanced Process Nodes.	ESSDERC	2023	DBLP DOI BibTeX RDF
16	Haris Suhail, Jiyue Yang, Haoran He, Kang L. Wang, Sudhakar Pamarti	Analytical Array-Level Comparison of Read/Write Performance Between Voltage Controlled-MRAM and STT-MRAM.	MWSCAS	2023	DBLP DOI BibTeX RDF
16	J. Tan, J. H. Lim, Jae Hyun Kwon, Vinayak Bharat Naik, Nagarajan Raghavan, Kin Leong Pey	Backhopping-based STT-MRAM Poisson Spiking Neuron for Neuromorphic Computation.	IRPS	2023	DBLP DOI BibTeX RDF
16	Hideo Sato, H. M. Shin, H. Jung, S. W. Lee, H. Bae, H. Kwon, K. H. Ryu, W. C. Lim, Y. S. Han, J. H. Jeong, J. M. Lee, D. S. Kim, K. Lee, J. H. Lee, J. H. Park, Y. J. Song, Y. Ji, B. I. Seo, J. W. Kim, H. H. Kim	Comprehensive study on prediction of endurance properties from breakdown voltage in high-reliable STT-MRAM.	IRPS	2023	DBLP DOI BibTeX RDF
16	Jinkai Wang, Zhengkun Gu, Hongyu Wang, Zuolei Hao, Bojun Zhang, Weisheng Zhao, Yue Zhang 0010	TAM: A Computing in Memory based on Tandem Array within STT-MRAM for Energy-Efficient Analog MAC Operation.	DATE	2023	DBLP DOI BibTeX RDF
16	Sicong Yuan, Mottaqiallah Taouil, Moritz Fieback, Hanzhi Xun, Erik Jan Marinissen, Gouri Sankar Kar, Sidharth Rao, Sebastien Couet, Said Hamdioui	Device-Aware Test for Back-Hopping Defects in STT-MRAMs.	DATE	2023	DBLP DOI BibTeX RDF
16	Linjun Jiang, Sifan Sun, Jinming Ge, He Zhang 0011, Wang Kang 0001	An In-Memory-Computing STT-MRAM Macro with Analog ReLU and Pooling Layers for Ultra-High Efficient Neural Network.	NVMSA	2023	DBLP DOI BibTeX RDF
16	Yueting Li, He Zhang, Xueyan Wang, Hao Cai, Yundong Zhang, Shuqin Lv, Renguang Liu, Weisheng Zhao	Toward Energy-Efficient Sparse Matrix-Vector Multiplication with near STT-MRAM Computing Architecture.	ASP-DAC	2023	DBLP DOI BibTeX RDF
16	Yu-Guang Chen, Po-Yeh Huang, Jin-Fu Li 0001	An On-Line Aging Detection and Tolerance Framework for Improving Reliability of STT-MRAMs.	ASP-DAC	2023	DBLP DOI BibTeX RDF
16	Ahmed Aouichi, Sicong Yuan, Moritz Fieback, Siddharth Rao, Woojin Kim, Erik Jan Marinissen, Sebastien Couet, Mottaqiallah Taouil, Said Hamdioui	Device Aware Diagnosis for Unique Defects in STT-MRAMs.	ATS	2023	DBLP DOI BibTeX RDF
16	Santiago S. Pérez, Alessandro Bedoya, Luis-Miguel Prócel, Ramiro Taco	Performance Benchmarking of FinFET- and TFET-Based STT-MRAM Bitcells Operating at Ultra-Low Voltages.	LASCAS	2023	DBLP DOI BibTeX RDF
16	Esteban Garzón, Leonid Yavits, Adam Teman, Marco Lanuzza	STT-MRAM Technology For Energy-Efficient Cryogenic Memory Applications.	LASCAS	2023	DBLP DOI BibTeX RDF
16	Xinshu Xie, Jiongzhe Su, Hao Zhang, Hao Cai	A FinFET Integrated STT-MRAM with Triple Balanced Access Strategy.	ICTA	2023	DBLP DOI BibTeX RDF
16	Weijie Chen, Haifeng Luo, Feng Ye, Tianqiang Huang, Liqing Huang, Chao Xu	SA-STT: A Structure-Aware Spatio-Temporal Transformer for Traffic Prediction.	ISKE	2023	DBLP DOI BibTeX RDF
16	Jeongdong Choe	Recent Technology Insights on STT-MRAM: Structure, Materials, and Process Integration.	IMW	2023	DBLP DOI BibTeX RDF
16	Yen-Cheng Chiu, Win-San Khwa, Chung-Yuan Li, Fang-Ling Hsieh, Yu-An Chien, Guan-Yi Lin, Po-Jung Chen, Tsen-Hsiang Pan, De-Qi You, Fang-Yi Chen, Andrew Lee, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang	A 22nm 8Mb STT-MRAM Near-Memory-Computing Macro with 8b-Precision and 46.4-160.1TOPS/W for Edge-AI Devices.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Po-Hao Lee, Chia-Fu Lee, Yi-Chun Shih, Hon-Jarn Lin, Yen-An Chang, Cheng-Han Lu, Yu-Lin Chen, Chieh-Pu Lo, Chung-Chieh Chen, Cheng-Hsiung Kuo, Tan-Li Chou, Chia-Yu Wang, J. J. Wu, Roger Wang, Harry Chuang, Yih Wang, Yu-Der Chih, Tsung-Yung Jonathan Chang	A 16nm 32Mb Embedded STT-MRAM with a 6ns Read-Access Time, a 1M-Cycle Write Endurance, 20-Year Retention at 150°C and MTJ-OTP Solutions for Magnetic Immunity.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Hao Cai, Zhong-Jian Bian, Yaoru Hou, Yongliang Zhou, Jia-Le Cui, Yanan Guo 0004, Xiaoyun Tian, Bo Liu 0019, Xin Si, Zhen Wang, Jun Yang 0006, Weiwei Shan	A 28nm 2Mb STT-MRAM Computing-in-Memory Macro with a Refined Bit-Cell and 22.4 - 41.5TOPS/W for AI Inference.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Lu Lu 0013, Aarthy Mani, Anh Tuan Do	A 129.83 TOPS/W Area Efficient Digital SOT/STT MRAM-Based Computing-In-Memory for Advanced Edge AI Chips.	ISCAS	2023	DBLP DOI BibTeX RDF
16	Meng-Shan Wu, Yen-Lin Chua, Jin-Fu Li 0001, Yun-Ting Chuan, Shih-Hsu Huang	Fault-Aware ECC Scheme for Enhancing the Read Reliability of STT-MRAMs.	ITC-Asia	2023	DBLP DOI BibTeX RDF
16	Gwangeun Byeon, Seongwook Kim, Seokin Hong	Improving Performance and Energy-efficiency of DNN Accelerators with STT-RAM Buffers.	ISOCC	2023	DBLP DOI BibTeX RDF
16	Sicong Yuan, Z. Zhang, Moritz Fieback, Hanzhi Xun, Erik Jan Marinissen, Gouri Sankar Kar, Sidharth Rao, Sebastien Couet, M. Taouil, Said Hamdioui	Magnetic Coupling Based Test Development for Contact and Interconnect Defects in STT-MRAMs.	ITC	2023	DBLP DOI BibTeX RDF
16	Yen-Cheng Chiu, Tung-Cheng Chang, Chun-Ying Lee, Je-Min Hung, Kuang-Tang Chang, Cheng-Xin Xue, Ssu-Yen Wu, Hui-Yao Kao, Peng Chen, Hsiao-Yu Huang, Shih-Hsih Teng, Chieh-Pu Lo, Yi-Chun Shih, Yu-Der Chih, Tsung-Yung Jonathan Chang, Yier Jin, Meng-Fan Chang	A 22-nm 1-Mb 1024-b Read Data-Protected STT-MRAM Macro With Near-Memory Shift-and-Rotate Functionality and 42.6-GB/s Read Bandwidth for Security-Aware Mobile Device.	IEEE J. Solid State Circuits	2022	DBLP DOI BibTeX RDF
16	Adrian Tatulian, Ronald F. DeMara	Generalized Exponentiation Using STT Magnetic Tunnel Junctions: Circuit Design, Performance, and Application to Neural Network Gradient Decay.	SN Comput. Sci.	2022	DBLP DOI BibTeX RDF