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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 174 occurrences of 130 keywords
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Results
Found 261 publication records. Showing 261 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
31 | Oussama Laouamri, Chouki Aktouf |
Towards a Complete SNMP-Based Supervision of System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Netw. Syst. Manag. ![In: J. Netw. Syst. Manag. 13(4), pp. 373-386, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
P1500 wrapper, System-on-chips, Network management, SNMP, Design-for-test |
29 | Jan Moritz Joseph, Dominik Ermel, Lennart Bamberg, Alberto García Ortiz, Thilo Pionteck |
System-level optimization of Network-on-Chips for heterogeneous 3D System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1909.13807, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
|
29 | Jan Moritz Joseph, Dominik Ermel, Lennart Bamberg, Alberto García Ortiz, Thilo Pionteck |
System-Level Optimization of Network-on-Chips for Heterogeneous 3D System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 37th IEEE International Conference on Computer Design, ICCD 2019, Abu Dhabi, United Arab Emirates, November 17-20, 2019, pp. 409-412, 2019, IEEE, 978-1-5386-6648-7. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
23 | Xiaoyu Ruan, Rajendra S. Katti |
Data-Independent Pattern Run-Length Compression for Testing Embedded Cores in SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 56(4), pp. 545-556, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
system-on-chips, automatic test pattern generator, Automatic test equipment, test data compression, embedded core testing, run-length coding |
21 | Oussama Laouamri, Chouki Aktouf |
Enhancing Testability of System on Chips Using Network Management Protocols. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 1370-1371, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda, Toshio Isomura, Kazuo Satou |
Trace-driven workload simulation method for Multiprocessor System-On-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 232-237, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
MPSoC architecture exploration, simulation, performance estimation, workload model |
21 | Takefumi Yoshikawa, Takashi Hirata, Tsuyoshi Ebuchi, Toru Iwata, Yukio Arima, Hiroyuki Yamauchi |
An Over-1-Gb/s Transceiver Core for Integration Into Large System-on-Chips for Consumer Electronics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 16(9), pp. 1187-1198, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
21 | Rajesh Tiwari, Abhijeet Shrivastava, Mahit Warhadpande, Srivaths Ravi 0001, Rubin A. Parekhji |
A Regression Based Technique for ATE-Aware Test Data Volume Estimation of System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 26th IEEE VLSI Test Symposium (VTS 2008), April 27 - May 1, 2008, San Diego, California, USA, pp. 53-58, 2008, IEEE Computer Society, 978-0-7695-3123-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Tester, ATPG, Estimation, ATE, Test Time, Test Data Volume |
21 | Fawnizu Azmadi Hussin, Tomokazu Yoneda, Alex Orailoglu, Hideo Fujiwara |
Core-Based Testing of Multiprocessor System-on-Chips Utilizing Hierarchical Functional Buses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 720-725, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Riccardo Mariani, Gabriele Boschi |
A systematic approach for Failure Modes and Effects Analysis of System-On-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 8-11 July 2007, Heraklion, Crete, Greece, pp. 187-188, 2007, IEEE Computer Society, 0-7695-2918-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
21 | Santanu Chattopadhyay, K. Sudarsana Reddy |
Genetic Algorithm based Test Scheduling and Test Access Mechanism Design for System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 16th International Conference on VLSI Design (VLSI Design 2003), 4-8 January 2003, New Delhi, India, pp. 341-346, 2003, IEEE Computer Society, 0-7695-1868-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
21 | Kazuhiko Iijima, Armagan Akar, Charlie McDonald, Dwayne Burek |
Embedded Test Solution as a Breakthrough in Reducing Cost of Test for System on Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 11th Asian Test Symposium (ATS 2002), 18-20 November 2002, Guam, USA, pp. 311-316, 2002, IEEE Computer Society, 0-7695-1825-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Yi Zhao, Li Chen, Sujit Dey |
On-Line Testing of Multi-Source Noise-Induced Errors on the Interconnects and Buses of System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2002, Baltimore, MD, USA, October 7-10, 2002, pp. 491-499, 2002, IEEE Computer Society, 0-7803-7543-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis |
Performance Improvements from Partitioning Applications to FPGA Hardware in Embedded SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 35(2), pp. 185-199, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
embedded system-on-chips, kernel identification, FPGA, hardware/software partitioning, performance improvement |
16 | Subrat Mishra, Sankatali Venkateswarlu, Bjorn Vermeersch, Moritz Brunion, Melina Lofrano, Dawit Burusie Abdi, Herman Oprins, Dwaipayan Biswas, Odysseas Zografos, Gaspard Hiblot, Geert Van der Plas, Pieter Weckx, Geert Hellings, James Myers, Francky Catthoor, Julien Ryckaert |
Towards Chip-Package-System Co-optimization of Thermally-limited System-On-Chips (SOCs). ![Search on Bibsonomy](Pics/bibsonomy.png) |
IRPS ![In: IEEE International Reliability Physics Symposium, IRPS 2023, Monterey, CA, USA, March 26-30, 2023, pp. 1-7, 2023, IEEE, 978-1-6654-5672-2. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
16 | Huajuan Zhang, Hao Xiao, Ning Wu |
A system-level design of MapReduce-based embedded multiprocessor system-on-chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISOCC ![In: International SoC Design Conference, ISOCC 2016, Jeju, South Korea, October 23-26, 2016, pp. 337-338, 2016, IEEE, 978-1-5090-3219-8. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Sungchan Kim, Soonhoi Ha |
System-level performance analysis of multiprocessor system-on-chips by combining analytical model and execution time variation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 38(3), pp. 233-245, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
16 | Jia Huang |
Towards an Integrated Framework for Reliability-Aware Embedded System Design on Multiprocessor System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2014 |
RDF |
|
16 | Wen-Tsai Sung, Jui-Ho Chen, Kung-Wei Chang |
Study on a Real-Time BEAM System for Diagnosis Assistance Based on a System on Chips Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sensors ![In: Sensors 13(5), pp. 6552-6577, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
16 | Guanyi Sun, Shengnan Xu, Xu Wang, Dawei Wang, Eugene Tang, Yangdong Deng, Sun Chan |
A High-Throughput, High-Accuracy System-Level Simulation Framework for System on Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 2011, pp. 726014:1-726014:17, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
16 | Yuxin Wang, Martin Margala |
New Embedded Core Testing for System-on-Chips and System-in-Packages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCECE ![In: Proceedings of the Canadian Conference on Electrical and Computer Engineering, CCECE 2006, May 7-10, 2006, Ottawa Congress Centre, Ottawa, Canada, pp. 1897-1900, 2006, IEEE, 1-4244-0038-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla |
System Level Design Methodology for System On Chips using Multi-Threaded Graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoCC ![In: Proceedings 2005 IEEE International SOC Conference, September 25-28, 2005, Washington Dulles Airport, Herndon, VA, USA, pp. 133-136, 2005, IEEE, 0-7803-9264-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Emanuele Parisi, Alberto Musa, Maicol Ciani, Francesco Barchi, Davide Rossi, Andrea Bartolini, Andrea Acquaviva |
Assessing the Performance of OpenTitan as Cryptographic Accelerator in Secure Open-Hardware System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2402.10395, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
14 | Ismet Dagli, Mehmet E. Belviranli |
Shared Memory-contention-aware Concurrent DNN Execution for Diversely Heterogeneous System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPoPP ![In: Proceedings of the 29th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming, PPoPP 2024, Edinburgh, United Kingdom, March 2-6, 2024, pp. 243-256, 2024, ACM. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
14 | Francesco Angione, Davide Appello, Paolo Bernardi, Andrea Calabrese, Stefano Quer, Matteo Sonza Reorda, Vincenzo Tancorre, Roberto Ugioli |
A Toolchain to Quantify Burn-In Stress Effectiveness on Large Automotive System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 105655-105676, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Ahmad Patooghy, Mehdi Elahi, Maral Filvan Torkaman, Sara Sezavar Dokhtfaroughi, Ramin Rajaei |
Addressing Benign and Malicious Crosstalk in Modern System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 142263-142275, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Siwakorn Thongmark, Woradorn Wattanapanitch |
Design of a High-Efficiency Low-Ripple Buck Converter for Low-Power System-On-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 11, pp. 122566-122585, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Toygun Basaklar, A. Alper Goksoy, Anish Krishnakumar, Suat Gumussoy, Ümit Y. Ogras |
DTRL: Decision Tree-based Multi-Objective Reinforcement Learning for Runtime Task Scheduling in Domain-Specific System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 22(5s), pp. 113:1-113:22, October 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Ismet Dagli, Mehmet E. Belviranli |
Shared Memory-contention-aware Concurrent DNN Execution for Diversely Heterogeneous System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2308.05869, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Carsten Heinz, Andreas Koch 0001 |
$\mathrm {DD\text {-}MPU}$: Dynamic and Distributed Memory Protection Unit for Embedded System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Embedded Computer Systems: Architectures, Modeling, and Simulation - 23rd International Conference, SAMOS 2023, Samos, Greece, July 2-6, 2023, Proceedings, pp. 285-295, 2023, Springer, 978-3-031-46076-0. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Sujan Kumar Saha, Abigail N. Butka, Muhammed Kawser Ahmed, Christophe Bobda |
OpenTitan based Multi-Level Security in FPGA System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICFPT ![In: International Conference on Field Programmable Technology, ICFPT 2023, Yokohama, Japan, December 12-14, 2023, pp. 302-303, 2023, IEEE, 979-8-3503-5911-4. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Romain Cayre, Damien Cauquil, Aurélien Francillon |
ESPwn32: Hacking with ESP32 System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SP (Workshops) ![In: 2023 IEEE Security and Privacy Workshops (SPW), San Francisco, CA, USA, May 25, 2023, pp. 311-325, 2023, IEEE, 979-8-3503-1236-2. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Francesco Restuccia 0002, Ryan Kastner |
Cut and Forward: Safe and Secure Communication for FPGA System on Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11), pp. 4052-4063, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Tessil Thomas, Bharath Venkatasubramanian, Dinesh Sthapit, Christopher Gray, Atresh Gummadavelly, Janick Bergeron, Pankaj Mehta, Prabu Thangamuthu |
Left-shifter: A pre-silicon framework for usage model based performance verification of the PCIe interface in server processor system on chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPASS ![In: International IEEE Symposium on Performance Analysis of Systems and Software, ISPASS 2022, Singapore, May 22-24, 2022, pp. 90-98, 2022, IEEE, 978-1-6654-5954-9. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
14 | Yuanchao Xu 0001, Mehmet Esat Belviranli, Xipeng Shen, Jeffrey S. Vetter |
PCCS: Processor-Centric Contention-aware Slowdown Model for Heterogeneous System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, Virtual Event, Greece, October 18-22, 2021, pp. 1282-1295, 2021, ACM, 978-1-4503-8557-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
14 | Zhe Jiang 0004, Neil C. Audsley, Dayu Shill, Kecheng Yang 0001, Nathan Fisher, Zheng Dong 0002 |
Brief Industry Paper: AXI-InterconnectRT: Towards a Real-Time AXI-Interconnect for System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTAS ![In: 27th IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2021, Nashville, TN, USA, May 18-21, 2021, pp. 437-440, 2021, IEEE, 978-1-6654-0386-3. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
14 | Tim Hotfilter, Julian Höfer, Fabian Kreß, Fabian Kempf, Jürgen Becker 0001 |
FLECSim-SoC: A Flexible End-to-End Co-Design Simulation Framework for System on Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoCC ![In: 34th IEEE International System-on-Chip Conference, SOCC 2021, Las Vegas, NV, USA, September 14-17, 2021, pp. 83-88, 2021, IEEE, 978-1-6654-2931-3. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
14 | Yasser S. Abdalla |
A novel flash-like all-metal-oxide semiconductor analog-to-digital converter suitable for system on chips systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 48(11), pp. 1960-1974, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
14 | Andrea Floridia, Tzamn Melendez Carmona, Davide Piumatti, Annachiara Ruospo, Ernesto Sánchez 0001, Sergio de Luca, Rosario Martorana, Mose Alessandro Pernice |
Deterministic Cache-based Execution of On-line Self-Test Routines in Multi-core Automotive System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2020 Design, Automation & Test in Europe Conference & Exhibition, DATE 2020, Grenoble, France, March 9-13, 2020, pp. 1235-1240, 2020, IEEE, 978-3-9819263-4-7. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
14 | Manting Yao, Weina Yuan, Nan Wang 0003, Zeyu Zhang, Yuan Qiu 0007, Yichuan Liu |
SS3: Security-Aware Vendor-Constrained Task Scheduling for Heterogeneous Multiprocessor System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICNSC ![In: IEEE International Conference on Networking, Sensing and Control, ICNSC 2020, Nanjing, China, October 30 - November 2, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-6853-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
14 | Nisha Jacob Kabakci |
Hardware Trojans and their Security Impact on Reconfigurable System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2020 |
RDF |
|
14 | Mohammad Motamedi, Daniel D. Fong, Soheil Ghiasi |
Cappuccino: Efficient CNN Inference Software Synthesis for Mobile System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Embed. Syst. Lett. ![In: IEEE Embed. Syst. Lett. 11(1), pp. 9-12, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
14 | Andrea Guerrieri, Sahand Kashani-Akhavan, Mikhail Asiatici, Paolo Ienne |
Snap-On User-Space Manager for Dynamically Reconfigurable System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 7, pp. 103938-103947, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
14 | Samet E. Arda, Anish Krishnakumar, A. Alper Goksoy, Joshua Mack, Nirmal Kumbhare, Anderson L. Sartor, Ali Akoglu, Radu Marculescu, Ümit Y. Ogras |
Work-in-Progress: A Simulation Framework for Domain-Specific System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1908.03664, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
|
14 | Shiqing Li, Yixun Wei, Lei Ju 0001 |
Automatic data placement for CPU-FPGA heterogeneous multiprocessor System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2019, Florence, Italy, March 25-29, 2019, pp. 1379-1384, 2019, IEEE, 978-3-9819263-2-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
14 | Regina Marcela Ivo, Daniel M. Muñoz |
RTRLib: A High-Level Modeling Tool for the Implementation of Dynamically Partial Reconfigurable System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReConFig ![In: 2019 International Conference on ReConFigurable Computing and FPGAs, ReConFig 2019, Cancun, Mexico, December 9-11, 2019, pp. 1-5, 2019, IEEE, 978-1-7281-1957-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
14 | Samet E. Arda, Anish Krishnakumar, A. Alper Goksoy, Joshua Mack, Nirmal Kumbhare, Anderson L. Sartor, Ali Akoglu, Radu Marculescu, Ümit Y. Ogras |
A simulation framework for domain-specific system-on-chips: work-in-progress. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis Companion, CODES+ISSS 2019, part of ESWEEK 2019, New York, NY, USA, October 13-18, 2019., pp. 3:1-3:2, 2019, ACM, 978-1-4503-6923-7. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
14 | Ahmed M. Y. Ibrahim, Hans G. Kerkhoff |
An On-Chip IEEE 1687 Network Controller for Reliability and Functional Safety Management of System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC-Asia ![In: IEEE International Test Conference in Asia, ITC-Asia 2019, Tokyo, Japan, September 3-5, 2019, pp. 109-114, 2019, IEEE, 978-1-7281-4718-5. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
14 | Ahmed M. Y. Ibrahim, Hans G. Kerkhoff |
DARS: An EDA Framework for Reliability and Functional Safety Management of System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: IEEE International Test Conference, ITC 2019, Washington, DC, USA, November 9-15, 2019, pp. 1-10, 2019, IEEE, 978-1-7281-4823-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
14 | Andrea Floridia, Davide Piumatti, Annachiara Ruospo, Ernesto Sánchez 0001, Sergio de Luca, Rosario Martorana |
A Decentralized Scheduler for On-line Self-test Routines in Multi-core Automotive System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: IEEE International Test Conference, ITC 2019, Washington, DC, USA, November 9-15, 2019, pp. 1-10, 2019, IEEE, 978-1-7281-4823-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
14 | Jan Moritz Joseph, Dominik Ermel, Tobias Drewes, Lennart Bamberg, Alberto García-Ortiz, Thilo Pionteck |
Area Optimization with Non-Linear Models in Core Mapping for System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MOCAST ![In: 8th International Conference on Modern Circuits and Systems Technologies, MOCAST 2019, Thessaloniki, Greece, May 13-15, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-1184-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
14 | Giovanni Pietro Seu |
Exploiting All-Programmable System on Chips for Closed-Loop Real-Time Neural Interfaces. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2019 |
RDF |
|
14 | Nan Wang 0003, Manting Yao, Dongxu Jiang, Song Chen 0001, Yu Zhu |
Security-Driven Task Scheduling for Multiprocessor System-on-Chips with Performance Constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2018 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2018, Hong Kong, China, July 8-11, 2018, pp. 545-550, 2018, IEEE Computer Society, 978-1-5386-7099-6. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
14 | Andrea Guerrieri, Sahand Kashani-Akhavan, Mikhail Asiatici, Pasquale Lombardi, Bilel Belhadj, Paolo Ienne |
LEOSoC: An Open-Source Cross-Platform Embedded Linux Library for Managing Hardware Accelerators in Heterogeneous System-on-Chips(Abstract Only). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2018, Monterey, CA, USA, February 25-27, 2018, pp. 295, 2018, ACM. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
14 | Chia-Yin Liu, Cheng-En Wu, Yi-Jung Chen |
Thermal-aware task and data co-allocation for multi-processor system-on-chips with 3D-stacked memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RACS ![In: Proceedings of the 2018 Conference on Research in Adaptive and Convergent Systems, RACS 2018, Honolulu, HI, USA, October 09-12, 2018, pp. 243-248, 2018, ACM. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
14 | Georg Sigl, Mathieu Gross, Michael Pehl |
Where Technology Meets Security: Key Storage and Data Separation for System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: 44th IEEE European Solid State Circuits Conference, ESSCIRC 2018, Dresden, Germany, September 3-6, 2018, pp. 12-17, 2018, IEEE, 978-1-5386-5404-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
14 | Yvan Debizet, Guénolé Lallement, Fady Abouzeid, Philippe Roche, Jean-Luc Autran |
Q-Learning-based Adaptive Power Management for IoT System-on-Chips with Embedded Power States. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2018, 27-30 May 2018, Florence, Italy, pp. 1-5, 2018, IEEE, 978-1-5386-4881-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
14 | Vasileios Tenentes, Daniele Rossi 0001, Bashir M. Al-Hashimi |
Collective-Aware System-on-Chips for Dependable IoT Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 24th IEEE International Symposium on On-Line Testing And Robust System Design, IOLTS 2018, Platja D'Aro, Spain, July 2-4, 2018, pp. 57-60, 2018, IEEE, 978-1-5386-5992-2. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
14 | Mohammad Saber Golanbari, Mehdi Baradaran Tahoori |
Runtime adjustment of IoT system-on-chips for minimum energy operation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 55th Annual Design Automation Conference, DAC 2018, San Francisco, CA, USA, June 24-29, 2018, pp. 145:1-145:6, 2018, ACM, 978-1-5386-4114-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
14 | Qi Tang 0002, Shang-Feng Wu, Jun-Wu Shi, Jibo Wei |
Optimization of Duplication-Based Schedules on Network-on-Chip Based Multi-Processor System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 28(3), pp. 826-837, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
14 | Mohammad Motamedi, Daniel D. Fong, Soheil Ghiasi |
Cappuccino: Efficient Inference Software Synthesis for Mobile System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1707.02647, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP BibTeX RDF |
|
14 | Michael Bromberger, Steffen Ehrle, Michael Scharrer, Lukas Erlinghagen, Jens Schick |
OpenCL-Based 6D-Vision on Heterogeneous System on Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARCS ![In: Architecture of Computing Systems - ARCS 2017 - 30th International Conference, Vienna, Austria, April 3-6, 2017, Proceedings, pp. 33-46, 2017, Springer, 978-3-319-54998-9. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
14 | Xiaokun Yang, Wujie Wen |
Design of a pre-scheduled data bus for advanced encryption standard encrypted system-on-chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017, Chiba, Japan, January 16-19, 2017, pp. 506-511, 2017, IEEE, 978-1-5090-1558-0. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
14 | Dongyoun Yi, Taewhan Kim |
Switch cell optimization of power-gated modern system-on-chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2017 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2017, Irvine, CA, USA, November 13-16, 2017, pp. 555-560, 2017, IEEE, 978-1-5386-3093-8. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
14 | Nima Taherinejad, Muhammad Ali Shami, Sai Manoj P. D. |
Self-aware sensing and attention-based data collection in Multi-Processor System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NEWCAS ![In: 15th IEEE International New Circuits and Systems Conference, NEWCAS 2017, Strasbourg, France, June 25-28, 2017, pp. 81-84, 2017, IEEE, 978-1-5090-4991-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
14 | Christophe Eychenne, Yervant Zorian |
An effective functional safety infrastructure for system-on-chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 23rd IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2017, Thessaloniki, Greece, July 3-5, 2017, pp. 63-66, 2017, IEEE, 978-1-5386-0352-9. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
14 | Ahmed Ibrahim 0001, Hans G. Kerkhoff |
A cost-efficient dependability management framework for self-aware system-on-chips based on IEEE 1687. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 23rd IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2017, Thessaloniki, Greece, July 3-5, 2017, pp. 1-2, 2017, IEEE, 978-1-5386-0352-9. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
14 | Takao Oshita, Joseph Shor, David E. Duarte, Avner Kornfeld, George L. Geannopoulos, Jonathan Douglas, Nasser A. Kurd |
A Compact First-Order ΣΔ Modulator for Analog High-Volume Testing of Complex System-on-Chips in a 14 nm Tri-Gate Digital CMOS Process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 51(2), pp. 378-390, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
14 | Stefan Gehrer, Georg Sigl |
Area-Efficient PUF-Based Key Generation on System-on-Chips with FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 25(1), pp. 1640002:1-1640002:20, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
14 | Hao Xiao, Huajuan Zhang, Fen Ge, Ning Wu |
A MapReduce architecture for embedded multiprocessor system-on-chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 13(2), pp. 20151025, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
14 | Grigor Tshagharyan, Gurgen Harutyunyan, Samvel K. Shoukourian, Yervant Zorian |
Securing test infrastructure of system-on-chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EWDTS ![In: 2016 IEEE East-West Design & Test Symposium, EWDTS 2016, Yerevan, Armenia, October 14-17, 2016, pp. 1-4, 2016, IEEE Computer Society, 978-1-5090-0693-9. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
14 | Yidi Liu, Benjamin Carrión Schäfer |
Optimization of behavioral IPs in multi-processor system-on-chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: 21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016, Macao, Macao, January 25-28, 2016, pp. 336-341, 2016, IEEE, 978-1-4673-9569-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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14 | Mahmoud Momtazpour, Omid Assare, Negar Rahmati, Amirali Boroumand, Saeid Barati 0001, Maziar Goudarzi |
Yield-driven design-time task scheduling techniques for multi-processor system on chips under process variation: a comparative study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Comput. Digit. Tech. ![In: IET Comput. Digit. Tech. 9(4), pp. 221-229, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
14 | Surajit Kumar Roy, Chandan Giri, Hafizur Rahaman 0001 |
Optimisation of test architecture in three-dimensional stacked integrated circuits for partial stack/complete stack using hard system-on-chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Comput. Digit. Tech. ![In: IET Comput. Digit. Tech. 9(5), pp. 268-274, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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14 | Ian Gray, Gary Plumbridge, Neil C. Audsley |
Toolchain-based approach to handling variability in embedded multiprocessor system on chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Comput. Digit. Tech. ![In: IET Comput. Digit. Tech. 9(1), pp. 82-92, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
14 | Hend Affes |
Modélisation au niveau transactionnel de l'architecture et du contrôle relatifs à la gestion d'énergie de systèmes sur puce. (TLM modelling of architecture and control of power management structure for system on chips). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2015 |
RDF |
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14 | Govindarajalu Bakthavatsalam, K. M. Mehata |
A Case for Hybrid Instruction Encoding for Reducing Code Size in Embedded System-on-Chips based on RISC Processor Cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Comput. Sci. ![In: J. Comput. Sci. 10(3), pp. 411-422, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
14 | Haris Javaid, Aleksandar Ignjatovic, Sri Parameswaran |
Performance Estimation of Pipelined MultiProcessor System-on-Chips (MPSoCs). ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 25(8), pp. 2159-2168, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
14 | Yi Wang 0003, Zili Shao, Henry C. B. Chan, Duo Liu, Yong Guan |
Memory-Aware Task Scheduling with Communication Overhead Minimization for Streaming Applications on Bus-Based Multiprocessor System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 25(7), pp. 1797-1807, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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14 | David Lin, Ted Hong, Yanjing Li, Eswaran S, Sharad Kumar, Farzan Fallah, Nagib Hakim, Donald S. Gardner, Subhasish Mitra |
Effective Post-Silicon Validation of System-on-Chips Using Quick Error Detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(10), pp. 1573-1590, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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14 | Giovanni Bruni, Paolo Rech, Lucas A. Tambara, Gabriel L. Nazar, Fernanda Gusmão de Lima Kastensmidt, Ricardo Reis 0001, Alessandro Paccagnella |
Power dissipation effects on 28nm FPGA-based System on Chips neutron sensitivity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: 22nd International Conference on Very Large Scale Integration, VLSI-SoC, Playa del Carmen, Mexico, October 6-8, 2014, pp. 1-6, 2014, IEEE, 978-1-4799-6016-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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14 | Francesco Paterna, Joe Zanotelli, Tajana Simunic Rosing |
Ambient variation-tolerant and inter components aware thermal management for mobile system on chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2014, Dresden, Germany, March 24-28, 2014, pp. 1-6, 2014, European Design and Automation Association, 978-3-9815370-2-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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14 | Meng-Ling Tsai, Yi-Jung Chen, Yi-Ting Chen, Ru-Hua Chang |
Scenario-aware data placement and memory area allocation for Multi-Processor System-on-Chips with reconfigurable 3D-stacked SRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2014, Dresden, Germany, March 24-28, 2014, pp. 1-6, 2014, European Design and Automation Association, 978-3-9815370-2-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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14 | Seung-Hwan Song, Ki Chul Chun, Chris H. Kim |
A Logic-Compatible Embedded Flash Memory for Zero-Standby Power System-on-Chips Featuring a Multi-Story High Voltage Switch and a Selective Refresh Scheme. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 48(5), pp. 1302-1314, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
14 | Nadia Nedjah, Lech Józwiak, Luiza de Macedo Mourelle |
Application-specific processors and system-on-chips for embedded and pervasive applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 37(6-7), pp. 672-673, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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14 | Dionysios Diamantopoulos, Kostas Siozios, Efstathios Sotiriou-Xanthopoulos, George Economakos, Dimitrios Soudris |
HVSoCs: A Framework for Rapid Prototyping of 3-D Hybrid Virtual System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS Workshops ![In: 2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum, Cambridge, MA, USA, May 20-24, 2013, pp. 2194-2199, 2013, IEEE. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
14 | Yanjing Li, Eric Cheng, Samy Makar, Subhasish Mitra |
Self-repair of uncore components in robust system-on-chips: An OpenSPARC T2 case study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: 2013 IEEE International Test Conference, ITC 2013, Anaheim, CA, USA, September 6-13, 2013, pp. 1-10, 2013, IEEE Computer Society, 978-1-4799-0859-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
14 | Xin An |
Conception et contrôle de haut niveau pour les systèmes sur puce multiprocesseurs adaptatifs. (High level design and control of adaptive multiprocessor system-on-chips). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2013 |
RDF |
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14 | Jaehwan John Lee, Xiang Xiao |
Instant Multiunit Resource Hardware Deadlock Detection Scheme for System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 11(3), pp. 67:1-67:24, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
14 | Franco Fiori |
On the use of high-impedance power supplies to reduce the substrate switching noise in system-on-chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 52(1), pp. 282-288, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
14 | Hans G. Kerkhoff, Yong Zhao |
The design of dependable flexible multi-sensory System-on-Chips for security applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2012, Tallinn, Estonia, April 18-20, 2012, pp. 133-138, 2012, IEEE, 978-1-4673-1187-8. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
14 | Falko Guderian, Rainer Schaffer, Gerhard P. Fettweis |
Administration- and communication-aware IP core mapping in scalable multiprocessor system-on-chips via evolutionary computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Congress on Evolutionary Computation ![In: Proceedings of the IEEE Congress on Evolutionary Computation, CEC 2012, Brisbane, Australia, June 10-15, 2012, pp. 1-8, 2012, IEEE, 978-1-4673-1510-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
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14 | Chao Wang 0003, Xi Li 0003, Peng Chen 0004, Xiaojing Feng, Junneng Zhang, Xuehai Zhou |
Detecting Data Hazards in Multi-Processor System-on-Chips on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS Workshops ![In: 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, IPDPS 2012, Shanghai, China, May 21-25, 2012, pp. 282-287, 2012, IEEE Computer Society, 978-1-4673-0974-5. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
14 | Adán Kohler, Juan Manuel Castillo-Sanchez, Joachim Gross, Martin Radetzki |
Minimal MPI as programming interface for multicore System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FDL ![In: Proceeding of the 2012 Forum on Specification and Design Languages, Vienna, Austria, September 18-20, 2012, pp. 127-134, 2012, IEEE, 978-1-4673-1240-0. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP BibTeX RDF |
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14 | Amir Masoud Gharehbaghi, Masahiro Fujita |
Transaction-based post-silicon debug of many-core System-on-Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: Thirteenth International Symposium on Quality Electronic Design, ISQED 2012, Santa Clara, CA, USA, March 19-21, 2012, pp. 702-708, 2012, IEEE, 978-1-4673-1034-5. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
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14 | Brandon Noia, Krishnendu Chakrabarty |
Test-wrapper optimisation for embedded cores in through-silicon via-based three-dimensional system on chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Comput. Digit. Tech. ![In: IET Comput. Digit. Tech. 5(3), pp. 186-197, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
14 | Ali Ahmadinia, Hernando Fernandez-Canque |
Optimization of reconfigurable multi-core system-on-chips for multi-standard applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Knowl. Based Intell. Eng. Syst. ![In: Int. J. Knowl. Based Intell. Eng. Syst. 15(2), pp. 89-98, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
14 | Shaon Yousuf, Adam Jacobs, Ann Gordon-Ross |
Partially reconfigurable system-on-chips for adaptive fault tolerance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPT ![In: 2011 International Conference on Field-Programmable Technology, FPT 2011, New Delhi, India, December 12-14, 2011, pp. 1-8, 2011, IEEE, 978-1-4577-1741-3. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
14 | Abelardo Jara-Berrocal, Ann Gordon-Ross |
An integrated development toolset and implementation methodology for partially reconfigurable system-on-chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 22nd IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2011, Santa Monica, CA, USA, Sept. 11-14, 2011, pp. 219-222, 2011, IEEE Computer Society, 978-1-4577-1291-3. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
14 | Yi Ni, Wai Sum Mong, Jianwen Zhu |
On virtual prototyping of embedded system-on-chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASICON ![In: 2011 IEEE 9th International Conference on ASIC, ASICON 2011, Xiamen, China, October 25-28, 2011, pp. 1106-1109, 2011, IEEE, 978-1-61284-192-2. The full citation details ...](Pics/full.jpeg) |
2011 |
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