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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 268 occurrences of 169 keywords
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Results
Found 257 publication records. Showing 257 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
75 | Yang Zeng, Santosh G. Abraham |
Partitioning regular grid applications with irregular boundaries for cache-coherent multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: Proceedings of IPPS '95, The 9th International Parallel Processing Symposium, April 25-28, 1995, Santa Barbara, California, USA, pp. 222-228, 1995, IEEE Computer Society, 0-8186-7074-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
partitioning regular grid applications, irregular boundaries, cache-coherent multiprocessors, regular grid, domain decomposition techniques, message passing multiprocessors, false coherency traffic, cache line, coalescing algorithm, domain decomposition algorithm, Indian Ocean circulation application, KSR1 multiprocessor, coherency traffic, message passing, multiprocessing systems, interprocessor communication |
52 | Maged M. Michael, Ashwini K. Nanda |
Design and Performance of Directory Caches for Scalable Shared Memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Fifth International Symposium on High-Performance Computer Architecture, Orlando, FL, USA, January 9-12, 1999, pp. 142-151, 1999, IEEE Computer Society, 0-7695-0004-8. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
51 | Evgeny Bolotin, Zvika Guz, Israel Cidon, Ran Ginosar, Avinoam Kolodny |
The Power of Priority: NoC Based Distributed Cache Coherency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: First International Symposium on Networks-on-Chips, NOCS 2007, 7-9 May 2007, Princeton, New Jersey, USA, Proceedings, pp. 117-126, 2007, IEEE Computer Society, 978-0-7695-2773-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
49 | Zheng Zhang 0001, Josep Torrellas |
Reducing Remote Conflict Misses: NUMA with Remote Cache versus COMA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the 3rd IEEE Symposium on High-Performance Computer Architecture (HPCA '97), San Antonio, Texas, USA, February 1-5, 1997, pp. 272-281, 1997, IEEE Computer Society, 0-8186-7764-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
remote conflict miss, NUMA with Remote Cache, shared-memory multiprocessor, cache coherent, COMA |
48 | Steven Cameron Woo, Jaswinder Pal Singh, John L. Hennessy |
The Performance Advantages of Integrating Block Data Trabsfer in Cache-Coherent Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: ASPLOS-VI Proceedings - Sixth International Conference on Architectural Support for Programming Languages and Operating Systems, San Jose, California, USA, October 4-7, 1994., pp. 219-229, 1994, ACM Press, 0-89791-660-3. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
45 | Sung-Eui Yoon, Peter Lindstrom 0001 |
Random-Accessible Compressed Triangle Meshes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Vis. Comput. Graph. ![In: IEEE Trans. Vis. Comput. Graph. 13(6), pp. 1536-1543, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
cache-coherent layouts, mesh data structures, random access, external memory algorithms, Mesh compression |
41 | Jonas Skeppstedt, Michel Dubois 0001 |
Hybrid compiler/hardware prefetching for multiprocessors using low-overhead cache miss traps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 1997 International Conference on Parallel Processing (ICPP '97), August 11-15, 1997, Bloomington, IL, USA, Proceedings, pp. 298-305, 1997, IEEE Computer Society, 0-8186-8108-X. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
hybrid compiler/hardware prefetching, low-overhead cache miss traps, data prefetching technique, cache coherent multiprocessors, cache miss traps, trap handler, simulated multiprocessor, compiler, multiprocessors, multiprocessing systems |
41 | Karen A. Tomko, Santosh G. Abraham |
Data and program restructuring of irregular applications for cache-coherent multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Supercomputing ![In: Proceedings of the 8th international conference on Supercomputing, ICS 1994, Manchester, UK, July 11-15, 1994, pp. 214-225, 1994, ACM, 0-89791-665-4. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
41 | Philippas Tsigas, Yi Zhang 0004 |
Evaluating the performance of non-blocking synchronization on shared-memory multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS/Performance ![In: Proceedings of the Joint International Conference on Measurements and Modeling of Computer Systems, SIGMETRICS/Performance 2001, June 16-20, 2001, Cambridge, MA, USA, pp. 320-321, 2001, ACM, 1-58113-334-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
41 | Farnaz Mounes-Toussi, David J. Lilja |
Write buffer design for cache-coherent shared-memory multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings, pp. 506-511, 1995, IEEE Computer Society, 0-8186-7165-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
write-buffer configurations, one word per buffer entry, one block per buffer entry, write-through, write-back, competitive-performance, shared-memory multiprocessors, shared memory systems, cache-coherent, memory architecture, buffer storage, cache storage, execution-driven simulator, write policies |
41 | Ashwini K. Nanda, Laxmi N. Bhuyan |
Design and Analysis of Cache Coherent Multistage Interconnection Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 42(4), pp. 458-470, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
cache coherent multistage interconnection networks, multiple copy cache coherence protocol, multistage bus network, coherence traffic, performance evaluation, protocols, multiprocessor interconnection networks, simulation models |
40 | Sangman Moh, Jae-Hong Shim, Yang-Dong Lee, Jeong-A Lee, Beom-Joon Cho |
Design and Evaluation of a Cache Coherence Adapter for the SMP Nodes Interconnected via Xcent-Net. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCIS ![In: Computer and Information Sciences - ISCIS 2003, 18th International Symposium, Antalya, Turkey, November 3-5, 2003, Proceedings, pp. 908-915, 2003, Springer, 3-540-20409-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
40 | John Chapin, Stephen Alan Herrod, Mendel Rosenblum, Anoop Gupta |
Memory System Performance of UNIX on CC-NUMA Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the 1995 ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems, Ottawa, Canada, May 15-19, 1995, pp. 1-13, 1995, ACM, 0-89791-695-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
38 | Mrinmoy Ghosh, Hsien-Hsin S. Lee |
Virtual Exclusion: An architectural approach to reducing leakage energy in caches for multiprocessor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 13th International Conference on Parallel and Distributed Systems, ICPADS 2007, Hsinchu, Taiwan, December 5-7, 2007, pp. 1-8, 2007, IEEE Computer Society, 978-1-4244-1889-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
38 | Doug Burger, David A. Wood 0001 |
Accuracy vs. performance in parallel simulation of interconnection networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: Proceedings of IPPS '95, The 9th International Parallel Processing Symposium, April 25-28, 1995, Santa Barbara, California, USA, pp. 22-31, 1995, IEEE Computer Society, 0-8186-7074-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
Wisconsin Wind Tunnel, cache-coherent shared-memory machines, network simulation models, high network loads, nonuniform traffic patterns, performance evaluation, performance, parallel computers, interconnection networks, parallel architectures, virtual machines, multiprocessor interconnection networks, accuracy, shared memory systems, parallel simulation, parallel applications, cache-coherence protocols, network contention |
35 | Andrea Marongiu, Luca Benini, Mahmut T. Kandemir |
Lightweight barrier-based parallelization support for non-cache-coherent MPSoC platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 145-149, 2007, ACM. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
code parallelization, MPSoCs, barrier synchronization |
35 | Jim Nilsson, Fredrik Dahlgren |
Reducing Ownership Overhead for Load-Store Sequences in Cache-Coherent Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: Proceedings of the 14th International Parallel & Distributed Processing Symposium (IPDPS'00), Cancun, Mexico, May 1-5, 2000, pp. 684-692, 2000, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
35 | Phillip B. Gibbons, Ephraim Korach |
On Testing Cache-Coherent Shared Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPAA ![In: Proceedings of the 6th Annual ACM Symposium on Parallel Algorithms and Architectures, SPAA '94, Cape May, New Jersey, USA, June 27-29, 1994, pp. 177-188, 1994, ACM, 0-89791-671-9. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
34 | Christopher Connelly, Carla Schlatter Ellis |
A workload characterization for coarse-grain multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: Proceedings of IPPS '95, The 9th International Parallel Processing Symposium, April 25-28, 1995, Santa Barbara, California, USA, pp. 393-397, 1995, IEEE Computer Society, 0-8186-7074-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
coarse-grain multiprocessors, associated coherency maintenance, memory blocks, cache-coherent multiprocessors, page-based distributed shared memory systems, fine-grain systems, performance evaluation, performance, scalability, replication, multiprocessing systems, workload characterization, granularity, scalable shared memory multiprocessors |
33 | Abderahman Kriouile |
Formal Methods for Functional Verification of Cache-Coherent System-on-Chip. (Méthodes Formelles pour la vérification fonctionnelle des systèmes sur puce cache cohérent). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2015 |
RDF |
|
33 | Sang-Hwa Chung, Soo-Cheol Oh |
An SCI-Based PC Cluster Utilizing Coherent Network Cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Clust. Comput. ![In: Clust. Comput. 6(2), pp. 153-159, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
network cache, cluster system, CC-NUMA, SCI |
30 | Yunheung Paek, Angeles G. Navarro, Emilio L. Zapata, Jay P. Hoeflinger, David A. Padua |
An Advanced Compiler Framework for Non-Cache-Coherent Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 13(3), pp. 241-259, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
array privatization, noncoherent caches, Put/Get, compiler, multiprocessors, dependence analysis, shared-memory programming |
29 | Dongming Jiang, Hongzhang Shan, Jaswinder Pal Singh |
Application Restructuring and Performance Portability on Shared Virtual Memory and Hardware-Coherent Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPoPP ![In: Proceedings of the Sixth ACM SIGPLAN Symposium on Principles & Practice of Parallel Programming (PPOPP), Las Vegas, Nevada, USA, June 18-21, 1997, pp. 217-229, 1997, ACM, 0-89791-906-8. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
29 | Rohan Samarasinghe, Yoshihiro Yasutake, Takaichi Yoshida |
Optimizing the Access Performance and Data Freshness of Distributed Cache Objects Considering User Access Pattern. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AINA ![In: 19th International Conference on Advanced Information Networking and Applications (AINA 2005), 28-30 March 2005, Taipei, Taiwan, pp. 325-328, 2005, IEEE Computer Society, 0-7695-2249-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | John P. Sustersic, Ali R. Hurson |
A Quality of Service (QoS) Implementation of Internet Cache Coherence. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AINA (1) ![In: 18th International Conference on Advanced Information Networking and Applications (AINA 2004), 29-31 March 2004, Fukuoka, Japan, pp. 41-47, 2004, IEEE Computer Society, 0-7695-2051-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Ravi R. Iyer 0001, Laxmi N. Bhuyan |
Design and Evaluation of a Switch Cache Architecture for CC-NUMA Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 49(8), pp. 779-797, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
scalable interconnects, shared memory multiprocessors, wormhole routing, execution-driven simulation, Crossbar switches, cache architectures |
29 | Ravi R. Iyer 0001, Laxmi N. Bhuyan |
Switch Cache: A Framework for Improving the Remote Memory Access Latency of CC-NUMA Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Fifth International Symposium on High-Performance Computer Architecture, Orlando, FL, USA, January 9-12, 1999, pp. 152-160, 1999, IEEE Computer Society, 0-7695-0004-8. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
29 | Shigeki Shibayama, Kazumasa Hamaguchi, Toshiyuki Fukui, Yoshiaki Sudo, Tomohiko Shimoyama, Shuichi Nakamura |
An Optical Bus Computer Cluster with a deferred cache coherence protocol. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 1996 International Conference on Parallel and Distributed Systems (ICPADS '96), June 3-6, 1996, Tokyo, Japan, Proceedings, pp. 175-182, 1996, IEEE Computer Society, 0-8186-7267-6. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Optical Bus Computer Cluster, deferred cache coherence protocol, optical star-coupler, one-hop simultaneous broadcasting, wavelength multiplexing, deferred cache coherence, coherence maintenance, protocols, wavelength-division multiplexing, optical interconnections, cache storage |
28 | Chris Holt, Jaswinder Pal Singh, John L. Hennessy |
Application and Architectural Bottlenecks in Large Scale Distributed Shared Memory Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 23rd Annual International Symposium on Computer Architecture, Philadelphia, PA, USA, May 22-24, 1996, pp. 134-145, 1996, ACM, 0-89791-786-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
26 | Albert Meixner, Daniel J. Sorin |
Dynamic Verification of Memory Consistency in Cache-Coherent Multithreaded Computer Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Dependable Secur. Comput. ![In: IEEE Trans. Dependable Secur. Comput. 6(1), pp. 18-31, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
26 | Albert Meixner, Daniel J. Sorin |
Dynamic Verification of Memory Consistency in Cache-Coherent Multithreaded Computer Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSN ![In: 2006 International Conference on Dependable Systems and Networks (DSN 2006), 25-28 June 2006, Philadelphia, Pennsylvania, USA, Proceedings, pp. 73-82, 2006, IEEE Computer Society, 0-7695-2607-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
26 | Hyonho Lee |
Transformations of Mutual Exclusion Algorithms from the Cache-Coherent Model to the Distributed Shared Memory Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDCS ![In: 25th International Conference on Distributed Computing Systems (ICDCS 2005), 6-10 June 2005, Columbus, OH, USA, pp. 261-270, 2005, IEEE Computer Society, 0-7695-2331-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
26 | Masaru Takesue |
A Model of Pipelined Mutual Exclusion on Cache-Coherent Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2003. Parallel Processing, 9th International Euro-Par Conference, Klagenfurt, Austria, August 26-29, 2003. Proceedings, pp. 917-922, 2003, Springer, 3-540-40788-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Models, pipelining, mutual exclusion |
26 | Dimitrios S. Nikolopoulos, Theodore S. Papatheodorou |
Fast Synchronization on Scalable Cache-Coherent Multiprocessors using Hybrid Primitives. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: Proceedings of the 14th International Parallel & Distributed Processing Symposium (IPDPS'00), Cancun, Mexico, May 1-5, 2000, pp. 711-720, 2000, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
performance evaluation, synchronization, shared-memory, cache-coherence, scalable architectures |
26 | Thomas F. Wenisch, Stephen Somogyi, Nikolaos Hardavellas, Jangwoo Kim, Anastassia Ailamaki, Babak Falsafi |
Temporal Streaming of Shared Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 32st International Symposium on Computer Architecture (ISCA 2005), 4-8 June 2005, Madison, Wisconsin, USA, pp. 222-233, 2005, IEEE Computer Society, 978-0-7695-2270-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
25 | Christian Fensch, Marcelo Cintra |
An OS-based alternative to full hardware coherence on tiled CMPs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 14th International Conference on High-Performance Computer Architecture (HPCA-14 2008), 16-20 February 2008, Salt Lake City, UT, USA, pp. 355-366, 2008, IEEE Computer Society, 978-1-4244-2070-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
25 | Wanxia Qu, Yang Guo 0003, Zhengbin Pang, Xiaodong Yang |
Efficient Verification of Parameterized Cache Coherence Protocols. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICYCS ![In: Proceedings of the 9th International Conference for Young Computer Scientists, ICYCS 2008, Zhang Jia Jie, Hunan, China, November 18-21, 2008, pp. 154-159, 2008, IEEE Computer Society, 978-0-7695-3398-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
25 | Qiong Li, Zhengbin Pang, Yufeng Guo, Enqiang Zhou, Xuejun Yang |
A GPDMA-based Distributed Shared I/O Solution for CC-NUMA System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICYCS ![In: Proceedings of the 9th International Conference for Young Computer Scientists, ICYCS 2008, Zhang Jia Jie, Hunan, China, November 18-21, 2008, pp. 172-177, 2008, IEEE Computer Society, 978-0-7695-3398-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
25 | Enric Gibert, F. Jesús Sánchez, Antonio González 0001 |
Effective instruction scheduling techniques for an interleaved cache clustered VLIW processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 35th Annual International Symposium on Microarchitecture, Istanbul, Turkey, November 18-22, 2002, pp. 123-133, 2002, ACM/IEEE Computer Society, 0-7695-1859-1. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
24 | Tae-Joon Kim, Bochang Moon, Duksu Kim, Sung-Eui Yoon |
RACBVHs: Random-Accessible Compressed Bounding Volume Hierarchies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Vis. Comput. Graph. ![In: IEEE Trans. Vis. Comput. Graph. 16(2), pp. 273-286, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Hierarchy and BVH compression, cache-coherent layouts, ray tracing, collision detection, random access |
24 | Ruibo Wang |
Investigating Software Transactional Memory on Big SMP Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SNPD ![In: 10th ACIS International Conference on Software Engineering, Artificial Intelligences, Networking and Parallel/Distributed Computing, SNPD 2009, in conjunction with 3rd International Workshop on e-Activity, IWEA 2009, 1st International Workshop on Enterprise Architecture Challenges and Responses, WEACR 2009, Catholic University of Daegu, Daegu, Korea, 27-29 May 2009, pp. 507-509, 2009, IEEE Computer Society, 978-0-7695-3642-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Software Transactional Memory (STM), cache coherent Non-Uniform Memory Access (ccNUMA), Scalability |
24 | Steffen Christgau |
One-sided communication on a non-cache-coherent many-core architecture (Einseitige Kommunikation auf einer nicht-cache-kohärenten Vielkern-Prozessorarchitektur) (PDF / PS) ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2017 |
RDF |
|
24 | Sabela Ramos, Torsten Hoefler |
Cache Line Aware Algorithm Design for Cache-Coherent Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 27(10), pp. 2824-2837, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
24 | Alberto Ros 0001, Blas Cuesta, María Engracia Gómez, Antonio Robles, José Duato |
Cache Miss Characterization in Hierarchical Large-Scale Cache-Coherent Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPA ![In: 10th IEEE International Symposium on Parallel and Distributed Processing with Applications, ISPA 2012, Leganes, Madrid, Spain, July 10-13, 2012, pp. 691-696, 2012, IEEE Computer Society, 978-1-4673-1631-6. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
24 | Angelos Bilas, Courtney R. Gibson, Reza Azimi, Rosalia Christodoulopoulou, Peter Jamieson |
Using System Emulation to Model Next-Generation Shared Virtual Memory Clusters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Clust. Comput. ![In: Clust. Comput. 6(4), pp. 325-338, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
high-bandwidth interconnects, distributed shared memory, parallel systems, clusters of workstations, low-latency |
24 | Courtney R. Gibson, Angelos Bilas |
Shared Virtual Memory Clusters with Next-Generation Interconnection Networks and Wide Compute Nodes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2001, 8th International Conference, Hyderabad, India, December, 17-20, 2001, Proceedings, pp. 167-181, 2001, Springer, 3-540-43009-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
24 | Dongming Jiang, Jaswinder Pal Singh |
A Methodology and an Evaluation of the SGI Origin2000. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the 1998 ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems, SIGMETRICS '98 / PERFORMANCE '98, Madison, Wisconsin, USA, June 22-26, 1998, pp. 171-181, 1998, ACM, 0-89791-982-3. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
24 | Tom Lovett, Russell M. Clapp |
STiNG: A CC-NUMA Computer System for the Commercial Marketplace. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 23rd Annual International Symposium on Computer Architecture, Philadelphia, PA, USA, May 22-24, 1996, pp. 308-317, 1996, ACM, 0-89791-786-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
22 | Rajarshi Mukherjee, Yozo Nakayama, Toshiya Mima |
Verification of an Industrial CC-NUMA Server. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC/VLSI Design ![In: Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), and the 15th International Conference on VLSI Design (VLSI Design 2002), Bangalore, India, January 7-11, 2002, pp. 747-, 2002, IEEE Computer Society, 0-7695-1299-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
22 | Lory D. Molesky, Krithi Ramamritham |
Recovery Protocols for Shared Memory Database Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMOD Conference ![In: Proceedings of the 1995 ACM SIGMOD International Conference on Management of Data, San Jose, California, USA, May 22-25, 1995., pp. 11-22, 1995, ACM Press, 978-0-89791-731-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
22 | Rohit Chandra, Scott Devine, Ben Verghese, Anoop Gupta, Mendel Rosenblum |
Scheduling and Page Migration for Multiprocessor Compute Servers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: ASPLOS-VI Proceedings - Sixth International Conference on Architectural Support for Programming Languages and Operating Systems, San Jose, California, USA, October 4-7, 1994., pp. 12-24, 1994, ACM Press, 0-89791-660-3. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
21 | Mirko Loghi, Massimo Poncino, Luca Benini |
Cache coherence tradeoffs in shared-memory MPSoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Embed. Comput. Syst. ![In: ACM Trans. Embed. Comput. Syst. 5(2), pp. 383-407, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
low power, multiprocessor, system-on-chip, Cache coherence |
21 | Mirko Loghi, Massimo Poncino |
Exploring Energy/Performance Tradeoffs in Shared Memory MPSoCs: Snoop-Based Cache Coherence vs. Software Solutions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany, pp. 508-513, 2005, IEEE Computer Society, 0-7695-2288-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Anant Agarwal, David A. Kranz, Rajeev Barua, Venkat Natarajan |
Optimal Tiling for Minimizing Communication in Distributed Shared-Memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Compiler Optimizations for Scalable Parallel Systems Languages ![In: Compiler Optimizations for Scalable Parallel Systems Languages, Compilation Techniques, and Run Time Systems, pp. 285-338, 2001, Springer, 3-540-41945-4. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
21 | Jinseok Kong, Gyungho Lee |
Relaxing the Inclusion Property in Cache Only Memory Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par, Vol. II ![In: Euro-Par '96 Parallel Processing, Second International Euro-Par Conference, Lyon, France, August 26-29, 1996, Proceedings, Volume II, pp. 435-444, 1996, Springer, 3-540-61627-6. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
21 | Ben Verghese, Scott Devine, Anoop Gupta, Mendel Rosenblum |
Operating System Support for Improving Data Locality on CC-NUMA Compute Servers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: ASPLOS-VII Proceedings - Seventh International Conference on Architectural Support for Programming Languages and Operating Systems, Cambridge, Massachusetts, USA, October 1-5, 1996., pp. 279-289, 1996, ACM Press, 0-89791-767-7. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
21 | Mats Brorsson |
SM-prof: A Tool to Visualise and Find Cache Coherence Performance Bottlenecks in Multiprocessor Programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the 1995 ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems, Ottawa, Canada, May 15-19, 1995, pp. 178-187, 1995, ACM, 0-89791-695-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
21 | Gyungho Lee |
An assessment of COMA multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: Proceedings of IPPS '95, The 9th International Parallel Processing Symposium, April 25-28, 1995, Santa Barbara, California, USA, pp. 388-392, 1995, IEEE Computer Society, 0-8186-7074-6. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
Cache Only Memory Architecture, Perfect Club Benchmark Suite, coherence policy, performance evaluation, performance, discrete event simulation, memory hierarchy, shared memory systems, distributed memory systems, update, trace driven simulations, cache storage, network traffic, miss ratio, distributed shared memory multiprocessors, shared address space, invalidate |
21 | Steven K. Reinhardt, Mark D. Hill, James R. Larus, Alvin R. Lebeck, James C. Lewis, David A. Wood 0001 |
The Wisconsin Wind Tunnel: Virtual Prototyping of Parallel Computers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the 1993 ACM SIGMETRICS conference on Measurement and modeling of computer systems, Santa Clara, California, USA, May 10-14, 1993, pp. 48-60, 1993, ACM, 0-89791-580-1. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
20 | Thomas F. Wenisch, Stephen Somogyi, Nikolaos Hardavellas, Jangwoo Kim, Chris Gniady, Anastassia Ailamaki, Babak Falsafi |
Store-Ordered Streaming of Shared Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: 14th International Conference on Parallel Architectures and Compilation Techniques (PACT 2005), 17-21 September 2005, St. Louis, MO, USA, pp. 75-86, 2005, IEEE Computer Society, 0-7695-2429-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
20 | Angelos Bilas, Dongming Jiang, Jaswinder Pal Singh |
Accelerating shared virtual memory via general-purpose network interface support. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Comput. Syst. ![In: ACM Trans. Comput. Syst. 19(1), pp. 1-35, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
clusters, applications, system area networks, shared virtual memory |
19 | Robert L. Bocchino Jr., Vikram S. Adve, Bradford L. Chamberlain |
Software transactional memory for large scale clusters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPoPP ![In: Proceedings of the 13th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 2008, Salt Lake City, UT, USA, February 20-23, 2008, pp. 247-258, 2008, ACM, 978-1-59593-795-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
clusters, scalability, software transactional memory (stm), distributed memory architectures |
17 | Amin Firoozshahian, Alex Solomatnikov, Ofer Shacham, Zain Asgar, Stephen Richardson, Christos Kozyrakis, Mark Horowitz |
A memory system design framework: creating smart memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA, pp. 406-417, 2009, ACM, 978-1-60558-526-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
memory access protocol, protocol controller, transactional memory, reconfigurable architecture, cache coherence, memory systems, multi-core processors, stream programming |
17 | Xiaogang Qiu, Michel Dubois 0001 |
Moving Address Translation Closer to Memory in Distributed Shared-Memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 16(7), pp. 612-623, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
dynamic address translation, virtual-address caches, simulations, Multiprocessors, distributed shared memory, virtual memory |
17 | Gary Gostin, Jean-Francois Collard, Kirby Collins |
The architecture of the HP Superdome shared-memory multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 19th Annual International Conference on Supercomputing, ICS 2005, Cambridge, Massachusetts, USA, June 20-22, 2005, pp. 239-245, 2005, ACM, 1-59593-167-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
17 | Jaydeep Marathe, Anita Nagarajan, Frank Mueller 0001 |
Detailed cache coherence characterization for OpenMP benchmarks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 18th Annual International Conference on Supercomputing, ICS 2004, Saint Malo, France, June 26 - July 01, 2004, pp. 287-297, 2004, ACM, 1-58113-839-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
SMPs, program instrumentation, coherence protocols, cache analysis, dynamic binary rewriting |
17 | Josep Torrellas, Liuxi Yang, Anthony-Trung Nguyen |
Toward a Cost-Effective DSM Organization That Exploits Processor-Memory Integration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, Toulouse, France, January 8-12, 2000, pp. 15-25, 2000, IEEE Computer Society, 0-7695-0550-3. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
directory controller, multiprocessor, reconfigurable, PIM, DSM, coherence protocol, NUMA, processor-in-memory, COMA |
17 | Kazuki Joe, Akira Fukuda |
Applying the Semi-Markov Memory and Cache Coherence Interference Model to an Updating Based Cache Coherence Protocol. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par, Vol. II ![In: Euro-Par '96 Parallel Processing, Second International Euro-Par Conference, Lyon, France, August 26-29, 1996, Proceedings, Volume II, pp. 706-713, 1996, Springer, 3-540-61627-6. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
17 | Margaret Martonosi, David Ofelt, Mark A. Heinrich |
Integrating Performance Monitoring and Communication in Parallel Computers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the 1996 ACM SIGMETRICS international conference on Measurement and modeling of computer systems, Philadelphia, Pennsylvania, USA, May 23-26, 1996, pp. 138-147, 1996, ACM, 0-89791-793-6. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
17 | Mazin S. Yousif, Chita R. Das |
A Switch Cache Design for MIN-Based Shared-Memory Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CONPAR ![In: Parallel Processing: CONPAR 94 - VAPP VI, Third Joint International Conference on Vector and Parallel Processing, Linz, Austria, September 6-8, 1994, Proceedings, pp. 426-437, 1994, Springer, 3-540-58430-7. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
17 | Jonas Skeppstedt, Per Stenström |
Simple Compiler Algorithms to Reduce Ownership Operhead in Cache Coherence Protocols. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: ASPLOS-VI Proceedings - Sixth International Conference on Architectural Support for Programming Languages and Operating Systems, San Jose, California, USA, October 4-7, 1994., pp. 286-296, 1994, ACM Press, 0-89791-660-3. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
17 | Ioannis Schoinas, Babak Falsafi, Alvin R. Lebeck, Steven K. Reinhardt, James R. Larus, David A. Wood 0001 |
Fine-grain Access Control for Distributed Shared Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: ASPLOS-VI Proceedings - Sixth International Conference on Architectural Support for Programming Languages and Operating Systems, San Jose, California, USA, October 4-7, 1994., pp. 297-306, 1994, ACM Press, 0-89791-660-3. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
16 | Henry N. Schuh, Arvind Krishnamurthy, David E. Culler, Henry M. Levy, Luigi Rizzo, Samira Manabi Khan, Brent E. Stephens |
CC-NIC: a Cache-Coherent Interface to the NIC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS (1) ![In: Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 1, ASPLOS 2024, La Jolla, CA, USA, 27 April 2024- 1 May 2024, pp. 52-68, 2024, ACM. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
16 | Hyokeun Lee, Kwanseok Choi, Hyuk-Jae Lee, Jaewoong Sim |
SDM: Sharing-Enabled Disaggregated Memory System with Cache Coherent Compute Express Link. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: 32nd International Conference on Parallel Architectures and Compilation Techniques, PACT 2023, Vienna, Austria, October 21-25, 2023, pp. 86-98, 2023, IEEE, 979-8-3503-4254-3. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
16 | Fei Gao 0016, Ting-Jung Chang, Ang Li, Marcelo Orenes-Vera, Davide Giri, Paul J. Jackson, August Ning, Georgios Tziantzioulis, Joseph Zuckerman, Jinzheng Tu 0001, Kaifeng Xu, Grigory Chirkov, Gabriele Tombesi, Jonathan Balkind, Margaret Martonosi, Luca P. Carloni, David Wentzlaff |
DECADES: A 67mm2, 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: IEEE Custom Integrated Circuits Conference, CICC 2023, San Antonio, TX, USA, April 23-26, 2023, pp. 1-2, 2023, IEEE, 979-8-3503-9948-6. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
16 | Daecheol You, Jae Min Kim, Taesung Kim, Junho Huh |
Automotive Multi-Chip System with Cache Coherent Interconnect for Pipelined Parallel Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCE ![In: IEEE International Conference on Consumer Electronics, ICCE 2023, Las Vegas, NV, USA, January 6-8, 2023, pp. 1-5, 2023, IEEE, 978-1-6654-9130-3. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
16 | Yuxin Ren 0001, Gabriel Parmer, Dejan S. Milojicic |
Sharing non-cache-coherent memory with bounded incoherence. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Concurr. Comput. Pract. Exp. ![In: Concurr. Comput. Pract. Exp. 34(2), 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
16 | Chen Ding 0001, Benjamin Reber, Dorin Patru |
Cache-coherent CLAM (WIP). ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES ![In: LCTES '22: 23rd ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems, San Diego, CA, USA, 14 June 2022, pp. 111-115, 2022, ACM, 978-1-4503-9266-2. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
16 | Zixuan Wang, Joonseop Sim, Euicheol Lim, Jishen Zhao |
Enabling Efficient Large-Scale Deep Learning Training with Cache Coherent Disaggregated Memory Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: IEEE International Symposium on High-Performance Computer Architecture, HPCA 2022, Seoul, South Korea, April 2-6, 2022, pp. 126-140, 2022, IEEE, 978-1-6654-2027-3. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
16 | Sajjad Tamimi, Florian Stock, Andreas Koch 0001, Arthur Bernhardt, Ilia Petrov 0001 |
An Evaluation of Using CCIX for Cache-Coherent Host-FPGA Interfacing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 30th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2022, New York City, NY, USA, May 15-18, 2022, pp. 1-9, 2022, IEEE, 978-1-6654-8332-2. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
16 | Ankit Bhardwaj, Todd Thornley, Vinita Pawar, Reto Achermann, Gerd Zellweger, Ryan Stutsman |
Cache-coherent accelerators for persistent memory crash consistency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HotStorage ![In: HotStorage '22: 14th ACM Workshop on Hot Topics in Storage and File Systems, Virtual Event, June 27 - 28, 2022, pp. 37-44, 2022, ACM, 978-1-4503-9399-7. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
16 | Arthur Bernhardt, Sajjad Tamimi, Florian Stock, Tobias Vinçon, Andreas Koch 0001, Ilia Petrov 0001 |
Cache-Coherent Shared Locking for Transactionally Consistent Updates in Near-Data Processing DBMS on Smart Storage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDBT ![In: Proceedings of the 25th International Conference on Extending Database Technology, EDBT 2022, Edinburgh, UK, March 29 - April 1, 2022., pp. 2:424-2:428, 2022, OpenProceedings.org, 978-3-89318-086-8. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
16 | Isaac Sánchez Barrera |
Exploiting data locality in cache-coherent NUMA systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2022 |
RDF |
|
16 | Georgios Kornaros |
RSMCC: Enabling Ring-based Software Managed Cache-Coherent Embedded SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDP ![In: 28th Euromicro International Conference on Parallel, Distributed and Network-Based Processing, PDP 2020, Västerås, Sweden, March 11-13, 2020, pp. 131-135, 2020, IEEE, 978-1-7281-6582-0. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
16 | Ho-Ren Chuang, Robert Lyerly, Stefan Lankes, Binoy Ravindran |
Scaling Shared Memory Multiprocessing Applications in Non-cache-coherent Domains. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SYSTOR ![In: SYSTOR 2020: The 13th ACM International Systems and Storage Conference, Haifa, Israel, October 13-15, 2020, pp. 13-24, 2020, ACM, 978-1-4503-7588-7. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
16 | Yuxin Ren 0001, Gabriel Parmer, Dejan S. Milojicic |
Bounded incoherence: a programming model for non-cache-coherent shared memory architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PMAM@PPoPP ![In: PMAM@PPoPP '20: Eleventh International Workshop on Programming Models and Applications for Multicores and Manycores colocated with the 25th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, San Diego, California, USA, February 22, 2020, pp. 1:1-1:10, 2020, ACM, 978-1-4503-7522-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
16 | Moyang Wang, Tuan Ta, Lin Cheng, Christopher Batten |
Efficiently Supporting Dynamic Task Parallelism on Heterogeneous Cache-Coherent Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 47th ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2020, Virtual Event / Valencia, Spain, May 30 - June 3, 2020, pp. 173-186, 2020, IEEE, 978-1-7281-4661-4. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
16 | Suk Chan Kang |
Optimizing high locality memory references in cache coherent shared memory multi-core processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2020 |
RDF |
|
16 | Alexander Kroh, Oliver Diessel |
Efficient Fine-grained Processor-logic Interactions on the Cache-coherent Zynq Platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 11(4), pp. 25:1-25:22, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
16 | Junchang Wang, Qi Jin, Xiong Fu, Yun Li 0009, Peichang Shi |
Accelerating Wait-Free Algorithms: Pragmatic Solutions on Cache-Coherent Multicore Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 7, pp. 74653-74669, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
16 | Tamer Ahmed Eltaras, William Fornaciari, Davide Zoni |
Partial Packet Forwarding to Improve Performance in Fully Adaptive Routing for Cache-Coherent NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDP ![In: 27th Euromicro International Conference on Parallel, Distributed and Network-Based Processing, PDP 2019, Pavia, Italy, February 13-15, 2019, pp. 33-40, 2019, IEEE, 978-1-7281-1644-0. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
16 | Paul N. Whatmough, Sae Kyu Lee, Marco Donato, Hsea-Ching Hsueh, Sam Likun Xi, Udit Gupta, Lillian Pentecost, Glenn G. Ko, David M. Brooks, Gu-Yeon Wei |
A 16nm 25mm2 SoC with a 54.5x Flexibility-Efficiency Range from Dual-Core Arm Cortex-A53 to eFPGA and Cache-Coherent Accelerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Circuits ![In: 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, pp. 34-, 2019, IEEE, 978-4-86348-720-8. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
16 | Paolo Grani, Sandro Bartolini |
Scalable Path-Setup Scheme for All-Optical Dynamic Circuit Switched NoCs in Cache Coherent CMPs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM J. Emerg. Technol. Comput. Syst. ![In: ACM J. Emerg. Technol. Comput. Syst. 14(1), pp. 12:1-12:27, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
16 | Eric Guthmuller, César Fuguet Tortolero, Pascal Vivet, Christian Bernard, Ivan Miro Panades, Jean Durupt, E. Beignc, Didier Lattard, Séverine Cheramy, Alain Greiner, Quentin L. Meunier, Pirouz Bazargan-Sabet |
A 29 Gops/Watt 3D-Ready 16-Core Computing Fabric with Scalable Cache Coherent Architecture Using Distributed L2 and Adaptive L3 Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: 44th IEEE European Solid State Circuits Conference, ESSCIRC 2018, Dresden, Germany, September 3-6, 2018, pp. 318-321, 2018, IEEE, 978-1-5386-5404-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
16 | Steffen Christgau, Bettina Schnor |
Exploring one-sided communication and synchronization on a non-cache-coherent many-core architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Concurr. Comput. Pract. Exp. ![In: Concurr. Comput. Pract. Exp. 29(15), 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
16 | Ricardo Fernández Pascual, Alberto Ros 0001, Manuel E. Acacio |
To be silent or not: on the impact of evictions of clean data in cache-coherent multicores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 73(10), pp. 4428-4443, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
16 | Michel Gemieux, Yvon Savaria, Jean-Pierre David, Guchuan Zhu |
A Cache-Coherent Heterogeneous Architecture for Low Latency Real Time Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISORC ![In: 20th IEEE International Symposium on Real-Time Distributed Computing, ISORC 2017, Toronto, ON, Canada, May 16-18, 2017, pp. 176-184, 2017, IEEE Computer Society, 978-1-5386-1574-4. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
16 | Manuel Mohr, Carsten Tradowsky |
Pegasus: Efficient data transfers for PGAS languages on non-cache-coherent many-cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 2017, pp. 1781-1786, 2017, IEEE, 978-3-9815370-8-6. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
16 | Xin He, Zhiwen Chen 0006, Jianhua Sun 0002, Hao Chen 0002, Dong Li 0001, Zhe Quan |
Exploring Synchronization in Cache Coherent Manycore Systems: A Case Study with Xeon Phi. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 23rd IEEE International Conference on Parallel and Distributed Systems, ICPADS 2017, Shenzhen, China, December 15-17, 2017, pp. 232-239, 2017, IEEE Computer Society, 978-1-5386-2129-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
16 | Boma A. Adhi, Masayoshi Mase, Yuhei Hosokawa, Yohei Kishimoto, Taisuke Onishi, Hiroki Mikami, Keiji Kimura, Hironori Kasahara |
Software Cache Coherent Control by Parallelizing Compiler. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCPC ![In: Languages and Compilers for Parallel Computing - 30th International Workshop, LCPC 2017, College Station, TX, USA, October 11-13, 2017, Revised Selected Papers, pp. 17-25, 2017, Springer, 978-3-030-35224-0. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
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