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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 592 occurrences of 337 keywords
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Results
Found 1302 publication records. Showing 1302 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
104 | Gang Han, Robert H. Klenke, James H. Aylor |
Performance Modeling of Hierarchical Crossbar-Based Multicomputer Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 50(9), pp. 877-890, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
crossbar interconnection networks, simulation, performance evaluation, modeling, Multicomputer systems |
97 | Deng Pan, Yuanyuan Yang 0001 |
Providing flow based performance guarantees for buffered crossbar switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 22nd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, Miami, Florida USA, April 14-18, 2008, pp. 1-12, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
97 | Trevor N. Mudge, B. A. Makrucki |
Probabilistic analysis of a crossbar switch. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 9th International Symposium on Computer Architecture (ISCA 1982), Austin, TX, USA, April 26-29, 1982, pp. 311-320, 1982, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1982 |
DBLP BibTeX RDF |
|
93 | Hongbing Fan, Yu-Liang Wu |
Crossbar based design schemes for switch boxes and programmable interconnection networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 910-915, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
switch matrix, FPGA, routing, interconnection network, layout, crossbar, switch box |
86 | Srinivasan Murali, Giovanni De Micheli |
An Application-Specific Design Methodology for STbus Crossbar Generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany, pp. 1176-1181, 2005, IEEE Computer Society, 0-7695-2288-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
86 | Donghyun Kim, Kangmin Lee, Se-Joong Lee, Hoi-Jun Yoo |
A reconfigurable crossbar switch with adaptive bandwidth control for networks-on-chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 2369-2372, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
86 | Brian Webb, Ahmed Louri |
A Class of Highly Scalable Optical Crossbar-Connected Interconnection Networks (SOCNs) for Parallel Computing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 11(5), pp. 444-458, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
scalability, networks, parallel architectures, hypercubes, wavelength division multiplexing, Optical interconnections, crossbars, multiprocessor interconnection |
83 | Michel N. Victor, Aris K. Silzars, Edward S. Davidson |
A freespace crossbar for multi-core processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 22nd Annual International Conference on Supercomputing, ICS 2008, Island of Kos, Greece, June 7-12, 2008, pp. 56-62, 2008, ACM, 978-1-60558-158-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
freespace crossbar, interconnect |
76 | Srinivasan Murali, Luca Benini, Giovanni De Micheli |
An Application-Specific Design Methodology for On-Chip Crossbar Generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(7), pp. 1283-1296, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
76 | Tad Hogg, Greg Snider |
Defect-tolerant Logic with Nanoscale Crossbar Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 23(2-3), pp. 117-129, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
fault modeling, nanotechnology, molecular electronics, circuit reliability |
76 | Mohammed A. S. Khalid, Jonathan Rose |
A Hybrid Complete-Graph Partial-Crossbar Routing Architecture for Multi-FPGA Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 1998 ACM/SIGDA Sixth International Symposium on Field Programmable Gate Arrays, FPGA 1998, Monterey, CA, USA, February 22-24, 1998, pp. 45-54, 1998, ACM, 0-89791-978-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
73 | Sheng Lin 0006, Yong-Bin Kim, Fabrizio Lombardi |
Read-out schemes for a CNTFET-based crossbar memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010, pp. 167-170, 2010, ACM, 978-1-4503-0012-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
carbon nanotube field effect transistor, crossbar design, read-out circuit, noise margin |
73 | Deng Pan, Yuanyuan Yang 0001 |
Localized asynchronous packet scheduling for buffered crossbar switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ANCS ![In: Proceedings of the 2006 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, ANCS 2006, San Jose, California, USA, December 3-5, 2006, pp. 153-162, 2006, ACM, 1-59593-580-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
100% throughput, buffered crossbar switches, priority encoders, packet scheduling |
66 | Lotfi Mhamdi |
A Partially Buffered Crossbar packet switching architecture and its scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCC ![In: Proceedings of the 13th IEEE Symposium on Computers and Communications (ISCC 2008), July 6-9, Marrakech, Morocco, pp. 942-948, 2008, IEEE Computer Society, 978-1-4244-2702-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
66 | Bernhard Quatember |
Modular crossbar switch for large-scale multiprocessor systems: structure and implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AFIPS National Computer Conference ![In: American Federation of Information Processing Societies: 1981 National Computer Conference, 4-7 May 1981, Chicago, Illinois, USA, pp. 125-135, 1981, AFIPS Press, 978-1-4503-7921-2. The full citation details ...](Pics/full.jpeg) |
1981 |
DBLP DOI BibTeX RDF |
|
65 | Haitham S. Hamza, Jitender S. Deogun |
WDM optical interconnects: a balanced design approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE/ACM Trans. Netw. ![In: IEEE/ACM Trans. Netw. 15(6), pp. 1565-1578, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
wavelength exchange optical crossbar (WOC), optical interconnects, wavelength division multiplexing (WDM), Clos network, crossbar switch, wavelength converter |
63 | Rajat Subhra Chakraborty, Somnath Paul, Swarup Bhunia |
Analysis and Robust Design of Diode-Resistor Based Nanoscale Crossbar PLA Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India, pp. 441-446, 2008, IEEE Computer Society, 0-7695-3083-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Diode-resistor logic, logic-level degradation, nano-crossbar circuit, robust circuit design |
63 | Nikos Chrysos, Giorgos Dimitrakopoulos |
Backlog-Aware Crossbar Schedulers: A New Algorithm and its Efficient Hardware Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Hot Interconnects ![In: 16th Annual IEEE Symposium on High Performance Interconnects (HOTI 2008), 26-28 August 2008, Stanford, CA, USA, pp. 67-74, 2008, IEEE Computer Society, 978-0-7695-3380-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
VOQ crossbar scheduler, backlog-aware, deterministic service guarantees, round-robin arbiters, ASIC design |
63 | Tejpal Singh, Alexander Taubin |
A Highly Scalable GALS Crossbar Using Token Ring Arbitration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 24(5), pp. 464-472, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
crossbar design, scalability, latency, arbitration, token rings |
62 | Mohammed A. S. Khalid, Jonathan Rose |
A novel and efficient routing architecture for multi-FPGA systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 8(1), pp. 30-39, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
58 | Rajat Subhra Chakraborty, Swarup Bhunia |
A study of asynchronous design methodology for robust CMOS-nano hybrid system design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM J. Emerg. Technol. Comput. Syst. ![In: ACM J. Emerg. Technol. Comput. Syst. 5(3), pp. 12:1-12:22, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
CMOS-nano co-design, dual-rail circuits, logic degradation, nano-scale crossbar, Asynchronous design, robust design, micropipelines |
56 | Deng Pan, Yuanyuan Yang 0001 |
Localized Independent Packet Scheduling for Buffered Crossbar Switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 58(2), pp. 260-274, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
56 | Mian Dong, Lin Zhong 0001 |
Logic Synthesis with Nanowire Crossbar: Reality Check and Standard Cell-based Integration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 268-271, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
56 | Minje Jun, Sungjoo Yoo, Eui-Young Chung |
Mixed integer linear programming-based optimal topology synthesis of cascaded crossbar switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 13th Asia South Pacific Design Automation Conference, ASP-DAC 2008, Seoul, Korea, January 21-24, 2008, pp. 583-588, 2008, IEEE, 978-1-4244-1921-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
56 | Daeho Seo, Mithuna Thottethodi |
Table-lookup based Crossbar Arbitration for Minimal-Routed, 2D Mesh and Torus Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), Proceedings, 26-30 March 2007, Long Beach, California, USA, pp. 1-10, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
56 | Byung-Joo Hong, Koon-Shik Cho, Seung-Hyun Kang, Suk-Yoon Lee, Jun Dong Cho |
On the Configurable Multiprocessor SoC Platform with Crossbar Switch. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 1087-1090, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
56 | Ted H. Szymanski, Honglin Wu, Amir Gourgy |
Power complexity of multiplexer-based optoelectronic crossbar switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 13(5), pp. 604-617, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
56 | Vesa Lahtinen, Erno Salminen, Kimmo Kuusilinna, Timo D. Hämäläinen |
Comparison of synthesized bus and crossbar interconnection architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 433-436, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
56 | Qiang Duan, Xinghe Li, Linjie Zhang |
Delay Performance Analysis for the Buffered Crossbar Switch . ![Search on Bibsonomy](Pics/bibsonomy.png) |
AINA ![In: 17th International Conference on Advanced Information Networking and Applications (AINA'03), March 27-29, 2003, Xi'an, China, pp. 750-755, 2003, IEEE Computer Society, 0-7695-1906-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
56 | Panduka Wijetunga |
High-performance crossbar design for system-on-chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June - 2 July 2003, Calgary, Alberta, Canada, pp. 138-143, 2003, IEEE Computer Society, 0-7695-1944-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
52 | Jonathan S. Turner |
Strong performance guarantees for asynchronous buffered crossbar scheduler. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE/ACM Trans. Netw. ![In: IEEE/ACM Trans. Netw. 17(4), pp. 1017-1028, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
asynchronous crossbars, crossbar schedulers, routers, switches, performance guarantees |
52 | Henrique Cota de Freitas, Philippe Olivier Alexandre Navaux |
On the design of reconfigurable crossbar switch for adaptable on-chip topologies in programmable NoC routers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, Boston Area, MA, USA, May 10-12 2009, pp. 129-132, 2009, ACM, 978-1-60558-522-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
adaptable topologies, programmable NoC routers, networks-on-chip, reconfigurable computing, crossbar switch |
52 | Simin He 0001, Shutao Sun, Hong-Tao Guan, Qiang Zheng, Youjian Zhao, Wen Gao 0001 |
On guaranteed smooth switching for buffered crossbar switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE/ACM Trans. Netw. ![In: IEEE/ACM Trans. Netw. 16(3), pp. 718-731, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
scheduling, smoothness, switches, buffered crossbar |
52 | Dianxun Shuai |
Crossbar Composite Spring-Nets to Optimize Multi-Agent Systems and Computer Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIC (2) ![In: Advanced Intelligent Computing Theories and Applications. With Aspects of Artificial Intelligence, 4th International Conference on Intelligent Computing, ICIC 2008, Shanghai, China, September 15-18, 2008, Proceedings, pp. 549-557, 2008, Springer, 978-3-540-85983-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
crossbar composite spring nets, multi-agent system, artificial intelligence, distributed problem solving, elastic nets |
52 | Choudhury A. Al Sayeed, Ashraf Matrawy |
Guaranteed Maximal Matching for Input Buffered Crossbar Switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CNSR ![In: Fourth Annual Conference on Communication Networks and Services Research (CNSR 2006), 24-25 May 2006, Moncton, New Brunswick, Canada, pp. 213-220, 2006, IEEE Computer Society, 0-7695-2578-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Guaranteed maximal matching, iSLIP, MWM, scheduling, perfect matching, crossbar switches |
52 | Lotfi Mhamdi, Christopher Kachris, Stamatis Vassiliadis |
A reconfigurable hardware based embedded scheduler for buffered crossbar switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 14th International Symposium on Field Programmable Gate Arrays, FPGA 2006, Monterey, California, USA, February 22-24, 2006, pp. 143-149, 2006, ACM, 1-59593-292-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
buffered crossbar fabric, scheduling, reconfigurable hardware |
52 | Paul-Peter Sotiriadis |
Information storage capacity of crossbar switching networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, Washington, DC, USA, April 28-29, 2003, pp. 45-49, 2003, ACM, 1-58113-677-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
nanotube, network, memory, capacity, information, storage, nanotechnology, switching, device, crossbar, nanowire |
51 | Mark Holland, Scott Hauck |
Automatic Creation of Domain-Specific Reconfigurable CPLDs for SoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(2), pp. 291-295, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
51 | Jing Huang 0001, Mehdi Baradaran Tahoori, Fabrizio Lombardi |
On the Defect Tolerance of Nano-Scale Two-Dimensional Crossbars. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 10-13 October 2004, Cannes, France, Proceedings, pp. 96-104, 2004, IEEE Computer Society, 0-7695-2241-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
51 | José Carlos Sancho, José Flich, Antonio Robles, Pedro López 0001, José Duato |
Analyzing the Influence of Virtual Lanes on the Performance of InfiniBand Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 15-19 April 2002, Fort Lauderdale, FL, USA, CD-ROM/Abstracts Proceedings, 2002, IEEE Computer Society, 0-7695-1573-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
InfiniBand network, virtual lanes, performance evaluation, routing algorithms, irregular topologies |
48 | Mark Holland, Scott Hauck |
Improving performance and robustness of domain-specific CPLDs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 14th International Symposium on Field Programmable Gate Arrays, FPGA 2006, Monterey, California, USA, February 22-24, 2006, pp. 50-59, 2006, ACM, 1-59593-292-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
computer-aided design, system-on-a-chip, reconfigurable logic, CPLD, sparse crossbar |
48 | Prashanth Pappu, Jonathan S. Turner, Kenneth Wong |
Work-conserving distributed schedulers for Terabit routers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGCOMM ![In: Proceedings of the ACM SIGCOMM 2004 Conference on Applications, Technologies, Architectures, and Protocols for Computer Communication, August 30 - September 3, 2004, Portland, Oregon, USA, pp. 257-268, 2004, ACM, 1-58113-862-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
CIOQ switches, crossbar scheduling, high performance routers, distributed scheduling |
48 | Kenneth Prager, Michael Vahey, William Farwell, James Whitney, Jon Lieb |
A Fault Tolerant Signal Processing Computer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSN ![In: 2000 International Conference on Dependable Systems and Networks (DSN 2000) (formerly FTCS-30 and DCCA-8), 25-28 June 2000, New York, NY, USA, pp. 169-174, 2000, IEEE Computer Society, 0-7695-0707-7. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
distributed crossbar, Fault detection, voting, single event upset, configurable computing, fault recovery |
48 | Peter G. Harrison, Naresh M. Patel |
The Representation of Multistage Interconnection Networks in Queuing Models of Parallel Systems ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. ACM ![In: J. ACM 37(4), pp. 863-898, October 1990. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
flow-equivalent server, performance evaluation, Markov process, multistage interconnection network, crossbar switch, closed queuing network, delta network |
45 | Lotfi Mhamdi |
On the Integration of Unicast and Multicast Cell Scheduling in Buffered Crossbar Switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 20(6), pp. 818-830, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
45 | Jian Wang, Ted H. Szymanski |
Power analysis of Input-Queued and Crosspoint-Queued crossbar switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCECE ![In: Proceedings of the 22nd Canadian Conference on Electrical and Computer Engineering, CCECE 2009, 3-6 May 2009, Delta St. John's Hotel and Conference Centre, St. John's, Newfoundland, Canada, pp. 273-278, 2009, IEEE, 978-1-4244-3508-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
45 | Rajat Subhra Chakraborty, Swarup Bhunia |
Micropipeline-Based Asynchronous Design Methodology for Robust System Design Using Nanoscale Crossbar. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 697-701, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Diode-resistor logic, CMOSNano, Asynchronous design |
45 | Alexander Kesselman, Kirill Kogan, Michael Segal 0001 |
Best Effort and Priority Queuing Policies for Buffered Crossbar Switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIROCCO ![In: Structural Information and Communication Complexity, 15th International Colloquium, SIROCCO 2008, Villars-sur-Ollon, Switzerland, June 17-20, 2008, Proceedings, pp. 170-184, 2008, Springer, 978-3-540-69326-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
45 | Somnath Paul, Rajat Subhra Chakraborty, Swarup Bhunia |
Defect-Aware Configurable Computing in Nanoscale Crossbar for Improved Yield. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 8-11 July 2007, Heraklion, Crete, Greece, pp. 29-36, 2007, IEEE Computer Society, 0-7695-2918-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
45 | Chih-Chieh Chou, Cheng-Shang Chang, Duan-Shin Lee, Jay Cheng |
A Necessary and Sufficient Condition for the Construction of 2-to-1 Optical FIFO Multiplexers by a Single Crossbar Switch and Fiber Delay Lines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Inf. Theory ![In: IEEE Trans. Inf. Theory 52(10), pp. 4519-4531, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
45 | Paul-Peter Sotiriadis |
Information Capacity of Nanowire Crossbar Switching Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Inf. Theory ![In: IEEE Trans. Inf. Theory 52(7), pp. 3019-3032, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
45 | Yungho Choi, Timothy Mark Pinkston |
Crossbar Analysis for Optimal Deadlock Recovery Router Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPPS ![In: 11th International Parallel Processing Symposium (IPPS '97), 1-5 April 1997, Geneva, Switzerland, Proceedings, pp. 583-588, 1997, IEEE Computer Society, 0-8186-7792-9. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
42 | Ioannis Papaefstathiou, George Kornaros, Nikolaos Chrysos |
A buffered crossbar-based chip interconnection framework supporting quality of service. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007, pp. 90-95, 2007, ACM, 978-1-59593-605-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
chip interconnect, quality of service, system on chip, network on chip, multi-processor, buffered crossbar |
42 | Simin He 0001, Shutao Sun, Wei Zhao, Yanfeng Zheng, Wen Gao 0001 |
Smooth switching problem in buffered crossbar switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the International Conference on Measurements and Modeling of Computer Systems, SIGMETRICS 2005, June 6-10, 2005, Banff, Alberta, Canada, pp. 386-387, 2005, ACM, 1-59593-022-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
CICQ, scheduling, smoothness, switch, buffered crossbar |
42 | Yuval Tamir, Hsin-Chou Chi |
Symmetric Crossbar Arbiters for VLSI Communication Switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 4(1), pp. 13-27, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
VLSI communication switches, symmetric crossbar arbiters, multistage interconnectionnetwork, switch arbitration policy, worst-case latency, circuitsimulation, performance evaluation, VLSI, circuit analysis computing, network simulations, critical path, multiprocessorinterconnection networks, system clock |
42 | Hee Yong Youn, Calvin Ching-Yuen Chen |
A Comprehensive Performance Evaluation of Crossbar Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 4(5), pp. 481-489, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
processor acceptanceprobability, rejected request handling, home memory concept, performance evaluation, performance evaluation, parallel architectures, multiprocessor interconnection networks, multiprocessing systems, memory bandwidth, crossbar networks, bus arbitration |
41 | Larkhoon Leem, James A. Weaver, Metha Jeeradit, James S. Harris Jr. |
Nano-magnetic non-volatile CMOS circuits for nano-scale FPGAs (abstract only). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, FPGA 2010, Monterey, California, USA, February 21-23, 2010, pp. 291, 2010, ACM, 978-1-60558-911-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
spin-torque devices, fpga, spintronics |
41 | Jongman Kim, Chrysostomos Nicopoulos, Dongkook Park, Reetuparna Das, Yuan Xie 0001, Narayanan Vijaykrishnan, Mazin S. Yousif, Chita R. Das |
A novel dimensionally-decomposed router for on-chip communication in 3D architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 34th International Symposium on Computer Architecture (ISCA 2007), June 9-13, 2007, San Diego, California, USA, pp. 138-149, 2007, ACM, 978-1-59593-706-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
3D architecture, 3D integration, network-on-chip (NoC) |
41 | Garrett S. Rose, Mircea R. Stan |
A programmable majority logic array using molecular scale electronics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 14th International Symposium on Field Programmable Gate Arrays, FPGA 2006, Monterey, California, USA, February 22-24, 2006, pp. 225, 2006, ACM, 1-59593-292-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
41 | Norbert Eicker, Thomas Lippert |
Scalable Ethernet Clos-Switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2006, Parallel Processing, 12th International Euro-Par Conference, Dresden, Germany, August 28 - September 1, 2006, Proceedings, pp. 874-883, 2006, Springer, 3-540-37783-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
41 | Yingping Zhang, Taikyeong Jeong, Fei Chen, Haiping Wu, Ronny Nitzsche, Guang R. Gao |
A study of the on-chip interconnection network for the IBM Cyclops64 multi-core architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
41 | Jiho Chang, JongSu Yi, JunSeong Kim |
A Switch Wrapper Design for SNA On-Chip-Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, ACSAC 2005, Singapore, October 24-26, 2005, Proceedings, pp. 405-414, 2005, Springer, 3-540-29643-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
41 | Jiang Xu 0001, Wayne H. Wolf, Jörg Henkel, Srimat T. Chakradhar |
A methodology for design, modeling, and analysis of networks-on-chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 1778-1781, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
41 | Ziqian Dong, Roberto Rojas-Cessa |
Long Round-Trip Time Support with Shared-Memory Crosspoint Buffered Packet Switch. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Hot Interconnects ![In: 13th Annual IEEE Symposium on High Performance Interconnects (HOTIC 2005), 17-19 August 2005, Stanford, CA, USA, pp. 138-143, 2005, IEEE Computer Society, 0-7695-2449-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
41 | James R. Heath |
A systems approach to molecular electronics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003, Seoul, Korea, August 25-27, 2003, pp. 359, 2003, ACM, 1-58113-682-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
41 | Prashanth Pappu, Jonathan S. Turner |
Stress Resistant Scheduling Algorithms for CIOQ Switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICNP ![In: 11th IEEE International Conference on Network Protocols (ICNP 2003), 4-7 November 2003, Atlanta, GA, USA, pp. 132-, 2003, IEEE Computer Society, 0-7695-2024-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
41 | Vipul Gupta, Eugen Schenfeld |
Performance analysis of a synchronous, circuit-switched interconnection cached network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Supercomputing ![In: Proceedings of the 8th international conference on Supercomputing, ICS 1994, Manchester, UK, July 11-15, 1994, pp. 246-255, 1994, ACM, 0-89791-665-4. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
38 | Gaspar Mora, José Flich, José Duato, Pedro López 0001, Elvira Baydal, Olav Lysne |
Towards an efficient switch architecture for high-radix switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ANCS ![In: Proceedings of the 2006 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, ANCS 2006, San Jose, California, USA, December 3-5, 2006, pp. 11-20, 2006, ACM, 1-59593-580-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
arbiter efficiency, partitioned crossbar, switch organization |
38 | Ravi R. Iyer 0001, Laxmi N. Bhuyan |
Design and Evaluation of a Switch Cache Architecture for CC-NUMA Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 49(8), pp. 779-797, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
scalable interconnects, shared memory multiprocessors, wormhole routing, execution-driven simulation, Crossbar switches, cache architectures |
38 | Jens Kargaard Madsen, Stephen I. Long |
A High-Speed Interconnect Network Using Ternary Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMVL ![In: 25th IEEE International Symposium on Multiple-Valued Logic, ISMVL 1995, Bloomington, Indiana, USA, May 23-25, 1995, Proceedings, pp. 2-7, 1995, IEEE Computer Society, 0-8186-7118-1. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
high-speed interconnect network, STARI, delay differences, crossbar topology, LSI GaAs chips, MESFET process, multiprocessor interconnection networks, multiprocessor system, buffers, clock skew, ternary logic, ternary logic, point-to-point communication |
38 | Imadeldin O. Mahgoub, Ahmed K. Elmagarmid |
Performance Analysis of a Generalized Class of M-Level Hierarchical Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 3(2), pp. 129-138, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
hierarchical multiprocessor systems, system bandwidth, hierarchically nonuniform reference, local requests, m-level system, crossbar system, performance evaluation, performance analysis, probability, multiprocessing systems, multiprocessorinterconnection networks, memory modules, multiple-bus system |
35 | M. Haykel Ben Jamaa, Kirsten E. Moselund, David Atienza, Didier Bouvet, Adrian M. Ionescu, Yusuf Leblebici, Giovanni De Micheli |
Variability-Aware Design of Multilevel Logic Decoders for Nanoscale Crossbar Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(11), pp. 2053-2067, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
35 | Can Emre Koksal |
On the Speedup Required to Achieve 100% Throughput for Multicast Over Crossbar Switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWQoS ![In: 16th International Workshop on Quality of Service, IWQoS 2008, University of Twente, Enskede, The Netherlands, 2-4 June 2008., pp. 60-64, 2008, IEEE, 978-1-4244-2084-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
35 | Hans Eberle, Pedro Javier García, José Flich, José Duato, Robert J. Drost, Nils Gura, David Hopkins 0001, Wladek Olesinski |
High-radix crossbar switches enabled by proximity communication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the ACM/IEEE Conference on High Performance Computing, SC 2008, November 15-21, 2008, Austin, Texas, USA, pp. 32, 2008, IEEE/ACM, 978-1-4244-2835-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
35 | Shyue-Wen Yang, Ming-Hwa Sheu, Chun-Kai Yeh, Chih-Yuen Wen, Chih-Chieh Lin, Wen-Kai Tsai |
Fast Fair Crossbar Scheduler for On-chip Router. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 385-388, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
35 | Michael Rosenblum, Constantine Caramanis, Michel X. Goemans, Vahid Tarokh |
Approximating fluid schedules in crossbar packet-switches and Banyan networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE/ACM Trans. Netw. ![In: IEEE/ACM Trans. Netw. 14(6), pp. 1374-1387, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
scheduling, graph theory, packet-switching, network calculus, combinatorics |
35 | Shinji Sumimoto, Kazuichi Ooe, Kouichi Kumon, Taisuke Boku, Mitsuhisa Sato, Akira Ukawa |
A scalable communication layer for multi-dimensional hyper crossbar network using multiple gigabit ethernet. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 20th Annual International Conference on Supercomputing, ICS 2006, Cairns, Queensland, Australia, June 28 - July 01, 2006, pp. 107-115, 2006, ACM, 1-59593-282-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
35 | Raymond R. Hoare, Zhu Ding, Alex K. Jones |
Interconnect routing and scheduling - A near-optimal real-time hardware scheduler for large cardinality crossbar switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the ACM/IEEE SC2006 Conference on High Performance Networking and Computing, November 11-17, 2006, Tampa, FL, USA, pp. 94, 2006, ACM Press, 0-7695-2700-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
35 | David N. Abramson, Jordan D. Gray, Christopher M. Twigg, Paul E. Hasler |
Characteristics and programming of floating-gate pFET switches in an FPAA crossbar network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 468-471, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
35 | B. Afkal, Ali Afzali-Kusha, Mahmoud El Nokali |
Efficient power model for crossbar interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (6) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 5858-5861, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
35 | Eryk Laskowski, Marek Tudruj |
Inter-processor Connection Reconfiguration Based on Dynamic Look-Ahead Control of Multiple Crossbar Switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings, pp. 71-80, 2003, Springer, 3-540-40822-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
35 | Eryk Laskowski |
Program Structuring Heuristics for Parallel Systems Based on Multiple Crossbar Switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPAM ![In: Parallel Processing and Applied Mathematics, 5th International Conference, PPAM 2003, Czestochowa, Poland, September 7-10, 2003. Revised Papers, pp. 314-322, 2003, Springer, 3-540-21946-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
35 | Tamaree Nalin, Isobe Takashi, Hiroaki Morino, Hitoshi Aida, Tadao Saito |
A Scalable and High Capacity Router on Multi-Dimension Crossbar Switch Principle. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCN ![In: 26th Annual IEEE Conference on Local Computer Networks (LCN 2001), 14-16 November 2001, Tampa, Florida, USA, Proceedings, pp. 375-376, 2001, IEEE Computer Society, 0-7695-1321-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
35 | Joydeep Ghosh, Anujan Varma, Naveen Krishnamurthy |
Distributed control schemes for fast arbitration in large crossbar networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 2(1), pp. 54-67, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
32 | Rahul Ratan, A. Yavuz Oruç |
Self-Routing Quantum Sparse Crossbar Packet Concentrators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 60(10), pp. 1390-1405, 2011. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
quantum packet concentrator, quantum switching, self-routing switch, sparse crossbar concentrator, Quantum circuits |
32 | Lotfi Mhamdi, Kees Goossens, Iria Varela Senin |
Buffered Crossbar Fabrics Based on Networks on Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CNSR ![In: 8th Annual Conference on Communication Networks and Services Research, CNSR 2010, 11-14 May 2010, Montreal, Canada, pp. 74-79, 2010, IEEE Computer Society, 978-0-7695-4041-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Buffered crossbar fabric, Scheduling |
32 | Mehdi Baradaran Tahoori |
BISM: built-in self map for hybrid crossbar nano-architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, Boston Area, MA, USA, May 10-12 2009, pp. 153-156, 2009, ACM, 978-1-60558-522-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
crossbar array, emerging nanotechnologies, logic mapping |
32 | Hongkyun Jung, Xianzhe Jin, Younjin Jung, Ok Kim, Byoungyup Lee, Jungbum Heo, Kwangki Ryoo |
Design of Multimedia SoC Platform with a Crossbar On-Chip Bus for Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NCM (1) ![In: NCM 2008, The Fourth International Conference on Networked Computing and Advanced Information Management, Gyeongju, Korea, September 2-4, 2008 - Volume 1, pp. 292-297, 2008, IEEE Computer Society, 978-0-7695-3322-3. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
SoC platform, crossbar, on-chip bus |
32 | Cyriel Minkenberg, François Abel, Peter Müller 0002, Raj Krishnamurthy, Mitchell Gusat, Peter Dill, Ilias Iliadis, Ronald P. Luijten, B. Roe Hemenway, Richard Grzybowski, Enrico Schiattarella |
Designing a Crossbar Scheduler for HPC Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 26(3), pp. 58-71, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
crossbar scheduler, interconnection network, high-performance computing |
32 | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
Topology aware mapping of logic functions onto nanowire-based crossbar architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 723-726, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
logic synthesis, PLA, nanoelectronic, crossbar |
32 | José G. Delgado-Frias, Girish B. Ratanpal |
A VLSI wrapped wave front arbiter for crossbar switches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 11th ACM Great Lakes Symposium on VLSI 2001, West Lafayette, Indiana, USA, 2001, pp. 85-88, 2001, ACM, 1-58113-351-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
interconnection network, crossbar switch, arbiter, network router |
32 | Weiming Guo, A. Yavuz Oruç |
Regular Sparse Crossbar Concentrators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 47(3), pp. 363-368, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
crosspoint complexity, regular sparse crossbar, Bipartite graph, concentrator |
32 | Frank T. Hady, Bernard L. Menezes |
The Performance of Crossbar-Based Binary Hypercubes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 44(10), pp. 1208-1215, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
Binary hypercube, throughput, latency, wormhole routing, crossbar, distributed queue |
32 | Mark A. Franklin |
VLSI Performance Comparison of Banyan and Crossbar Communications Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 30(4), pp. 283-291, 1981. The full citation details ...](Pics/full.jpeg) |
1981 |
DBLP DOI BibTeX RDF |
space-time product, VLSI, communication networks, Banyan network, multiprocessor networks, crossbar networks |
31 | Yan Pan, Prabhat Kumar 0002, John Kim, Gokhan Memik, Yu Zhang 0034, Alok N. Choudhary |
Firefly: illuminating future network-on-chip with nanophotonics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA, pp. 429-440, 2009, ACM, 978-1-60558-526-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
interconnection networks, topology, hierarchical network, nanophotonics |
31 | Xiangjie Ma, Xiaozhuo Gu, Lei He 0008, Julong Lan, Baisheng Zhang |
Performance Study on the MPMS Fabric: A Novel Parallel and Distributed Switching System Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCC ![In: 10th IEEE International Conference on High Performance Computing and Communications, HPCC 2008, 25-27 Sept. 2008, Dalian, China, pp. 69-76, 2008, IEEE Computer Society, 978-0-7695-3352-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
31 | Konstantin Likharev |
Defect-Tolerant Hybrid CMOS/Nanoelectronic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 1-3 October 2008, Boston, MA, USA, pp. 504-504, 2008, IEEE Computer Society, 978-0-7695-3365-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
31 | John E. Savage |
Computing at the Nanoscale. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 1-3 October 2008, Boston, MA, USA, pp. 423-423, 2008, IEEE Computer Society, 978-0-7695-3365-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
31 | Krishnendu Roy, Ramachandran Vaidyanathan, Jerry L. Trahan |
Input-queued switches with logarithmic delay: necessary conditions and a reconfigurable scheduling algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ANCS ![In: Proceedings of the 2008 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, ANCS 2008, San Jose, California, USA, November 6-7, 2008, pp. 121-122, 2008, ACM, 978-1-60558-346-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
distributed scheduling algorithm, parallel bipartite matching, reconfigurable mesh, mesh-of-trees, input-queued switch |
31 | Wenjing Rao, Alex Orailoglu, Ramesh Karri |
Interactive presentation: Logic level fault tolerance approaches targeting nanoelectronics PLAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 865-869, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
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