Search results for "satisfiability(SAT)"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
82	Fadi A. Aloul, Arathi Ramani, Karem A. Sakallah, Igor L. Markov	Solution and Optimization of Systems of Pseudo-Boolean Constraints.	IEEE Trans. Computers	2007	DBLP DOI BibTeX RDF	Pseudo Boolean (PB), Max-ONE, Global Routing, Conjunctive Normal Form (CNF), Backtrack Search, Integer Linear Programming (ILP), Max-SAT, Boolean Satisfiability (SAT)
63	Zhaohui Fu, Sharad Malik	On Solving the Partial MAX-SAT Problem.	SAT	2006	DBLP DOI BibTeX RDF
63	Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar	Hybrid Routing for FPGAs by Integrating Boolean Satisfiability with Geometric Search.	FPL	2002	DBLP DOI BibTeX RDF
63	Miguel F. Anjos	An improved semidefinite programming relaxation for the satisfiability problem.	Math. Program.	2005	DBLP DOI BibTeX RDF	Satisfiability, Semidefinite programming, Discrete optimization
57	Ateet Bhalla, Inês Lynce, José T. de Sousa, João Marques-Silva 0001	Heuristic-Based Backtracking for Propositional Satisfiability.	EPIA	2003	DBLP DOI BibTeX RDF
57	Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah	Generic ILP versus specialized 0-1 ILP: an update.	ICCAD	2002	DBLP DOI BibTeX RDF
56	Malek Mouhoub, Samira Sadaoui	Systematic versus Non-systematic Methods for Solving Incremental Satisfiability.	IEA/AIE	2004	DBLP DOI BibTeX RDF	Genetic Algorithms, Local Search, Branch and Bound, Propositional Satisfiability
50	Yu Hu 0002, Victor Shih, Rupak Majumdar, Lei He 0001	Exploiting Symmetries to Speed Up SAT-Based Boolean Matching for Logic Synthesis of FPGAs.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
50	Ateet Bhalla, Inês Lynce, José T. de Sousa, João Marques-Silva 0001	Heuristic-Based Backtracking Relaxation for Propositional Satisfiability.	J. Autom. Reason.	2005	DBLP DOI BibTeX RDF
50	Zhaohui Fu, Yinlei Yu, Sharad Malik	Considering Circuit Observability Don't Cares in CNF Satisfiability.	DATE	2005	DBLP DOI BibTeX RDF
50	Zhao Xing, Weixiong Zhang	Efficient Strategies for (Weighted) Maximum Satisfiability.	CP	2004	DBLP DOI BibTeX RDF
50	Hui Xu 0001, Rob A. Rutenbar, Karem A. Sakallah	sub-SAT: a formulation for relaxed Boolean satisfiability with applications in routing.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2003	DBLP DOI BibTeX RDF
50	Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah	Solving difficult instances of Boolean satisfiability in the presence of symmetry.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2003	DBLP DOI BibTeX RDF
50	Hui Xu 0001, Rob A. Rutenbar, Karem A. Sakallah	sub-SAT: a formulation for relaxed boolean satisfiability with applications in routing.	ISPD	2002	DBLP DOI BibTeX RDF
50	Inês Lynce, Luís Baptista, João Marques-Silva 0001	Towards Provably Complete Stochastic Search Algorithms for Satisfiability.	EPIA	2001	DBLP DOI BibTeX RDF
50	Himanshu Jain, Edmund M. Clarke	Efficient SAT solving for non-clausal formulas using DPLL, graphs, and watched cuts.	DAC	2009	DBLP DOI BibTeX RDF	NNF, verification, Boolean satisfiability, DPLL
50	Florian Letombe, João Marques-Silva 0001	Improvements to Hybrid Incremental SAT Algorithms.	SAT	2008	DBLP DOI BibTeX RDF
50	Yinlei Yu, Sharad Malik	Lemma Learning in SMT on Linear Constraints.	SAT	2006	DBLP DOI BibTeX RDF
50	Toby Walsh	Reformulating Propositional Satisfiability as Constraint Satisfaction.	SARA	2000	DBLP DOI BibTeX RDF
50	João Marques-Silva 0001, Jordi Planes	Algorithms for Maximum Satisfiability using Unsatisfiable Cores.	DATE	2008	DBLP DOI BibTeX RDF
50	Clark W. Barrett, David L. Dill, Aaron Stump	Checking Satisfiability of First-Order Formulas by Incremental Translation to SAT.	CAV	2002	DBLP DOI BibTeX RDF	Satisfiability, First-Order Logic, Decision Procedures, Propositional Satisfiability
44	Inês Lynce, Ana Graça, João Marques-Silva 0001, Arlindo L. Oliveira	Haplotype Inference with Boolean Constraint Solving: An Overview.	ICTAI (1)	2008	DBLP DOI BibTeX RDF
44	António Morgado 0001, Paulo J. Matos, Vasco M. Manquinho, João Marques-Silva 0001	Counting Models in Integer Domains.	SAT	2006	DBLP DOI BibTeX RDF
44	Rolf Drechsler, Görschwin Fey, Sebastian Kinder	An Integrated Approach for Combining BDD and SAT Provers.	VLSI Design	2006	DBLP DOI BibTeX RDF
44	Sean Safarpour, Andreas G. Veneris, Gregg Baeckler, Richard Yuan	Efficient SAT-based Boolean matching for FPGA technology mapping.	DAC	2006	DBLP DOI BibTeX RDF	FPGA technology mapping, Boolean satisfiability, Boolean matching
44	Lyndon Drake, Alan M. Frisch, Toby Walsh	Automatic Generation of Implied Clauses for SAT.	CP	2002	DBLP DOI BibTeX RDF
44	Hidetomo Nabeshima, Koji Iwanuma, Katsumi Inoue	Effective SAT Planning by Speculative Computation.	Australian Joint Conference on Artificial Intelligence	2002	DBLP DOI BibTeX RDF
44	Priyank Kalla, Zhihong Zeng, Maciej J. Ciesielski, ChiLai Huang	A BDD-Based Satisfiability Infrastructure Using the Unate Recursive Paradigm.	DATE	2000	DBLP DOI BibTeX RDF
44	Paulo F. Flores, Horácio C. Neto, João P. Marques Silva	An exact solution to the minimum size test pattern problem.	ACM Trans. Design Autom. Electr. Syst.	2001	DBLP DOI BibTeX RDF	propositional satisfiability (SAT), verification and test, built-in self-test (BIST), Automatic test pattern generation (ATPG), integer linear programming (ILP)
44	Zhaohui Fu, Sharad Malik	Solving the minimum-cost satisfiability problem using SAT based branch-and-bound search.	ICCAD	2006	DBLP DOI BibTeX RDF	MinCostSAT, optimization, branch-and-bound, Boolean satisfiability
44	Daijue Tang, Yinlei Yu, Darsh Ranjan, Sharad Malik	Analysis of Search Based Algorithms for Satisfiability of Propositional and Quantified Boolean Formulas Arising from Circuit State Space Diameter Problems.	SAT (Selected Papers	2004	DBLP DOI BibTeX RDF
44	Toby Walsh	SAT v CSP.	CP	2000	DBLP DOI BibTeX RDF
44	João P. Marques Silva, Karem A. Sakallah	Boolean satisfiability in electronic design automation.	DAC	2000	DBLP DOI BibTeX RDF
38	Daniel Tille, Rolf Drechsler	A fast untestability proof for SAT-based ATPG.	DDECS	2009	DBLP DOI BibTeX RDF
38	Matti Järvisalo, Tommi A. Junttila, Ilkka Niemelä	Justification-Based Local Search with Adaptive Noise Strategies.	LPAR	2008	DBLP DOI BibTeX RDF
38	Xiuqin Wang, Guangsheng Ma, Hao Wang	A Novel Method for All Solutions SAT Problem.	SNPD	2008	DBLP DOI BibTeX RDF	All Solutions, Observability Don't Cares, Circuit Structure, Boolean Satisfiability
38	Jinji Yang, Kaile Su, Qingliang Chen	Improving Encoding Efficiency for Bounded Model Checking.	TASE	2008	DBLP DOI BibTeX RDF	encoding, SAT, Bounded Model Checking
38	Stephan Eggersglüß, Görschwin Fey, Rolf Drechsler	SAT-based ATPG for Path Delay Faults in Sequential Circuits.	ISCAS	2007	DBLP DOI BibTeX RDF
38	Michael Codish	Proving Termination with (Boolean) Satisfaction.	LOPSTR	2007	DBLP DOI BibTeX RDF
38	Abdelraouf Ishtaiwi, John Thornton 0001, Abdul Sattar 0001	Weight Redistribution for Unweighted MAX-SAT.	Australian Conference on Artificial Intelligence	2007	DBLP DOI BibTeX RDF
38	Peter Hawkins, Peter J. Stuckey	A Hybrid BDD and SAT Finite Domain Constraint Solver.	PADL	2006	DBLP DOI BibTeX RDF
38	Alan Mishchenko, Satrajit Chatterjee, Robert K. Brayton, Niklas Eén	Improvements to combinational equivalence checking.	ICCAD	2006	DBLP DOI BibTeX RDF
38	Sean Safarpour, Andreas G. Veneris, Rolf Drechsler	Integrating observability don't cares in all-solution SAT solvers.	ISCAS	2006	DBLP DOI BibTeX RDF
38	Enrico Giunchiglia, Marco Maratea	optsat: A Tool for Solving SAT Related Optimization Problems.	JELIA	2006	DBLP DOI BibTeX RDF
38	Inês Lynce, João Marques-Silva 0001	Efficient data structures for backtrack search SAT solvers.	Ann. Math. Artif. Intell.	2005	DBLP DOI BibTeX RDF	backtrack search, propositional satisfiability
38	Kameshwar Chandrasekar, Michael S. Hsiao	State Set Management for SAT-based Unbounded Model Checking.	ICCD	2005	DBLP DOI BibTeX RDF
38	Enrico Giunchiglia, Marco Maratea	Evaluating Search Strategies and Heuristics for Efficient Answer Set Programming.	AI*IA	2005	DBLP DOI BibTeX RDF
38	Liang Zhang 0012, Mukul R. Prasad, Michael S. Hsiao	Incremental deductive & inductive reasoning for SAT-based bounded model checking.	ICCAD	2004	DBLP DOI BibTeX RDF
38	Chao Wang 0001, HoonSang Jin, Gary D. Hachtel, Fabio Somenzi	Refining the SAT decision ordering for bounded model checking.	DAC	2004	DBLP DOI BibTeX RDF	decision heuristic, SAT, bounded model checking
38	Gianpiero Cabodi, Paolo Camurati, Stefano Quer	Can BDDs compete with SAT solvers on bounded model checking?	DAC	2002	DBLP DOI BibTeX RDF	model checking, formal verification, SAT, BDDs
38	Farzan Fallah, Srinivas Devadas, Kurt Keutzer	Functional vector generation for HDL models using linearprogramming and Boolean satisfiability.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2001	DBLP DOI BibTeX RDF
38	Per Bjesse, Koen Claessen	SAT-Based Verification without State Space Traversal.	FMCAD	2000	DBLP DOI BibTeX RDF
38	João Marques-Silva 0001, Thomas Glass	Combinational Equivalence Checking Using Satisfiability and Recursive Learning.	DATE	1999	DBLP DOI BibTeX RDF	Boolean Satisfiability, Recursive Learning, Combinational Equivalence Checking
38	Peixin Zhong, Margaret Martonosi, Pranav Ashar, Sharad Malik	Solving Boolean Satisfiability with Dynamic Hardware Configurations.	FPL	1998	DBLP DOI BibTeX RDF
38	Farinaz Koushanfar, Jennifer L. Wong, Jessica Feng, Miodrag Potkonjak	ILP-based engineering change.	DAC	2002	DBLP DOI BibTeX RDF	engineering change, satisfiability(SAT), synthesis, integer linear programming
38	Enrico Giunchiglia, Marco Maratea	Improving Plan Quality in SAT-Based Planning.	AI*IA	2009	DBLP DOI BibTeX RDF
38	João Marques-Silva 0001, Inês Lynce, Vasco M. Manquinho	Symmetry Breaking for Maximum Satisfiability.	LPAR	2008	DBLP DOI BibTeX RDF
38	Enrico Giunchiglia, Marco Maratea	SAT-Based Planning with Minimal-#actions Plans and "soft" Goals.	AI*IA	2007	DBLP DOI BibTeX RDF
38	Ryan Williams 0001	Inductive Time-Space Lower Bounds for Sat and Related Problems.	Comput. Complex.	2006	DBLP DOI BibTeX RDF	68Q17, Subject classification
38	Alan Mishchenko, Jin S. Zhang, Subarnarekha Sinha, Jerry R. Burch, Robert K. Brayton, Malgorzata Chrzanowska-Jeske	Using simulation and satisfiability to compute flexibilities in Boolean networks.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
38	Kameshwar Chandrasekar, Michael S. Hsiao	Integration of Learning Techniques into Incremental Satisfiability for Efficient Path-Delay Fault Test Generation.	DATE	2005	DBLP DOI BibTeX RDF
38	Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah	Dynamic symmetry-breaking for improved Boolean optimization.	ASP-DAC	2005	DBLP DOI BibTeX RDF
38	Gi-Joon Nam, Fadi A. Aloul, Karem A. Sakallah, Rob A. Rutenbar	A Comparative Study of Two Boolean Formulations of FPGA Detailed Routing Constraints.	IEEE Trans. Computers	2004	DBLP DOI BibTeX RDF
38	Jennifer L. Wong, Gang Qu 0001, Miodrag Potkonjak	Optimization-intensive watermarking techniques for decision problems.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2004	DBLP DOI BibTeX RDF
38	Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah	Shatter: efficient symmetry-breaking for boolean satisfiability.	DAC	2003	DBLP DOI BibTeX RDF	clause learning, logic simplification, routing, symmetries, SAT, CNF, backtrack search, graph automorphism
37	Igor Gammer, Eyal Amir	Solving Satisfiability in Ground Logic with Equality by Efficient Conversion to Propositional Logic.	SARA	2007	DBLP DOI BibTeX RDF
37	Daijue Tang, Sharad Malik	Solving Quantified Boolean Formulas with Circuit Observability Don't Cares.	SAT	2006	DBLP DOI BibTeX RDF
37	Seda Ogrenci Memik, Farzan Fallah	Accelerated SAT-based Scheduling of Control/Data Flow Graphs.	ICCD	2002	DBLP DOI BibTeX RDF
37	Felip Manyà, Ramón Béjar, Gonzalo Escalada-Imaz	The satisfiability problem in regular CNF-formulas.	Soft Comput.	1998	DBLP DOI BibTeX RDF	Multiple-valued regular CNF-formulas, benchmarks, threshold, satisfiability problem
31	Miquel Bofill, Dídac Busquets, Mateu Villaret	A declarative approach to robust weighted Max-SAT.	PPDP	2010	DBLP DOI BibTeX RDF	max-sat, robustness
31	Moshe Y. Vardi	Symbolic Techniques in Propositional Satisfiability Solving.	SAT	2009	DBLP DOI BibTeX RDF
31	Miroslav N. Velev, Ping Gao 0002	Efficient SAT-based techniques for Design of Experiments by using static variable ordering.	ISQED	2009	DBLP DOI BibTeX RDF
31	Peng Guo, Wenjian Luo, Zhifang Li, Houjun Liang, Xufa Wang	Hybridizing Evolutionary Negative Selection Algorithm and Local Search for Large-Scale Satisfiability Problems.	ISICA	2009	DBLP DOI BibTeX RDF	Evolutionary Negative Selection Algorithm, Flip Heuristic, SAT
31	Miroslav N. Velev, Ping Gao 0002	Comparison of Boolean Satisfiability Encodings on FPGA Detailed Routing Problems.	DATE	2008	DBLP DOI BibTeX RDF
31	Stephan Eggersglüß, Rolf Drechsler	On the Influence of Boolean Encodings in SAT-Based ATPG for Path Delay Faults.	ISMVL	2008	DBLP DOI BibTeX RDF	Boolean Encodings, ATPG, SAT, Path Delay Faults
31	Loganathan Lingappan, Niraj K. Jha	Satisfiability-Based Automatic Test Program Generation and Design for Testability for Microprocessors.	IEEE Trans. Very Large Scale Integr. Syst.	2007	DBLP DOI BibTeX RDF
31	Ming-e Jing, Dian Zhou, Pushan Tang, Xiaofang Zhou, Hua Zhang 0019	Solving SAT problem by heuristic polarity decision-making algorithm.	Sci. China Ser. F Inf. Sci.	2007	DBLP DOI BibTeX RDF	complete algorithm, decision-making, DPLL, SAT problem
31	Miroslav N. Velev	Exploiting hierarchy and structure to efficiently solve graph coloring as SAT.	ICCAD	2007	DBLP DOI BibTeX RDF
31	Ana Graça, João Marques-Silva 0001, Inês Lynce, Arlindo L. Oliveira	Efficient Haplotype Inference with Pseudo-boolean Optimization.	AB	2007	DBLP DOI BibTeX RDF	pure parsimony, pseudo-Boolean optimization, haplotype inference
31	Enrico Giunchiglia, Yuliya Lierler, Marco Maratea	Answer Set Programming Based on Propositional Satisfiability.	J. Autom. Reason.	2006	DBLP DOI BibTeX RDF	answer set programming, propositional satisfiability
31	DoRon B. Motter, Jarrod A. Roy, Igor L. Markov	Resolution cannot polynomially simulate compressed-BFS.	Ann. Math. Artif. Intell.	2005	DBLP DOI BibTeX RDF
31	Junhao Shi, Görschwin Fey, Rolf Drechsler, Andreas Glowatz, Friedrich Hapke, Jürgen Schlöffel	PASSAT: Efficient SAT-Based Test Pattern Generation for Industrial Circuits.	ISVLSI	2005	DBLP DOI BibTeX RDF
31	Daniel Singer, Alain Vagner	Parallel Resolution of the Satisfiability Problem (SAT) with OpenMP and MPI.	PPAM	2005	DBLP DOI BibTeX RDF
31	Arathi Ramani, Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah	Breaking Instance-Independent Symmetries in Exact Graph Coloring.	DATE	2004	DBLP DOI BibTeX RDF
31	Ruiming Li, Dian Zhou, Donglei Du	Satisfiability and integer programming as complementary tools.	ASP-DAC	2004	DBLP DOI BibTeX RDF
31	Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah	ShatterPB: symmetry-breaking for pseudo-Boolean formulas.	ASP-DAC	2004	DBLP DOI BibTeX RDF
31	Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada	High speed layout synthesis for minimum-width CMOS logic cells via Boolean satisfiability.	ASP-DAC	2004	DBLP DOI BibTeX RDF
31	Jianzhou Zhao, Jinian Bian, Weimin Wu	PFGASAT- A Genetic SAT Solver Combining Partitioning and Fuzzy Strategie.	COMPSAC	2004	DBLP DOI BibTeX RDF
31	Mohammad Awedh, Fabio Somenzi	Increasing the Robustness of Bounded Model Checking by Computing Lower Bounds on the Reachable States.	FMCAD	2004	DBLP DOI BibTeX RDF
31	Gianpiero Cabodi, Sergio Nocco, Stefano Quer	Improving SAT-Based Bounded Model Checking by Means of BDD-Based Approximate Traversals.	DATE	2003	DBLP DOI BibTeX RDF
31	Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar	A new FPGA detailed routing approach via search-based Booleansatisfiability.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2002	DBLP DOI BibTeX RDF
31	Inês Lynce, João Marques-Silva 0001	Tuning Randomization in Backtrack Search SAT Algorithms.	CP	2002	DBLP DOI BibTeX RDF
31	Inês Lynce, João Marques-Silva 0001	The Effect of Nogood Recording in DPLL-CBJ SAT Algorithms.	International Workshop on Constraint Solving and Constraint Logic Programming	2002	DBLP DOI BibTeX RDF
31	Per Bjesse, Tim Leonard, Abdel Mokkedem	Finding Bugs in an Alpha Microprocessor Using Satisfiability Solvers.	CAV	2001	DBLP DOI BibTeX RDF
31	Viresh Paruthi, Andreas Kuehlmann	Equivalence Checking Combining a Structural SAT-Solver, BDDs, and Simulation.	ICCD	2000	DBLP DOI BibTeX RDF
31	Tomi Janhunen, Ilkka Niemelä, Mark Sevalnev	Computing Stable Models via Reductions to Difference Logic.	LPNMR	2009	DBLP DOI BibTeX RDF
31	Marcílio Mendonça, Andrzej Wasowski, Krzysztof Czarnecki 0001	SAT-based analysis of feature models is easy.	SPLC	2009	DBLP BibTeX RDF
31	Warren A. Hunt Jr., Erik Reeber	A SAT-based procedure for verifying finite state machines in ACL2.	ACL2	2006	DBLP DOI BibTeX RDF	satisfiability solving, theorem proving, hardware verification, ACL2
31	Fadi A. Aloul, Assim Sagahyroon	Estimation of the weighted maximum switching activity in combinational CMOS circuits.	ISCAS	2006	DBLP DOI BibTeX RDF
31	Loganathan Lingappan, Niraj K. Jha	Unsatisfiability Based Efficient Design for Testability Solution for Register-Transfer Level Circuits.	VTS	2005	DBLP DOI BibTeX RDF