Search results for "serial"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
68	Leilei Song, Keshab K. Parhi	Efficient Finite Field Serial/Parallel Multiplication.	ASAP	1996	DBLP DOI BibTeX RDF	finite field serial/parallel multiplication, finite field arithmetic architectures, bit-serial/parallel finite field multiplier, standard basis representation, optimal primitive polynomials, minimum hardware complexity, semi-systolic architecture, computational complexity, cryptography, cryptography, encoding, digital arithmetic, polynomials, multiplying circuits, VLSI implementation, coding theory
60	Arash Hariri, Arash Reyhani-Masoleh	Digit-Serial Structures for the Shifted Polynomial Basis Multiplication over Binary Extension Fields.	WAIFI	2008	DBLP DOI BibTeX RDF	Shifted polynomial basis, binary extension fields, digit-serial, multiplication
60	Mark G. Arnold, Panagiotis D. Vouzis	A Serial Logarithmic Number System ALU.	DSD	2007	DBLP DOI BibTeX RDF	Serial Arithmetic, Logarithmic Number System
58	Zhong Xue, Kelvin K. Wong, Stephen T. C. Wong	Joint Registration and Segmentation of Serial Lung CT Images in Microendoscopy Molecular Image-Guided Therapy.	MIAR	2008	DBLP DOI BibTeX RDF
54	Arash Reyhani-Masoleh	A New Bit-Serial Architecture for Field Multiplication Using Polynomial Bases.	CHES	2008	DBLP DOI BibTeX RDF	Finite or Galois field, Mastrovito multiplier, polynomial basis, bit-serial multiplier
54	Michel Renovell, P. Huc, Yves Bertrand	Serial transistor network modeling for bridging fault simulation.	Asian Test Symposium	1995	DBLP DOI BibTeX RDF	serial transistor network modeling, voting model, biased voting model, relative transistor strength, SPICE pre-simulation, fault simulation procedure, CMOS logic, fault diagnosis, logic testing, integrated circuit testing, digital simulation, circuit analysis computing, CMOS logic circuits, SPICE, integrated circuit modelling, bridging fault simulation
52	Krister Landernäs, Johnny Holmberg, Mark Vesterbacka	A high-speed low-latency digit-serial hybrid adder.	ISCAS (3)	2004	DBLP DOI BibTeX RDF
52	Mary Jane Irwin, Robert Michael Owens	A case for digit serial VLSI signal processors.	J. VLSI Signal Process.	1990	DBLP DOI BibTeX RDF
51	Omar Nibouche, Ahmed Bouridane, Mokhtar Nibouche	New architectures for serial-serial multiplication.	ISCAS (2)	2001	DBLP DOI BibTeX RDF
48	Wei Cheng, Zhenhua Tan, Xiaoxing Gao, Guiran Chang, Jia Wen	High Speed Serial Interface & Some Key Technology Research.	ISECS	2008	DBLP DOI BibTeX RDF	SerDes, Bridge connection chip, High-speed serial interface
48	Rostislav (Reuven) Dobkin, Arkadiy Morgenshtein, Avinoam Kolodny, Ran Ginosar	Parallel vs. serial on-chip communication.	SLIP	2008	DBLP DOI BibTeX RDF	dual-rail, long-range interconnect serial link, parallel link, asynchronous circuits
48	Chang Han Kim, Yongtae Kim, Nam Su Chang, IlHwan Park	Modified Serial Multipliers for Type-IV Gaussian Normal Bases.	INDOCRYPT	2005	DBLP DOI BibTeX RDF	serial multiplier, Finite fields, ECC, Massey-Omura multiplier, Gaussian Normal Basis
48	Sriganesh Madhvanath, Venu Govindaraju	Serial classifier combination for handwritten word recognition.	ICDAR	1995	DBLP DOI BibTeX RDF	off-line handwritten word recognition algorithms, serial classifier combination, lexicon size, intrinsic recognition power, feature orthogonality, top-choice recognition rate, analytical word classifiers, high-performance holistic classifier, image classification, document image processing
46	S. Ali A. Moosavian, Alireza Pourreza, Khalil Alipour	Kinematics and dynamics of a hybrid serial-parallel mobile robot.	ICRA	2009	DBLP DOI BibTeX RDF
46	Eran Sharon, Simon Litsyn, Jacob Goldberger	Efficient Serial Message-Passing Schedules for LDPC Decoding.	IEEE Trans. Inf. Theory	2007	DBLP DOI BibTeX RDF
46	Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, Vivek De	Reducing the Data Switching Activity on Serial Link Buses.	ISQED	2006	DBLP DOI BibTeX RDF
46	Kuo-Yu Huang, Chia-Hui Chang	Efficient Mining Strategy for Frequent Serial Episodes in Temporal Database.	APWeb	2006	DBLP DOI BibTeX RDF
46	Nam-Yeun Kim, Kee-Young Yoo	Digit-Serial AB2 Systolic Array for Division in GF(2m).	ICCSA (4)	2004	DBLP DOI BibTeX RDF
46	Hanho Lee, Gerald E. Sobelman	Digit-Serial DSP Library for Optimized FPGA Configuration.	FCCM	1998	DBLP DOI BibTeX RDF
44	Sandeep S. Kumar, Thomas J. Wollinger, Christof Paar	Optimum Digit Serial GF(2^m) Multipliers for Curve-Based Cryptography.	IEEE Trans. Computers	2006	DBLP DOI BibTeX RDF	least significant digit multiplier, elliptic/hyperelliptic curve cryptography, public key cryptography, digit serial multiplier, Bit serial multiplier
44	Dannie Lau, Aaron Schneider, Milos D. Ercegovac, John D. Villasenor	FPGA-Based Structures for On-Line FFT and DCT.	FCCM	1999	DBLP DOI BibTeX RDF	FPGA, interconnect, MAC, FFT, signal processing, DCT, online, on-line, distributed arithmetic, bit-serial, xilinx, on-line arithmetic
43	Serial Rayene Boussalia, Allaoua Chaoui, Aurélie Hurault, Meriem Ouederni, Philippe Quéinnec	Multi-objective quantum inspired Cuckoo search algorithm and multi-objective bat inspired algorithm for the web service composition problem.	Int. J. Intell. Syst. Technol. Appl.	2016	DBLP DOI BibTeX RDF
43	Serial Rayene Boussalia, Allaoua Chaoui, Aurélie Hurault	QoS-Based Web Services Composition Optimization with an Extended Bat Inspired Algorithm.	ICIST	2015	DBLP DOI BibTeX RDF
43	Abdesslem Layeb, Serial Rayene Boussalia	A novel greedy quantum inspired cuckoo search algorithm for variable sized bin packing problem.	Int. J. Math. Oper. Res.	2014	DBLP DOI BibTeX RDF
43	Serial Rayene Boussalia, Allaoua Chaoui	Optimizing QoS-Based Web Services Composition by Using Quantum Inspired Cuckoo Search Algorithm.	MobiWIS	2014	DBLP DOI BibTeX RDF
43	Yukun Chen, Serial Mani	Study of active learning in the challenge.	IJCNN	2010	DBLP DOI BibTeX RDF
42	Sudhanshu Khanna, Benton H. Calhoun	Serial sub-threshold circuits for ultra-low-power systems.	ISLPED	2009	DBLP DOI BibTeX RDF	bit width, serial systems, leakage, ultra low power, sub-threshold
42	Jyrki Rissanen	Naming Game - An Automated Tool for Analyzing and Practicing Rapid Serial Naming on Dyslexic Persons.	ICCHP	2008	DBLP DOI BibTeX RDF	Rapid Serial Naming, Serious Gaming, Dyslexia
42	Chang Hoon Kim, Soonhak Kwon, Chun Pyo Hong, In-Gil Nam	A New Digit-Serial Systolic Mulitplier for High Performance GF(2m) Applications.	HPCC	2005	DBLP DOI BibTeX RDF	VLSI, Cryptography, Finite Field, Digit-Serial Multiplier
42	Jorge Rodas Osollo, Karina Gibert, J. Emilio Rojo	KDSM Methodology for Knowledge Discovery from Ill-Structured Domains Presenting Very Short and Repeated Serial Measures with Blocking Factor.	CCIA	2002	DBLP DOI BibTeX RDF	Serial Measures, Ill-Structured Domains, Clustering, Classification, Knowledge Discovery
42	Soonhak Kwon, Heuisu Ryu	Efficient Bit Serial Multiplication Using Optimal Normal Bases of Type II in GF (2m).	ISC	2002	DBLP DOI BibTeX RDF	bit serial multiplication, optimal normal basis of type II, Finite field, dual basis
42	Kiamal Z. Pekmestzi, Paraskevas Kalivas	Constant Number Serial Pipeline Multipliers.	J. VLSI Signal Process.	2000	DBLP DOI BibTeX RDF	constant number multiplication, serial multipliers, systolic circuits, canonic signed digit representation
40		Proceedings of the 4th Workshop on Scalable and Resilient Infrastructures for Distributed Ledgers, SERIAL@Middleware 2020, Delft, The Netherlands, December 07-11, 2020	SERIAL@Middleware	2020	DBLP DOI BibTeX RDF
40	Jonas Theis, Luigi Vigneri, Lin Wang 0015, Animesh Trivedi	Healthor: Protecting the Weak in Heterogeneous DLTs with Health-aware Flow Control.	SERIAL@Middleware	2020	DBLP DOI BibTeX RDF
40	Yuzhe Richard Tang, Kai Li 0017, Yibo Wang, Sencer Burak Somuncuoglu	Scalable Log Auditing on Private Blockchains via Lightweight Log-Fork Prevention.	SERIAL@Middleware	2020	DBLP DOI BibTeX RDF
40		Proceedings of the 3rd Workshop on Scalable and Resilient Infrastructures for Distributed Ledgers, SERIAL@Middleware 2019, Davis, CA, USA, December 09-13, 2019	SERIAL@Middleware	2019	DBLP DOI BibTeX RDF
40	Sangwon Hong, Yoongdoo Noh, Chanik Park	Design of Extensible Non-Fungible Token Model in Hyperledger Fabric.	SERIAL@Middleware	2019	DBLP DOI BibTeX RDF
40	Yongrae Jo, Chanik Park	Codit: Collaborative Auditing for BaaS.	SERIAL@Middleware	2019	DBLP DOI BibTeX RDF
40	Kristof Jannes, Bert Lagaisse, Wouter Joosen	You Don't Need a Ledger: Lightweight Decentralized Consensus Between Mobile Web Clients.	SERIAL@Middleware	2019	DBLP DOI BibTeX RDF
40	Signe Rüsch, Kai Bleeke, Rüdiger Kapitza	Themis: An Efficient and Memory-Safe BFT Framework in Rust: Research Statement.	SERIAL@Middleware	2019	DBLP DOI BibTeX RDF
40		Proceedings of the 2nd Workshop on Scalable and Resilient Infrastructures for Distributed Ledgers, SERIAL@Middleware 2018, Rennes, France, December 10, 2018	SERIAL@Middleware	2018	DBLP DOI BibTeX RDF
40	Daniel Sel, Kaiwen Zhang 0001, Hans-Arno Jacobsen	Towards Solving the Data Availability Problem for Sharded Ethereum.	SERIAL@Middleware	2018	DBLP DOI BibTeX RDF
40	Zsolt István, Alessandro Sorniotti, Marko Vukolic	StreamChain: Do Blockchains Need Blocks?	SERIAL@Middleware	2018	DBLP DOI BibTeX RDF
40	Muhammad Ahmad Zafar, Falak Sher, Muhammad Umar Janjua, Salman Baset	Sol2js: Translating Solidity Contracts into Javascript for Hyperledger Fabric.	SERIAL@Middleware	2018	DBLP DOI BibTeX RDF
40	Jacob Eberhardt, Jonathan Heiss	Off-chaining Models and Approaches to Off-chain Computations.	SERIAL@Middleware	2018	DBLP DOI BibTeX RDF
40	Christian Berger 0006, Hans P. Reiser	Scaling Byzantine Consensus: A Broad Analysis.	SERIAL@Middleware	2018	DBLP DOI BibTeX RDF
40		Proceedings of the 1st Workshop on Scalable and Resilient Infrastructures for Distributed Ledgers, SERIAL@Middleware 2017, Las Vegas, NV, USA, December 11-15, 2017	SERIAL@Middleware	2017	DBLP DOI BibTeX RDF
40	Lei Xu 0012, Lin Chen 0009, Zhimin Gao, Shouhuai Xu, Weidong Shi	EPBC: Efficient Public Blockchain Client for lightweight users.	SERIAL@Middleware	2017	DBLP DOI BibTeX RDF
40	Massimo Bartoletti, Stefano Lande, Livio Pompianu, Andrea Bracciali	A general framework for blockchain analytics.	SERIAL@Middleware	2017	DBLP DOI BibTeX RDF
40	Alysson Bessani, João Sousa 0002, Marko Vukolic	A byzantine fault-tolerant ordering service for the hyperledger fabric blockchain platform.	SERIAL@Middleware	2017	DBLP DOI BibTeX RDF
40	Rens W. van der Heijden, Felix Engelmann, David Mödinger, Franziska Schönig, Frank Kargl	Blackchain: scalability for resource-constrained accountable vehicle-to-x communication.	SERIAL@Middleware	2017	DBLP DOI BibTeX RDF
40	Wilson S. Melo, Alysson Bessani, Luiz F. R. C. Carmo	How blockchains can help legal metrology.	SERIAL@Middleware	2017	DBLP DOI BibTeX RDF
40	Jonatan Bergquist, Aron Laszka, Monika Sturm 0001, Abhishek Dubey	On the design of communication and transaction anonymity in blockchain-based transactive microgrids.	SERIAL@Middleware	2017	DBLP DOI BibTeX RDF
40	Felix Engelmann, Henning Kopp, Frank Kargl, Florian Glaser, Christof Weinhardt	Towards an economic analysis of routing in payment channel networks.	SERIAL@Middleware	2017	DBLP DOI BibTeX RDF
40	Karim Traore, Emmanuel Grolleau, Francis Cottet	Simpler Analysis of Serial Transactions Using Reverse Transactions.	ICAS	2006	DBLP DOI BibTeX RDF
40	Dan Cyca, Laurence E. Turner	Bit-Serial Digital Filter Implementation using a Custom C Compiler.	APCCAS	2006	DBLP DOI BibTeX RDF
40	Sorin Cotofana, Stamatis Vassiliadis	Periodic symmetric functions, serial addition, and multiplication with neural networks.	IEEE Trans. Neural Networks	1998	DBLP DOI BibTeX RDF
40	Per Larsson-Edefors	A Miniature Serial-Data SIMD Architecture.	EUROMICRO	1998	DBLP DOI BibTeX RDF
40	Paul Chang, Brion L. Keller, Sarala Paliwal	Effective parallel processing techniques for the generation of test data for a logic built-in self test system.	Asian Test Symposium	2000	DBLP DOI BibTeX RDF	logic built-in self test, complex processor, simulation time, random stimulus generation, signature computation, Pseudo-Random Pattern Generators, serial compression, response data, serial pattern dependency, parallel processing, parallel processing, logic testing, partitioning, built-in self test, integrated circuit testing, automatic test pattern generation, signatures, parallel simulation, microprocessor chips, logic simulation, logic simulation, post processing, logic partitioning, test data
38	Dong Gun Kam, Joungho Kim, Jiheon Yu, Ho Choi, Kicheol Bae, Choonheung Lee	Packaging a 40-Gbps Serial Link Using a Wire-Bonded Plastic Ball Grid Array.	IEEE Des. Test Comput.	2006	DBLP DOI BibTeX RDF	wire bonded plastic ball grid array, WB-PBGA, 40 Gb/s Serial Link, chip-to-chip serial link, SiP, System-in-Package
36	Kunal Agrawal, I-Ting Angelina Lee, Jim Sukha	Brief announcement: serial-parallel reciprocity in dynamic multithreaded languages.	SPAA	2010	DBLP DOI BibTeX RDF	dynamic multithreading, intel threading building blocks, serial-parallel reciprocity, scheduling, work stealing, cilk
36	Brian M. H. Li, Philip Heng Wai Leong	Serial and Parallel FPGA-based Variable Block Size Motion Estimation Processors.	J. Signal Process. Syst.	2008	DBLP DOI BibTeX RDF	FPGA, motion estimation, video compression, bit serial, systolic
36	Tung-Ying Lee, En Tzu Wang, Arbee L. P. Chen	Mining Serial Episode Rules with Time Lags over Multiple Data Streams.	DaWaK	2008	DBLP DOI BibTeX RDF	Multiple data streams, Serial episode rule, Data mining, Time lag
36	Julia Willamena Patriarche, Bradley James Erickson	Part 2. Automated Change Detection and Characterization Applied to Serial MR of Brain Tumors may Detect Progression Earlier than Human Experts.	J. Digit. Imaging	2007	DBLP DOI BibTeX RDF	serial imaging, change detection, computer aided diagnosis, Brain tumor
36	Julia Willamena Patriarche, Bradley James Erickson	Part 1. Automated Change Detection and Characterization in Serial MR Studies of Brain-Tumor Patients.	J. Digit. Imaging	2007	DBLP DOI BibTeX RDF	serial imaging, change detection, Brain tumor
36	Lachezar Yordanov, Miroslav Mihaylov, Vladimir Vitkov	Advanced microprocessor system with serial memory for harvester testing.	CompSysTech	2007	DBLP DOI BibTeX RDF	automatic control, computer systems and technologies, grain harvester, serial interface module, microcontroller
36	Seungyoon Nam, Seungmook Lee, Sanghyuk Lee, Seokmin Shin, Taesung Park	Bayesian Hierarchical Models for Serial Analysis of Gene Expression.	VDMB	2006	DBLP DOI BibTeX RDF	Serial Analysis of Gene expression, SAGE, Bayesian hierarchical model
36	Saurav Gorai, Saptarshi Biswas, Lovleen Bhatia, Praveen Tiwari, Raj S. Mitra	Directed-simulation assisted formal verification of serial protocol and bridge.	DAC	2006	DBLP DOI BibTeX RDF	serial protocol, model checking, formal verification
36	Arash Reyhani-Masoleh, M. Anwar Hasan	Efficient digit-serial normal basis multipliers over binary extension fields.	ACM Trans. Embed. Comput. Syst.	2004	DBLP DOI BibTeX RDF	security, finite field, normal basis, Digit-serial multiplier
36	Guy Madison	Fractal modeling of human isochronous serial interval production.	Biol. Cybern.	2004	DBLP DOI BibTeX RDF	Abbreviations Bm Brownian motion, f frequency, fGn fractional Gaussian noise, H Hurst exponent, ISIP isochronous serial interval production, IOI inter onset interval
36	Yong Ho Hwang, Sang Gyoo Sim, Pil Joong Lee	Bit-Serial Multipliers for Exponentiation and Division in GF(2m) Using Irreducible AOP.	ICCSA (1)	2004	DBLP DOI BibTeX RDF	Irreducible AOP, Finite field, Exponentiation, Bit-serial multiplier
36	Juan Antonio Carballo, Jeffrey L. Burns, Seung-Moon Yoo, Ivan Vo, V. Robert Norman	A semi-custom voltage-island technique and its application to high-speed serial links.	ISLPED	2003	DBLP DOI BibTeX RDF	island, voltage, communications, low power, links, serial
36	Johann Großschädl	A Bit-Serial Unified Multiplier Architecture for Finite Fields GF(p) and GF(2m).	CHES	2001	DBLP DOI BibTeX RDF	iterative modulo multiplication, polynomial basis representation, bit-serial multiplier architecture, smart card crypto-coprocessor, Elliptic curve cryptography, finite field arithmetic
36	Stuart G. Stubblebine, Paul F. Syverson, David M. Goldschlag	Unlinkable serial transactions: protocols and applications.	ACM Trans. Inf. Syst. Secur.	1999	DBLP DOI BibTeX RDF	anoymity, unlinkable serial transactions, cryptographic protocols, blinding
36	Ahmad Fuad Rezaur Rahman, Michael C. Fairhurst	Serial Combination of Multiple Experts: A Unified Evaluation.	Pattern Anal. Appl.	1999	DBLP DOI BibTeX RDF	Generic serial framework, Multiple expert configurations, Character recognition
36	Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, Vivek De	Reducing the data switching activity of serialized datastreams.	ISCAS	2006	DBLP DOI BibTeX RDF
34	Daron Acemoglu, Asuman E. Ozdaglar	Competition in Parallel-Serial Networks.	IEEE J. Sel. Areas Commun.	2007	DBLP DOI BibTeX RDF
34	Michael Günther 0001, Syn Schmitt, Veit Wank	High-frequency oscillations as a consequence of neglected serial damping in Hill-type muscle models.	Biol. Cybern.	2007	DBLP DOI BibTeX RDF
34	Zhiyuan Yan	Digit-Serial Systolic Architectures for Inversions over GF(2m).	SiPS	2006	DBLP DOI BibTeX RDF
34	Ahmad Darabiha, Anthony Chan Carusone, Frank R. Kschischang	A bit-serial approximate min-sum LDPC decoder and FPGA implementation.	ISCAS	2006	DBLP DOI BibTeX RDF
34	Simon Ogg, Bashir M. Al-Hashimi	Improved Data Compression for Serial Interconnected Network on Chip through Unused Significant Bit Removal.	VLSI Design	2006	DBLP DOI BibTeX RDF
34	Shao Hua, Guiran Chang, Zhao Hong	The Consistency between the Attribute Relationships and Time-Serial Count Operators.	CBMS	2004	DBLP DOI BibTeX RDF
34	S. A. Rahim, Laurence E. Turner	A Field Programmable Bit-Serial Digital Signal Processor.	IWSOC	2004	DBLP DOI BibTeX RDF
34	Guilin Yang, Weihai Chen, Edwin Hui Leong Ho	Design and kinematic analysis of a modular hybrid parallel-serial manipulator.	ICARCV	2002	DBLP DOI BibTeX RDF
34	Hari Das Nayar	Robotect: serial-link manipulator design software for modeling, visualization and performance analysis.	ICARCV	2002	DBLP DOI BibTeX RDF
34	Alex Carreira, Trevor W. Fox, Laurence E. Turner	A Method for Implementing Bit-Serial Finite Impulse Response Digital Filters in FPGAs Using JBitsTM.	FPL	2002	DBLP DOI BibTeX RDF
34	Javier Valls, Trini Sansaloni, Marcos Martínez-Peiró, Eduardo I. Boemo	Fast FPGA-based pipelined digit-serial/parallel multipliers.	ISCAS (1)	1999	DBLP DOI BibTeX RDF
34	Akihisa Ohta, Tsuyoshi Isshiki, Hiroaki Kunieda	New FPGA Architecture for Bit-Serial Pipeline Datapath.	FCCM	1998	DBLP DOI BibTeX RDF
34	J. Gonzalez-Torres, P. A. Mateos, J. M. Hernandez	Full custom chip set for high speed serial communications up to 2.48 Gbit/s.	ED&TC	1997	DBLP DOI BibTeX RDF
34	Richard C. North, Walter H. Ku	beta-bit serial/parallel multipliers.	J. VLSI Signal Process.	1991	DBLP DOI BibTeX RDF
34	Priyadarsan Patra, Donald S. Fussell	Fully asynchronous, robust, high-throughput arithmetic structures.	VLSI Design	1995	DBLP DOI BibTeX RDF	fully asynchronous structures, high-throughput arithmetic structures, bit serial adders, scaleability, VLSI, digital arithmetic, asynchronous circuits, adders, integrated logic circuits, multiplying circuits, RSA cryptosystems, delay-insensitive, bit serial multipliers
33	Jia-Ping Chen, Chung-Chin Lu	A serial-in-serial-out hardware architecture for systematic encoding of Hermitian codes via Groöbner bases.	IEEE Trans. Commun.	2004	DBLP DOI BibTeX RDF
32	Chang Hoon Kim, Soonhak Kwon, Chun Pyo Hong, Hiecheol Kim	A New Systolic Array for Least Significant Digit First Multiplication in GF(2m).	ICCSA (3)	2004	DBLP DOI BibTeX RDF	Digit-Serial Architecture, VLSI, Cryptography, Systolic Array, Finite Field Multiplication
32	Myung K. Yang, Chita R. Das	Evaluation of a Parallel Branch-and-Bound Algorithm on a Class of Multiprocessors.	IEEE Trans. Parallel Distributed Syst.	1994	DBLP DOI BibTeX RDF	parallel branch-and-bound algorithm, MIN-based multiprocessorsystems, serial best-first search, conflict-free mapping scheme, performance evaluation, parallel algorithms, multiprocessor interconnection networks, multiprocessing systems, probabilistic model, communication overheads, computation overheads
31	Ashwin S. Kumar, Gaurav Shankar, Manjunath Sakthivel, Rajeevlochana G. Chittawadigi	Modular Serial-Chain Robot with Plug-and-Play Architecture for Effective Teaching and Learning: A methodology to assemble a physical prototype of a serial-chain robot using modular components is presented in this paper. This helps in the effective learning and teaching of concepts related to kinematics of serial-chain robots.	AIR	2023	DBLP DOI BibTeX RDF
30	Rafael Luque, María José Morón, Eduardo Casilari-Pérez	Analytical characterisation of the performance of Bluetooth piconets using serial port profile.	IWCMC	2010	DBLP DOI BibTeX RDF	Bluetooth piconet, serial port profile, transmission delay
30	Andreas Uhl, Peter Wild	Parallel versus Serial Classifier Combination for Multibiometric Hand-Based Identification.	ICB	2009	DBLP DOI BibTeX RDF	serial combination, hand biometrics, Multibiometrics
30	María José Morón, Rafael Luque, Eduardo Casilari, Antonio Díaz Estrella	An analytical model for estimating the delay in Bluetooth communications with serial port profile.	IWCMC	2009	DBLP DOI BibTeX RDF	serial port profile, bluetooth, transmission delay
30	Xin Jin, Anbang Xu, Rongfang Bie	Cancer classification from serial analysis of gene expression with event models.	Appl. Intell.	2008	DBLP DOI BibTeX RDF	Serial analysis of gene expression (SAGE), Gene selection, Cancer classification, Event models
30	Chang Ouk Kim, Ick-Hyun Kwon, Jun-Geol Baek	Asynchronous action-reward learning for nonstationary serial supply chain inventory control.	Appl. Intell.	2008	DBLP DOI BibTeX RDF	Action reward learning, Asynchronous performance measure update, Situation reactive inventory control, Two-stage serial supply chain, Nonstationary customer demand, Machine learning