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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 849 occurrences of 591 keywords
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Results
Found 847 publication records. Showing 847 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
33 | Paolo Migliavacca |
Faster Time-to-Market, Lower Cost of Development and Test for Standard Analog IC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTW ![In: 6th IEEE International On-Line Testing Workshop (IOLTW 2000), 3-5 July 2000, Palma de Mallorca, Spain, pp. 155-, 2000, IEEE Computer Society, 0-7695-0646-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Bipolar array, standard analog IC, time-to-market, Voltage Reference |
32 | Wayne C. Lim |
Effects of Reuse on Quality, Productivity, and Economics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Softw. ![In: IEEE Softw. 11(5), pp. 23-30, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
reuse programs, leveraged reuse, reusable work products, reuse tools, economic analysis method, multiple reuse programs, metrics, software quality, project management, software metrics, software reuse, quality, productivity, economics, economics, software reusability, software-development process, critical path, time-to-market, reuse library, Hewlett-Packard |
30 | P. C. Muller, R. de Poorter, J. De Jong, J. M. L. van Engelen |
Using the Internet as a communication infrastructure for lead user involvement in the new product development process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WETICE ![In: 5th Workshop on Enabling Technologies, Infrastructure for Collaborative Enterprises (WET-ICE'96), June 19-21, 1996, Stanford, CA, USA, Proceedings, pp. 220-225, 1996, IEEE Computer Society, 0-8186-7445-8. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
lead user involvement, new product development process, dynamic markets, product marketing, new market needs, user network, multimedia products, innovative users, Internet, Internet, case study, time-to-market, market research, communication infrastructure, customer needs |
28 | Sudhakar Yalamanchili |
The Customization Landscape for Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2002, 9th International Conference, Bangalore, India, December 18-21, 2002, Proceedings, pp. 693-696, 2002, Springer, 3-540-00303-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
28 | Christopher McPhee, Armin Eberlein |
Requirements Engineering for Time-to-Market Projects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECBS ![In: 9th IEEE International Conference on Engineering of Computer-Based Systems (ECBS 2002), 8-11 April 2002, Lund, Sweden, pp. 17-, 2002, IEEE Computer Society, 0-7695-1549-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Requirements Engineering, Time to Market |
19 | Keith H. Bennett, Paul J. Layzell 0001, David Budgen, Pearl Brereton, Linda A. Macaulay, Malcolm Munro |
Service-based software: the future for flexible software. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APSEC ![In: 7th Asia-Pacific Software Engineering Conference (APSEC 2000), 5-8 December 2000, Singapore, pp. 214-221, 2000, IEEE Computer Society, 0-7695-0915-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
service-based software, flexible software, software functionality, demand-centric view, open marketplace, long-term strategic view, software engineering innovation, demand-side model, component binding, rapidly changing business needs, software engineering, user centred design, future, software industry, time-to-market, DP industry, computer software, technological forecasting, service architecture |
19 | David M. Weiss |
Architecture of product lines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSM ![In: 25th IEEE International Conference on Software Maintenance (ICSM 2009), September 20-26, 2009, Edmonton, Alberta, Canada, pp. 6, 2009, IEEE Computer Society, 978-1-4244-4897-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | François Rémond |
Physical design challenges for multi-million gate SoC's: an STMicroelectronics perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPD ![In: Proceedings of the 2006 International Symposium on Physical Design, ISPD 2006, San Jose, California, USA, April 9-12, 2006, pp. 166, 2006, ACM, 1-59593-299-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Frank Padberg, Matthias M. Müller |
Analyzing the Cost and Benefit of Pair Programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE METRICS ![In: 9th IEEE International Software Metrics Symposium (METRICS 2003), 3-5 September 2003, Sydney, Australia, pp. 166-, 2003, IEEE Computer Society, 0-7695-1987-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Extreme Programming, Pair Programming, Cost-Benefit Analysis, Net Present Value |
19 | Peng Zhang, Wai-Shing Luk, Yu Song, Jiarong Tong, Pushan Tang, Xuan Zeng 0001 |
WCOMP: Waveform Comparison Tool for Mixed-signal Validation Regression in Memory Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 209-214, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Flash memory design, WCOMP, waveform comparison tool, full-chip validation, design cost, automated mixed-signal validation regression, functional match, time-to-market |
19 | Scott Stribrny, Fran Boehme Mackin |
When Politics Overshadow Software Quality. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Softw. ![In: IEEE Softw. 23(5), pp. 72-73, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
management-employee communications, software quality, politics, time-to-market |
19 | Li-C. Wang, Magdy S. Abadir |
On Efficiently Producing Quality Tests for Custom Circuits in PowerPCTM Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 16(1-2), pp. 121-130, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
custom circuits, high level circuit extraction, ATPG, DFT, time-to-market |
19 | Hsin-Po Wang 0002, Jon Turino |
DFT and BIST techniques for the future. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, pp. 6-7, 2000, IEEE Computer Society, 0-7695-0887-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
multimillion gate system-on-chip, multinational design, logic testing, built-in self test, design for testability, quality, BIST, economics, DFT, integrated circuit design, time to market, production testing, IC design, integrated circuit economics |
19 | Regina M. Gonzales, Alexander L. Wolf |
A facilitator method for upstream design activities with diverse stakeholders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICRE ![In: Proceedings of the 2nd International Conference on Requirements Engineering, ICRE '96, Colorado Springs, Colorado, USA, April 15-18, 1996, pp. 190-198, 1996, IEEE Computer Society, 0-8186-7252-8. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
facilitator method, upstream design activities, diverse stakeholders, stakeholder based modeling, rapid feasibility feed back, interpersonal dynamics, independent agent, Integrated System Model, independent system views, high technology medical product, critical time to market pressures, marketing aspect, formal specification, systems analysis, requirements specification, abstraction level, medical computing, high level design, requirements definition, real world experience |
19 | Alexander Dalal, Lavi Lev, Sundari Mitra |
Design of an efficient power distribution network for the UltraSPARC-I microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings, pp. 118-123, 1995, IEEE Computer Society, 0-8186-7165-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
computer power supplies, UltraSPARC-I, simulation method, exact layout locations, excessive voltage drop, floorplanning constraints, power interconnections, reduced time-to-market, circuit analysis computing, circuit layout CAD, microprocessor chips, electromigration, CAD tools, power distribution network |
19 | Christopher Deephouse, Dennis R. Goldenson, Marc I. Kellner, Tridas Mukhopadhyay |
The effects of software processes on meeting targets and quality. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (4) ![In: 28th Annual Hawaii International Conference on System Sciences (HICSS-28), January 3-6, 1995, Kihei, Maui, Hawaii, USA, pp. 710-719, 1995, IEEE Computer Society, 0-8186-6945-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
meeting targets, project size, project complexity, design inspections, senior practitioners, project outcomes, software engineering, project management, survey, software processes, productivity, reengineering, configuration management, configuration management, competition, software development management, systems re-engineering, project planning, requirements management, customer satisfaction, time to market, code inspections, product quality, defect tracking, cross-functional teams |
18 | H. Dieter Rombach |
Software Quality versus Time-to-Market: How to Resolve These Conflicts? ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECSQ ![In: Software Quality - ECSQ 2002, 7th International Conference, Helsinki, Finland, June 9-13, 2002, Proceedings, pp. 1, 2002, Springer, 3-540-43749-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
17 | Charles Thangaraj, Tom Chen 0001 |
Design target exploration for meeting time-to-market using pareto analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 364-367, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
17 | Nader Vasseghi, Rita Glover |
Focus on Quality of Design: Does it Help or Hinder Time to Market? ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 1st International Symposium on Quality of Electronic Design (ISQED 2000), 20-22 March 2000, San Jose, CA, USA, pp. 383-, 2000, IEEE Computer Society, 0-7695-0525-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
16 | A. Richard Newton, Walden C. Rhines, Sünke Mehrgardt, Henry Samueli, Tudor Brown |
Embedded systems design in the new millennium (panel session). ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 37th Conference on Design Automation, Los Angeles, CA, USA, June 5-9, 2000., pp. 338-339, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
15 | Deepti Mishra 0001, Alok Mishra 0001 |
Market-Driven Software Project through Agility: Requirements Engineering Perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BIS (Workshops) ![In: Business Information Systems Workshops, BIS 2009 International Workshops, Poznan, Poland, April 27-29, 2009. Revised Papers, pp. 103-112, 2009, Springer, 978-3-642-03423-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
market-driven software, requirement engineering, Agile methods |
15 | Loren K. Miller |
Simulation-Based Engineering for Industrial Competitive Advantage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Sci. Eng. ![In: Comput. Sci. Eng. 12(3), pp. 14-21, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Simulation-based engineering design, industrial competitive advantage, US Department of Energy, Sandia National Laboratories, The Goodyear Tire & Rubber Company, simulation-based product development, prototype-based product development, Cooperative Research and Development Agreement, CRADA, systems engineering, technology transfer, time-to-market |
15 | David E. Lackey, Paul S. Zuchowski, Jürgen Koehl |
Designing mega-ASICs in nanogate technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 770-775, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
design productivity, system-on-chip, methodology, power management, signal integrity, time to market |
15 | Esther Salamí, Jesús Corbal, Carlos Álvarez 0001, Mateo Valero |
Cost effective memory disambiguation for multimedia codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2002, Greenoble, France, October 8-11, 2002, pp. 117-126, 2002, ACM, 1-58113-575-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
multimedia, VLIW, run-time analysis, time-to-market, memory disambiguation |
15 | Arif Ishaq |
Lessons Learned Introducing an Object-Oriented Databse in the Telecom Industry. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TOOLS (29) ![In: TOOLS Europe 1999: 29th International Conference on Technology of Object-Oriented Languages and Systems, 7-10 June 1999, Nancy, France, pp. 214-223, 1999, IEEE Computer Society, 0-7695-0275-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Database, Object-oriented, Software, Telecommunications, Lessons learned, Time to Market |
14 | Hans-Jörg Bullinger, Joachim Warschat, Oliver Schumacher, Alexander Slama, Peter Ohlhausen |
Ontology-Based Project Management for Acceleration of Innovation Projects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
From Integrated Publication and Information Systems to Virtual Information and Knowledge Environments ![In: From Integrated Publication and Information Systems to Virtual Information and Knowledge Environments, Essays Dedicated to Erich J. Neuhold on the Occasion of His 65th Birthday, pp. 280-288, 2005, Springer, 3-540-24551-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
13 | Janne Järvinen, Jouni Jartti |
Is Your Project Ready for Time-to-Market Focus? ![Search on Bibsonomy](Pics/bibsonomy.png) |
PROFES ![In: Product Focused Software Process Improvement, 4th International Conference, PROFES 2002, Rovaniemi, Finland, December 9-11, 2002, Proceedings, pp. 198-206, 2002, Springer, 3-540-00234-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
13 | Jon Turino |
Design for Test and Time to Market: A Personal Perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 16(3), pp. 23-27, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
13 | Sasikumar Cherubal |
Challenges in Next Generation Mixed-Signal IC Production Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 14th Asian Test Symposium (ATS 2005), 18-21 December 2005, Calcutta, India, pp. 466, 2005, IEEE Computer Society, 0-7695-2481-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Markus Lindgren, Anders Wall, Rikard Land, Christer Norström |
A Method for Balancing Short- and Long-Term Investments: Quality vs. Features. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO-SEAA ![In: 34th Euromicro Conference on Software Engineering and Advanced Applications, SEAA 2008, September 3-5, 2008, Parma, Italy, pp. 175-182, 2008, IEEE Computer Society, 978-0-7695-3276-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindarajan |
MAX: A Multi Objective Memory Architecture eXploration Framework for Embedded Systems-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India, pp. 527-533, 2007, IEEE Computer Society, 0-7695-2762-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
12 | Romi Satria Wahono, Jingde Cheng |
Extensible Requirements Patterns of Web Application for Efficient Web Application Development. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CW ![In: 1st International Symposium on Cyber Worlds (CW 2002), 6-8 November 2002, Tokyo, Japan, pp. 412-418, 2002, IEEE Computer Society, 0-7695-1862-1. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
12 | T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindarajan |
Memory Architecture Exploration Framework for Cache Based Embedded SOC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India, pp. 553-559, 2008, IEEE Computer Society, 0-7695-3083-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Shishpal Rawat, Raul Camposano, Andrew B. Kahng, Joseph Sawicki, Mike Gianfagna, Naeem Zafar, Atul Sharan |
DFM: where's the proof of value? ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 1061-1062, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
ROI, DFM, design for manufacture, OPC, RET, yield optimization, design for yield |
12 | Al Crouch, Jeff Freeman |
Designing and Verifying Embedded Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 14(4), pp. 87-94, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
11 | Philippe Lalanda, Luc Bellissard, Roland Balter |
Asynchronous Mediation for Integrating Business and Operational Processes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Internet Comput. ![In: IEEE Internet Comput. 10(1), pp. 56-64, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
integration of operational processes, asynchronous middleware, component, mediation |
11 | D. Shaver |
Next generation architectures can dramatically reduce the 4G deployment cycle. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 599, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
11 | Arne Schulz, Wolfgang Nebel |
Optimization of Digital Audio Processing Algorithms Suitable for Hearing Aids. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings, pp. 735-736, 2005, Springer, 3-540-29013-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
11 | Yue Li, Tao Li 0006 |
Bioinformatics on Embedded Systems: A Case Study of Computational Biology Applications on VLIW Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICESS ![In: Embedded Software and Systems, Second International Conference, ICESS 2005, Xi'an, China, December 16-18, 2005, Proceedings, pp. 16-29, 2005, Springer, 3-540-30881-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
11 | Jay Vleeschhouwer, Warren East, Michael J. Fister, Aart J. de Geus, Walden C. Rhines, Jackson Hu, Rick Cassidy |
Differentiate and deliver: leveraging your partners. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005, pp. 1, 2005, ACM, 1-59593-058-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
EDS, semiconductor fabrication, supplier-customer relationships, intellectual property, processors |
11 | Janice E. Carrillo, Richard M. Franza |
Investing in product development and production capabilities: The crucial linkage between time-to-market and ramp-up time. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Eur. J. Oper. Res. ![In: Eur. J. Oper. Res. 171(2), pp. 536-556, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
11 | Garry Hughes |
Striking a New Balance in the Nanometer Era: First-Time-Right and Time-to-Market Demands Versus Technology Challenges. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany, pp. 3, 2005, IEEE Computer Society, 0-7695-2288-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
11 | Fidel Muradali, Mike Ricchetti, Bart Vermeulen, Bulent I. Dervisoglu, Bob Gottlieb, Bernd Koenemann, C. J. Clark |
Reducing Time to Volume and Time to Market: Is Silicon Debug and Diagnosis the Answer? ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April - 2 May 2002, Monterey, CA, USA, pp. 445-446, 2002, IEEE Computer Society, 0-7695-1570-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
11 | Roger J. Calantone, C. Anthony Di Benedetto |
Performance and time to market: accelerating cycle time with overlapping stages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Engineering Management ![In: IEEE Trans. Engineering Management 47(2), pp. 232-244, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
11 | Bulent I. Dervisoglu |
Design for testability: it is time to deliver it for Time-to-Market. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1999, Atlantic City, NJ, USA, 27-30 September 1999, pp. 1102-1111, 1999, IEEE Computer Society, 0-7803-5753-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
9 | Sung Ook Hwang, Halit Üster, R. Canan Savaskan-Ebert |
Correction to: Reverse channel selection for commercial product returns under time-to-market and product value considerations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ann. Oper. Res. ![In: Ann. Oper. Res. 332(1), pp. 1313, January 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
9 | Asmita Adhikary, Abraham Basurto, Lejla Batina, Ileana Buhan, Joan Daemen, Silvia Mella, Nele Mentens, Stjepan Picek, Durga Lakshmi Ramachandran, Abolfazl Sajadi, Todor Stefanov, Dennis Vermoen, Nusa Zidaric |
PROACT - Physical Attack Resistance of Cryptographic Algorithms and Circuits with Reduced Time to Market. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Applied Reconfigurable Computing. Architectures, Tools, and Applications - 20th International Symposium, ARC 2024, Aveiro, Portugal, March 20-22, 2024, Proceedings, pp. 255-266, 2024, Springer, 978-3-031-55672-2. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
9 | Ali A. Yassine, Sally Souweid |
Time-to-Market and Product Performance Tradeoff Revisited. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Engineering Management ![In: IEEE Trans. Engineering Management 70(9), pp. 3244-3259, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
9 | P. K. Kapur 0001, Saurabh Panwar, Ompal Singh, Vivek Kumar |
Joint optimization of software time-to-market and testing duration using multi-attribute utility theory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ann. Oper. Res. ![In: Ann. Oper. Res. 312(1), pp. 305-332, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
9 | Janne Kettunen, Miguel A. Lejeune |
Data-driven project portfolio selection: Decision-dependent stochastic programming formulations with reliability and time to market requirements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Oper. Res. ![In: Comput. Oper. Res. 143, pp. 105737, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
9 | Nicolas Morizet, Perceval Desforges, Christophe Geissler, Elodie Pahon, Samir Jemeï, Daniel Hissel |
Time to Market Reduction for Hydrogen Fuel Cell Stacks using Generative Adversarial Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2212.11733, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
9 | Junjun Kong, Feng Yang 0005, Minyue Jin |
Pricing, or time-to-market? Product introduction for quality differentiated products with delayed network effects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Ind. Eng. ![In: Comput. Ind. Eng. 168, pp. 108070, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
9 | Morten Skogstad Nielsen, Ann-Louise Andersen, Thomas Ditlev Brunoe, Khaled Medini, Kjeld Nielsen |
Exploring Manufacturing System Development and the Use of Platforms to Reduce Time-to-Market. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SYSINT ![In: Advances in System-Integrated Intelligence - Proceedings of the 6th International Conference on System-Integrated Intelligence (SysInt 2022), September 7-9, 2022, Genova, Italy, pp. 667-676, 2022, Springer, 978-3-031-16280-0. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
9 | Kouros Pechlivanidis, Gerard Wagenaar |
Rapid Delivery of Software: The Effect of Alignment on Time to Market. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PROFES ![In: Product-Focused Software Process Improvement - 23rd International Conference, PROFES 2022, Jyväskylä, Finland, November 21-23, 2022, Proceedings, pp. 351-365, 2022, Springer, 978-3-031-21387-8. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
9 | Artem Perepelitsyn, Vitaliy Kulanov |
Technologies of FPGA-based projects Development Under Ever-changing Conditions, Platform Constraints, and Time-to-Market Pressure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DESSERT ![In: 12th International Conference on Dependable Systems, Services and Technologies, DESSERT 2022, Athens, Greece, December 9-11, 2022, pp. 1-5, 2022, IEEE, 979-8-3503-3304-6. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
9 | G. S. Aishwarya Meghana, Sheetal Y. Kochrekar, Poornima Venkatasubramanian |
Layout Automation Techniques to Optimize Time-to-Market Factor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EAI Endorsed Trans. Cloud Syst. ![In: EAI Endorsed Trans. Cloud Syst. 5(15), pp. e5, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
9 | Cheng-Han Wu, Jing-Yi Lai |
Dynamic pricing and competitive time-to-market strategy of new product launch under a multistage duopoly. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Eur. J. Oper. Res. ![In: Eur. J. Oper. Res. 277(1), pp. 138-152, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
9 | Junxiu Jia, Shaohua Chen, Zhiwu Li 0001 |
Dynamic pricing and time-to-market strategy in a service supply chain with online direct channels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Ind. Eng. ![In: Comput. Ind. Eng. 127, pp. 901-913, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
9 | Rodrigo da Rosa Righi, Alexandre Lima Santana, Cristiano André da Costa, Rafael Kunst, Guilherme Goldschmidt, Dhananjay Singh 0001, Madhusudan Singh 0001 |
Reducing Cost and Time-to-Market on Supporting Driver Assistance Systems to Avoid Rear-end Collisions in Vehicles Traffic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSE/EUC ![In: 2019 IEEE International Conference on Computational Science and Engineering, CSE 2019, and IEEE International Conference on Embedded and Ubiquitous Computing, EUC 2019, New York, NY, USA, August 1-3, 2019, pp. 367-372, 2019, IEEE, 978-1-7281-1664-8. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
9 | Frank Elberzhager, Matthias Naab |
High Quality at Short Time-to-Market: Challenges Towards This Goal and Guidelines for the Realization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SWQD ![In: Software Quality: Methods and Tools for Better Software and Systems - 10th International Conference, SWQD 2018, Vienna, Austria, January 16-19, 2018, Proceedings, pp. 121-132, 2018, Springer, 978-3-319-71439-4. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
9 | Luis A. Moncayo-Martínez, Ernesto Mastrocinque |
A multi-objective intelligent water drop algorithm to minimise cost Of goods sold and time to market in logistics networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Expert Syst. Appl. ![In: Expert Syst. Appl. 64, pp. 455-466, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
9 | Madan Mohan Jha, Rosa Maria Ferrer Vilardell, Jai Narayan |
Scaling Agile Scrum Software Development: Providing Agility and Quality to Platform Development by Reducing Time to Market. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICGSE ![In: 11th IEEE International Conference on Global Software Engineering, ICGSE 2016, Orange County, CA, USA, August 2-5, 2016, pp. 84-88, 2016, IEEE Computer Society, 978-1-5090-2680-7. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
9 | Leah Goldin, Daniel M. Berry |
Reuse of requirements reduced time to market at one industrial shop: a case study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Requir. Eng. ![In: Requir. Eng. 20(1), pp. 23-44, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
9 | Özalp Özer, Onur Uncu |
Integrating dynamic time-to-market, pricing, production and sales channel decisions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Eur. J. Oper. Res. ![In: Eur. J. Oper. Res. 242(2), pp. 487-500, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
9 | Pieter van der Spek, Chris Verhoef |
Balancing Time-to-Market and Quality in Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Syst. Eng. ![In: Syst. Eng. 17(2), pp. 166-192, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
9 | Moti Frank, Boaz Carmi |
Implications of Pressure for Shortening the Time to Market (TTM) in Defense Projects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Inf. Technol. Syst. Approach ![In: Int. J. Inf. Technol. Syst. Approach 7(1), pp. 23-40, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
9 | Srinivas Sabbavarapu, Basireddy Karunakar Reddy, N. Srinivasulu, Amit Acharyya, Jimson Mathew |
A Novel Integrated Circuit Design Methodology Using Dynamic Library Concept with Reduced Non-Recurring Engineering Cost and Time-to-Market. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Low Power Electron. ![In: J. Low Power Electron. 10(3), pp. 429-442, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
9 | Manuel Palmieri, Antonio Cicchetti, Anders Öberg |
Cutting Time-to-Market by Adopting Automated Regression Testing in a Simulated Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICTSS ![In: Testing Software and Systems - 26th IFIP WG 6.1 International Conference, ICTSS 2014, Madrid, Spain, September 23-25, 2014. Proceedings, pp. 129-144, 2014, Springer, 978-3-662-44856-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
9 | Srinivas Sabbavarapu, Basireddy Karunakar Reddy, Amit Acharyya |
A New Dynamic Library Based IC Design Automation Methodology Using Functional Symmetry with NPN Class Representation Approach to Reduce NRE Costs and Time-to-Market. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: 2014 Fifth International Symposium on Electronic System Design, Surathkal, Mangalore, India, December 15-17, 2014, pp. 115-119, 2014, IEEE Computer Society, 978-1-4799-6965-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
9 | Kurt Eberle |
Hybrid Strategies for better products and shorter time-to-market. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HyTra@EACL ![In: Proceedings of the 3rd Workshop on Hybrid Approaches to Machine Translation, HyTra@EACL 2014, April 27, 2014, Gothenburg, Sweden, pp. 97, 2014, The Association for Computer Linguistics, 978-1-937284-89-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
9 | Basireddy Karunakar Reddy, Srinivas Sabbavarapu, Amit Acharyya |
A new VLSI IC design automation methodology with reduced NRE costs and time-to-market using the NPN class Representation and functional symmetry. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systemss, ISCAS 2014, Melbourne, Victoria, Australia, June 1-5, 2014, pp. 177-180, 2014, IEEE, 978-1-4799-3431-7. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
9 | Barun Kumar De, Anupam Chattopadhyay, Ansuman Banerjee |
Tutorial T2B: Cost / Application / Time to Market Driven SoC Design and Manufacturing Strategy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSID ![In: 2014 27th International Conference on VLSI Design, VLSID 2014, and 2014 13th International Conference on Embedded Systems, Mumbai, India, January 5-9, 2014, pp. 3-4, 2014, IEEE Computer Society, 978-1-4799-2513-1. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
9 | Frank Martin, Peter Bennett 0002 |
Configurable I/O integration to reduce system-on-chip time to market: DDR, PCIe examples. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 13, Grenoble, France, March 18-22, 2013, pp. 169, 2013, EDA Consortium San Jose, CA, USA / ACM DL, 978-1-4503-2153-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
9 | Basireddy Karunakar Reddy, Srinivas Sabbavarapu, Kshitiz Gupta, Rayapati Prabhat, Amit Acharyya, Rishad A. Shafik, Jimson Mathew |
A Novel and Unified Digital IC Design and Automation Methodology with Reduced NRE Cost and Time-to-Market. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: 2013 International Symposium on Electronic System Design, Singapore, December 10-12, 2013, pp. 36-40, 2013, IEEE Computer Society, 978-0-7695-5143-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
9 | Pryscilla Marcilli Dóra, Ana Cristina Oliveira, J. Antão B. Moura |
Simultaneously Improving Quality and Time-to-Market in Agile Development. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSOFT (Selected Papers) ![In: Software Technologies - 8th International Joint Conference, ICSOFT 2013, Reykjavik, Iceland, July 29-31, 2013, Revised Selected Papers, pp. 84-98, 2013, Springer, 978-3-662-44919-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
9 | Wei-Ting Kary Chien, Ming Li |
Editorial: Reduce Time-to-Market by Considering Reliability Tradeoffs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Reliab. ![In: IEEE Trans. Reliab. 61(4), pp. 837-845, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
9 | Sachin P. Kamat |
Time to Market: Handheld Consumer Electronics Devices and Its Impact on Software Quality. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Consumer Electron. Mag. ![In: IEEE Consumer Electron. Mag. 1(4), pp. 40-46, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
9 | Rohit Srivastava, Nandini Mudgil, Gaurav Gupta, Hemanta Mondal |
SoC Time to Market Improvement through Device Driver Reuse: An Industrial Experience. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: International Symposium on Electronic System Design, ISEDs 2012, Kolkata, India, December 19-22, 2012, pp. 56-61, 2012, IEEE, 978-1-4673-4704-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
9 | Martin Op't Land, Marien R. Krouwel, Edward van Dipten, Jan Verelst |
Exploring Normalized Systems Potential for Dutch MoD's Agility - (A Proof of Concept on Flexibility, Time-to-Market, Productivity and Quality). ![Search on Bibsonomy](Pics/bibsonomy.png) |
PRET ![In: Practice-Driven Research on Enterprise Transformation - Third Working Conference, PRET 2011, Luxembourg-Kirchberg, Luxembourg, September 6, 2011. Proceedings, pp. 110-121, 2011, Springer, 978-3-642-23387-6. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
9 | Leah Goldin, Michal Matalon-Beck, Judith Lapid-Maoz |
Reuse of Requirements Reduces Time to Market. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SwSTE ![In: IEEE International Conference on Software Science, Technology & Engineering, SwSTE 2010, Herzlia, Israel, June 15-16, 2010, pp. 55-60, 2010, IEEE Computer Society, 978-0-7695-4061-0. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
specifications, management, requirements, tools, process, reusable software |
9 | Lifang Wu, Renato E. deMatta, Timothy J. Lowe |
Updating a Modular Product: How to Set Time to Market and Component Quality. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Engineering Management ![In: IEEE Trans. Engineering Management 56(2), pp. 298-311, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
9 | Drew Gude |
Plenary Speech 1P1: Shrinking time-to-market through global value chain integration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 15, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
9 | Miguel Gabriel Custodio, Alan Thorogood, Philip Yetton |
24 × 7 @ full speed: accelerated time to market. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Inf. Technol. ![In: J. Inf. Technol. 21(2), pp. 116-126, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
9 | Miguel Gabriel Custodio, Alan Thorogood, Philip Yetton |
24 x 7 @ Full Speed: Accelerated Time to Market. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AMCIS ![In: A Conference on a Human Scale. 11th Americas Conference on Information Systems, AMCIS 2005, Omaha, Nebraska, USA, August 11-14, 2005, pp. 148, 2005, Association for Information Systems. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP BibTeX RDF |
|
9 | Jianyun Zhou, Tor Stålhane |
Analyzing Time-to-Market and Reliability Trade-Offs with Bayesian Belief Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICWE ![In: Web Engineering, 5th International Conference, ICWE 2005, Sydney, Australia, July 27-29, 2005, Proceedings, pp. 618-620, 2005, Springer, 3-540-27996-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
9 | |
Software Engineering Practices; are Software Quality and Time to Market Incompatible? - An Interview with Steve Cross. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Inf. Knowl. Syst. Manag. ![In: Inf. Knowl. Syst. Manag. 3(2-4), pp. 81-85, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP BibTeX RDF |
|
9 | Jianyun Zhou, Tor Stålhane |
Shorter Time-To-Market Through a Pattern-Driven Architectural Framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICWI ![In: Proceedings of the IADIS International Conference WWW/Internet 2003, ICWI 2003, Algarve, Portugal, November 5-8, 2003, pp. 793-796, 2003, IADIS, 972-98947-1-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP BibTeX RDF |
|
9 | N. Epifani, C. Reyneri |
A model based architecture for time to market reduction and product optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CE ![In: Enhanced Interoperable Systems. Proceedings of the 10th ISPE International Conference on Concurrent Engineering (ISPE CE 2003), July 26-30, 2003, Madeira, Portugal, pp. 859-864, 2003, A. A. Balkema Publishers, 90-5809-623-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP BibTeX RDF |
|
9 | Amr Haggag |
Ic-Rest(2): A Time-to-Market Driven IC Reliability Statistics Tool ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2002 |
RDF |
|
9 | Nikolai Mansurov, Robert L. Probert |
Improving time-to-market using SDL tools and techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Networks ![In: Comput. Networks 35(6), pp. 667-691, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
9 | Leslie Olin Morgan, Ruskin M. Morgan, William L. Moore |
Quality and Time-to-Market Trade-offs when There Are Multiple Product Generations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Manuf. Serv. Oper. Manag. ![In: Manuf. Serv. Oper. Manag. 3(2), pp. 89-104, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
9 | Adel Taweel |
Improving time-to-market through globally distributed software development. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2001 |
RDF |
|
9 | Nguyen Minh Duc, Takayasu Sakurai |
Compact yet high performance (CyHP) library for short time-to-market with new technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of ASP-DAC 2000, Asia and South Pacific Design Automation Conference 2000, Yokohama, Japan, pp. 475-480, 2000, ACM, 0-7803-5974-7. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
9 | James L. Melsa |
Reducing the Time-to-Market Interval. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Inf. Knowl. Syst. Manag. ![In: Inf. Knowl. Syst. Manag. 1(1), pp. 15-31, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP BibTeX RDF |
|
9 | Jon Turino |
Design for test and time to market-friends or foes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1999, Atlantic City, NJ, USA, 27-30 September 1999, pp. 1098-1101, 1999, IEEE Computer Society, 0-7803-5753-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
9 | Markus Brandstetter, Torsten Harms, Helmut Reinig, Michael Vanrompay |
Codevelopment of long haul ISDN transceiver and design methodology improves time to market. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 5th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1998, Surfing the Waves of Science and Technology, Lisbon, Portugal, September 7-10, 1998, pp. 407-410, 1998, IEEE, 0-7803-5008-1. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
9 | Apostolos Dollas, Nick Kanopoulos |
Reducing the Time to Market Through Rapid Prototyping - Guest Editors' Introduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 28(2), pp. 14-15, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
9 | Claes Wohlin, Magnus Ahlgren |
Soft factors and their impact on time to market. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Softw. Qual. J. ![In: Softw. Qual. J. 4(3), pp. 189-205, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
9 | Joachim Boidol |
Anwendungsentwicklung und Time to Market. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HMD Prax. Wirtsch. ![In: HMD Prax. Wirtsch. 180, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP BibTeX RDF |
|
9 | Keith Baker |
Time-to-Market: An Issue in Mixed-signal vs. Analogue. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1992, Discover the New World of Test and Design, Baltimore, Maryland, USA, September 20-24, 1992, pp. 254, 1992, IEEE Computer Society, 0-7803-0760-7. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
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