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Found 378 publication records. Showing 378 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Arthur Vianès, Frédéric Pétrot, Frédéric Rousseau 0001 |
A Case for Second-Level Software Cache Coherency on Many-Core Accelerators.  |
RSP  |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Z. Ning, Mostafa Rizk, Amer Baghdadi, Jean-Philippe Diguet |
Enhancing embedded AI-based object detection using multi-view approach. |
RSP |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Weiyan Zhang, Mehran Goli, Alireza Mahzoon, Rolf Drechsler |
ANN-based Performance Estimation of Embedded Software for RISC-V Processors. |
RSP |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Jakob Wenzel 0002, Christian Hochberger |
Automatically Restructuring HDL Modules for Improved Reusability in Rapid Synthesis. |
RSP |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Gabriel Rutsch, Maximilian Groebner, Anthony Sanders, Konrad Maier, Wolfgang Ecker |
A framework that enables systematic analysis of mixed-signal applications on FPGA. |
RSP |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Martim Rosado, Stavros Mallios, Pedro Tomás, Nuno Roma, André David |
Early prototyping and testing of CERN LHC CMS high-granularity calorimeter slow-control system. |
RSP |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Ritwik Sinha, Seyed Alireza Damghani, Kenneth B. Kent |
Machine Learning-Based Hard/Soft Logic Trade-offs in VTR. |
RSP |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Dominique Heller, Mostafa Rizk, R. Douguet, Amer Baghdadi, Jean-Philippe Diguet |
Marine Objects Detection Using Deep Learning on Embedded Edge Devices. |
RSP |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | |
IEEE International Workshop on Rapid System Prototyping, RSP 2022, Shanghai, China, October 13, 2022 |
RSP |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Seungyeop Kang, Sungjoo Yoo |
TernaryNeRF: Quantizing Voxel Grid-based NeRF Models. |
RSP |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Felipe Göhring de Magalhães, Mahdi Nikdast, Fabiano Hessel, Odile Liboiron-Ladouceur, Gabriela Nicolescu |
HyCo: A Low-Latency Hybrid Control Plane for Optical Interconnection Networks. |
RSP |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Harpreet Kaur, Georgiy Krylov, Seyed Alireza Damghani, Kenneth B. Kent |
Heterogeneous Logic Implementation for Adders in VTR. |
RSP |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Theo Soriano, David Novo, Pascal Benoit |
An FPGA-based Emulation Platform for Edge Computing Node Design Exploration. |
RSP |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Bruno Ferres, Olivier Muller, Frédéric Rousseau 0001 |
Integrating Quick Resource Estimators in Hardware Construction Framework for Design Space Exploration. |
RSP |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Kevin Mambu, Henri-Pierre Charles, Julie Dumas, Maha Kooli |
Instruction Set Design Methodology for In-Memory Computing through QEMU-based System Emulator. |
RSP |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Loïc France, Florent Bruguier, Maria Mushtaq, David Novo, Pascal Benoit |
Implementing Rowhammer Memory Corruption in the gem5 Simulator. |
RSP |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Nils Büscher, Daniel Gis, Johann-Peter Wolff, Christian Haubelt |
Data Augmentation Framework for Smart Sensor System Development Using the Sensor-in-the-Loop Prototyping Platform. |
RSP |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Théotime Bollengier, Loïc Lagadec, Ciprian Teodorov |
Prototyping FPGA through overlays. |
RSP |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | |
IEEE International Workshop on Rapid System Prototyping, RSP 2021, Paris, France, October 14, 2021 |
RSP |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Soobeom Kim, Seunghwan Cho, Eunhyeok Park, Sungjoo Yoo |
FPGA Prototyping of Systolic Array-based Accelerator for Low-Precision Inference of Deep Neural Networks. |
RSP |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Kevin Neubauer, Leonard Masing, Michael Mahl, Jürgen Becker 0001, Max E. Kramer, Clemens Reichmann |
Template-Driven and Hardware-Centric Cross-Domain E/E Architecture Simulation. |
RSP |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean Bruant, Pierre-Henri Horrein, Olivier Muller, Tristan Groléat, Frédéric Pétrot |
(System)Verilog to Chisel Translation for Faster Hardware Design. |
RSP |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Jérémy Nadal, Amer Baghdadi |
FPGA based design and prototyping of efficient 5G QC-LDPC channel decoding. |
RSP |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Erwan Moréac, El Mehdi Abdali, François Berry, Dominique Heller, Jean-Philippe Diguet |
Hardware-in-the-loop simulation with dynamic partial FPGA reconfiguration applied to computer vision in ROS-based UAV. |
RSP |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Chen Wu, Virginie Fresse, Benoît Suffran, Hubert Konik |
Mathematic models based on multiple-criteria decision analysis for tuning industrial CNN in an FPGA computing cluster. |
RSP |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Erwan Lenormand, Thierry Goubier, Loïc Cudennec, Henri-Pierre Charles |
A combined fast/cycle accurate simulation tool for reconfigurable accelerator evaluation: application to distributed data management. |
RSP |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Xuzhi Zhang, Narendra Prabhu, Russell Tessier |
NestedNet: A Container-based Prototyping Tool for Hierarchical Software Defined Networks. |
RSP |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | |
International Workshop on Rapid System Prototyping, RSP 2020, Hamburg, Germany, September 24-25, 2020 |
RSP |
2020 |
DBLP BibTeX RDF |
|
| 1 | José D. Domingues, Fábio D. L. Coutinho, Pedro M. C. Marques, Samuel Santos Pereira, Hugerles S. Silva, Arnaldo S. R. Oliveira |
MPSoC Fast Prototyping of a Reconfigurable DU Downlink Transmission Chain for 5G New Radio. |
RSP |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Seyed Alireza Damghani, Jean-Philippe Legault, Kenneth B. Kent |
Desired Footprint by Technology Mapping Modification using a Genetic Algorithm in Odin II. |
RSP |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniel Gis, Nils Büscher, Christian Haubelt |
Advanced Debugging Architecture for Smart Inertial Sensors using Sensor-in-the-Loop. |
RSP |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | |
Proceedings of the 30th International Workshop on Rapid System Prototyping, RSP 2019, New York, NY, USA, October 17-18, 2019. |
RSP |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Artur Rataj, Etienne Borde |
Fast and robust modelling using a direct translation from a robotic application to its abstracted behaviour. |
RSP |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Keita Miura, Shota Tokunaga, Noriyuki Ota, Yoshiharu Tange, Takuya Azumi |
Autoware Toolbox: MATLAB/Simulink Benchmark Suite for ROS-based Self-driving Software Platform. |
RSP |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Louis Bonicel, Roland Bohrer, Benoit Leprettre, Frédéric Rousseau 0001, Frédéric Pétrot |
Multi-Triggered Embedded Software Code Generation for Electrical Metering and Protection Applications. |
RSP |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Derek Yu, Michael Vaquier, Evan Laflamme, Gabrielle Doucette-Poirier, Justin Tremblay, Brett H. Meyer |
ARINC-825TBv2: A Hardware-in-the-Ioop Simulation Platform for Aerospace Security Research. |
RSP |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Charles Hartsell, Nagabhushan Mahadevan, Shreyas Ramakrishna, Abhishek Dubey, Theodore Bapty, Taylor T. Johnson, Xenofon D. Koutsoukos, Janos Sztipanovits, Gabor Karsai |
CPS Design with Learning-Enabled Components: A Case Study. |
RSP |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Amira Guesmi, Ihsen Alouani, Mouna Baklouti, Tarek Frikha, Mohamed Abid, Atika Rivenq |
HEAP: A Heterogeneous Approximate Floating-Point Multiplier for Error Tolerant Applications. |
RSP |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Josue V. Quiroga, Martí Torrents, Nehir Sönmez, Dimitris Theodoropoulos, Ferad Zyulkyarov, Mario Nemirovsky |
Evaluation of a Rack-Scale Disaggregated Memory Prototype for Cloud Data Centers. |
RSP |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Tobias Strauch |
Combining Simulation and FPGA Based Verification to an Affordable and Ultra-Fast Multi-Billion-Gate Verification System. |
RSP |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Riyane Sid Lakhdar, Henri-Pierre Charles, Maha Kooli |
Toward Modeling Cache-Miss Ratio for Dense-Data-Access-Based Optimization. |
RSP |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Scott Young, Alexandrea Demmings, Nasrin Eshraghi Ivari, Jean-Philippe Legault, Kenneth B. Kent |
Verilog Loop Unrolling, Module Generation, Part-Select and Arithmetic Right Shift Support in Odin II. |
RSP |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Salah Eddine Saidi, Amir Charif, Tanguy Sassolas, Pierre-Guillaume Le Guay, Henrique Vicente Souza, Nicolas Ventroux |
Fast Virtual Prototyping of Cyber-Physical Systems using SystemC and FMI: ADAS Use Case. |
RSP |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuuki Oosako, Nagisa Ishiura, Hiroyuki Tomiyama, Hiroyuki Kanbara |
Synthesis of Full Hardware Implementation of RTOS-Based Systems. |
RSP |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Dongyoung Kim, Soobeom Kim, Sungjoo Yoo |
FPGA Prototyping of Low-Precision Zero-Skipping Accelerator for Neural Networks. |
RSP |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Mehran Goli, Jannis Stoppe, Rolf Drechsler |
Resilience Evaluation for Approximating SystemC Designs Using Machine Learning Techniques. |
RSP |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Stefano Aldegheri, Nicola Bombieri |
Rapid Prototyping of Embedded Vision Systems: Embedding Computer Vision Applications into Low-Power Heterogeneous Architectures. |
RSP |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Maxime France-Pillois, Jérôme Martin, Frédéric Rousseau 0001 |
Accurate MPSoC Prototyping Platform and Methodology for the Studying of the Linux Synchronization Barrier Slowdown Issues. |
RSP |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Thomas Baumela, Olivier Gruber, Olivier Muller, Frédéric Pétrot |
Message-Oriented Devices on FPGAs. |
RSP |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammad Waqas 0003, Atif Raza Jafri, Amer Baghdadi, Muhammad Najam-ul-Islam |
Rapid Prototyping of Parameterized Rotated and Cyclic Q Delayed Constellations Demapper. |
RSP |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean-Philippe Legault, Panagiotis Patros, Kenneth B. Kent |
Towards Trainable Synthesis for Optimized Circuit Deployment on FPGA. |
RSP |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | |
2018 International Symposium on Rapid System Prototyping, RSP 2018, Torino, Italy, October 4-5, 2018 |
RSP |
2018 |
DBLP BibTeX RDF |
|
| 1 | Rodrigo Schmitt Meurer, Antônio Augusto Fröhlich, Jomi Fred Hübner |
Ambient Intelligence for the Internet of Things Through Context-Awareness. |
RSP |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Fearghal Morgan, Declan O'Loughlin, Jeremy Audiger, Yohan Boyer, Niall Timlin-Canning, Krzysztof Kepa, Seamus Cawley, Ian Gallivan, László Bakó, Frank Callaly |
Vicilogic 2.0: Online Learning and Prototyping of Digital Systems Using PYNQ-Z1/-Z2 SoC. |
RSP |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Yawen Wu, Yinan Sun, Zhenge Jia, Lefan Zhang, Yongpan Liu, Jingtong Hu |
Prototyping Energy Harvesting Powered Systems with Nonvolatile Processor (Invited Paper). |
RSP |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Alexandre Chabot, Ihsen Alouani, Smaïl Niar, Réda Nouacer |
A Comprehensive Fault Injection Strategy for Embedded Systems Reliability Assessment. |
RSP |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Ludovica Bozzoli, Corrado De Sio, Luca Sterpone, Cinzia Bernardeschi |
PyXEL: An Integrated Environment for the Analysis of Fault Effects in SRAM-Based FPGA Routing. |
RSP |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Kevin Verniers, Liesbet Van der Perre, Nobby Stevens |
Assessment of a BeagleBone Black High Sampling Rate Digital Waveform Generator. |
RSP |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Tristan Delizy, Stephane Gros, Kevin Marquet, Matthieu Moy, Tanguy Risset, Guillaume Salagnac |
Estimating the Impact of Architectural and Software Design Choices on Dynamic Allocation of Heterogeneous Memories. |
RSP |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | William L. Harrison, Gerard Allwein |
Semantics-Directed Prototyping of Hardware Runtime Monitors. |
RSP |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Gyeongmin Lee, Seonyeong Heo, Bongjun Kim, Jong Kim 0001, Hanjun Kim 0001 |
Rapid prototyping of IoT applications with Esperanto compiler. |
RSP |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Tiago Mück, Bryan Donyanavard, Nikil D. Dutt |
PoIiCym: rapid prototyping of resource management policies for HMPs. |
RSP |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Wooseok Yi, Junki Park, Jae-Joon Kim |
GeCo: classification restricted Boltzmann machine hardware for on-chip learning. |
RSP |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Sean Seeley, Vidya Sankaranaryanan, Zack Deveau, Panagiotis Patros, Kenneth B. Kent |
Simulation-based circuit-activity estimation for FPGAs containing hard blocks. |
RSP |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Michael Witterauf, Frank Hannig, Jürgen Teich |
Constructing fast and cycle-accurate simulators for configurable accelerators using C++ templates. |
RSP |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Sungjoo Yoo, Fabiano Hessel, Frédéric Rousseau 0001, Kenneth B. Kent, Kyoungwoo Lee (eds.) |
International Symposium on Rapid System Prototyping, RSP 2017, Shortening the Path from Specification to Prototype, October 19-20, 2017, Seoul, South Korea. |
RSP |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Péter Völgyesi, Abhishek Dubey, Timothy Krentz, István Madari, Mary Metelko, Gabor Karsai |
Time synchronization services for low-cost fog computing applications. |
RSP |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Naoya Ito, Yuuki Oosako, Nagisa Ishiura, Hiroyuki Kanbara, Hiroyuki Tomiyama |
Binary synthesis implementing external interrupt handler as independent module. |
RSP |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Maha Kooli, Henri-Pierre Charles, Clément Touzet, Bastien Giraud, Jean-Philippe Noël |
Software platform dedicated for in-memory computing circuit evaluation. |
RSP |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Miho Shimizu, Nagisa Ishiura, Sayuri Ota, Wakako Nakano |
Speculative execution in distributed controllers for high-level synthesis. |
RSP |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Daniel Mueller-Gritschneder, Keerthikumara Devarajegowda, Martin Dittrich, Wolfgang Ecker, Marc Greim, Ulf Schlichtmann |
The extendable translating instruction set simulator (ETISS) interlinked with an MDA framework for fast RISC prototyping. |
RSP |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Imane Hafnaoui, Chao Chen, Rabeh Ayari, Gabriela Nicolescu, Giovanni Beltrame |
An analysis of random cache effects on real-time multi-core scheduling algorithms. |
RSP |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Jeonggyu Jang, Hoeseok Yang |
Executable dataflow benchmark generation technique for multi-core embedded systems. |
RSP |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Saideep Tiku, Sudeep Pasricha |
Energy-efficient and robust middleware prototyping for smart mobile computing. |
RSP |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Minato Yokota, Kaoru Saso, Yuko Hara-Azumi |
One-instruction set computer-based multicore processors for energy-efficient streaming data processing. |
RSP |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Arief Wicaksana, Alban Bourge, Olivier Muller, Arif Sasongko, Frédéric Rousseau 0001 |
Prototyping dynamic task migration on heterogeneous reconfigurable systems. |
RSP |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Lothar Thiele, Felix Sutton, Romain Jacob, Roman Lim, Reto Da Forno, Jan Beutel |
On platforms for CPS - adaptive, predictable and efficient. |
RSP |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Corentin Damman, Gregory Edison, Fabrice Guet, Eric Noulard, Luca Santinelli, Jérôme Hugues |
Architectural performance analysis of FPGA synthesized LEON processors. |
RSP |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Ayoub Nouri, Rahma Ben Atitallah, Anca Molnos, Christian Fabre, Frédéric Heitzmann, Olivier Debicki |
Transforming VHDL descriptions into formal component-based models. |
RSP |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | William L. Harrison, Adam M. Procter, Gerard Allwein |
Model-driven design & synthesis of the SHA-256 cryptographic hash function in rewire. |
RSP |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Panagiotis Patros, Kenneth B. Kent |
Automatic detection and elision of reset sub-circuits. |
RSP |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Akramul Azim |
Overloads in compositional embedded real-time control systems. |
RSP |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiang Chen 0010, Jiachen Mao, Kent W. Nixon, Yiran Chen 0001 |
MORPh: mobile OLED power friendly camera system. |
RSP |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Paulo Cezar Dantas, Andrea Sarmento, Adriano Sarmento |
A HW/SW embedded system for accelerating diagnosis of glaucoma from eye fundus images. |
RSP |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Rabeh Ayari, Imane Hafnaoui, Giovanni Beltrame, Gabriela Nicolescu |
Schedulability-guided exploration of multi-core systems. |
RSP |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Takeshi Ohkawa, Kazushi Yamashina, Takuya Matsumoto, Kanemitsu Ootsu, Takashi Yokota |
Architecture exploration of intelligent robot system using ros-compliant FPGA component. |
RSP |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Kasra Moazzemi, Chen-Ying Hsieh, Nikil D. Dutt |
HAMEX: heterogeneous architecture and memory exploration framework. |
RSP |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Arief Wicaksana, Adrien Prost-Boucle, Olivier Muller, Frédéric Rousseau 0001, Arif Sasongko |
On-board non-regression test of HLS tools targeting FPGA. |
RSP |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Umer Farooq 0001, Roselyne Chotin-Avot, Muhammad Moazam Azeem, Maminionja Ravoson, Mariem Turki, Habib Mehrez |
Inter-FPGA routing environment for performance exploration of multi-FPGA systems. |
RSP |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Onur Mutlu |
Keynote: rethinking memory system design. |
RSP |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Carlos Moratelli, Sergio Johann Filho, Marcelo Veiga Neves, Fabiano Hessel |
Embedded virtualization for the design of secure IoT applications. |
RSP |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Perrin N. Ntafam, Eric Paire, Alain Clouard, Frédéric Pétrot |
Simulation driven insertion of data prefetching instructions for early software-on-SoC optimization. |
RSP |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Shen Feng, Mian Tang, Fernando Quivira, Tim Dyson, Filip Cuckov, Gunar Schirner |
EEGu2: an embedded device for brain/body signal acquisition and processing. |
RSP |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Tian Lu, Carlos Ortega, Jason M. Kulick, G. H. Bernstein, Scott Ardisson, Rob Engelhardt |
Rapid SOC prototyping utilizing quilt packaging technology for modular functional IC partitioning. |
RSP |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Jakob Wenzel 0002, Christian Hochberger |
RapidSoC: short turnaround creation of FPGA based SoCs. |
RSP |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Ankurkumar Patel, Troy Silloway, Fnu Qinggele, Yong-Kyu Jung |
Design of an expandable real-time simulation (eRTS) platform for multi-level rapid prototyping. |
RSP |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | |
2016 International Symposium on Rapid System Prototyping, RSP 2016, Pittsburg, PA, USA, October 6-7, 2016 |
RSP |
2016 |
DBLP BibTeX RDF |
|
| 1 | Rahma Bouaziz 0002, Laurent Lemarchand, Frank Singhoff, Bechir Zalila, Mohamed Jmaiel |
Efficient parallel multi-objective optimization for real-time systems software design exploration. |
RSP |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Jérôme Hugues, Julien Delange |
Model-based design and automated validation of ARINC653 architectures. |
RSP |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo Yan, Kenneth B. Kent |
Hard block reduction and synthesis improvements in Odin II. |
RSP |
2015 |
DBLP DOI BibTeX RDF |
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