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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 322 occurrences of 165 keywords
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Results
Found 391 publication records. Showing 391 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
25 | Aleksandar Beric, Ramanathan Sethuraman, Harm Peters, Jef L. van Meerbergen, Gerard de Haan, Carlos A. Alba Pinto |
A 27 mW 1.1 mm2 Motion Estimator for Picture-Rate Up-converter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India, pp. 1083-, 2004, IEEE Computer Society, 0-7695-2072-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Chandra Shekhar 0001, Raj Singh, A. S. Mandal, S. C. Bose, Ravi Saini, Pramod Tanwar |
Application Specific Instruction Set Processors: Redefining Hardware-Software Boundary. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India, pp. 915-, 2004, IEEE Computer Society, 0-7695-2072-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Zhijie Shi, Xiao Yang 0001, Ruby B. Lee |
Arbitrary Bit Permutations in One or Two Cycles. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 14th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2003), 24-26 June 2003, The Hague, The Netherlands, pp. 237-, 2003, IEEE Computer Society, 0-7695-1992-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Jeonghun Cho, Yunheung Paek, David B. Whalley |
Efficient register and memory assignment for non-orthogonal architectures via graph coloring and MST algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES-SCOPES ![In: Proceedings of the 2002 Joint Conference on Languages, Compilers, and Tools for Embedded Systems & Software and Compilers for Embedded Systems (LCTES'02-SCOPES'02), Berlin, Germany, 19-21 June 2002, pp. 130-138, 2002, ACM, 1-58113-527-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
dual memory, memory assignment, non-orthogonal architecture, compiler, graph coloring, maximum spanning tree |
25 | Lars Wehmeyer, Manoj Kumar Jain, Stefan Steinke, Peter Marwedel, M. Balakrishnan |
Analysis of the influence of register file size on energyconsumption, code size, and execution time. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(11), pp. 1329-1337, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
25 | Bruce R. Childers, Jack W. Davidson |
Custom Wide Counterflow Pipelines for High-Performance Embedded Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: Proceedings of the 2000 International Conference on Parallel Architectures and Compilation Techniques (PACT'00), Philadelphia, Pennsylvania, USA, October 15-19, 2000, pp. 57-70, 2000, IEEE Computer Society, 0-7695-0622-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
25 | Bruce R. Childers, Jack W. Davidson |
An Infrastructure for Designing Custom Embedded Counter-flow Pipelines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS ![In: 33rd Annual Hawaii International Conference on System Sciences (HICSS-33), 4-7 January, 2000, Maui, Hawaii, USA, 2000, IEEE Computer Society, 0-7695-0493-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
25 | Forest Fisher, Steve A. Chien, Edisanter Lo, Ronald Greeley |
SAR Image Processing Using Artificial Intelligence Planning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIAP ![In: 1oth International Conference on Image Analysis and Processing (ICIAP 1999), 27-29 September 1999, Venice, Italy, pp. 856-861, 1999, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
20 | Yaron Yeger, Onno J. Boxma, Jacques Resing, Maria Vlasiou |
ASIP tandem queues with consumption. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS Perform. Evaluation Rev. ![In: SIGMETRICS Perform. Evaluation Rev. 51(4), pp. 14-15, February 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
20 | Wei Chen 0100, Dake Liu |
Conflict-Free Parallel Data Access Technology for Matrix Calculation in Memory System of ASIP of 5G/6G Macro Base Stations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(1), pp. 99-112, January 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
20 | Cangyuan Li, Ying Wang 0001, Huawei Li 0001, Yinhe Han 0001 |
APPEND: Rethinking ASIP Synthesis in the Era of AI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: 60th ACM/IEEE Design Automation Conference, DAC 2023, San Francisco, CA, USA, July 9-13, 2023, pp. 1-6, 2023, IEEE, 979-8-3503-2348-1. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
20 | Ahmed M. Hamed, M. Watheq El-Kharashi, Ashraf Salem, Mona Safar |
A Multicycle Pipelined GCM-Based AUTOSAR Communication ASIP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 10, pp. 46312-46329, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
20 | Muxuan Gao, He Chen, Dake Liu |
An ASIP for Neural Network Inference on Embedded Devices with 99% PE Utilization and 100% Memory Hidden under Low Silicon Cost. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sensors ![In: Sensors 22(10), pp. 3841, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
20 | Yavar Safaei Mehrabani, Roghayeh Ataie, Mohammad Hossein Shafiabadi, Abolghasem Ghasempour |
Design and implementation of an ASIP for SHA-3 hash algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Inf. Comput. Secur. ![In: Int. J. Inf. Comput. Secur. 17(3/4), pp. 285-309, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
20 | Vasileios Leon, George Lentaris, Dimitrios Soudris, Simon Vellas, Mathieu Bernou |
Towards Employing FPGA and ASIP Acceleration to Enable Onboard AI/ML in Space Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, VLSI-SoC 2022, Patras, Greece, October 3-5, 2022, pp. 1-4, 2022, IEEE, 978-1-6654-9005-4. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
20 | Moussa Traore, J. M. Pierre Langlois, Jean-Pierre David |
ASIP Accelerator for LUT-based Neural Networks Inference. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NEWCAS ![In: 20th IEEE Interregional NEWCAS Conference, NEWCAS 2022, Quebec City, QC, Canada, June 19-22, 2022, pp. 524-528, 2022, IEEE, 978-1-6654-0105-0. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
20 | Alexander Antonov |
Superscalar Out-of-Order RISC-V ASIP Based on Programmable Hardware Generator with Decoupled Computations and Flow Control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MECO ![In: 11th Mediterranean Conference on Embedded Computing, MECO 2022, Budva, Montenegro, June 7-10, 2022, pp. 1-4, 2022, IEEE, 978-1-6654-6828-2. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
20 | Mood Venkanna, Rameshwar Rao 0001, P. Chandra Sekhar |
Design of filter for image de-noising using discrete wavelet transform for ASIP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Comput. Vis. Robotics ![In: Int. J. Comput. Vis. Robotics 11(2), pp. 201-213, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
20 | Shahriar Shahabuddin, Aarne Mämmelä, Markku J. Juntti, Olli Silvén |
ASIP for 5G and Beyond: Opportunities and Vision. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 68(3), pp. 851-857, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
20 | Onno J. Boxma, Offer Kella, Uri Yechiali |
Workload distributions in ASIP queueing networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Queueing Syst. Theory Appl. ![In: Queueing Syst. Theory Appl. 97(1-2), pp. 81-100, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
20 | Yunxiang Tang, Biao Long, Dake Liu |
An ASIP design for low loss compression of front-haul data in 5G base stations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 18(4), pp. 20200432, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
20 | Seungseok Nam, Emil Matús, Gerhard P. Fettweis |
Minimized Region of Path-search Algorithm for ASIP-based Connection Allocator in NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2021, Tampa, FL, USA, July 7-9, 2021, pp. 368-373, 2021, IEEE, 978-1-6654-3946-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
20 | Joost Hoozemans, Kati Tervo, Pekka Jääskeläinen, Zaid Al-Ars |
Energy Efficient Multistandard Decompressor ASIP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCDE ![In: ICCDE 2021: 7th International Conference on Computing and Data Engineering, Phuket, Thailand, January 15 - 17, 2021, pp. 14-19, 2021, ACM, 978-1-4503-8845-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
20 | Seungseok Nam, Emil Matús, Sadia Moriam, Gerhard P. Fettweis |
Path-Spreading Search Algorithm and ASIP Approach for Connection Allocation in TDM-NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2020 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2020, Limassol, Cyprus, July 6-8, 2020, pp. 102-107, 2020, IEEE, 978-1-7281-5775-7. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
20 | Przemyslaw Mazurek |
BOSON - Application-Specific Instruction Set Processor (ASIP) for Educational Purposes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICARCV ![In: 16th International Conference on Control, Automation, Robotics and Vision, ICARCV 2020, Shenzhen, China, December 13-15, 2020, pp. 1323-1328, 2020, IEEE, 978-1-7281-7709-0. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
20 | Seungseok Nam, Emil Matús, Gerhard P. Fettweis |
An ASIP Approach to Path Allocation in TDM NoCs using Adaptive Search Region. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: GLSVLSI '20: Great Lakes Symposium on VLSI 2020, Virtual Event, China, September 7-9, 2020, pp. 463-468, 2020, ACM, 978-1-4503-7944-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
20 | Manil Dev Gomony, Mihaela Jivanescu, Nikolas Olaziregi |
Towards ASIP Architecture-Driven Algorithm Development. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IESS ![In: Analysis, Estimations, and Applications of Embedded Systems - 6th IFIP TC 10 International Embedded Systems Symposium, IESS 2019, Friedrichshafen, Germany, September 9-11, 2019, Revised Selected Papers, pp. 91-100, 2019, Springer, 978-3-031-26499-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Steffen Malkowsky, Hemanth Prabhu, Liang Liu 0002, Ove Edfors, Viktor Öwall |
A Programmable 16-Lane SIMD ASIP for Massive MIMO. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019, pp. 1-5, 2019, IEEE, 978-1-7281-0397-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Wei-pei Huang, Ray C. C. Cheung, Hong Yan 0001 |
An Efficient Application Specific Instruction Set Processor (ASIP) for Tensor Computation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 30th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2019, New York, NY, USA, July 15-17, 2019, pp. 37, 2019, IEEE, 978-1-7281-1601-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Juan Fernando Eusse Giraldo |
ASIP algorithmic/architectural co-exploration based on high level performance estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2019 |
RDF |
|
20 | Jinli Rao, Tianyong Ao, Shu Xu, Kui Dai, Xuecheng Zou |
Design Exploration of SHA-3 ASIP for IoT on a 32-bit RISC-V Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Inf. Syst. ![In: IEICE Trans. Inf. Syst. 101-D(11), pp. 2698-2705, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | Shanlin Xiao, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda |
HOG-Based Object Detection Processor Design Using ASIP Methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(12), pp. 2972-2984, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | Atif Raza Jafri, Amer Baghdadi, Muhammad Najam-ul-Islam, Michel Jézéquel |
Heterogeneous Multi-ASIP and NoC-Based Architecture for Adaptive Parallel TBICM-ID-SSD. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 64-II(3), pp. 259-263, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | Vianney Lapotre, Guy Gogniat, Amer Baghdadi, Jean-Philippe Diguet |
Dynamic configuration management of a multi-standard and multi-mode reconfigurable multi-ASIP architecture for turbo decoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EURASIP J. Adv. Signal Process. ![In: EURASIP J. Adv. Signal Process. 2017, pp. 35, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | Lukas Gerlach 0001, Guillermo Payá Vayá, Shuang Liu, Moritz Weißbrich, Holger Blume, Daniel Marquardt, Simon Doclo |
Analyzing the trade-off between power consumption and beamforming algorithm performance using a hearing aid ASIP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: 2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2017, Pythagorion, Greece, July 17-20, 2017, pp. 88-96, 2017, IEEE, 978-1-5386-3437-0. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | Shahriar Shahabuddin, Olli Silvén, Markku J. Juntti |
ASIP design for multiuser MIMO broadcast precoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EuCNC ![In: 2017 European Conference on Networks and Communications, EuCNC 2017, Oulu, Finland, June 12-15, 2017, pp. 1-4, 2017, IEEE, 978-1-5386-3873-6. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | Mood Venkanna, Rameshwar Rao 0001, P. Chandra Sekhar |
Application of ASIP in Embedded Design with Optimized Clock Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICITKM ![In: Proceedings of the First International Conference on Information Technology and Knowledge Management, New Delhi, India, December 22-23, 2017., pp. 159-163, 2017, 978-83-949419-2-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | Naotaka Yoshida, Leonardo Lanante, Yuhei Nagao, Masayuki Kurosaki, Hiroshi Ochi |
A hybrid HW/SW 802.11ac/ax system design platform with ASIP implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPACS ![In: 2017 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2017, Xiamen, China, November 6-9, 2017, pp. 827-831, 2017, IEEE, 978-1-5386-2159-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | Aydin Aysu, Ege Gulcan, Daisuke Moriyama, Patrick Schaumont |
Compact and low-power ASIP design for lightweight PUF-based authentication protocols. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Inf. Secur. ![In: IET Inf. Secur. 10(5), pp. 232-241, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
20 | Vianney Lapotre, Purushotham Murugappa, Guy Gogniat, Amer Baghdadi, Michael Hübner 0001, Jean-Philippe Diguet |
A Dynamically Reconfigurable Multi-ASIP Architecture for Multistandard and Multimode Turbo Decoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 24(1), pp. 383-387, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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20 | Zhenqi Wei, Peilin Liu, Rongdi Sun, Jun Dai, Zunquan Zhou, Xiangming Geng, Rendong Ying |
HAVA: Heterogeneous Multicore ASIP for Multichannel Low-Bit-Rate Vocoder Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 24(7), pp. 2593-2597, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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20 | Gianluca Barbon, Michael Margolis, Filippo Palumbo, Franco Raimondi, Nick Weldin |
Taking Arduino to the Internet of Things: The ASIP programming model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Commun. ![In: Comput. Commun. 89-90, pp. 128-140, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
20 | Onno J. Boxma, Offer Kella, Uri Yechiali |
An ASIP model with general gate opening intervals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Queueing Syst. Theory Appl. ![In: Queueing Syst. Theory Appl. 84(1-2), pp. 1-20, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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20 | Paolo Meloni, Francesca Palumbo, Claudio Rubattu, Giuseppe Tuveri, Danilo Pani, Luigi Raffo |
MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 43, pp. 67-80, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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20 | Nico Mentzer, Guillermo Payá Vayá, Holger Blume |
Analyzing the Performance-Hardware Trade-off of an ASIP-based SIFT Feature Extraction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 85(1), pp. 83-99, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
20 | Ubaid Ahmad, Min Li 0001, Amir Amin, Meng Li 0012, Liesbet Van der Perre, Rudy Lauwereins, Sofie Pollin |
An Energy-Efficient Reconfigurable ASIP Supporting Multi-mode MIMO Detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 85(1), pp. 5-21, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
20 | Juan Fernando Eusse, Francisco Fernandez, Rainer Leupers, Gerd Ascheid |
Concurrent memory subsystem and application optimization for ASIP design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, SAMOS 2016, Agios Konstantinos, Samos Island, Greece, July 17-21, 2016, pp. 1-10, 2016, IEEE, 978-1-5090-3076-7. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
20 | Dunia Jamma, Omar Ahmed, Shawki Areibi, Gary Gréwal, Nicholas Molloy |
Design exploration of ASIP architectures for the K-Nearest Neighbor machine-learning algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICM ![In: 28th International Conference on Microelectronics, ICM 2016, Giza, Egypt, December 17-20, 2016, pp. 57-60, 2016, IEEE, 978-1-5090-5721-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
20 | Yao Qin, Hua Wang, Zhiping Jia, Hui Xia |
A flexible and scalable implementation of elliptic curve cryptography over GF(p) based on ASIP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPCCC ![In: 35th IEEE International Performance Computing and Communications Conference, IPCCC 2016, Las Vegas, NV, USA, December 9-11, 2016, pp. 1-8, 2016, IEEE Computer Society, 978-1-5090-5252-3. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
20 | Shanlin Xiao, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda |
An efficient embedded processor for object detection using ASIP methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 27th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2016, London, United Kingdom, July 6-8, 2016, pp. 225-226, 2016, IEEE Computer Society, 978-1-5090-1503-0. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
20 | Andreas Karlsson |
Design of Energy-Efficient High-Performance ASIP-DSP Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
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2016 |
RDF |
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20 | Juan Fernando Eusse Giraldo, Christopher Williams 0004, Rainer Leupers |
CoEx: A Novel Profiling-Based Algorithm/Architecture Co-Exploration for ASIP Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 8(3), pp. 17:1-17:16, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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20 | Laura Micconi, Jan Madsen, Paul Pop |
System-level synthesis of multi-ASIP platforms using an uncertainty model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 51, pp. 118-138, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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20 | Xiaolin Chen, Andreas Minwegen, Bilal Syed Hussain, Anupam Chattopadhyay, Gerd Ascheid, Rainer Leupers |
Flexible, Efficient Multimode MIMO Detection by Using Reconfigurable ASIP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 23(10), pp. 2173-2186, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
20 | Nuno Neves 0002, Nuno Sebastião, David Martins de Matos, Pedro Tomás, Paulo F. Flores, Nuno Roma |
Multicore SIMD ASIP for Next-Generation Sequencing and Alignment Biochip Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 23(7), pp. 1287-1300, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
20 | Yao Xin, Will X. Y. Li, Zhaorui Zhang, Ray C. C. Cheung, Dong Song, Theodore W. Berger |
An Application Specific Instruction Set Processor (ASIP) for Adaptive Filters in Neural Prosthetics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE ACM Trans. Comput. Biol. Bioinform. ![In: IEEE ACM Trans. Comput. Biol. Bioinform. 12(5), pp. 1034-1047, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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20 | Roberto Ammendola, Andrea Biagioni, Ottorino Frezza, Werner Geurts, Gert Goossens, Francesca Lo Cicero, Alessandro Lonardo, Pier Stanislao Paolucci, Davide Rossetti, Francesco Simula, Laura Tosoratto, Piero Vicini |
ASIP acceleration for virtual-to-physical address translation on RDMA-enabled FPGA-based network interfaces. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Future Gener. Comput. Syst. ![In: Future Gener. Comput. Syst. 53, pp. 109-118, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
20 | |
An Application Specific Instruction Set Processor (ASIP) for the Niederreiter Cryptosystem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IACR Cryptol. ePrint Arch. ![In: IACR Cryptol. ePrint Arch. 2015, pp. 1172, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP BibTeX RDF |
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20 | Roberto Urban, Mario Schölzel, Heinrich Theodor Vierhaus, Enrico Altmann, Horst Seelig |
Compiler-Centred Microprocessor Design (CoMet) - From C-Code to a VHDL Model of an ASIP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2015, Belgrade, Serbia, April 22-24, 2015, pp. 17-22, 2015, IEEE Computer Society, 978-1-4799-6779-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
20 | Fang Xiao, Yiqing Zhou 0001, Shan Huang, Jiangnan Lin, Lin Liu |
An ASIP based physical layer virtualization method of centralized radio access network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPCCC ![In: 34th IEEE International Performance Computing and Communications Conference, IPCCC 2015, Nanjing, China, December 14-16, 2015, pp. 1-4, 2015, IEEE Computer Society, 978-1-4673-8590-9. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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20 | Mohammed A. El-Motaz, M. Wagih Ismail, Mohsen Raafat, Ali S. Faried, Mohammed A. Raghieb, Nassr M. Ismail, Sherif A. Hafez, Ahmed H. El-Kady, Esmaail A. El-Sayed, Mohamed A. Sharaf, Ibrahim Shazly, Wael E. Abd El-Kawi, Chadi M. Mohamed, Mohamed N. Elhidery, Karim Mohammed, Omar A. Nasr |
A highly scalable vector oriented ASIP-based multi-standard digital receiver. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 2015 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2015, Cairo, Egypt, December 6-9, 2015, pp. 466-469, 2015, IEEE, 978-1-5090-0246-7. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
20 | Peter Reichel, Jens Döge, Nico Peter, Christoph Hoppe, Andreas Reichel |
An ASIP-based control system for Vision Chips with highly parallel signal processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISIE ![In: 24th IEEE International Symposium on Industrial Electronics, ISIE 2015, Rio de Janeiro, Brazil, June 3-5, 2015, pp. 932-937, 2015, IEEE. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
20 | Tomoki Sugiura, Jaehoon Yu, Yoshinori Takeuchi, Masaharu Imai |
A low-energy ASIP with flexible exponential Golomb codec for lossless data compression toward artificial vision systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BioCAS ![In: IEEE Biomedical Circuits and Systems Conference, BioCAS 2015, Atlanta, GA, USA, October 22-24, 2015, pp. 1-4, 2015, IEEE, 978-1-4799-7234-0. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
20 | Yuji Yokota, Shingo Yoshizawa, Hiroshi Ochi |
ASIP implementation of a low complexity iterative BD precoder for MU-MIMO system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCIT ![In: 15th International Symposium on Communications and Information Technologies, ISCIT 2015, Nara, Japan, October 7-9, 2015, pp. 277-280, 2015, IEEE, 978-1-4673-6820-9. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
20 | Mirco Bordoni, Michele Bottone, Bob Fields, Nikos Gorogiannis, Michael Margolis, Giuseppe Primiero, Franco Raimondi |
Towards Cyber-physical Systems as Services: The ASIP Protocol. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SEsCPS@ICSE ![In: 1st IEEE/ACM International Workshop on Software Engineering for Smart Cyber-Physical Systems, SEsCPS 2015, Florence, Italy, May 17, 2015, pp. 52-55, 2015, IEEE Computer Society, 978-1-4673-7088-2. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
20 | Anmol Gupta, Ashutosh Pal |
Accelerating SVM on Ultra Low Power ASIP for High Throughput Streaming Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSID ![In: 28th International Conference on VLSI Design, VLSID 2015, Bangalore, India, January 3-7, 2015, pp. 517-522, 2015, IEEE Computer Society, 978-1-4799-6658-5. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
20 | Laura Micconi |
A Probabilistic Approach for the System-Level Design of Multi-ASIP Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2015 |
RDF |
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20 | Agus Bejo, Dongju Li, Tsuyoshi Isshiki, Hiroaki Kunieda |
Retargeting Derivative-ASIP with Assembly Converter Tool. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Inf. Syst. ![In: IEICE Trans. Inf. Syst. 97-D(5), pp. 1188-1195, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Roshan G. Ragel, Swarnalatha Radhakrishnan, Jude Angelo Ambrose |
Instruction-set Selection for Multi-application based ASIP Design: An Instruction-level Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1403.7291, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP BibTeX RDF |
|
20 | Rajitha Navarathna, Swarnalatha Radhakrishnan, Roshan G. Ragel |
Loop Unrolling in Multi-pipeline ASIP Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1402.0671, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP BibTeX RDF |
|
20 | Yi Wang 0016, Yajun Ha |
A Performance and Area Efficient ASIP for Higher-Order DPA-Resistant AES. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Emerg. Sel. Topics Circuits Syst. ![In: IEEE J. Emerg. Sel. Topics Circuits Syst. 4(2), pp. 190-202, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Roel Jordans, Erkan Diken, Lech Józwiak, Henk Corporaal |
BuildMaster: Efficient ASIP architecture exploration through compilation and simulation result caching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014, pp. 83-88, 2014, IEEE Computer Society, 978-1-4799-4560-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Nico Mentzer, Guillermo Payá Vayá, Holger Blume, Nora von Egloffstein, Werner Ritter |
Instruction-set extension for an ASIP-based SIFT feature extraction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSAMOS ![In: XIVth International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2014, Agios Konstantinos, Samos, Greece, July 14-17, 2014, pp. 335-342, 2014, IEEE. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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20 | Juan Fernando Eusse Giraldo, Christopher Williams 0004, Luis Gabriel Murillo, Rainer Leupers, Gerd Ascheid |
Pre-architectural performance estimation for ASIP design based on abstract processor models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSAMOS ![In: XIVth International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2014, Agios Konstantinos, Samos, Greece, July 14-17, 2014, pp. 133-140, 2014, IEEE. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Zdenek Prikryl |
Fast Simulation of Pipeline in ASIP Simulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: 15th International Microprocessor Test and Verification Workshop, MTV 2014, Austin, TX, USA, December 15-16, 2014, pp. 10-15, 2014, IEEE Computer Society, 978-1-4673-6858-2. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Juan Fernando Eusse, Rainer Leupers, Gerd Ascheid, Patrick Sudowe, Bastian Leibe, Tamon Sadasue |
A flexible ASIP architecture for connected components labeling in embedded vision applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2014, Dresden, Germany, March 24-28, 2014, pp. 1-6, 2014, European Design and Automation Association, 978-3-9815370-2-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Nuno Sebastião, Paulo F. Flores, Nuno Roma |
Optimized ASIP architecture for compressed BWT-indexed search in bioinformatics applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCS ![In: International Conference on High Performance Computing & Simulation, HPCS 2014, Bologna, Italy, 21-25 July, 2014, pp. 527-534, 2014, IEEE, 978-1-4799-5312-7. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Souhail Haggui, Imen Debbabi, Fethi Tlili |
Enhanced implementation of morphological operators on a synthesizable ASIP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICMCS ![In: 4th International Conference on Multimedia Computing and Systems, ICMCS 2014, Marrakech, Morocco, April 14-16, 2014, pp. 1124-1128, 2014, IEEE, 978-1-4799-3824-7. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Ting Chen, Hengzhu Liu, Botao Zhang |
A reconfigurable ASIP for high-throughput and flexible FFT processing in SDR environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDIP ![In: Sixth International Conference on Digital Image Processing, ICDIP 2014, Athens, Greece, April 5-6, 2014, pp. 91590M, 2014, SPIE, 978-1-6284-1186-7. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Tomoki Sugiura, Shoko Nakatsuka, Jaehoon Yu, Yoshinori Takeuchi, Masaharu Imai |
An efficient data compression method for artificial vision systems and its low energy implementation using ASIP technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BioCAS ![In: IEEE Biomedical Circuits and Systems Conference, BioCAS 2014, Proceedings, Lausanne, Switzerland, October 22-24, 2014, pp. 81-84, 2014, IEEE. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Zhenzhi Wu, Dake Liu |
Flexible multistandard FEC processor design with ASIP methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: IEEE 25th International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2014, Zurich, Switzerland, June 18-20, 2014, pp. 210-218, 2014, IEEE Computer Society, 978-1-4799-3609-0. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Ting Chen, Xiaowei Pan, Hengzhu Liu, Tiebin Wu |
Rapid prototype and implementation of a high-throughput and flexible FFT ASIP based on LISA 2.0. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: Fifteenth International Symposium on Quality Electronic Design, ISQED 2014, Santa Clara, CA, USA, March 3-5, 2014, pp. 681-687, 2014, IEEE, 978-1-4799-3945-9. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Mahesh Nanjundappa, Sandeep K. Shukla |
Compiling polychronous programs into conditional partial orders for ASIP synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FormaliSE ![In: Proceedings of the 2nd FME Workshop on Formal Methods in Software Engineering, FormaliSE 2014, Hyderabad, India, June 3, 2014, pp. 38-44, 2014, ACM, 978-1-4503-2853-1. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Hsuanchun Liao, Mochamad Asri, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda |
A Design of High Performance Parallel Architecture and Communication for Multi-ASIP Based Image Processing Engine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(6), pp. 1222-1235, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Lech Józwiak |
HW/SW architecture co-synthesis of ASIP-based MPSoCs for highly- demanding applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2013, Natal, Brazil, August 5-7, 2013, pp. 145-146, 2013, IEEE Computer Socity, 978-1-4799-1331-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Yuankai Chen, Hai Zhou 0001 |
Resource-constrained high-level datapath optimization in ASIP design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 13, Grenoble, France, March 18-22, 2013, pp. 198-201, 2013, EDA Consortium San Jose, CA, USA / ACM DL, 978-1-4503-2153-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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20 | Matthias Hartmann, Praveen Raghavan, Liesbet Van der Perre, Prashant Agrawal, Wim Dehaene |
Memristor-Based (ReRAM) Data Memory Architecture in ASIP Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2013 Euromicro Conference on Digital System Design, DSD 2013, Los Alamitos, CA, USA, September 4-6, 2013, pp. 795-798, 2013, IEEE Computer Society, 978-1-4799-2978-8. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Vianney Lapotre, Purushotham Murugappa, Guy Gogniat, Amer Baghdadi, Michael Hübner 0001, Jean-Philippe Diguet |
Stopping-Free Dynamic Configuration of a Multi-ASIP Turbo Decoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2013 Euromicro Conference on Digital System Design, DSD 2013, Los Alamitos, CA, USA, September 4-6, 2013, pp. 155-162, 2013, IEEE Computer Society, 978-1-4799-2978-8. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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20 | Raymond Frijns, A. L. J. Kamp, Sander Stuijk, Jeroen Voeten, M. Bontekoe, K. J. A. Gemei, Henk Corporaal |
Dataflow-Based Multi-ASIP Platform Approach for Digital Control Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2013 Euromicro Conference on Digital System Design, DSD 2013, Los Alamitos, CA, USA, September 4-6, 2013, pp. 811-814, 2013, IEEE Computer Society, 978-1-4799-2978-8. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Vianney Lapotre, Michael Hübner 0001, Guy Gogniat, Purushotham Murugappa, Amer Baghdadi, Jean-Philippe Diguet |
An efficient on-chip configuration infrastructure for a flexible multi-ASIP turbo decoder architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReCoSoC ![In: 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), Darmstadt, Germany, July 10-12, 2013, pp. 1-8, 2013, IEEE, 978-1-4673-6180-4. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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20 | Juan Fernando Eusse, Christopher Williams 0004, Rainer Leupers |
CoEx: A novel profiling-based algorithm/architecture co-exploration for ASIP design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReCoSoC ![In: 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), Darmstadt, Germany, July 10-12, 2013, pp. 1-8, 2013, IEEE, 978-1-4673-6180-4. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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20 | Laura Micconi, Deepak Gangadharan, Paul Pop, Jan Madsen |
Multi-ASIP platform synthesis for real-time applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIES ![In: 8th IEEE International Symposium on Industrial Embedded Systems, SIES 2013, Porto, Portugal, June 19-21, 2013, pp. 59-67, 2013, IEEE, 978-1-4799-0658-1. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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20 | Deepak Gangadharan, Laura Micconi, Paul Pop, Jan Madsen |
Multi-ASIP platform synthesis for Event-Triggered applications with cost/performance trade-offs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2013, Taipei, Taiwan, August 19-21, 2013, pp. 277-286, 2013, IEEE Computer Society, 978-1-4799-0850-9. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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20 | Tuo Li 0001, Muhammad Shafique 0001, Semeen Rehman, Jude Angelo Ambrose, Jörg Henkel, Sri Parameswaran |
DHASER: dynamic heterogeneous adaptation for soft-error resiliency in ASIP-based multi-core systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: The IEEE/ACM International Conference on Computer-Aided Design, ICCAD'13, San Jose, CA, USA, November 18-21, 2013, pp. 646-653, 2013, IEEE, 978-1-4799-1069-4. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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20 | Shoko Nakatsuka, Takashi Hamabe, Yoshinori Takeuchi, Masaharu Imai |
An efficient lossless data compression method based on exponential-Golomb coding for biomedical information and its implementation using ASIP technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BioCAS ![In: 2013 IEEE Biomedical Circuits and Systems Conference (BioCAS), Rotterdam, The Netherlands, October 31 - Nov. 2, 2013, pp. 382-385, 2013, IEEE. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Laura Micconi, Rosilde Corvino, Deepak Gangadharan, Jan Madsen, Paul Pop, Lech Józwiak |
Hierarchical DSE for multi-ASIP platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MECO ![In: 2nd Mediterranean Conference on Embedded Computing, MECO 2013, Budva, Montenegro, June 15-20, 2013, pp. 50-53, 2013, IEEE. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Vianney Lapotre, Purushotham Murugappa, Guy Gogniat, Amer Baghdadi, Jean-Philippe Diguet, Jean-Noel Bazin, Michael Hübner 0001 |
Optimizations for an efficient reconfiguration of an ASIP-based turbo decoder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), Beijing, China, May 19-23, 2013, pp. 493-496, 2013, IEEE, 978-1-4673-5760-9. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Nuno Neves 0002, Nuno Sebastião, Andre Patricio, David Martins de Matos, Pedro Tomás, Paulo F. Flores, Nuno Roma |
BioBlaze: Multi-core SIMD ASIP for DNA sequence alignment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 24th International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2013, Washington, DC, USA, June 5-7, 2013, pp. 241-244, 2013, IEEE Computer Society, 978-1-4799-0494-5. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Peter Figuli, Carsten Tradowsky, Nadine Gaertner, Jürgen Becker 0001 |
ViSA: A highly efficient slot architecture enabling multi-objective ASIP cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSoC ![In: 2013 International Symposium on System on Chip, ISSoC 2013, Tampere, Finland, October 23-24, 2013, pp. 1-8, 2013, IEEE, 978-1-4799-1189-9. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Tuo Li 0001 |
Cost-Efficient Soft-Error Resiliency for ASIP-based Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
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2013 |
RDF |
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