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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 1204 occurrences of 608 keywords
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Results
Found 2046 publication records. Showing 2046 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
30 | Li-Shiuan Peh, William J. Dally |
A Delay Model and Speculative Architecture for Pipelined Routers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Seventh International Symposium on High-Performance Computer Architecture (HPCA'01), Nuevo Leone, Mexico, January 20-24, 2001, pp. 255-266, 2001, IEEE Computer Society, 0-7695-1019-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
30 | Amir Roth, Gurindar S. Sohi |
Speculative Data-Driven Multithreading. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Seventh International Symposium on High-Performance Computer Architecture (HPCA'01), Nuevo Leone, Mexico, January 20-24, 2001, pp. 37-48, 2001, IEEE Computer Society, 0-7695-1019-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
30 | Taisei Kaizoji |
Speculative Dynamics in a Heterogeneous-Agent Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICANN ![In: Artificial Neural Networks - ICANN 2001, International Conference Vienna, Austria, August 21-25, 2001 Proceedings, pp. 775-781, 2001, Springer, 3-540-42486-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
30 | Gurindar S. Sohi |
Amir Roth: Speculative Multithreaded Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2000, 7th International Conference, Bangalore, India, December 17-20, 2000, Proceedings, pp. 259-270, 2000, Springer, 3-540-41429-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
30 | Haitham Akkary, Sébastien Hily |
The Case for Speculative Multithreading on SMT Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISHPC ![In: High Performance Computing, Third International Symposium, ISHPC 2000, Tokyo, Japan, October 16-18, 2000. Proceedings, pp. 59-72, 2000, Springer, 3-540-41128-3. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
30 | Christian Kurmann, Michael Müller, Felix Rauch, Thomas Stricker |
Speculative Defragmentation - A Technique to Improve the Communication Software Efficiency for Gigabit Ethernet. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPDC ![In: Proceedings of the Ninth IEEE International Symposium on High Performance Distributed Computing, HPDC'00, Pittsburgh, Pennsylvania, USA, August 1-4, 2000., pp. 131-138, 2000, IEEE Computer Society, 0-7695-0783-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
30 | Apostolos A. Kountouris, Christophe Wolinski |
Combining Speculative Execution and Conditional Resource Sharing to Efficiently Schedule Conditional Behaviors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 1999 Conference on Asia South Pacific Design Automation, Wanchai, Hong Kong, China, January 18-21, 1999, pp. 343-346, 1999, IEEE Computer Society, 0-7803-5012-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
30 | Bradley L. Noble, Roger D. Chamberlain |
Performance Model for Speculative Simulation using Predictive Optimism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS ![In: 32nd Annual Hawaii International Conference on System Sciences (HICSS-32), January 5-8, 1999, Maui, Hawaii, USA, 1999, IEEE Computer Society, 0-7695-0001-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
30 | An-Chow Lai, Babak Falsafi |
Memory Sharing Predictor: The Key to a Speculative Coherent DSM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: Proceedings of the 26th Annual International Symposium on Computer Architecture, ISCA 1999, Atlanta, Georgia, USA, May 2-4, 1999, pp. 172-183, 1999, IEEE Computer Society, 0-7695-0170-2. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
30 | Chung-Kwong Yuen |
An abstract machine design for lexically scoped parallel Lisp with speculative processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM SIGPLAN Notices ![In: ACM SIGPLAN Notices 27(11), pp. 77-84, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
LISP |
27 | Yuancheng Li, Yinliang Zhao, Yuanke Wei, Yanning Du |
A Cost Estimation Model for Speculative Thread Partitioning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPA ![In: IEEE International Symposium on Parallel and Distributed Processing with Applications, ISPA 2010, Taipei, Taiwan, 6-9 September 2010, pp. 66-74, 2010, IEEE Computer Society, 978-1-4244-8095-1. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
cost estimation model, Thread level parallelism, Speculative Multithreading |
27 | Ramakrishna Kotla, Lorenzo Alvisi, Michael Dahlin, Allen Clement, Edmund L. Wong |
Zyzzyva: speculative byzantine fault tolerance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SOSP ![In: Proceedings of the 21st ACM Symposium on Operating Systems Principles 2007, SOSP 2007, Stevenson, Washington, USA, October 14-17, 2007, pp. 45-58, 2007, ACM, 978-1-59593-591-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
output commit, replication, speculative execution, byzantine fault tolerance |
27 | Lixin Su, Mikko H. Lipasti |
Speculative optimization using hardware-monitored guarded regions for java virtual machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VEE ![In: Proceedings of the 3rd International Conference on Virtual Execution Environments, VEE 2007, San Diego, California, USA, June 13-15, 2007, pp. 22-32, 2007, ACM, 978-1-59593-630-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
precise exceptions, speculative processors, java, virtual machines, transactional memory |
27 | Arturo González-Escribano, Diego R. Llanos Ferraris |
Speculative Parallelization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 39(12), pp. 126-128, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Speculative parallelization, How Things Work |
27 | Yuu Tanaka, Toshinori Sato, Takenori Koushiro |
The potential in energy efficiency of a speculative chip-multiprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPAA ![In: SPAA 2004: Proceedings of the Sixteenth Annual ACM Symposium on Parallelism in Algorithms and Architectures, June 27-30, 2004, Barcelona, Spain, pp. 273-274, 2004, ACM, 1-58113-840-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
dual pipeline, energy efficiency, speculative multithreading |
27 | Venkata Krishnan, Josep Torrellas |
A Chip-Multiprocessor Architecture with Speculative Multithreading. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 48(9), pp. 866-880, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Chip-multiprocessor, speculative multithreading, data-dependence speculation, control speculation |
27 | Lawrence Rauchwerger, David A. Padua |
The LRPD Test: Speculative Run-Time Parallelization of Loops with Privatization and Reduction Parallelization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 10(2), pp. 160-180, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
DOALL, parallel processing, Compilers, reduction, speculative, run-time, privatization |
27 | Pohua P. Chang, Nancy J. Warter, Scott A. Mahlke, William Y. Chen, Wen-mei W. Hwu |
Three Architecutral Models for Compiler-Controlled Speculative Execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 44(4), pp. 481-494, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
static code scheduling, superpipelining, exception handling, speculative execution, superscalar, Conditional branches, superblock |
27 | Roger A. Bringmann, Scott A. Mahlke, Richard E. Hank, John C. Gyllenhaal, Wen-mei W. Hwu |
Speculative execution exception recovery using write-back suppression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 26th Annual International Symposium on Microarchitecture, Austin, Texas, USA, November 1993, pp. 214-223, 1993, ACM / IEEE Computer Society, 0-8186-5280-2. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
exception detection, exception recovery, scheduling, VLIW, speculative execution, superscalar |
26 | Rutvik Choudhary, Alan Wang, Zirui Neil Zhao, Adam Morrison 0001, Christopher W. Fletcher |
DECLASSIFLOW: A Static Analysis for Modeling Non-Speculative Knowledge to Relax Speculative Execution Security Measures (Full Version). ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2312.09336, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
26 | Rutvik Choudhary, Alan Wang, Zirui Neil Zhao, Adam Morrison 0001, Christopher W. Fletcher |
Declassiflow: A Static Analysis for Modeling Non-Speculative Knowledge to Relax Speculative Execution Security Measures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCS ![In: Proceedings of the 2023 ACM SIGSAC Conference on Computer and Communications Security, CCS 2023, Copenhagen, Denmark, November 26-30, 2023, pp. 2053-2067, 2023, ACM. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
26 | Heming Xia, Tao Ge 0001, Peiyi Wang, Si-Qing Chen, Furu Wei, Zhifang Sui |
Speculative Decoding: Exploiting Speculative Execution for Accelerating Seq2seq Generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EMNLP (Findings) ![In: Findings of the Association for Computational Linguistics: EMNLP 2023, Singapore, December 6-10, 2023., pp. 3909-3925, 2023, Association for Computational Linguistics, 979-8-89176-061-5. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
26 | Logan Moody, Wei Qi, Abdolrasoul Sharifi, Layne Berry, Joey Rudek, Jayesh Gaur, Jeff Parkhurst, Sreenivas Subramoney, Kevin Skadron, Ashish Venkat |
Speculative Code Compaction: Eliminating Dead Code via Speculative Microcode Transformations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 55th IEEE/ACM International Symposium on Microarchitecture, MICRO 2022, Chicago, IL, USA, October 1-5, 2022, pp. 162-180, 2022, IEEE, 978-1-6654-6272-3. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
26 | Rutvik Choudhary, Jiyong Yu, Christopher W. Fletcher, Adam Morrison 0001 |
Speculative Privacy Tracking (SPT): Leaking Information From Speculative Execution Without Compromising Privacy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, Virtual Event, Greece, October 18-22, 2021, pp. 607-622, 2021, ACM, 978-1-4503-8557-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
26 | Kirsten Bray, Christina N. Harrington |
Speculative Blackness: Considering Afrofuturism in the Creation of Inclusive Speculative Design Probes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conference on Designing Interactive Systems ![In: DIS '21: Designing Interactive Systems Conference 2021, Virtual Event, USA, 28 June, July 2, 2021., pp. 1793-1806, 2021, ACM, 978-1-4503-8476-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
26 | Salwa Kobeissi |
Speculative Rewriting of Recursive Programs as Loop Candidates for Efficient Parallelization and Optimization Using an Inspector-Executor Mechanism. (Réécriture spéculative de programmes récursifs en boucles candidates à une parallélisation et une optimisation efficaces utilisant un mécanisme inspecteur-exécuteur). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2021 |
RDF |
|
26 | Jiyong Yu, Namrata Mantri, Josep Torrellas, Adam Morrison 0001, Christopher W. Fletcher |
Speculative Data-Oblivious Execution: Mobilizing Safe Prediction For Safe and Efficient Speculative Execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 47th ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2020, Virtual Event / Valencia, Spain, May 30 - June 3, 2020, pp. 707-720, 2020, IEEE, 978-1-7281-4661-4. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
26 | Laine Nooney, Tega Brain |
A 'speculative pasts' pedagogy: where speculative design meets historical thinking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Digit. Creativity ![In: Digit. Creativity 30(4), pp. 218-234, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
26 | Mark C. Jeffrey, Victor A. Ying, Suvinay Subramanian, Hyun Ryong Lee, Joel S. Emer, Daniel Sánchez 0003 |
Harmonizing Speculative and Non-Speculative Execution in Architectures for Ordered Parallelism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 51st Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2018, Fukuoka, Japan, October 20-24, 2018, pp. 217-230, 2018, IEEE Computer Society, 978-1-5386-6240-3. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
26 | Juan Manuel Martinez Caamaño |
Fast and Flexible Compilation Techniques for Effective Speculative Polyhedral Parallelization. (Techniques de compilation rapides et flexibles pour une parallélisation polyédrique speculative efficace). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2016 |
RDF |
|
26 | Aravind Sukumaran-Rajam |
Beyond the Realm of the Polyhedral Model: Combining Speculative Program Parallelization with Polyhedral Compilation. (Au delà des limites du modèle polyédrique: en combinant la parallélisation spéculative de programmes et la compilation polyédrique). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2015 |
RDF |
|
26 | Alessandro Cilardo, Davide De Caro, Nicola Petra, Francesco Caserta, Nicola Mazzocca, Ettore Napoli, Antonio Giuseppe Maria Strollo |
High Speed Speculative Multipliers Based on Speculative Carry-Save Tree. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(12), pp. 3426-3435, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
26 | Meirong Li, Yinliang Zhao, You Tao |
Dynamically Spawning Speculative Threads to Improve Speculative Path Execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICA3PP (2) ![In: Algorithms and Architectures for Parallel Processing - 14th International Conference, ICA3PP 2014, Dalian, China, August 24-27, 2014. Proceedings, Part II, pp. 192-206, 2014, Springer, 978-3-319-11193-3. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
26 | Michael E. Locasto, Stelios Sidiroglou, Angelos D. Keromytis |
Speculative virtual verification: policy-constrained speculative execution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NSPW ![In: Proceedings of the New Security Paradigms Workshop 2005, Lake Arrowhead, California, USA, September 20-23, 2005, pp. 119-124, 2005, ACM, 1-59593-317-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
25 | Evan P. C. Jones, Daniel J. Abadi, Samuel Madden 0001 |
Low overhead concurrency control for partitioned main memory databases. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMOD Conference ![In: Proceedings of the ACM SIGMOD International Conference on Management of Data, SIGMOD 2010, Indianapolis, Indiana, USA, June 6-10, 2010, pp. 603-614, 2010, ACM, 978-1-4503-0032-2. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
distributed databases, concurrency control |
25 | Heiko Sturzrehm, Pascal Felber, Christof Fetzer |
TM-Stream: An STM framework for distributed event stream processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 23rd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2009, Rome, Italy, May 23-29, 2009, pp. 1-8, 2009, IEEE. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
25 | Muhammad Umar Farooq 0003, Lizy Kurian John, Margarida F. Jacome |
Compiler Controlled Speculation for Power Aware ILP Extraction in Dataflow Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPEAC ![In: High Performance Embedded Architectures and Compilers, Fourth International Conference, HiPEAC 2009, Paphos, Cyprus, January 25-28, 2009. Proceedings, pp. 324-338, 2009, Springer, 978-3-540-92989-5. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Tiled dataflow architectures, predication, power-performance trade-offs |
25 | Liqun Cheng, John B. Carter |
Extending CC-NUMA systems to support write update optimizations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SC ![In: Proceedings of the ACM/IEEE Conference on High Performance Computing, SC 2008, November 15-21, 2008, Austin, Texas, USA, pp. 30, 2008, IEEE/ACM, 978-1-4244-2835-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
25 | Lin Gao 0002, Lian Li 0002, Jingling Xue, Tin-Fook Ngai |
Loop recreation for thread-level speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 13th International Conference on Parallel and Distributed Systems, ICPADS 2007, Hsinchu, Taiwan, December 5-7, 2007, pp. 1-10, 2007, IEEE Computer Society, 978-1-4244-1889-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
25 | Emre Özer 0001, Thomas M. Conte |
High-Performance and Low-Cost Dual-Thread VLIW Processor Using Weld Architecture Paradigm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 16(12), pp. 1132-1142, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Multithreaded processors, VLIW architectures, modeling of computer architecture |
25 | Amit Gandhi, Haitham Akkary, Srikanth T. Srinivasan |
Reducing Branch Misprediction Penalty via Selective Branch Recovery. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 10th International Conference on High-Performance Computer Architecture (HPCA-10 2004), 14-18 February 2004, Madrid, Spain, pp. 254-264, 2004, IEEE Computer Society, 0-7695-2053-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | Haitham Akkary, Srikanth T. Srinivasan, Rajendar Koltur, Yogesh Patil, Wael Refaai |
Perceptron-Based Branch Confidence Estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 10th International Conference on High-Performance Computer Architecture (HPCA-10 2004), 14-18 February 2004, Madrid, Spain, pp. 265-275, 2004, IEEE Computer Society, 0-7695-2053-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
25 | María Jesús Garzarán, Milos Prvulovic, Víctor Viñals, José María Llabería, Lawrence Rauchwerger, Josep Torrellas |
Using Software Logging to Support Multi-Version Buffering in Thread-Level Speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: 12th International Conference on Parallel Architectures and Compilation Techniques (PACT 2003), 27 September - 1 October 2003, New Orleans, LA, USA, pp. 170-181, 2003, IEEE Computer Society, 0-7695-2021-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Noah Snavely, Saumya K. Debray, Gregory R. Andrews |
Unspeculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASE ![In: 18th IEEE International Conference on Automated Software Engineering (ASE 2003), 6-10 October 2003, Montreal, Canada, pp. 205-214, 2003, IEEE Computer Society, 0-7695-2035-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Michael K. Chen, Kunle Olukotun |
The Jrpm System for Dynamically Parallelizing Java Programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 30th International Symposium on Computer Architecture (ISCA 2003), 9-11 June 2003, San Diego, California, USA, pp. 434-445, 2003, IEEE Computer Society, 0-7695-1945-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
25 | Yiannakis Sazeides |
Modeling Value Speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), Boston, Massachusettes, USA, February 2-6, 2002, pp. 211-222, 2002, IEEE Computer Society, 0-7695-1525-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
microarchitecture modeling, speculation, value prediction, value speculation |
25 | Rafael A. Moreno, Luis Piñuel, Silvia Del Pino, Francisco Tirado |
A Power Perspective of Value Speculation for Superscalar Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, ICCD '00, Austin, Texas, USA, September 17-20, 2000, pp. 147-154, 2000, IEEE Computer Society, 0-7695-0801-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
25 | Fred C. Chow, Robert Kennedy, Shin-Ming Liu, Raymond Lo, Peng Tu |
Register Promotion by Partial Redundancy Elimination of Loads and Stores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the ACM SIGPLAN '98 Conference on Programming Language Design and Implementation (PLDI), Montreal, Canada, June 17-19, 1998, pp. 26-37, 1998, ACM, 0-89791-987-4. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
25 | José González 0002, Antonio González 0001 |
Memory Address Prediction for Data Speculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par '97 Parallel Processing, Third International Euro-Par Conference, Passau, Germany, August 26-29, 1997, Proceedings, pp. 1084-1091, 1997, Springer, 3-540-63440-1. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
25 | Eliseu M. Chaves Filho, Edil S. T. Fernandes |
The Effect of the Speculation Depth on the Performance of Superscalar Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par '97 Parallel Processing, Third International Euro-Par Conference, Passau, Germany, August 26-29, 1997, Proceedings, pp. 1061-1065, 1997, Springer, 3-540-63440-1. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
23 | Paulo Moura, Ricardo Rocha 0001, Sara C. Madeira |
High Level Thread-Based Competitive Or-Parallelism in Logtalk. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PADL ![In: Practical Aspects of Declarative Languages, 11th International Symposium, PADL 2009, Savannah, GA, USA, January 19-20, 2009. Proceedings, pp. 107-121, 2009, Springer, 978-3-540-92994-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
speculative threading, implementation, Or-parallelism |
23 | Carlos Madriles, Pedro López 0001, Josep M. Codina, Enric Gibert, Fernando Latorre, Alejandro Martínez, Raúl Martínez, Antonio González 0001 |
Boosting single-thread performance in multi-core systems through fine-grain multi-threading. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA, pp. 474-483, 2009, ACM, 978-1-60558-526-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
core-fusion, single-thread performance, multicore, automatic parallelization, thread-level parallelism, speculative multithreading |
23 | Evangelia Athanasaki, Nikos Anastopoulos, Kornilios Kourtis, Nectarios Koziris |
Exploring the performance limits of simultaneous multithreading for memory intensive applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 44(1), pp. 64-97, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Speculative precomputation, Performance analysis, Instruction-level parallelism, Thread-level parallelism, Simultaneous multithreading, Software prefetching |
23 | Brian R. Murphy, Vijay Menon 0002, Florian T. Schneider, Tatiana Shpeisman, Ali-Reza Adl-Tabatabai |
Fault-safe code motion for type-safe languages. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CGO ![In: Sixth International Symposium on Code Generation and Optimization (CGO 2008), April 5-9, 2008, Boston, MA, USA, pp. 144-154, 2008, ACM, 978-1-59593-978-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
safe code motion, safety dependences, speculative code motion, scheduling, code motion, partial redundancy elimination, intermediate representations |
23 | Aviad Heifetz, Martin Meier, Burkhard C. Schipper |
Unawareness, beliefs and games. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TARK ![In: Proceedings of the 11th Conference on Theoretical Aspects of Rationality and Knowledge (TARK-2007), Brussels, Belgium, June 25-27, 2007, pp. 183-192, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
common prior, speculative trade, type-space, awareness, incomplete information, equilibrium, agreement, unawareness, interactive epistemology, Bayesian games |
23 | Ya-Yunn Su, Mona Attariyan, Jason Flinn |
AutoBash: improving configuration management with operating system causality analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SOSP ![In: Proceedings of the 21st ACM Symposium on Operating Systems Principles 2007, SOSP 2007, Stevenson, Washington, USA, October 14-17, 2007, pp. 237-250, 2007, ACM, 978-1-59593-591-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
configuration management, causality, speculative execution |
23 | Chengyi Zhang, Hongwei Zhou, Minxuan Zhang, Zuocheng Xing |
An Architectural Leakage Power Reduction Method for Instruction Cache in Ultra Deep Submicron Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 11th Asia-Pacific Conference, ACSAC 2006, Shanghai, China, September 6-8, 2006, Proceedings, pp. 588-594, 2006, Springer, 3-540-40056-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Periodically Drowsy Speculative Recover, Adaptive, Leakage Power, Drowsy cache |
23 | Dongkeun Kim, Donald Yeung |
A study of source-level compiler algorithms for automatic construction of pre-execution code. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Comput. Syst. ![In: ACM Trans. Comput. Syst. 22(3), pp. 326-379, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
pre-execution, prefetch conversion, speculative loop parallelization, multithreading, program slicing, Data prefetching, memory-level parallelism |
23 | Rajagopalan Desikan, Simha Sethumadhavan, Doug Burger, Stephen W. Keckler |
Scalable selective re-execution for EDGE architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: Proceedings of the 11th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2004, Boston, MA, USA, October 7-13, 2004, pp. 120-132, 2004, ACM, 1-58113-804-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
EDGE architectures, load-store dependence prediction, mis-speculation recovery, selective re-execution, selective replay, speculative dataflow machines |
23 | Satoshi Matsushita |
Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSS ![In: Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), October 2-4, 2002, Kyoto, Japan, pp. 103-108, 2002, ACM / IEEE Computer Society, 1-58113-576-9. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
deign experience, CMP, chip multiprocessor, functional verification, speculative multithreading |
23 | Luiz C. V. dos Santos, Marc J. M. Heijligers, C. A. J. van Eijk, J. Van Eijnhoven, Jochen A. G. Jess |
A code-motion pruning technique for global scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 5(1), pp. 1-38, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
high-level synthesis, code generation, speculative execution, code motion, global scheduling |
23 | Pedro Marcuello, Antonio González 0001 |
A Quantitative Assessment of Thread-Level Speculation Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: Proceedings of the 14th International Parallel & Distributed Processing Symposium (IPDPS'00), Cancun, Mexico, May 1-5, 2000, pp. 595-601, 2000, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Speculative Thread-level Parallelism, Thread Spawning Policies, Branch Prediction, Value prediction |
23 | Christoph W. Keßler, Craig Smith |
The SPARAMAT Approach to Automatic Comprehension of Sparse Matrix Computations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWPC ![In: 7th International Workshop on Program Comprehension (IWPC '99), May 5-7, 1999 - Pittsburgh, PA, USA, pp. 200-207, 1999, IEEE Computer Society, 0-7695-0179-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
concept recognition, program comprehension, speculative parallelization, sparse matrix computations |
23 | Bohuslav Rychlik, John Faistl, Bryon Krug, John Paul Shen |
Efficacy and Performance Impact of Value Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: Proceedings of the 1998 International Conference on Parallel Architectures and Compilation Techniques, Paris, France, October 12-18, 1998, pp. 148-, 1998, IEEE Computer Society, 0-8186-8591-3. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
usefulness tracking, instruction level parallelism, speculative execution, superscalar processor, value prediction, hybrid predictor |
23 | Rastislav Bodík, Rajiv Gupta 0001, Mary Lou Soffa |
Complete Removal of Redundant Computations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the ACM SIGPLAN '98 Conference on Programming Language Design and Implementation (PLDI), Montreal, Canada, June 17-19, 1998, pp. 1-14, 1998, ACM, 0-89791-987-4. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
control flow restructuring, demand-driven frequency data-flow analysis, speculative execution, partial redundancy elimination, profile-guided optimization |
23 | Rastislav Bodík, Rajiv Gupta 0001, Mary Lou Soffa |
Complete removal of redundant expressions (with retrospective) ![Search on Bibsonomy](Pics/bibsonomy.png) |
Best of PLDI ![In: 20 Years of the ACM SIGPLAN Conference on Programming Language Design and Implementation 1979-1999, A Selection, pp. 596-611, 1998, ACM, 1-58113-623-4. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
control flow restructuring, demand-driven frequency data-flow analysis, speculative execution, partial redundancy elimination, profile-guided optimization |
23 | Kishore N. Menezes, Sumedh W. Sathaye, Thomas M. Conte |
Path Prediction for High Issue-Rate Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: Proceedings of the 1997 Conference on Parallel Architectures and Compilation Techniques (PACT '97), San Francisco, CA, USA, October 11-15, 1997, pp. 178-188, 1997, IEEE Computer Society, 0-8186-8090-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
high issue-rate processors, path prediction, issue bandwidth, multiple branches, path prediction automaton, arbitrary subgraphs, scalability single access prediction, low hardware cost, instruction-level parallelism, pipeline processing, speculative execution, cycle, performance improvement |
23 | Jack L. Lo, Susan J. Eggers, Henry M. Levy, Sujay S. Parekh, Dean M. Tullsen |
Tuning Compiler Optimizations for Simultaneous Multithreading. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 30, Research Triangle Park, North Carolina, USA, December 1-3, 1997, pp. 114-124, 1997, ACM/IEEE Computer Society, 0-8186-7977-8. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
cyclic algorithm, fine-grained sharing, inter-thread instruction-level parallelism, loop-iteration scheduling, memory system resources, software speculative execution, performance, parallel programs, parallel architecture, compiler optimizations, shared-memory multiprocessors, processor architecture, instructions, simultaneous multithreading, latency hiding, loop tiling, optimising compilers, inter-processor communication, cache size |
23 | Dileep Bhandarkar, Jianxun Jason Ding |
Performance Characterization of the Pentium(r) Pro Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the 3rd IEEE Symposium on High-Performance Computer Architecture (HPCA '97), San Antonio, Texas, USA, February 1-5, 1997, pp. 288-299, 1997, IEEE Computer Society, 0-8186-7764-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Pentium® Pro processor, SPEC CPU95, SYSmark/NT, performance evaluation, computer architecture, workload characterization, speculative execution, out of order execution |
23 | David Raymond Lutz, Doddaballapur Narasimha-Murthy Jayasimha |
Early Zero Detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1996 International Conference on Computer Design (ICCD '96), VLSI in Computers and Processors, October 7-9, 1996, Austin, TX, USA, Proceedings, pp. 545-, 1996, IEEE Computer Society, 0-8186-7554-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
half-adder form, branch penalties, branch resolution, zero detection, speculative execution, ILP |
23 | John A. Chandy, Prithviraj Banerjee |
Parallel simulated annealing strategies for VLSI cell placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 9th International Conference on VLSI Design (VLSI Design 1996), 3-6 January 1996, Bangalore, India, pp. 37-42, 1996, IEEE Computer Society, 0-8186-7228-5. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
parallel simulated annealing strategies, VLSI cell placement, cell placement annealing, multiple Markov chains, parallel moves approach, parallel algorithms, VLSI, simulated annealing, Markov processes, VLSI design, circuit layout CAD, integrated circuit layout, speculative computation, standard cell placement |
23 | Bradley L. Noble, Gregory D. Peterson, Roger D. Chamberlain |
Performance of synchronous parallel discrete-event simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (2) ![In: 28th Annual Hawaii International Conference on System Sciences (HICSS-28), January 3-6, 1995, Kihei, Maui, Hawaii, USA, pp. 185-186, 1995, IEEE Computer Society, 0-8186-6945-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
synchronous parallel discrete-event simulation algorithms, global clock algorithm, conservative lookahead algorithm, execution platforms, shared computational resources, torus topology, performance, parallel algorithms, synchronization, resource allocation, discrete event simulation, local area networks, queueing theory, network topology, synchronisation, shared-memory multiprocessor, shared memory systems, queueing network, software performance evaluation, granularity, workstation network, load imbalance, speculative computation |
23 | John D. Bunda, Donald S. Fussell, William C. Athas |
Energy-efficient instruction set architecture for CMOS microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (1) ![In: 28th Annual Hawaii International Conference on System Sciences (HICSS-28), January 3-6, 1995, Kihei, Maui, Hawaii, USA, pp. 298-305, 1995, IEEE Computer Society, 0-8186-6945-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
energy-efficient instruction set architecture, CMOS microprocessors, portable battery-based applications, performance-driven designs, processor architecture tradeoffs, program encoding size, instruction set richness, energy cost, speculative instruction fetching, execution resources, instruction-level parallel machines, multiple-path instruction fetching, high execution bandwidth, power management, microprocessor chips, instruction sets, power dissipation, CMOS digital integrated circuits, reduced instruction set computing, cooling, design constraint, instruction delivery, code density |
23 | Siamak Arya, Howard Sachs, Sreeram Duvvuru |
An architecture for high instruction level parallelism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS (1) ![In: 28th Annual Hawaii International Conference on System Sciences (HICSS-28), January 3-6, 1995, Kihei, Maui, Hawaii, USA, pp. 153-162, 1995, IEEE Computer Society, 0-8186-6945-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
high instruction level parallelism, sequential order, code execution, dataflow problems, condition bits, nonblocking cache, Software Scheduled SuperScalar, parallel programming, compiler, parallel architectures, parallel architecture, pipelining, program compilers, data flow analysis, software pipelining, pipeline processing, data flow, processor architecture, speculative execution, control flow, hardware support, program control structures, branches, registers, functional units, multiple instructions, conditional execution |
22 | Arun Kejariwal, Milind Girkar, Xinmin Tian, Hideki Saito 0001, Alexandru Nicolau, Alexander V. Veidenbaum, Utpal Banerjee, Constantine D. Polychronopoulos |
Exploitation of nested thread-level speculative parallelism on multi-core systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the 7th Conference on Computing Frontiers, 2010, Bertinoro, Italy, May 17-19, 2010, pp. 99-100, 2010, ACM, 978-1-4503-0044-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
performance, thread-level speculation |
22 | Paolo Romano 0002, Roberto Palmieri, Francesco Quaglia, Nuno Carvalho, Luís E. T. Rodrigues |
Brief announcement: on speculative replication of transactional systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPAA ![In: SPAA 2010: Proceedings of the 22nd Annual ACM Symposium on Parallelism in Algorithms and Architectures, Thira, Santorini, Greece, June 13-15, 2010, pp. 69-71, 2010, ACM, 978-1-4503-0079-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
serialization theory, replication, atomic broadcast |
22 | Lukasz Ziarek, Suresh Jagannathan, Matthew Fluet, Umut A. Acar |
Speculative N-Way barriers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAMP ![In: Proceedings of the POPL 2009 Workshop on Declarative Aspects of Multicore Programming, DAMP 2009, Savannah, GA, USA, January 20, 2009, pp. 1-12, 2009, ACM, 978-1-60558-417-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
fork/join execution, n-way barriers, speculation, multi-threaded programs |
22 | Cheng Wang 0013, Youfeng Wu, Edson Borin, Shiliang Hu, Wei Liu 0014, Dave Sager, Tin-Fook Ngai, Jesse Fang |
Dynamic parallelization of single-threaded binary programs using speculative slicing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 23rd international conference on Supercomputing, 2009, Yorktown Heights, NY, USA, June 8-12, 2009, pp. 158-168, 2009, ACM, 978-1-60558-498-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
backward slicing, binary optimization, single-thread performance, parallelization, speculations |
22 | Michael R. Head, Madhusudhan Govindaraju |
Performance enhancement with speculative execution based parallelism for processing large-scale xml-based application data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPDC ![In: Proceedings of the 18th ACM International Symposium on High Performance Distributed Computing, HPDC 2009, Garching, Germany, June 11-13, 2009, pp. 21-30, 2009, ACM, 978-1-60558-587-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
chip-level multiprocessing, parallel techniques, xml datasets |
22 | Shailender Chaudhry, Robert Cypher, Magnus Ekman, Martin Karlsson, Anders Landin, Sherman Yip, Håkan Zeffer, Marc Tremblay |
Simultaneous speculative threading: a novel pipeline architecture implemented in sun's rock processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA, pp. 484-495, 2009, ACM, 978-1-60558-526-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
checkpoint-based architecture, hardware speculation, sst, chip multiprocessor, cmp, instruction-level parallelism, processor architecture, memory-level parallelism |
22 | Dongsoo Kang, Chen Liu 0001, Jean-Luc Gaudiot |
The Impact of Speculative Execution on SMT Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Parallel Program. ![In: Int. J. Parallel Program. 36(4), pp. 361-385, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Speculation control, Simultaneous multithreading, Thread scheduling, Confidence estimator |
22 | Antonia Zhai, J. Gregory Steffan, Christopher B. Colohan, Todd C. Mowry |
Compiler and hardware support for reducing the synchronization of speculative threads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Archit. Code Optim. ![In: ACM Trans. Archit. Code Optim. 5(1), pp. 3:1-3:33, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
automatic parallelization, instruction scheduling, Thread-level speculation, chip-multiprocessing |
22 | Andrey Brito, Christof Fetzer, Heiko Sturzrehm, Pascal Felber |
Speculative out-of-order event processing with software transaction memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DEBS ![In: Proceedings of the Second International Conference on Distributed Event-Based Systems, DEBS 2008, Rome, Italy, July 1-4, 2008, pp. 265-275, 2008, ACM, 978-1-60558-090-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
software transactional memory, event stream processing |
22 | Sumeet Kumar, Aneesh Aggarwal |
Speculative instruction validation for performance-reliability trade-off. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 14th International Conference on High-Performance Computer Architecture (HPCA-14 2008), 16-20 February 2008, Salt Lake City, UT, USA, pp. 405-414, 2008, IEEE Computer Society, 978-1-4244-2070-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Butler W. Lampson |
Lazy and speculative execution in computer systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICFP ![In: Proceeding of the 13th ACM SIGPLAN international conference on Functional programming, ICFP 2008, Victoria, BC, Canada, September 20-28, 2008, pp. 1-2, 2008, ACM, 978-1-59593-919-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
lazy evaluation |
22 | Hagen Gädke, Andreas Koch 0001 |
Accelerating Speculative Execution in High-Level Synthesis with Cancel Tokens. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Reconfigurable Computing: Architectures, Tools and Applications, 4th International Workshop, ARC 2008, London, UK, March 26-28, 2008. Proceedings, pp. 183-194, 2008, Springer, 978-3-540-78609-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Juan Carlos Martínez Santos, Yunsi Fei |
Leveraging speculative architectures for run-time program validation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 26th International Conference on Computer Design, ICCD 2008, 12-15 October 2008, Lake Tahoe, CA, USA, Proceedings, pp. 498-505, 2008, IEEE Computer Society, 978-1-4244-2657-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Krishna M. Kavi, Wentong Li, Ali R. Hurson |
A Non-blocking Multithreaded Architecture with Support for Speculative Threads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICA3PP ![In: Algorithms and Architectures for Parallel Processing, 8th International Conference, ICA3PP 2008, Cyprus, June 9-11, 2008, Proceedings, pp. 173-184, 2008, Springer, 978-3-540-69500-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Cache Coherency, Thread Level Speculation, Multithreaded Architectures, Decoupled Architecture |
22 | Yong Chen 0001, Surendra Byna, Xian-He Sun, Rajeev Thakur, William Gropp |
2008 International Conference on Parallel Processing September 8-12, 2008 Portland, Oregon Exploring Parallel I/O Concurrency with Speculative Prefetching. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: 2008 International Conference on Parallel Processing, ICPP 2008, September 8-12, 2008, Portland, Oregon, USA, pp. 422-429, 2008, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Marc Feeley |
Speculative Inlining of Predefined Procedures in an R5RS Scheme to C Compiler. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IFL ![In: Implementation and Application of Functional Languages, 19th International Workshop, IFL 2007, Freiburg, Germany, September 27-29, 2007. Revised Selected Papers, pp. 237-253, 2007, Springer, 978-3-540-85372-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Anton Yrjönen, Mika Hongisto, Kari Kolehmainen |
PROPHET: speculative load prediction algorithm for dynamic performance scaling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWCMC ![In: Proceedings of the International Conference on Wireless Communications and Mobile Computing, IWCMC 2007, Honolulu, Hawaii, USA, August 12-16, 2007, pp. 583-588, 2007, ACM, 978-1-59593-695-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
load prediction algorithm, low-energy computing, dynamic voltage scaling, performance tuning |
22 | Cyriel Minkenberg, Mitchell Gusat |
Speculative Flow Control for High-Radix Datacenter Interconnect Routers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), Proceedings, 26-30 March 2007, Long Beach, California, USA, pp. 1-10, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Pen-Chung Yew |
A Compiler Framework for Supporting Speculative Multicore Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 12th Asia-Pacific Conference, ACSAC 2007, Seoul, Korea, August 23-25, 2007, Proceedings, pp. 1, 2007, Springer, 978-3-540-74308-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Ruipeng Li, Hai Jiang 0003, Hung-Chi Su, Bin Zhang 0005, Jeff Jenness |
Speculative and distributed simulation of many-particle collision systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPADS ![In: 13th International Conference on Parallel and Distributed Systems, ICPADS 2007, Hsinchu, Taiwan, December 5-7, 2007, pp. 1-8, 2007, IEEE Computer Society, 978-1-4244-1889-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Pamela Jennings |
Speculative data and the creative imaginary: shared innovative visions between art and technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Creativity & Cognition ![In: Proceedings of the 6th Conference on Creativity & Cognition, Washington, DC, USA, June 13-15, 2007, pp. 310-311, 2007, ACM, 978-1-59593-712-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
creative digital media, information technology and creative practices (ITCP), interaction design, creativity, communities of practice, interactive art, computational thinking, exhibition |
22 | James Tuck 0001, Wei Liu 0014, Josep Torrellas |
CAP: Criticality analysis for power-efficient speculative multithreading. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 25th International Conference on Computer Design, ICCD 2007, 7-10 October 2007, Lake Tahoe, CA, USA, Proceedings, pp. 409-416, 2007, IEEE, 1-4244-1258-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Weihuang Wang, Gwan Choi |
Speculative Energy Scheduling for LDPC Decoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 8th International Symposium on Quality of Electronic Design (ISQED 2007), 26-28 March 2007, San Jose, CA, USA, pp. 79-84, 2007, IEEE Computer Society, 978-0-7695-2795-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Troy A. Johnson, Rudolf Eigenmann, T. N. Vijaykumar |
Speculative thread decomposition through empirical optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPoPP ![In: Proceedings of the 12th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 2007, San Jose, California, USA, March 14-17, 2007, pp. 205-214, 2007, ACM, 978-1-59593-602-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
empirical search, chip multiprocessor, decomposition, multi-core, thread-level speculation |
22 | Toshinori Sato, Yuu Tanaka, Hidenori Sato, Toshimasa Funaki, Takenori Koushiro, Akihiro Chiyonobu |
Improving Energy Efficiency Via Speculative Multithreading on MultiCore Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006, Proceedings, pp. 553-562, 2006, Springer, 3-540-39094-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Luis Ceze, James Tuck 0001, Josep Torrellas, Calin Cascaval |
Bulk Disambiguation of Speculative Threads in Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 33rd International Symposium on Computer Architecture (ISCA 2006), June 17-21, 2006, Boston, MA, USA, pp. 227-238, 2006, IEEE Computer Society, 0-7695-2608-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
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