Search results for "speculative"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
30	Li-Shiuan Peh, William J. Dally	A Delay Model and Speculative Architecture for Pipelined Routers.	HPCA	2001	DBLP DOI BibTeX RDF
30	Amir Roth, Gurindar S. Sohi	Speculative Data-Driven Multithreading.	HPCA	2001	DBLP DOI BibTeX RDF
30	Taisei Kaizoji	Speculative Dynamics in a Heterogeneous-Agent Model.	ICANN	2001	DBLP DOI BibTeX RDF
30	Gurindar S. Sohi	Amir Roth: Speculative Multithreaded Processors.	HiPC	2000	DBLP DOI BibTeX RDF
30	Haitham Akkary, Sébastien Hily	The Case for Speculative Multithreading on SMT Processors.	ISHPC	2000	DBLP DOI BibTeX RDF
30	Christian Kurmann, Michael Müller, Felix Rauch, Thomas Stricker	Speculative Defragmentation - A Technique to Improve the Communication Software Efficiency for Gigabit Ethernet.	HPDC	2000	DBLP DOI BibTeX RDF
30	Apostolos A. Kountouris, Christophe Wolinski	Combining Speculative Execution and Conditional Resource Sharing to Efficiently Schedule Conditional Behaviors.	ASP-DAC	1999	DBLP DOI BibTeX RDF
30	Bradley L. Noble, Roger D. Chamberlain	Performance Model for Speculative Simulation using Predictive Optimism.	HICSS	1999	DBLP DOI BibTeX RDF
30	An-Chow Lai, Babak Falsafi	Memory Sharing Predictor: The Key to a Speculative Coherent DSM.	ISCA	1999	DBLP DOI BibTeX RDF
30	Chung-Kwong Yuen	An abstract machine design for lexically scoped parallel Lisp with speculative processing.	ACM SIGPLAN Notices	1992	DBLP DOI BibTeX RDF	LISP
27	Yuancheng Li, Yinliang Zhao, Yuanke Wei, Yanning Du	A Cost Estimation Model for Speculative Thread Partitioning.	ISPA	2010	DBLP DOI BibTeX RDF	cost estimation model, Thread level parallelism, Speculative Multithreading
27	Ramakrishna Kotla, Lorenzo Alvisi, Michael Dahlin, Allen Clement, Edmund L. Wong	Zyzzyva: speculative byzantine fault tolerance.	SOSP	2007	DBLP DOI BibTeX RDF	output commit, replication, speculative execution, byzantine fault tolerance
27	Lixin Su, Mikko H. Lipasti	Speculative optimization using hardware-monitored guarded regions for java virtual machines.	VEE	2007	DBLP DOI BibTeX RDF	precise exceptions, speculative processors, java, virtual machines, transactional memory
27	Arturo González-Escribano, Diego R. Llanos Ferraris	Speculative Parallelization.	Computer	2006	DBLP DOI BibTeX RDF	Speculative parallelization, How Things Work
27	Yuu Tanaka, Toshinori Sato, Takenori Koushiro	The potential in energy efficiency of a speculative chip-multiprocessor.	SPAA	2004	DBLP DOI BibTeX RDF	dual pipeline, energy efficiency, speculative multithreading
27	Venkata Krishnan, Josep Torrellas	A Chip-Multiprocessor Architecture with Speculative Multithreading.	IEEE Trans. Computers	1999	DBLP DOI BibTeX RDF	Chip-multiprocessor, speculative multithreading, data-dependence speculation, control speculation
27	Lawrence Rauchwerger, David A. Padua	The LRPD Test: Speculative Run-Time Parallelization of Loops with Privatization and Reduction Parallelization.	IEEE Trans. Parallel Distributed Syst.	1999	DBLP DOI BibTeX RDF	DOALL, parallel processing, Compilers, reduction, speculative, run-time, privatization
27	Pohua P. Chang, Nancy J. Warter, Scott A. Mahlke, William Y. Chen, Wen-mei W. Hwu	Three Architecutral Models for Compiler-Controlled Speculative Execution.	IEEE Trans. Computers	1995	DBLP DOI BibTeX RDF	static code scheduling, superpipelining, exception handling, speculative execution, superscalar, Conditional branches, superblock
27	Roger A. Bringmann, Scott A. Mahlke, Richard E. Hank, John C. Gyllenhaal, Wen-mei W. Hwu	Speculative execution exception recovery using write-back suppression.	MICRO	1993	DBLP DOI BibTeX RDF	exception detection, exception recovery, scheduling, VLIW, speculative execution, superscalar
26	Rutvik Choudhary, Alan Wang, Zirui Neil Zhao, Adam Morrison 0001, Christopher W. Fletcher	DECLASSIFLOW: A Static Analysis for Modeling Non-Speculative Knowledge to Relax Speculative Execution Security Measures (Full Version).	CoRR	2023	DBLP DOI BibTeX RDF
26	Rutvik Choudhary, Alan Wang, Zirui Neil Zhao, Adam Morrison 0001, Christopher W. Fletcher	Declassiflow: A Static Analysis for Modeling Non-Speculative Knowledge to Relax Speculative Execution Security Measures.	CCS	2023	DBLP DOI BibTeX RDF
26	Heming Xia, Tao Ge 0001, Peiyi Wang, Si-Qing Chen, Furu Wei, Zhifang Sui	Speculative Decoding: Exploiting Speculative Execution for Accelerating Seq2seq Generation.	EMNLP (Findings)	2023	DBLP DOI BibTeX RDF
26	Logan Moody, Wei Qi, Abdolrasoul Sharifi, Layne Berry, Joey Rudek, Jayesh Gaur, Jeff Parkhurst, Sreenivas Subramoney, Kevin Skadron, Ashish Venkat	Speculative Code Compaction: Eliminating Dead Code via Speculative Microcode Transformations.	MICRO	2022	DBLP DOI BibTeX RDF
26	Rutvik Choudhary, Jiyong Yu, Christopher W. Fletcher, Adam Morrison 0001	Speculative Privacy Tracking (SPT): Leaking Information From Speculative Execution Without Compromising Privacy.	MICRO	2021	DBLP DOI BibTeX RDF
26	Kirsten Bray, Christina N. Harrington	Speculative Blackness: Considering Afrofuturism in the Creation of Inclusive Speculative Design Probes.	Conference on Designing Interactive Systems	2021	DBLP DOI BibTeX RDF
26	Salwa Kobeissi	Speculative Rewriting of Recursive Programs as Loop Candidates for Efficient Parallelization and Optimization Using an Inspector-Executor Mechanism. (Réécriture spéculative de programmes récursifs en boucles candidates à une parallélisation et une optimisation efficaces utilisant un mécanisme inspecteur-exécuteur).		2021	RDF
26	Jiyong Yu, Namrata Mantri, Josep Torrellas, Adam Morrison 0001, Christopher W. Fletcher	Speculative Data-Oblivious Execution: Mobilizing Safe Prediction For Safe and Efficient Speculative Execution.	ISCA	2020	DBLP DOI BibTeX RDF
26	Laine Nooney, Tega Brain	A 'speculative pasts' pedagogy: where speculative design meets historical thinking.	Digit. Creativity	2019	DBLP DOI BibTeX RDF
26	Mark C. Jeffrey, Victor A. Ying, Suvinay Subramanian, Hyun Ryong Lee, Joel S. Emer, Daniel Sánchez 0003	Harmonizing Speculative and Non-Speculative Execution in Architectures for Ordered Parallelism.	MICRO	2018	DBLP DOI BibTeX RDF
26	Juan Manuel Martinez Caamaño	Fast and Flexible Compilation Techniques for Effective Speculative Polyhedral Parallelization. (Techniques de compilation rapides et flexibles pour une parallélisation polyédrique speculative efficace).		2016	RDF
26	Aravind Sukumaran-Rajam	Beyond the Realm of the Polyhedral Model: Combining Speculative Program Parallelization with Polyhedral Compilation. (Au delà des limites du modèle polyédrique: en combinant la parallélisation spéculative de programmes et la compilation polyédrique).		2015	RDF
26	Alessandro Cilardo, Davide De Caro, Nicola Petra, Francesco Caserta, Nicola Mazzocca, Ettore Napoli, Antonio Giuseppe Maria Strollo	High Speed Speculative Multipliers Based on Speculative Carry-Save Tree.	IEEE Trans. Circuits Syst. I Regul. Pap.	2014	DBLP DOI BibTeX RDF
26	Meirong Li, Yinliang Zhao, You Tao	Dynamically Spawning Speculative Threads to Improve Speculative Path Execution.	ICA3PP (2)	2014	DBLP DOI BibTeX RDF
26	Michael E. Locasto, Stelios Sidiroglou, Angelos D. Keromytis	Speculative virtual verification: policy-constrained speculative execution.	NSPW	2005	DBLP DOI BibTeX RDF
25	Evan P. C. Jones, Daniel J. Abadi, Samuel Madden 0001	Low overhead concurrency control for partitioned main memory databases.	SIGMOD Conference	2010	DBLP DOI BibTeX RDF	distributed databases, concurrency control
25	Heiko Sturzrehm, Pascal Felber, Christof Fetzer	TM-Stream: An STM framework for distributed event stream processing.	IPDPS	2009	DBLP DOI BibTeX RDF
25	Muhammad Umar Farooq 0003, Lizy Kurian John, Margarida F. Jacome	Compiler Controlled Speculation for Power Aware ILP Extraction in Dataflow Architectures.	HiPEAC	2009	DBLP DOI BibTeX RDF	Tiled dataflow architectures, predication, power-performance trade-offs
25	Liqun Cheng, John B. Carter	Extending CC-NUMA systems to support write update optimizations.	SC	2008	DBLP DOI BibTeX RDF
25	Lin Gao 0002, Lian Li 0002, Jingling Xue, Tin-Fook Ngai	Loop recreation for thread-level speculation.	ICPADS	2007	DBLP DOI BibTeX RDF
25	Emre Özer 0001, Thomas M. Conte	High-Performance and Low-Cost Dual-Thread VLIW Processor Using Weld Architecture Paradigm.	IEEE Trans. Parallel Distributed Syst.	2005	DBLP DOI BibTeX RDF	Multithreaded processors, VLIW architectures, modeling of computer architecture
25	Amit Gandhi, Haitham Akkary, Srikanth T. Srinivasan	Reducing Branch Misprediction Penalty via Selective Branch Recovery.	HPCA	2004	DBLP DOI BibTeX RDF
25	Haitham Akkary, Srikanth T. Srinivasan, Rajendar Koltur, Yogesh Patil, Wael Refaai	Perceptron-Based Branch Confidence Estimation.	HPCA	2004	DBLP DOI BibTeX RDF
25	María Jesús Garzarán, Milos Prvulovic, Víctor Viñals, José María Llabería, Lawrence Rauchwerger, Josep Torrellas	Using Software Logging to Support Multi-Version Buffering in Thread-Level Speculation.	IEEE PACT	2003	DBLP DOI BibTeX RDF
25	Noah Snavely, Saumya K. Debray, Gregory R. Andrews	Unspeculation.	ASE	2003	DBLP DOI BibTeX RDF
25	Michael K. Chen, Kunle Olukotun	The Jrpm System for Dynamically Parallelizing Java Programs.	ISCA	2003	DBLP DOI BibTeX RDF
25	Yiannakis Sazeides	Modeling Value Speculation.	HPCA	2002	DBLP DOI BibTeX RDF	microarchitecture modeling, speculation, value prediction, value speculation
25	Rafael A. Moreno, Luis Piñuel, Silvia Del Pino, Francisco Tirado	A Power Perspective of Value Speculation for Superscalar Microprocessors.	ICCD	2000	DBLP DOI BibTeX RDF
25	Fred C. Chow, Robert Kennedy, Shin-Ming Liu, Raymond Lo, Peng Tu	Register Promotion by Partial Redundancy Elimination of Loads and Stores.	PLDI	1998	DBLP DOI BibTeX RDF
25	José González 0002, Antonio González 0001	Memory Address Prediction for Data Speculation.	Euro-Par	1997	DBLP DOI BibTeX RDF
25	Eliseu M. Chaves Filho, Edil S. T. Fernandes	The Effect of the Speculation Depth on the Performance of Superscalar Architectures.	Euro-Par	1997	DBLP DOI BibTeX RDF
23	Paulo Moura, Ricardo Rocha 0001, Sara C. Madeira	High Level Thread-Based Competitive Or-Parallelism in Logtalk.	PADL	2009	DBLP DOI BibTeX RDF	speculative threading, implementation, Or-parallelism
23	Carlos Madriles, Pedro López 0001, Josep M. Codina, Enric Gibert, Fernando Latorre, Alejandro Martínez, Raúl Martínez, Antonio González 0001	Boosting single-thread performance in multi-core systems through fine-grain multi-threading.	ISCA	2009	DBLP DOI BibTeX RDF	core-fusion, single-thread performance, multicore, automatic parallelization, thread-level parallelism, speculative multithreading
23	Evangelia Athanasaki, Nikos Anastopoulos, Kornilios Kourtis, Nectarios Koziris	Exploring the performance limits of simultaneous multithreading for memory intensive applications.	J. Supercomput.	2008	DBLP DOI BibTeX RDF	Speculative precomputation, Performance analysis, Instruction-level parallelism, Thread-level parallelism, Simultaneous multithreading, Software prefetching
23	Brian R. Murphy, Vijay Menon 0002, Florian T. Schneider, Tatiana Shpeisman, Ali-Reza Adl-Tabatabai	Fault-safe code motion for type-safe languages.	CGO	2008	DBLP DOI BibTeX RDF	safe code motion, safety dependences, speculative code motion, scheduling, code motion, partial redundancy elimination, intermediate representations
23	Aviad Heifetz, Martin Meier, Burkhard C. Schipper	Unawareness, beliefs and games.	TARK	2007	DBLP DOI BibTeX RDF	common prior, speculative trade, type-space, awareness, incomplete information, equilibrium, agreement, unawareness, interactive epistemology, Bayesian games
23	Ya-Yunn Su, Mona Attariyan, Jason Flinn	AutoBash: improving configuration management with operating system causality analysis.	SOSP	2007	DBLP DOI BibTeX RDF	configuration management, causality, speculative execution
23	Chengyi Zhang, Hongwei Zhou, Minxuan Zhang, Zuocheng Xing	An Architectural Leakage Power Reduction Method for Instruction Cache in Ultra Deep Submicron Microprocessors.	Asia-Pacific Computer Systems Architecture Conference	2006	DBLP DOI BibTeX RDF	Periodically Drowsy Speculative Recover, Adaptive, Leakage Power, Drowsy cache
23	Dongkeun Kim, Donald Yeung	A study of source-level compiler algorithms for automatic construction of pre-execution code.	ACM Trans. Comput. Syst.	2004	DBLP DOI BibTeX RDF	pre-execution, prefetch conversion, speculative loop parallelization, multithreading, program slicing, Data prefetching, memory-level parallelism
23	Rajagopalan Desikan, Simha Sethumadhavan, Doug Burger, Stephen W. Keckler	Scalable selective re-execution for EDGE architectures.	ASPLOS	2004	DBLP DOI BibTeX RDF	EDGE architectures, load-store dependence prediction, mis-speculation recovery, selective re-execution, selective replay, speculative dataflow machines
23	Satoshi Matsushita	Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification.	ISSS	2002	DBLP DOI BibTeX RDF	deign experience, CMP, chip multiprocessor, functional verification, speculative multithreading
23	Luiz C. V. dos Santos, Marc J. M. Heijligers, C. A. J. van Eijk, J. Van Eijnhoven, Jochen A. G. Jess	A code-motion pruning technique for global scheduling.	ACM Trans. Design Autom. Electr. Syst.	2000	DBLP DOI BibTeX RDF	high-level synthesis, code generation, speculative execution, code motion, global scheduling
23	Pedro Marcuello, Antonio González 0001	A Quantitative Assessment of Thread-Level Speculation Techniques.	IPDPS	2000	DBLP DOI BibTeX RDF	Speculative Thread-level Parallelism, Thread Spawning Policies, Branch Prediction, Value prediction
23	Christoph W. Keßler, Craig Smith	The SPARAMAT Approach to Automatic Comprehension of Sparse Matrix Computations.	IWPC	1999	DBLP DOI BibTeX RDF	concept recognition, program comprehension, speculative parallelization, sparse matrix computations
23	Bohuslav Rychlik, John Faistl, Bryon Krug, John Paul Shen	Efficacy and Performance Impact of Value Prediction.	IEEE PACT	1998	DBLP DOI BibTeX RDF	usefulness tracking, instruction level parallelism, speculative execution, superscalar processor, value prediction, hybrid predictor
23	Rastislav Bodík, Rajiv Gupta 0001, Mary Lou Soffa	Complete Removal of Redundant Computations.	PLDI	1998	DBLP DOI BibTeX RDF	control flow restructuring, demand-driven frequency data-flow analysis, speculative execution, partial redundancy elimination, profile-guided optimization
23	Rastislav Bodík, Rajiv Gupta 0001, Mary Lou Soffa	Complete removal of redundant expressions (with retrospective)	Best of PLDI	1998	DBLP DOI BibTeX RDF	control flow restructuring, demand-driven frequency data-flow analysis, speculative execution, partial redundancy elimination, profile-guided optimization
23	Kishore N. Menezes, Sumedh W. Sathaye, Thomas M. Conte	Path Prediction for High Issue-Rate Processors.	IEEE PACT	1997	DBLP DOI BibTeX RDF	high issue-rate processors, path prediction, issue bandwidth, multiple branches, path prediction automaton, arbitrary subgraphs, scalability single access prediction, low hardware cost, instruction-level parallelism, pipeline processing, speculative execution, cycle, performance improvement
23	Jack L. Lo, Susan J. Eggers, Henry M. Levy, Sujay S. Parekh, Dean M. Tullsen	Tuning Compiler Optimizations for Simultaneous Multithreading.	MICRO	1997	DBLP DOI BibTeX RDF	cyclic algorithm, fine-grained sharing, inter-thread instruction-level parallelism, loop-iteration scheduling, memory system resources, software speculative execution, performance, parallel programs, parallel architecture, compiler optimizations, shared-memory multiprocessors, processor architecture, instructions, simultaneous multithreading, latency hiding, loop tiling, optimising compilers, inter-processor communication, cache size
23	Dileep Bhandarkar, Jianxun Jason Ding	Performance Characterization of the Pentium(r) Pro Processor.	HPCA	1997	DBLP DOI BibTeX RDF	Pentium® Pro processor, SPEC CPU95, SYSmark/NT, performance evaluation, computer architecture, workload characterization, speculative execution, out of order execution
23	David Raymond Lutz, Doddaballapur Narasimha-Murthy Jayasimha	Early Zero Detection.	ICCD	1996	DBLP DOI BibTeX RDF	half-adder form, branch penalties, branch resolution, zero detection, speculative execution, ILP
23	John A. Chandy, Prithviraj Banerjee	Parallel simulated annealing strategies for VLSI cell placement.	VLSI Design	1996	DBLP DOI BibTeX RDF	parallel simulated annealing strategies, VLSI cell placement, cell placement annealing, multiple Markov chains, parallel moves approach, parallel algorithms, VLSI, simulated annealing, Markov processes, VLSI design, circuit layout CAD, integrated circuit layout, speculative computation, standard cell placement
23	Bradley L. Noble, Gregory D. Peterson, Roger D. Chamberlain	Performance of synchronous parallel discrete-event simulation.	HICSS (2)	1995	DBLP DOI BibTeX RDF	synchronous parallel discrete-event simulation algorithms, global clock algorithm, conservative lookahead algorithm, execution platforms, shared computational resources, torus topology, performance, parallel algorithms, synchronization, resource allocation, discrete event simulation, local area networks, queueing theory, network topology, synchronisation, shared-memory multiprocessor, shared memory systems, queueing network, software performance evaluation, granularity, workstation network, load imbalance, speculative computation
23	John D. Bunda, Donald S. Fussell, William C. Athas	Energy-efficient instruction set architecture for CMOS microprocessors.	HICSS (1)	1995	DBLP DOI BibTeX RDF	energy-efficient instruction set architecture, CMOS microprocessors, portable battery-based applications, performance-driven designs, processor architecture tradeoffs, program encoding size, instruction set richness, energy cost, speculative instruction fetching, execution resources, instruction-level parallel machines, multiple-path instruction fetching, high execution bandwidth, power management, microprocessor chips, instruction sets, power dissipation, CMOS digital integrated circuits, reduced instruction set computing, cooling, design constraint, instruction delivery, code density
23	Siamak Arya, Howard Sachs, Sreeram Duvvuru	An architecture for high instruction level parallelism.	HICSS (1)	1995	DBLP DOI BibTeX RDF	high instruction level parallelism, sequential order, code execution, dataflow problems, condition bits, nonblocking cache, Software Scheduled SuperScalar, parallel programming, compiler, parallel architectures, parallel architecture, pipelining, program compilers, data flow analysis, software pipelining, pipeline processing, data flow, processor architecture, speculative execution, control flow, hardware support, program control structures, branches, registers, functional units, multiple instructions, conditional execution
22	Arun Kejariwal, Milind Girkar, Xinmin Tian, Hideki Saito 0001, Alexandru Nicolau, Alexander V. Veidenbaum, Utpal Banerjee, Constantine D. Polychronopoulos	Exploitation of nested thread-level speculative parallelism on multi-core systems.	Conf. Computing Frontiers	2010	DBLP DOI BibTeX RDF	performance, thread-level speculation
22	Paolo Romano 0002, Roberto Palmieri, Francesco Quaglia, Nuno Carvalho, Luís E. T. Rodrigues	Brief announcement: on speculative replication of transactional systems.	SPAA	2010	DBLP DOI BibTeX RDF	serialization theory, replication, atomic broadcast
22	Lukasz Ziarek, Suresh Jagannathan, Matthew Fluet, Umut A. Acar	Speculative N-Way barriers.	DAMP	2009	DBLP DOI BibTeX RDF	fork/join execution, n-way barriers, speculation, multi-threaded programs
22	Cheng Wang 0013, Youfeng Wu, Edson Borin, Shiliang Hu, Wei Liu 0014, Dave Sager, Tin-Fook Ngai, Jesse Fang	Dynamic parallelization of single-threaded binary programs using speculative slicing.	ICS	2009	DBLP DOI BibTeX RDF	backward slicing, binary optimization, single-thread performance, parallelization, speculations
22	Michael R. Head, Madhusudhan Govindaraju	Performance enhancement with speculative execution based parallelism for processing large-scale xml-based application data.	HPDC	2009	DBLP DOI BibTeX RDF	chip-level multiprocessing, parallel techniques, xml datasets
22	Shailender Chaudhry, Robert Cypher, Magnus Ekman, Martin Karlsson, Anders Landin, Sherman Yip, Håkan Zeffer, Marc Tremblay	Simultaneous speculative threading: a novel pipeline architecture implemented in sun's rock processor.	ISCA	2009	DBLP DOI BibTeX RDF	checkpoint-based architecture, hardware speculation, sst, chip multiprocessor, cmp, instruction-level parallelism, processor architecture, memory-level parallelism
22	Dongsoo Kang, Chen Liu 0001, Jean-Luc Gaudiot	The Impact of Speculative Execution on SMT Processors.	Int. J. Parallel Program.	2008	DBLP DOI BibTeX RDF	Speculation control, Simultaneous multithreading, Thread scheduling, Confidence estimator
22	Antonia Zhai, J. Gregory Steffan, Christopher B. Colohan, Todd C. Mowry	Compiler and hardware support for reducing the synchronization of speculative threads.	ACM Trans. Archit. Code Optim.	2008	DBLP DOI BibTeX RDF	automatic parallelization, instruction scheduling, Thread-level speculation, chip-multiprocessing
22	Andrey Brito, Christof Fetzer, Heiko Sturzrehm, Pascal Felber	Speculative out-of-order event processing with software transaction memory.	DEBS	2008	DBLP DOI BibTeX RDF	software transactional memory, event stream processing
22	Sumeet Kumar, Aneesh Aggarwal	Speculative instruction validation for performance-reliability trade-off.	HPCA	2008	DBLP DOI BibTeX RDF
22	Butler W. Lampson	Lazy and speculative execution in computer systems.	ICFP	2008	DBLP DOI BibTeX RDF	lazy evaluation
22	Hagen Gädke, Andreas Koch 0001	Accelerating Speculative Execution in High-Level Synthesis with Cancel Tokens.	ARC	2008	DBLP DOI BibTeX RDF
22	Juan Carlos Martínez Santos, Yunsi Fei	Leveraging speculative architectures for run-time program validation.	ICCD	2008	DBLP DOI BibTeX RDF
22	Krishna M. Kavi, Wentong Li, Ali R. Hurson	A Non-blocking Multithreaded Architecture with Support for Speculative Threads.	ICA3PP	2008	DBLP DOI BibTeX RDF	Cache Coherency, Thread Level Speculation, Multithreaded Architectures, Decoupled Architecture
22	Yong Chen 0001, Surendra Byna, Xian-He Sun, Rajeev Thakur, William Gropp	2008 International Conference on Parallel Processing September 8-12, 2008 Portland, Oregon Exploring Parallel I/O Concurrency with Speculative Prefetching.	ICPP	2008	DBLP DOI BibTeX RDF
22	Marc Feeley	Speculative Inlining of Predefined Procedures in an R5RS Scheme to C Compiler.	IFL	2007	DBLP DOI BibTeX RDF
22	Anton Yrjönen, Mika Hongisto, Kari Kolehmainen	PROPHET: speculative load prediction algorithm for dynamic performance scaling.	IWCMC	2007	DBLP DOI BibTeX RDF	load prediction algorithm, low-energy computing, dynamic voltage scaling, performance tuning
22	Cyriel Minkenberg, Mitchell Gusat	Speculative Flow Control for High-Radix Datacenter Interconnect Routers.	IPDPS	2007	DBLP DOI BibTeX RDF
22	Pen-Chung Yew	A Compiler Framework for Supporting Speculative Multicore Processors.	Asia-Pacific Computer Systems Architecture Conference	2007	DBLP DOI BibTeX RDF
22	Ruipeng Li, Hai Jiang 0003, Hung-Chi Su, Bin Zhang 0005, Jeff Jenness	Speculative and distributed simulation of many-particle collision systems.	ICPADS	2007	DBLP DOI BibTeX RDF
22	Pamela Jennings	Speculative data and the creative imaginary: shared innovative visions between art and technology.	Creativity & Cognition	2007	DBLP DOI BibTeX RDF	creative digital media, information technology and creative practices (ITCP), interaction design, creativity, communities of practice, interactive art, computational thinking, exhibition
22	James Tuck 0001, Wei Liu 0014, Josep Torrellas	CAP: Criticality analysis for power-efficient speculative multithreading.	ICCD	2007	DBLP DOI BibTeX RDF
22	Weihuang Wang, Gwan Choi	Speculative Energy Scheduling for LDPC Decoding.	ISQED	2007	DBLP DOI BibTeX RDF
22	Troy A. Johnson, Rudolf Eigenmann, T. N. Vijaykumar	Speculative thread decomposition through empirical optimization.	PPoPP	2007	DBLP DOI BibTeX RDF	empirical search, chip multiprocessor, decomposition, multi-core, thread-level speculation
22	Toshinori Sato, Yuu Tanaka, Hidenori Sato, Toshimasa Funaki, Takenori Koushiro, Akihiro Chiyonobu	Improving Energy Efficiency Via Speculative Multithreading on MultiCore Processors.	PATMOS	2006	DBLP DOI BibTeX RDF
22	Luis Ceze, James Tuck 0001, Josep Torrellas, Calin Cascaval	Bulk Disambiguation of Speculative Threads in Multiprocessors.	ISCA	2006	DBLP DOI BibTeX RDF