Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
11 | Mariusz Rawski, Henry Selvaraj, Tadeusz Luba |
An Application of Functional Decomposition in ROM-Based FSM Implementation in FPGA Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), Architectures, Methods and Tools, 3-5 September 2003, Belek-Antalya, Turkey, pp. 104-111, 2003, IEEE Computer Society, 0-7695-2003-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
11 | James Moscola, John W. Lockwood, Ronald Prescott Loui, Michael Pachos |
Implementation of a Content-Scanning Module for an Internet Firewall. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 8-11 April 2003, Napa, CA, USA, Proceedings, pp. 31-38, 2003, IEEE Computer Society, 0-7695-1979-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
11 | Amit K. Chopra, Munindar P. Singh |
Nonmonotonic Commitment Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Workshop on Agent Communication Languages ![In: Advances in Agent Communication, International Workshop on Agent Communication Languages, ACL 2003, Melbourne, Australia, July 14, 2003, pp. 183-200, 2003, Springer, 3-540-20769-4. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
11 | Dario Bonino, Fulvio Corno, Giovanni Squillero |
A Real-Time Evolutionary Algorithm for Web Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Web Intelligence ![In: 2003 IEEE / WIC International Conference on Web Intelligence, (WI 2003), 13-17 October 2003, Halifax, Canada, pp. 139-145, 2003, IEEE Computer Society, 0-7695-1932-6. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
11 | Simon M. Lucas |
Evolving Finite State Transducers: Some Initial Explorations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EuroGP ![In: Genetic Programming, 6th European Conference, EuroGP 2003, Essex, UK, April 14-16, 2003. Proceedings, pp. 130-141, 2003, Springer, 3-540-00971-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
11 | Carlos Molina-Jiménez, Santosh K. Shrivastava, Ellis Solaiman, John P. Warne |
Contract Representation for Run-time Monitoring and Enforcement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CEC ![In: 2003 IEEE International Conference on Electronic Commerce (CEC 2003), 24-27 June 2003, Newport Beach, CA, USA, pp. 103-110, 2003, IEEE Computer Society, 0-7695-1969-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
11 | José C. Monteiro 0001, Arlindo L. Oliveira |
Implicit FSM decomposition applied to low-power design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 10(5), pp. 560-565, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
11 | Priyank Kalla, Maciej J. Ciesielski |
A comprehensive approach to the partial scan problem using implicitstate enumeration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(7), pp. 810-826, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
11 | J. Jenny Li, W. Eric Wong |
Automatic Test Generation from Communicating Extended Finite State Machine (CEFSM)-Based Models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Symposium on Object-Oriented Real-Time Distributed Computing ![In: 5th International Symposiun on Object Oriented Real-Time Distributed Computing, ISORC 2002, Washington, DC, USA, April 29 - May 1, 2002, pp. 181-188, 2002, IEEE Computer Society, 0-7695-1558-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
CEFSM, specification, test generation, SDL |
11 | Tim Menzies, David Owen 0002, Bojan Cukic |
You Seem Friendly, But Can I Trust You? ![Search on Bibsonomy](Pics/bibsonomy.png) |
FAABS ![In: Formal Approaches to Agent-Based Systems, Second International Workshop, FAABS 2002, Greenbelt, MD, USA, October 29-31, 2002, Revised Papers, pp. 208-219, 2002, Springer, 3-540-40665-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
11 | Toshinori Hosokawa, Hiroshi Date, Michiaki Muraoka |
A State Reduction Method for Non-Scan Based FSM Testing with Don't Care Inputs Identification Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 11th Asian Test Symposium (ATS 2002), 18-20 November 2002, Guam, USA, pp. 55-60, 2002, IEEE Computer Society, 0-7695-1825-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
11 | Gustavo Sutter, Elias Todorovich, Sergio López-Buedo, Eduardo I. Boemo |
FSM Decomposition for Low Power in FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, Reconfigurable Computing Is Going Mainstream, 12th International Conference, FPL 2002, Montpellier, France, September 2-4, 2002, Proceedings, pp. 350-359, 2002, Springer, 3-540-44108-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
11 | Wolfgang Grieskamp, Yuri Gurevich, Wolfram Schulte, Margus Veanes |
Generating finite state machines from abstract state machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSTA ![In: Proceedings of the International Symposium on Software Testing and Analysis, ISSTA 2002, Roma, Italy, July 22-24, 2002, pp. 112-122, 2002, ACM, 1-58113-562-9. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
finite state machine, test case generation, FSM, abstract state machine, executable specification, ASM |
11 | John Whaley, Michael C. Martin, Monica S. Lam |
Automatic extraction of object-oriented component interfaces. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSTA ![In: Proceedings of the International Symposium on Software Testing and Analysis, ISSTA 2002, Roma, Italy, July 22-24, 2002, pp. 218-228, 2002, ACM, 1-58113-562-9. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
11 | Henry Selvaraj, Mariusz Rawski, Tadeusz Luba |
FSM Implementation in Embedded Memory Blocks of Programmable Logic Devices Using Functional Decomposition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITCC ![In: 2002 International Symposium on Information Technology (ITCC 2002), 8-10 April 2002, Las Vegas, NV, USA, pp. 355-360, 2002, IEEE Computer Society, 0-7695-1506-1. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
programmable read only memory, Boolean functions, implementation, digital circuits, sequential machines, logic minimization |
11 | Pranav Ashar, Aarti Gupta, Sharad Malik |
Using complete-1-distinguishability for FSM equivalence checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 6(4), pp. 569-590, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Bisimulation relation, complete-1-distinguishability, finite state machine equivalence, sequential logic synthesis, equivalence checking |
11 | Jerry R. Burch, Roberto Passerone, Alberto L. Sangiovanni-Vincentelli |
Overcoming Heterophobia: Modeling Concurrency in Heterogeneous Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACSD ![In: 2nd International Conference on Application of Concurrency to System Design (ACSD 2001), 25-30 June 2001, Newcastle upon Tyne, UK, pp. 13-, 2001, IEEE Computer Society, 0-7695-1071-X. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
11 | Michael Affenzeller, Franz Pichler, Rudolf Mittelmann |
On CAST.FSM Computation of Hierarchical Multi-layer Networks of Automata. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCAST ![In: Computer Aided Systems Theory - EUROCAST 2001, Las Palmas de Gran Canaria, Spain, February 19-23, 2001, Revised Papers, pp. 36-44, 2001, Springer, 3-540-42959-X. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
11 | Chien-Nan Jimmy Liu, Chia-Chih Yen, Jing-Yang Jou |
Automatic Functional Vector Generation Using the Interacting FSM Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 26-28 March 2001, San Jose, CA, USA, pp. 372-377, 2001, IEEE Computer Society, 0-7695-1025-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
11 | Diana Marculescu, Radu Marculescu, Massoud Pedram |
Theoretical bounds for switching activity analysis in finite-state machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 8(3), pp. 335-339, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
11 | Satoshi Ohtake, Toshimitsu Masuzawa, Hideo Fujiwara |
A Non-Scan Approach to DFT for Controllers Achieving 100% Fault Efficiency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 16(5), pp. 553-566, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
non-scan design for testability, complete fault efficiency, controllers, at-speed test |
11 | Alexandre Petrenko |
Fault Model-Driven Test Derivation from Finite State Models: Annotated Bibliography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MOVEP ![In: Modeling and Verification of Parallel Processes, 4th Summer School, MOVEP 2000, Nantes, France, June 19-23, 2000, pp. 196-205, 2000, Springer, 3-540-42787-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
11 | Franco Fummi, Donatella Sciuto, Micaela Serra |
Synthesis for Testability of Highly Complex Controllers by Functional Redundancy Removal. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 48(12), pp. 1305-1323, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
sequential circuits, functional testing, Synthesis for testability, logic minimization, redundant faults, redundancies removal |
11 | Valeri Solovjev |
Refined CPLD Macrocell Architecture for the Effective FSM Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 25th EUROMICRO '99 Conference, Informatics: Theory and Practice for the New Millenium, 8-10 September 1999, Milan, Italy, pp. 1102-, 1999, IEEE Computer Society, 0-7695-0321-7. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
11 | Chien-Nan Jimmy Liu, Jing-Yang Jou |
An Efficient Functional Coverage Test for HDL Descriptions at RTL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design, VLSI in Computers and Processors, ICCD '99, Austin, Texas, USA, October 10-13, 1999, pp. 325-327, 1999, IEEE Computer Society, 0-7695-0406-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
verification, coverage, FSM, HDL |
11 | Imtiaz Ahmad, Raza Ul-Mustafa |
On State Assignment of Finite State Machines Using Hypercube Embedding Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design, VLSI in Computers and Processors, ICCD '99, Austin, Texas, USA, October 10-13, 1999, pp. 608-613, 1999, IEEE Computer Society, 0-7695-0406-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
hypercube embedding, gradient projection method, Kernighan Lin algorithm, finite state machine, state assignment |
11 | Oskar Mencer, Marco Platzner |
Dynamic Circuit Generation for Boolean Satisfiability in an Object-Oriented Design Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS ![In: 32nd Annual Hawaii International Conference on System Sciences (HICSS-32), January 5-8, 1999, Maui, Hawaii, USA, 1999, IEEE Computer Society, 0-7695-0001-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
11 | Peter Bodorik, Dawn N. Jutla, A. Agarwal |
Recoverable Virtual Memory through the Multi-View Memory Computer System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS ![In: 32nd Annual Hawaii International Conference on System Sciences (HICSS-32), January 5-8, 1999, Maui, Hawaii, USA, 1999, IEEE Computer Society, 0-7695-0001-3. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Recoverable Virtual Memory, Multi-view Virtual Memory, Protection Architecture, Architectural Support for Operating Systems, Access Control |
11 | Michael Nicolaidis, Yervant Zorian |
On-Line Testing for VLSI - A Compendium of Approaches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 12(1-2), pp. 7-20, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
fail-safe circuits, SEU hardened circuits, monitoring of reliability indicators, thermal monitors, radiation monitors, on-line testing, self-checking circuits, current monitors |
11 | Gianpiero Cabodi, Paolo Camurati, Stefano Quer |
Auxiliary variables for BDD-based representation and manipulation of Boolean functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 3(3), pp. 309-340, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
finite state machines, binary decision diagrams, reachability analysis, functional decompositions |
11 | Udo Brockmeyer, Gunnar Wittich |
Real-Time Verification of Statemate Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAV ![In: Computer Aided Verification, 10th International Conference, CAV '98, Vancouver, BC, Canada, June 28 - July 2, 1998, Proceedings, pp. 537-541, 1998, Springer, 3-540-64608-6. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
11 | Olivier Coudert |
A New Paradigm for Dichotomy-based Constrained Encoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 1998 Design, Automation and Test in Europe (DATE '98), February 23-26, 1998, Le Palais des Congrès de Paris, Paris, France, pp. 830-834, 1998, IEEE Computer Society, 0-8186-8359-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
constrained state encoding, twin graph coloring, dichotomy |
11 | Samary Baranov |
CAD System for ASM and FSM Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, From FPGAs to Computing Paradigm, 8th International Workshop, FPL'98, Tallinn, Estonia, August 31 - September 3, 1998, Proceedings, pp. 119-128, 1998, Springer, 3-540-64948-4. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
11 | Bilung Lee, Edward A. Lee |
Hierarchical Concurrent Finite State Machines in Ptolemy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACSD ![In: 1st International Conference on Application of Concurrency to System Design (ACSD '98), 23-26 March 1998, Fukushima, Japan, pp. 34-40, 1998, IEEE Computer Society, 0-8186-8350-3. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
concurrency, finite state machine, heterogeneity, hierarchy |
11 | Diana Marculescu, Radu Marculescu, Massoud Pedram |
Theoretical bounds for switching activity analysis in finite-state machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998, Monterey, California, USA, August 10-12, 1998, pp. 36-41, 1998, ACM, 1-58113-059-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
11 | Igor Lemberski |
Modified Approach to Automata State Encoding for LUT FPGA Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 24th EUROMICRO '98 Conference, Engineering Systems and Software for the Next Decade, 25-27 August 1998, Vesteras, Sweden, pp. 10196-10199, 1998, IEEE Computer Society, 0-8186-8646-4. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
11 | Denis Hommais, Frédéric Pétrot |
Efficient Combinational Loops Handling for Cycle Precise Simulation of System on a Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 24th EUROMICRO '98 Conference, Engineering Systems and Software for the Next Decade, 25-27 August 1998, Vesteras, Sweden, pp. 10051-10054, 1998, IEEE Computer Society, 0-8186-8646-4. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
11 | José C. Monteiro 0001, Arlindo L. Oliveira |
Finite State Machine Decomposition For Low Power. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 35th Conference on Design Automation, Moscone center, San Francico, California, USA, June 15-19, 1998., pp. 758-763, 1998, ACM Press, 0-89791-964-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
system-on-chip test, testing embedded core, intellectual property test |
11 | Ajay J. Daga, William P. Birmingham |
Interface finite-state machines: definition, minimization, and decomposition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(5), pp. 497-505, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
11 | Wayne H. Wolf |
Redundancy Removal during High-Level Synthesis Using Scheduling Don't-Cares. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 11(3), pp. 211-225, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
scheduling dont-care, high-level synthesis, redundancy |
11 | Thorsten Grötker, Rainer Schoenen, Heinrich Meyr |
PCC: a modeling technique for mixed control/data flow systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ED&TC ![In: European Design and Test Conference, ED&TC '97, Paris, France, 17-20 March 1997, pp. 482-486, 1997, IEEE Computer Society, 0-8186-7786-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
11 | Prasoon Surti, Liang-Fang Chao, Akhilesh Tyagi |
Low power FSM design using Huffman-style encoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ED&TC ![In: European Design and Test Conference, ED&TC '97, Paris, France, 17-20 March 1997, pp. 521-525, 1997, IEEE Computer Society, 0-8186-7786-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
11 | J. W. J. M. Rutten, Michel R. C. M. Berkelaar |
Improved State Assignment for Burst Mode Finite State Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: 3rd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '97), 7-10 April 1997, Eindhoven, The Netherlands, pp. 228-239, 1997, IEEE Computer Society, 0-8186-7922-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
finite state machines, state assignment, asynchronous logic |
11 | René Klösch, Johannes Weidl, Georg Trausmuth, Harald C. Gall |
Facilitating Program Comprehension via Generic Components for State Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WPC ![In: 5th International Workshop on Program Comprehension (WPC '97), May 28-30, 1997 - Dearborn, MI, USA, pp. 118-127, 1997, IEEE Computer Society, 0-8186-7993-X. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
11 | Reinhard Gerndt, Rolf Ernst |
An Event-Driven Multi-Threading Architecture for Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Fifth International Workshop on Hardware/Software Codesign, CODES/CASHE 1997, March 24-26, 1997, Braunschweig, Germany, pp. 29-33, 1997, IEEE Computer Society, 0-8186-7895-X. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
multi-threading architecture, embedded system, hardware/software-codesign, event-flow |
11 | Luca P. Carloni, Patrick C. McGeer, Alexander Saldanha, Alberto L. Sangiovanni-Vincentelli |
Trace driven logic synthesis - application to power minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1997, San Jose, CA, USA, November 9-13, 1997, pp. 581-588, 1997, IEEE Computer Society / ACM, 0-8186-8200-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Low Power, Logic Synthesis |
11 | Frédéric Pétrot, Denis Hommais, Alain Greiner |
Cycle precise core based hardware/software system simulation with predictable event propagation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 23rd EUROMICRO Conference '97, New Frontiers of Information Technology, 1-4 September 1997, Budapest, Hungary, pp. 182-187, 1997, IEEE Computer Society, 0-8186-8129-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
hardware software system simulation, predictable event propagation, cycle precise core based system simulator, digital embedded systems, Mealy signals, combinational signals, MIPS R3000, microprocessor core, PI-Bus, Pentium 120, communication, graph, C, high level synthesis, memories, directed graph, FSM, topological sort, compile-time, communicating finite state machines |
11 | Franco Fummi, Mariagiovanna Sami, F. Tartarini |
Use of Statecharts-Related Description to Achieve Testable Design of Control Subsystems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 7th Great Lakes Symposium on VLSI (GLS-VLSI '97), 13-15 March 1997, Urbana, IL, USA, pp. 118-123, 1997, IEEE Computer Society, 0-8186-7904-2. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
11 | Raj S. Mitra, Bishnupriya Bhattacharya, Luciano Lavagno |
Asynchronous Implementation of Synchronous Esterel Specifications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 10th International Conference on VLSI Design (VLSI Design 1997), 4-7 January 1997, Hyderabad, India, pp. 348-355, 1997, IEEE Computer Society, 0-8186-7755-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
11 | Diana Marculescu, Radu Marculescu, Massoud Pedram |
Sequence Compaction for Probabilistic Analysis of Finite-State Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 34st Conference on Design Automation, Anaheim, California, USA, Anaheim Convention Center, June 9-13, 1997., pp. 12-15, 1997, ACM Press, 0-89791-920-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
11 | Raj S. Mitra, Partha S. Roop, Anupam Basu |
A new algorithm for implementation of design functions by available devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 4(2), pp. 170-180, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
11 | Rubin A. Parekhji, G. Venkatesh 0001, Sunil D. Sherlekar |
Monitoring machine based synthesis technique for concurrent error detection in finite state machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 8(2), pp. 179-201, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
monitoring machines, finite state machine synthesis, concurrent error detection |
11 | Enrique Alba 0001, José M. Troya |
Genetic Algorithms for Protocol Validation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PPSN ![In: Parallel Problem Solving from Nature - PPSN IV, International Conference on Evolutionary Computation. The 4th International Conference on Parallel Problem Solving from Nature, Berlin, Germany, September 22-26, 1996, Proceedings, pp. 870-879, 1996, Springer, 3-540-61723-X. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
11 | Pranav Ashar, Aarti Gupta, Sharad Malik |
Using complete-1-distinguishability for FSM equivalence checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1996, San Jose, CA, USA, November 10-14, 1996, pp. 346-353, 1996, IEEE Computer Society / ACM, 0-8186-7597-7. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
sequential logic synthesis and verification, finite state machine equivalence, bisimulation relation, 1-distinguishability, 1-equivalence, formal verification |
11 | Olivier Coudert, C.-J. Richard Shi |
Exact Dichotomy-based Constrained Encodi. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1996 International Conference on Computer Design (ICCD '96), VLSI in Computers and Processors, October 7-9, 1996, Austin, TX, USA, Proceedings, pp. 426-431, 1996, IEEE Computer Society, 0-8186-7554-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Sequential logic synthesis, constrained state encoding, clique partition, set covering, dichotomy, ZBDD |
11 | Ramin Hojati, Sriram C. Krishnan, Robert K. Brayton |
Early Quantification and Partitioned Transition Relations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1996 International Conference on Computer Design (ICCD '96), VLSI in Computers and Processors, October 7-9, 1996, Austin, TX, USA, Proceedings, pp. 12-19, 1996, IEEE Computer Society, 0-8186-7554-3. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
11 | Franco Fummi, Donatella Sciuto, M. Serro |
Synthesis for testability of large complexity controllers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings, pp. 180-185, 1995, IEEE Computer Society, 0-8186-7165-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
large complexity controllers, industrial design environments, top-down methodology, hierarchical descriptions, irredundant circuits, optimized gate-level descriptions, testable descriptions, specification, high level synthesis, finite state machines, finite state machines, design for testability, design for testability, VHDL, automatic testing, logic CAD, hardware description languages, FSM, synthesis for testability, logic gates |
11 | Bhed Bahadur Bista, Atsushi Togashi, Norio Shiratori |
Extension of protocol synthesis to structured entities. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICNP ![In: 1995 International Conference on Network Protocols, ICNP 1995, November 7-10, 1995, Tokyo, Japan, pp. 66-73, 1995, IEEE Computer Society, 0-8186-7216-1. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
11 | Chunduri Rama Mohan, Partha Pratim Chakrabarti |
Combined optimization of area and testability during state assignment of PLA-based FSM's. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 8th International Conference on VLSI Design (VLSI Design 1995), 4-7 January 1995, New Delhi, India, pp. 408-413, 1995, IEEE Computer Society, 0-8186-6905-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
combined optimization, testability optimisation, PLA-based FSM, EARTH algorithm, single cross-point faults, redundancy checker, fault diagnosis, logic testing, redundancy, finite state machines, integrated circuit testing, design for testability, fault model, logic CAD, programmable logic arrays, circuit layout CAD, circuit optimisation, integrated circuit layout, state assignment, state assignment, minimisation of switching nets, single stuck-at faults, area minimization |
11 | Chuan-Jin Shi, Janusz A. Brzozswski |
An efficient algorithm for constrained encoding and its applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(12), pp. 1813-1826, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
11 | Hyunwoo Cho, Gary D. Hachtel, Fabio Somenzi |
Redundancy identification/removal and test generation for sequential circuits using implicit state enumeration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(7), pp. 935-945, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
11 | Ruchir Puri, Jun Gu |
An efficient algorithm to search for minimal closed covers in sequential machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(6), pp. 737-745, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
11 | Asawaree Kalavade, Edward A. Lee |
A Hardware-Software Codesign Methodology for DSP Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 10(3), pp. 16-28, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
11 | Pranav Ashar, Srinivas Devadas, A. Richard Newton |
Optimum and heuristic algorithms for an approach to finite state machine decomposition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(3), pp. 296-310, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
11 | Abhijit Ghosh, Srinivas Devadas, A. Richard Newton |
Test generation and verification for highly sequential circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(5), pp. 652-667, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
11 | Doron Drusinsky-Yoresh |
A state assignment procedure for single-block implementation of state charts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(12), pp. 1569-1576, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
11 | Xuejun Du, Gary D. Hachtel, Bill Lin 0001, A. Richard Newton |
MUSE: a multilevel symbolic encoding algorithm for state assignment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(1), pp. 28-38, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
11 | Srinivas Devadas, Kurt Keutzer |
A unified approach to the synthesis of fully testable sequential machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(1), pp. 39-50, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
11 | Seiyang Yang, Maciej J. Ciesielski |
Optimum and suboptimum algorithms for input encoding and its relationship to logic minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(1), pp. 4-12, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
11 | Pranav Ashar, Srinivas Devadas, A. Richard Newton |
Irredundant interacting sequential machines via optimal logic synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(3), pp. 311-325, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
11 | Thomas Müller-Wipperfürth |
Linking CAST.FSM to Practical Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCAST ![In: Computer Aided Systems Theory - EUROCAST'91, A Selection of Papers from the Second International Workshop on Computer Aided Systems Theory, Krems, Austria, April 15-19, 1991, Proceedings, pp. 492-505, 1991, Springer, 3-540-55354-1. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
11 | Martin Geiger |
CAST.FSM Applied to VLSI Synthesis: Experimental Results and Requirements for Industrial Use. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCAST ![In: Computer Aided Systems Theory - EUROCAST'91, A Selection of Papers from the Second International Workshop on Computer Aided Systems Theory, Krems, Austria, April 15-19, 1991, Proceedings, pp. 422-441, 1991, Springer, 3-540-55354-1. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
11 | David Binger, David Knapp |
Automatic synthesis of a dual-PLA controller with a counter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 23rd Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1990, Orlando, Florida, USA, November 27-29, 1990, pp. 149-157, 1990, ACM/IEEE, 0-89791-413-9. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP BibTeX RDF |
|
11 | Wayne H. Wolf |
The FSM Network Model for Behavioral Synthesis of Control-Dominated Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, Florida, USA, June 24-28, 1990., pp. 692-697, 1990, IEEE Computer Society Press, 0-89791-363-9. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
11 | W. Y. L. Chan, C. T. Vuong, M. R. Otp |
An Improved Protocol Test Generation Procedure Based on UIOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGCOMM ![In: Proceedings of the ACM Symposium on Communications Architectures & Protocols, SIGCOMM 1989, Austin, TX, USA, September 19-22, 1989, pp. 283-294, 1989, ACM, 0-89791-332-9. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
11 | Maria C. Yuang, Aaron Kershenbaum |
Parallel Protocol Verification: The Two-Phase Algorithm and Complexity Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Automatic Verification Methods for Finite State Systems ![In: Automatic Verification Methods for Finite State Systems, International Workshop, Grenoble, France, June 12-14, 1989, Proceedings, pp. 303-316, 1989, Springer, 3-540-52148-8. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
11 | Pierre G. Paulin |
Horizontal Partitioning of PLA-based Finite State Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 26th ACM/IEEE Design Automation Conference, Las Vegas, Nevada, USA, June 25-29, 1989., pp. 333-338, 1989, ACM Press. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
11 | Sanjiv Ahuja |
On communication software testing (abstract only). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Conference on Computer Science ![In: Proceedings of the 15th ACM Annual Conference on Computer Science, St. Louis, Missouri, USA, February 16-19, 1987, pp. 460, 1987, ACM, 0-89791-218-7. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
|
11 | Rainer Brück 0001, Bernd Kleinjohann, Thomas Kathöfer, Franz J. Rammig |
Synthesis of concurrent modular controllers from algorithmic descriptions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, NV, USA, June, 1986., pp. 285-292, 1986, IEEE Computer Society Press. The full citation details ...](Pics/full.jpeg) |
1986 |
DBLP DOI BibTeX RDF |
|