|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 700 occurrences of 376 keywords
|
|
|
Results
Found 2246 publication records. Showing 2246 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
13 | Michael Jaemin Kim, Jaehyun Park 0006, Yeonhong Park, Wanju Doh, Namhoon Kim, Tae Jun Ham, Jae W. Lee, Jung Ho Ahn |
Mithril: Cooperative Row Hammer Protection on Commodity DRAM Leveraging Managed Refresh. |
HPCA |
2022 |
DBLP DOI BibTeX RDF |
|
13 | F. Nisa Bostanci, Ataberk Olgun, Lois Orosa 0001, Abdullah Giray Yaglikçi, Jeremie S. Kim, Hasan Hassan, Oguz Ergin, Onur Mutlu |
DR-STRaNGe: End-to-End System Design for DRAM-based True Random Number Generators. |
HPCA |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Chen Zhong, Prajwal Challa, Xingsheng Zhao, Song Jiang 0001 |
Buffered Hash Table: Leveraging DRAM to Enhance Hash Indexes in the Persistent Memory. |
NVMSA |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Jifei Yi, Benchao Dong, Mingkai Dong 0002, Ruizhe Tong, Haibo Chen 0001 |
MT^2: Memory Bandwidth Regulation on Hybrid NVM/DRAM Platforms. |
FAST |
2022 |
DBLP BibTeX RDF |
|
13 | Yuxin Liu, Ziyuan Zhu, Yusha Zhang, Zhongkai Tong, Wenjing Cai, Dan Meng |
Analysis of DRAM Vulnerability Using Computation Tree Logic. |
ICC |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Seungwon Go, Jae Yeon Park, Shinhee Kim, Hyung Ju Noh, Dong Keun Lee, So Ra Park, Sangwan Kim |
Investigation on the Effect of Gate Overlap/Underlap on the 1T DRAM Cell. |
ICEIC |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Bin Gao, Hao-Wei Tee, Alireza Sanaee, Soh Boon Jun, Djordje Jevdjic |
OS-level Implications of Using DRAM Caches in Memory Disaggregation. |
ISPASS |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Daokun Hu, Zhiwen Chen 0006, Wenkui Che, Jianhua Sun 0002, Hao Chen 0002 |
Halo: A Hybrid PMem-DRAM Persistent Hash Index with Fast Recovery. |
SIGMOD Conference |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Tobias Ziegler 0001, Carsten Binnig, Viktor Leis |
ScaleStore: A Fast and Cost-Efficient Storage Engine using DRAM, NVMe, and RDMA. |
SIGMOD Conference |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Dan Chen, Hai Jin 0001, Long Zheng 0003, Yu Huang 0013, Pengcheng Yao, Chuangyi Gui, Qinggang Wang, Haifeng Liu 0003, Haiheng He, Xiaofei Liao, Ran Zheng |
A General Offloading Approach for Near-DRAM Processing-In-Memory Architectures. |
IPDPS |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Kaustav M. Goswami, Shirshendu Das, Sagar Satapathy, Dip Sankar Banerjee |
A Case for Amplifying Row Hammer Attacks via Cell-Coupling in DRAM Devices. |
MEMSYS |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Lukas Steiner, Chirag Sudarshan, Matthias Jung 0001, Dominik Stoffel, Norbert Wehn |
A Framework for Formal Verification of DRAM Controllers. |
MEMSYS |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Samiksha Verma, Shirshendu Das, Vipul Bondre |
Hybrid Refresh: Improving DRAM Performance by Handling Weak Rows Smartly. |
MEMSYS |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Gaocong Liu, Yongping Luo, Peiquan Jin |
HATree: A Hotness-Aware Tree Index with In-Node Hotspot Cache for NVM/DRAM-Based Hybrid Memory Architecture. |
DASFAA (1) |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Romain Ritzenthaler, Elena Capogreco, E. Dupuy, Hiroaki Arimura, J. P. Bastos, P. Favia, F. Sebaai, D. Radisic, V. T. H. Nguyen, G. Mannaert, B. T. Chan, V. Machkaoutsan, Y. Yoon, H. Itokawa, M. Yamaguchi, Y. Chen, Pierre Fazan, S. Subramanian, Alessio Spessot, E. Dentoni Litta, S. Samavedam, Naoto Horiguchi |
High Performance Thermally Resistant FinFETs DRAM Peripheral CMOS FinFETs with VTH Tunability for Future Memories. |
VLSI Technology and Circuits |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Yesin Ryu, Young-Cheon Kwon, Jae Hoon Lee, Sung-Gi Ahn, Jaewon Park, Kijun Lee, Yu Ho Choi, Han-Won Cho, Jae San Kim, Jungyu Lee 0002, Haesuk Lee, Seung Ho Song, Je-Min Ryu, Yeong Ho Yun, Useung Shin, Dajung Cho, Jeong Hoan Park, Jae-Seung Jeong, Suk Han Lee, Kyounghwan Lim, Tae-Sung Kim, Kyungmin Kim, Yu Jin Cha, Ik Joo Lee, Tae Kyu Byun, Han Sik Yoo, Yeong Geol Song, Myung-Kyu Lee, Sunghye Cho, Sung-Rae Kim, Ji-Min Choi, Hyoungmin Kim, Soo Young Kim, Jaeyoun Youn, Myeong-O. Kim, Kyomin Sohn, SangJoon Hwang, JooYoung Lee |
A 16 GB 1024 GB/s HBM3 DRAM with On-Die Error Control Scheme for Enhanced RAS Features. |
VLSI Technology and Circuits |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Kailiang Huang, Xinlv Duan, Junxiao Feng, Ying Sun, Congyan Lu, Chuanke Chen, Guangfan Jiao, Xinpeng Lin, Jinhai Shao, Shihui Yin, Jiazhen Sheng, Zhaogui Wang, Wenqiang Zhang, Xichen Chuai, Jiebin Niu, Wenwu Wang 0006, Ying Wu, Weiliang Jing, Zhengbo Wang, Jeffrey Xu, Guanhua Yang, Di Geng, Ling Li, Ming Liu |
Vertical Channel-All-Around (CAA) IGZO FET under 50 nm CD with High Read Current of 32.8 μA/μm (Vth + 1 V), Well-performed Thermal Stability up to 120 ℃ for Low Latency, High-density 2T0C 3D DRAM Application. |
VLSI Technology and Circuits |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Daewon Ha, Hyoung-Sub Kim |
Prospective Innovation of DRAM, Flash, and Logic Technologies for Digital Transformation (DX) Era. |
VLSI Technology and Circuits |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Jingrui Guo, Ying Sun, Lingfei Wang, Xinlv Duan, Kailiang Huang, Zhaogui Wang, Junxiao Feng, Qian Chen, Shijie Huang, Lihua Xu, Di Geng, Guangfan Jiao, Shihui Yin, Zhengbo Wang, Weiliang Jing, Ling Li, Ming Liu |
Compact Modeling of IGZO-based CAA-FETs with Time-zero-instability and BTI Impact on Device and Capacitor-less DRAM Retention Reliability. |
VLSI Technology and Circuits |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Ranyang Zhou, Arman Roohi, Durga Misra, Shaahin Angizi |
ReD-LUT: Reconfigurable In-DRAM LUTs Enabling Massive Parallel Computation. |
ICCAD |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Joohwan Kim, Junyoung Park, Jindo Byun, Changkyu Seol, Chang Soo Yoon, EunSeok Shin, Hyunyoon Cho, Youngdo Um, Sucheol Lee, Hyungmin Jin, Kwangseob Shin, Hyunsub Norbert Rie, Minsu Jung, Jin-Hee Park, Go-Eun Cha, Minjae Lee, YoungMin Kim, Byeori Han, Yuseong Jeon, Jisun Lee, Hyejeong So, Sungduk Kim, Wansoo Park, Tae Young Kim, Youngdon Choi, Jung-Hwan Choi, Hyungjong Ko, Sang-Hyun Lee |
A 60-Gb/s/pin single-ended PAM-4 transmitter with timing skew training and low power data encoding in mimicked 10nm class DRAM process. |
CICC |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Sangyoon Lee, Jaekwang Yun, Suhwan Kim |
A 78.8fJ/b/mm 12.0Gb/s/Wire Capacitively Driven On-Chip Link Over 5.6mm with an FFE-Combined Ground-Forcing Biasing Technique for DRAM Global Bus Line in 65nm CMOS. |
ISSCC |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Dae-Hyun Kim 0003, Byungkyu Song, Hyun-A. Ahn, Woongjoon Ko, Sung-Geun Do, Seokjin Cho, Kihan Kim, Seung-Hoon Oh, Hye-Yoon Joo, Geuntae Park, Jin-Hun Jang, Yong-Hun Kim, Donghun Lee, Jaehoon Jung, Yongmin Kwon, Youngjae Kim, Jaewoo Jung, Seongil O, Seoulmin Lee, Jaeseong Lim, Junho Son, Jisu Min, Haebin Do, Jaejun Yoon, Isak Hwang, Jinsol Park, Hong Shim, Seryeong Yoon, Dongyeong Choi, Jihoon Lee, Soohan Woo, Eunki Hong, Junha Choi, Jae-Sung Kim, Sangkeun Han, Jong-Min Bang, Bokgue Park, Jang-Hoo Kim, Seouk-Kyu Choi, Gong-Heum Han, Yoo-Chang Sung, Wonil Bae, Jeong-Don Lim, Seungjae Lee, Changsik Yoo, Sang Joon Hwang, Jooyoung Lee |
A 16Gb 9.5Gb/S/pin LPDDR5X SDRAM With Low-Power Schemes Exploiting Dynamic Voltage-Frequency Scaling and Offset-Calibrated Readout Sense Amplifiers in a Fourth Generation 10nm DRAM Process. |
ISSCC |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Myeong-Jae Park, Ho Sung Cho, Tae-Sik Yun, Sangjin Byeon, Young Jun Koo, Sang-Sic Yoon, Dong-Uk Lee, Seokwoo Choi, Ji Hwan Park, Jinhyung Lee, Kyungjun Cho, Junil Moon, Byung Kuk Yoon, Young Jun Park, Sangmuk Oh, Chang Kwon Lee, Tae-Kyun Kim, Seong-Hee Lee, Hyun-Woo Kim, Yucheon Ju, Seung-Kyun Lim, Seung Geun Baek, Kyo Yun Lee, Sang Hun Lee, Woo Sung We, Seungchan Kim, Yongseok Choi, Seong-Hak Lee, Seung Min Yang, Gunho Lee, In-Keun Kim, Younghyun Jeon, Jae-Hyung Park, Jong Chan Yun, Chanhee Park, Sun-Yeol Kim, Sungjin Kim, Dong-Yeol Lee, Su-Hyun Oh, Taejin Hwang, Junghyun Shin, Yunho Lee, Hyunsik Kim, Jaeseung Lee, Youngdo Hur, Sangkwon Lee, Jieun Jang, Junhyun Chun, Joohwan Cho |
A 192-Gb 12-High 896-GB/s HBM3 DRAM with a TSV Auto-Calibration Scheme and Machine-Learning-Based Layout Optimization. |
ISSCC |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Dimin Niu, Shuangchen Li, Yuhao Wang, Wei Han, Zhe Zhang, Yijin Guan, Tianchan Guan, Fei Sun, Fei Xue, Lide Duan, Yuanwei Fang, Hongzhong Zheng, Xiping Jiang, Song Wang, Fengguo Zuo, Yubing Wang, Bing Yu, Qiwei Ren, Yuan Xie 0001 |
184QPS/W 64Mb/mm23D Logic-to-DRAM Hybrid Bonding with Process-Near-Memory Engine for Recommendation System. |
ISSCC |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Yeonwook Jung, Seongseop Lee, Hyojun Kim, SeongHwan Cho |
A Supply-Noise-Induced Jitter-Cancelling Clock Distribution Network for LPDDR5 Mobile DRAM featuring a 2nd-order Adaptive Filter. |
ISSCC |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Daewoong Lee, Hye-Jung Kwon, Daehyun Kwon, Jaehyeok Baek, Chulhee Cho, Sanghoon Kim, Donggun An, Chulsoon Chang, Unhak Lim, Jiyeon Im, Wonju Sung, Hye-Ran Kim, Sun-Young Park, Hyoungjoo Kim, Ho-Seok Seol, Juhwan Kim, Junabum Shin, Kil-Youna Kang, Yong-Hun Kim, Sooyoung Kim, Wansoo Park, Seok-Jung Kim, ChanYong Lee, Seungseob Lee, TaeHoon Park, Chi Sung Oh, Hyodong Ban, Hyungjong Ko, Hoyoung Song, Tae-Young Oh, SangJoon Hwang, Kyung Suk Oh, Jung-Hwan Choi, Jooyoung Lee |
A 16Gb 27Gb/s/pin T-coil based GDDR6 DRAM with Merged-MUX TX, Optimized WCK Operation, and Alternative-Data-Bus. |
ISSCC |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Ranyang Zhou, Arman Roohi, Durga Misra, Shaahin Angizi |
FlexiDRAM: A Flexible in-DRAM Framework to Enable Parallel General-Purpose Computation. |
ISLPED |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Youri Su, Sanghun Lee, Eunji Song, Dongha Kim, Jaeduk Han, Hokeun Kim |
Energy-Efficient Bus Encoding Techniques for Next-Generation PAM-4 DRAM Interfaces. |
ICCD |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Chirag Sudarshan, Mohammad Hassani Sadi, Christian Weis, Norbert Wehn |
Optimization of DRAM based PIM Architecture for Energy-Efficient Deep Neural Network Training. |
ISCAS |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Michele Caselli, Subhali Subhechha, Peter Debacker, Arindam Mallik, Diederik Verkest |
Write-Verify Scheme for IGZO DRAM in Analog in-Memory Computing. |
ISCAS |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Javed S. Gaggatur |
A Duty Cycle Error Reduction with 1-point Calibration achieving 0.017UI in 7.2Gbps HBM3 DRAM Data Read. |
SOCC |
2022 |
DBLP DOI BibTeX RDF |
|
13 | N. S. Aswathy, Sreesiddesh Bhavanasi, Arnab Sarkar, Hemangee K. Kapoor |
SRS-Mig: Selection and Run-time Scheduling of page Migration for improved response time in hybrid PCM-DRAM memories. |
ACM Great Lakes Symposium on VLSI |
2022 |
DBLP DOI BibTeX RDF |
|
13 | João Vieira, Nuno Roma, Gabriel Falcão 0001, Pedro Tomás |
gem5-ndp: Near-Data Processing Architecture Simulation From Low Level Caches to DRAM. |
SBAC-PAD |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Wei Lu, Pei-Yu Ge, Po-Tsang Huang, Hung-Ming Chen, Wei Hwang |
Memory-Centric Fusion-based CNN Accelerator with 3D-NoC and 3D-DRAM. |
ISOCC |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Taesu Shin, Kibum Lee |
The first study of 10nm-class backside defect using Co-Routine based ETL in DRAM. |
ISOCC |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Yujuan Tan, Zhichao Zhang, Zhulin Ma, Yanlin Zhou, Duo Liu |
Towards the Design of Efficient TCN-bascd Prefetcher for Hybrid NVM-DRAM Memory. |
IJCNN |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Saikat Chakraborty, Jaydeep P. Kulkarni |
Cryo-TRAM: Gated Thyristor based Capacitor-less DRAM for Cryogenic Computing. |
DRC |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Michele Marazzi, Patrick Jattke, Flavien Solt, Kaveh Razavi |
ProTRR: Principled yet Optimal In-DRAM Target Row Refresh. |
SP |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Haodong Lin, Zhibing Sha, Jun Li 0062, Zhigang Cai, Balazs Gerofi, Yuanquan Shi, Jianwei Liao 0001 |
DRAM Cache Management with Request Granularity for NAND-based SSDs. |
ICPP |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Ashik Mostafa Alvi, Siuly Siuly, Maria Cristina De Cola, Hua Wang 0002 |
DRAM-Net: A Deep Residual Alzheimer's Diseases and Mild Cognitive Impairment Detection Network Using EEG Data. |
HIS |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Xin Xin 0008, Wanyi Zhu, Li Zhao |
Architecting DDR5 DRAM caches for non-volatile memory systems. |
DAC |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Zhinan Cheng, Shujie Han 0001, Patrick P. C. Lee, Xin Li, Jiongzhou Liu, Zhan Li |
An In-Depth Correlative Study Between DRAM Errors and Server Failures in Production Data Centers. |
SRDS |
2022 |
DBLP DOI BibTeX RDF |
|
13 | Hyeongjun Ko, Mino Kim, Hyunkyu Park 0002, Sangyoon Lee, Jaewook Kim, Suhwan Kim, Joo-Hyung Chae |
A Controller PHY for Managed DRAM Solution With Damping-Resistor-Aided Pulse-Based Feed-Forward Equalizer. |
IEEE J. Solid State Circuits |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Ki Chul Chun, Yong-Ki Kim, Yesin Ryu, Jaewon Park, Chi Sung Oh, Young-Yong Byun, So-Young Kim, Dong-Hak Shin, Jun Gyu Lee 0002, Byung-Kyu Ho, Min-Sang Park, Seong-Jin Cho, Seunghan Woo, Byoung-Mo Moon, Beomyong Kil, Sungoh Ahn, Jae Hoon Lee, Sooyoung Kim, Seouk-Kyu Choi, Jae-Seung Jeong, Sung-Gi Ahn, Jihye Kim, Jun Jin Kong, Kyomin Sohn, Nam Sung Kim, Jung-Bae Lee |
A 16-GB 640-GB/s HBM2E DRAM With a Data-Bus Window Extension Technique and a Synergetic On-Die ECC Scheme. |
IEEE J. Solid State Circuits |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Stijn Eyerman, Wim Heirman, Ibrahim Hur |
Modeling DRAM Timing in Parallel Simulators With Immediate-Response Memory Model. |
IEEE Comput. Archit. Lett. |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Donghyuk Yun, Myungsang Park, GeunYong Bak, Sanghyeon Baeg, Shi-Jie Wen |
Exploitations of Multiple Rows Hammering and Retention Time Interactions in DRAM Using X-Ray Radiation. |
IEEE Access |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Sung-Il Pae, Vivek Joy Kozhikkottu, Dinesh Somasekar, Wei Wu, Shankar Ganesh Ramasubramanian, Melin Dadual, Hyungmin Cho, Kon-Woo Kwon |
Minimal Aliasing Single-Error-Correction Codes for DRAM Reliability Improvement. |
IEEE Access |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Qian Zhang, Jianhao Wei, Yiwen Xiang, Chuqiao Xiao |
A Performance Evaluation of DRAM Access for In-Memory Databases. |
IEEE Access |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Jin Park, Min Su Cho, Sang Ho Lee 0003, Hee Dae An, So Ra Min, Geon Uk Kim, Young Jun Yoon, Jae Hwa Seo, Sin-Hyung Lee, Jaewon Jang, Jin-Hyuk Bae, In Man Kang |
Design of Capacitorless DRAM Based on Polycrystalline Silicon Nanotube Structure. |
IEEE Access |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Sang Ho Lee 0003, Won Douk Jang, Young Jun Yoon, Jae Hwa Seo, Hye Jin Mun, Min Su Cho, Jaewon Jang, Jin-Hyuk Bae, In Man Kang |
Polycrystalline-Silicon-MOSFET-Based Capacitorless DRAM With Grain Boundaries and Its Performances. |
IEEE Access |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Roman Golman, Netanel Nachum, Tomer Cohen, Robert Giterman, Adam Teman |
Refresh Algorithm for Ensuring 100% Memory Availability in Gain-Cell Embedded DRAM Macros. |
IEEE Access |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Duy Thanh Nguyen, Nhut-Minh Ho, Minh-Son Le, Weng-Fai Wong, Ik-Joon Chang |
ZEM: Zero-Cycle Bit-Masking Module for Deep Learning Refresh-Less DRAM. |
IEEE Access |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Esteban Garzón, Yosi Greenblatt, Odem Harel, Marco Lanuzza, Adam Teman |
Gain-Cell Embedded DRAM Under Cryogenic Operation - A First Study. |
IEEE Trans. Very Large Scale Integr. Syst. |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Jeong-Geun Kim, Yoon-Su Jo, Su-Kyung Yoon, Shin-Dug Kim |
History table-based linear analysis method for DRAM-PCM hybrid memory system. |
J. Supercomput. |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Pai Chen, Jianhui Yue, Xiaofei Liao, Hai Jin 0001 |
Trade-off Between Hit Rate and Hit Latency for Optimizing DRAM Cache. |
IEEE Trans. Emerg. Top. Comput. |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Rakesh Pandey, Aryabartta Sahu |
Performance and Area Trade-Off of 3D-Stacked DRAM Based Chip Multiprocessor with Hybrid Interconnect. |
IEEE Trans. Emerg. Top. Comput. |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Tomohiro Korikawa, Akio Kawabata, Fujun He, Eiji Oki |
Packet Processing Architecture with Off-Chip Last Level Cache Using Interleaved 3D-Stacked DRAM. |
IEICE Trans. Commun. |
2021 |
DBLP BibTeX RDF |
|
13 | Suk Min Kim, Byungkyu Song, Seong-Ook Jung |
Imbalance-Tolerant Bit-Line Sense Amplifier for Dummy-Less Open Bit-Line Scheme in DRAM. |
IEEE Trans. Circuits Syst. I Regul. Pap. |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Chirag Sudarshan, Lukas Steiner, Matthias Jung 0001, Jan Lappas, Christian Weis, Norbert Wehn |
A Novel DRAM Architecture for Improved Bandwidth Utilization and Latency Reduction Using Dual-Page Operation. |
IEEE Trans. Circuits Syst. II Express Briefs |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Min-Kyun Chae, Hye-Jung Kwon, Seung-Jun Bae, Nam-Jong Kim, Hong-June Park |
A Duo-Binary Transceiver With Time-Based Receiver and Voltage-Mode Time-Interleaved Mixing Transmitter for DRAM Interface. |
IEEE Trans. Circuits Syst. II Express Briefs |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Ravikiran Yeleswarapu, Arun K. Somani |
Addressing multiple bit/symbol errors in DRAM subsystem. |
PeerJ Comput. Sci. |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Lev Mukhanov, Konstantinos Tovletoglou, Hans Vandierendonck, Dimitrios S. Nikolopoulos, Georgios Karakonstantis |
Revealing DRAM Operating GuardBands Through Workload-Aware Error Predictive Modeling. |
IEEE Trans. Computers |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Hoseok Seol, Minhye Kim, Taesoo Kim, Yongdae Kim, Lee-Sup Kim |
Amnesiac DRAM: A Proactive Defense Mechanism Against Cold Boot Attacks. |
IEEE Trans. Computers |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Fazal Hameed, Asif Ali Khan, Jerónimo Castrillón |
Improving the Performance of Block-based DRAM Caches Via Tag-Data Decoupling. |
IEEE Trans. Computers |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Muhammad M. Rafique, Zhichun Zhu |
Memory-Side Prefetching Scheme Incorporating Dynamic Page Mode in 3D-Stacked DRAM. |
IEEE Trans. Parallel Distributed Syst. |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Imran Fareed, Mincheol Kang, Wonyoung Lee 0001, Soontae Kim |
Update Frequency-Directed Subpage Management for Mitigating Garbage Collection and DRAM Overheads. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Wenjie Liu, Shoaib Akram 0001, Jennifer B. Sartor, Lieven Eeckhout |
Reliability-aware Garbage Collection for Hybrid HBM-DRAM Memories. |
ACM Trans. Archit. Code Optim. |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Qianlong Zhang, Xiufeng Sui, Rui Hou 0001, Lixin Zhang 0002 |
Line-Coalescing DRAM Cache. |
Sustain. Comput. Informatics Syst. |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Lois Orosa 0001, Yaohua Wang, Mohammad Sadrosadati, Jeremie S. Kim, Minesh Patel, Ivan Puddu, Haocong Luo, Kaveh Razavi, Juan Gómez-Luna, Hasan Hassan, Nika Mansouri-Ghiasi, Saugata Ghose, Onur Mutlu |
CODIC: A Low-Cost Substrate for Enabling Custom In-DRAM Functionalities and Optimizations. |
CoRR |
2021 |
DBLP BibTeX RDF |
|
13 | Ataberk Olgun, Minesh Patel, Abdullah Giray Yaglikçi, Haocong Luo, Jeremie S. Kim, Nisa Bostanci, Nandita Vijaykumar, Oguz Ergin, Onur Mutlu |
QUAC-TRNG: High-Throughput True Random Number Generation Using Quadruple Row Activation in Commodity DRAM Chips. |
CoRR |
2021 |
DBLP BibTeX RDF |
|
13 | Zhiyue Wu, Hongzuo Xu, Guansong Pang, Fengyuan Yu, Yijie Wang 0001, Songlei Jian, Yongjun Wang |
DRAM Failure Prediction in AIOps: EmpiricalEvaluation, Challenges and Opportunities. |
CoRR |
2021 |
DBLP BibTeX RDF |
|
13 | Michael Jaemin Kim, Jaehyun Park 0006, Yeonhong Park, Wanju Doh, Namhoon Kim, Tae Jun Ham, Jae W. Lee, Jung Ho Ahn |
Mithril: Cooperative Row Hammer Protection on Commodity DRAM Leveraging Managed Refresh. |
CoRR |
2021 |
DBLP BibTeX RDF |
|
13 | Abdullah Giray Yaglikçi, Minesh Patel, Jeremie S. Kim, Roknoddin Azizi, Ataberk Olgun, Lois Orosa 0001, Hasan Hassan, Jisung Park 0001, Konstantinos Kanellopoulos, Taha Shahroodi, Saugata Ghose, Onur Mutlu |
BlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows. |
CoRR |
2021 |
DBLP BibTeX RDF |
|
13 | João Dinis Ferreira, Gabriel Falcão 0001, Juan Gómez-Luna, Mohammed Alser, Lois Orosa 0001, Mohammad Sadrosadati, Jeremie S. Kim, Geraldo F. Oliveira, Taha Shahroodi, Anant Nori, Onur Mutlu |
pLUTo: In-DRAM Lookup Tables to Enable Massively Parallel General-Purpose Computation. |
CoRR |
2021 |
DBLP BibTeX RDF |
|
13 | Lois Orosa 0001, Abdullah Giray Yaglikçi, Haocong Luo, Ataberk Olgun, Jisung Park 0001, Hasan Hassan, Minesh Patel, Jeremie S. Kim, Onur Mutlu |
A Deeper Look into RowHammer's Sensitivities: Experimental Analysis of Real DRAM Chips and Implications on Future Attacks and Defenses. |
CoRR |
2021 |
DBLP BibTeX RDF |
|
13 | Nastaran Hajinazar, Geraldo F. Oliveira, Sven Gregorio, João Dinis Ferreira, Nika Mansouri-Ghiasi, Minesh Patel, Mohammed Alser, Saugata Ghose, Juan Gómez-Luna, Onur Mutlu |
SIMDRAM: An End-to-End Framework for Bit-Serial SIMD Computing in DRAM. |
CoRR |
2021 |
DBLP BibTeX RDF |
|
13 | Saurabh Jaiswal, Shailendra Kumar Gupta, Soumya Soubhagya Dandapat |
Prefetcher-based DRAM Architecture. |
CoRR |
2021 |
DBLP BibTeX RDF |
|
13 | Supreeth Mysore Shivanandamurthy, Ishan G. Thakkar, Sayed Ahmad Salehi |
ATRIA: A Bit-Parallel Stochastic Arithmetic Based Accelerator for In-DRAM CNN Processing. |
CoRR |
2021 |
DBLP BibTeX RDF |
|
13 | Heesu Kim, Hanmin Park, Taehyun Kim, Kwanheum Cho, Eojin Lee, Soojung Ryu, Hyuk-Jae Lee, Kiyoung Choi, Jinho Lee |
GradPIM: A Practical Processing-in-DRAM Architecture for Gradient Descent. |
CoRR |
2021 |
DBLP BibTeX RDF |
|
13 | Ataberk Olgun, Juan Gómez-Luna, Konstantinos Kanellopoulos, Behzad Salami 0001, Hasan Hassan, Oguz Ergin, Onur Mutlu |
PiDRAM: A Holistic End-to-end FPGA-based Framework for Processing-in-DRAM. |
CoRR |
2021 |
DBLP BibTeX RDF |
|
13 | Zarin Tasnim Sandhie, Farid Uddin Ahmed, Masud H. Chowdhury |
Design of Novel 3T Ternary DRAM with Single Word-Line using CNTFET. |
CoRR |
2021 |
DBLP BibTeX RDF |
|
13 | Rachmad Vidya Wicaksana Putra, Muhammad Abdullah Hanif, Muhammad Shafique 0001 |
SparkXD: A Framework for Resilient and Energy-Efficient Spiking Neural Network Inference using Approximate DRAM. |
CoRR |
2021 |
DBLP BibTeX RDF |
|
13 | Gian Singh, Ankit Wagle, Sarma B. K. Vrudhula, Sunil P. Khatri |
CIDAN: Computing in DRAM with Artificial Neurons. |
CoRR |
2021 |
DBLP BibTeX RDF |
|
13 | Hasan Hassan, Yahya Can Tugrul, Jeremie S. Kim, Victor van der Veen, Kaveh Razavi, Onur Mutlu |
Uncovering In-DRAM RowHammer Protection Mechanisms: A New Methodology, Custom RowHammer Patterns, and Implications. |
CoRR |
2021 |
DBLP BibTeX RDF |
|
13 | Tomoya Suzuki, Kazuhiro Hiwada, Hirotsugu Kajihara, Shintaro Sano, Shuou Nomura, Tatsuo Shiozawa |
Approaching DRAM performance by using microsecond-latency flash memory for small-sized random read accesses: a new access method and its graph applications. (PDF / PS) |
Proc. VLDB Endow. |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Lawrence Benson, Hendrik Makait, Tilmann Rabl |
Viper: An Efficient Hybrid PMem-DRAM Key-Value Store. (PDF / PS) |
Proc. VLDB Endow. |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Koki Higashi, Yoichi Ishiwata, Takeshi Ohkawa, Midori Sugaya |
Fogcached-Ros: DRAM/NVMM Hybrid KVS Server with ROS Based Extension for ROS Application and SLAM Evaluation. |
IEICE Trans. Inf. Syst. |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Kouki Ozawa, Takahiro Hirofuchi, Ryousei Takano, Midori Sugaya |
Fogcached: A DRAM/NVMM Hybrid KVS Server for Edge Computing. |
IEICE Trans. Inf. Syst. |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Wenjie Xiong 0001, André Schaller, Nikolaos Athanasios Anagnostopoulos, Muhammad Umair Saleem, Sebastian Gabmeyer, Stefan Katzenbeisser 0001, Jakub Szefer |
DRAM PUFs in Commodity Devices. |
IEEE Des. Test |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Fatemeh Najafi, Masoud Kaveh, Diego Martín 0001, Mohammad Reza Mosavi |
Deep PUF: A Highly Reliable DRAM PUF-Based Authentication for IoT Networks Using Deep Convolutional Neural Networks. |
Sensors |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Duy Thanh Nguyen, Nhut-Minh Ho, Weng-Fai Wong, Ik-Joon Chang |
OBET: On-the-Fly Byte-Level Error Tracking for Correcting and Detecting Faults in Unreliable DRAM Systems. |
Sensors |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Michael Yue, Nima Karimian, Wei Yan 0005, Nikolaos Athanasios Anagnostopoulos, Fatemeh Tehranipoor |
DRAM-Based Authentication Using Deep Convolutional Neural Networks. |
IEEE Consumer Electron. Mag. |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Bindu Agarwalla, Shirshendu Das, Nilkanta Sahu |
Efficient Cache Resizing policy for DRAM-based LLCs in ChipMultiprocessors. |
J. Syst. Archit. |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Sangjin Kim, Juhyoung Lee, Dongseok Im, Hoi-Jun Yoo |
PNNPU: A Fast and Efficient 3D Point Cloud-based Neural Network Processor with Block-based Point Processing for Regular DRAM Access. |
HCS |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Hyungrock Oh, Attilio Belmonte, Manu Perumkunnil, Jérôme Mitard, Nouredine Rassoul, Gabriele Luca Donadio, Romain Delhougne, Arnaud Furnémont, Gouri Sankar Kar, Wim Dehaene |
Enhanced data integrity of In-Ga-Zn-Oxide based Capacitor-less 2T memory for DRAM applications. |
ESSDERC |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Xiaoliang Wang, Kaimeng Chen, Peiquan Jin |
Adaptive Buffering Scheme for PCM/DRAM-Based Hybrid Memory Architecture. |
NPC |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Kuiqing He, Zhi Yang, Zhitai Yu, Jianglong Zhi, Zhaohao Wang, Yijiao Wang |
Proposal of A Novel Hybrid NAND-Like MRAM/DRAM Memory Architecture. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Supreeth Mysore Shivanandamurthy, Ishan G. Thakkar, Sayed Ahmad Salehi |
ATRIA: A Bit-Parallel Stochastic Arithmetic Based Accelerator for In-DRAM CNN Processing. |
ISVLSI |
2021 |
DBLP DOI BibTeX RDF |
|
13 | Donghee Son, Gang-Jun Kim, Jongkyun Kim, Nam-Hyun Lee, Kijin Kim, Sangwoo Pae |
Effect of High Temperature on Recovery of Hot Carrier Degradation of scaled nMOSFETs in DRAM. |
IRPS |
2021 |
DBLP DOI BibTeX RDF |
|
Displaying result #601 - #700 of 2246 (100 per page; Change: ) Pages: [ <<][ 1][ 2][ 3][ 4][ 5][ 6][ 7][ 8][ 9][ 10][ 11][ 12][ 13][ 14][ 15][ 16][ >>] |
|