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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 1775 occurrences of 908 keywords
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Results
Found 3437 publication records. Showing 3436 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
16 | Gerlind Plonka, Hagen Schumacher, Manfred Tasche |
Numerical stability of biorthogonal wavelet transforms. |
Adv. Comput. Math. |
2008 |
DBLP DOI BibTeX RDF |
Mathematics Subject Classifications (2000) 65T60, 65G50 |
16 | Amin Farjudian, Michal Konecný |
Time Complexity and Convergence Analysis of Domain Theoretic Picard Method. |
WoLLIC |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Victor V. Kuliamin |
Test Construction for Mathematical Functions. |
TestCom/FATES |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Sadaf R. Alam, Richard F. Barrett, M. Bast, Mark R. Fahey, Jeffery A. Kuehn, Collin McCurdy, James H. Rogers, Philip C. Roth, Ramanan Sankaran, Jeffrey S. Vetter, Patrick H. Worley, Weikuan Yu |
Early evaluation of IBM BlueGene/P. |
SC |
2008 |
DBLP DOI BibTeX RDF |
|
16 | Ling Zhuo, Gerald R. Morris, Viktor K. Prasanna |
High-Performance Reduction Circuits Using Deeply Pipelined Operators on FPGAs. |
IEEE Trans. Parallel Distributed Syst. |
2007 |
DBLP DOI BibTeX RDF |
G.1.0.g Parallel algorithms, C.3.e Reconfigurable hardware |
16 | Premysl Sucha, Zdenek Hanzálek, Antonin Hermanek, Jan Schier |
Scheduling of Iterative Algorithms with Matrix Operations for Efficient FPGA Design - Implementation of Finite Interval Constant Modulus Algorithm. |
J. VLSI Signal Process. |
2007 |
DBLP DOI BibTeX RDF |
imperfectly nested loops, FPGA, high-level synthesis, implementation, integer linear programming, VLSI design, iterative algorithms, cyclic scheduling, blind equalization |
16 | David M. Russinoff |
A Mathematical Approach to RTL Verification. |
CAV |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Thomas Y. Yeh, Petros Faloutsos, Milos D. Ercegovac, Sanjay J. Patel, Glenn Reinman |
The Art of Deception: Adaptive Precision Reduction for Area Efficient Physics Acceleration. |
MICRO |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Andries P. Engelbrecht, Gary Pampara |
Binary differential evolution strategies. |
IEEE Congress on Evolutionary Computation |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Philippe Langlois, Nicolas Louvet |
How to Ensure a Faithful Polynomial Evaluation with the Compensated Horner Algorithm. |
IEEE Symposium on Computer Arithmetic |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Haohuan Fu, Oskar Mencer, Wayne Luk |
Optimizing Logarithmic Arithmetic on FPGAs. |
FCCM |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Matthieu Martel |
Semantics-Based Transformation of Arithmetic Expressions. |
SAS |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Koustav Bhattacharya, Soontae Kim, Nagarajan Ranganathan |
Improving the reliability of on-chip L2 cache using redundancy. |
ICCD |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Feng Tang, Hai Tao |
Fast Multi-scale Template Matching Using Binary Features. |
WACV |
2007 |
DBLP DOI BibTeX RDF |
|
16 | Hazem M. Abbas, Mohamed M. Bayoumi |
Volterra-system identification using adaptive real-coded genetic algorithm. |
IEEE Trans. Syst. Man Cybern. Part A |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Xiao Li 0006, Jonathan Malkin, Jeff A. Bilmes |
A high-speed, low-resource ASR back-end based on custom arithmetic. |
IEEE Trans. Speech Audio Process. |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Milan Tichý, Andy Nisbet, David Gregg |
GSFAP adaptive filtering using log arithmetic for resource-constrained embedded systems. |
FPGA |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Amir Kaivani, Ali Zakerolhosseini, Saeid Gorgin 0001, Mahmood Fazlali |
Reversible Implementation of Densely-Packed-Decimal Converter to and from Binary-Coded-Decimal Format Using in IEEE-754R. |
ICIT |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Craig A. Stewart, Matthias S. Müller, Malinda Lingwall |
Progress Towards Petascale Applications in Biology: Status in 2006. |
Euro-Par Workshops |
2006 |
DBLP DOI BibTeX RDF |
grand challenge problem, peak theoretical capacity, petabytes, petaflops, high performance computing, Computational biology, life sciences, petascale computing |
16 | Rama Sangireddy |
Instruction Format Based Selective Execution for Register Port Complexity Reduction in High-Performance Processors. |
ITNG |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Brian F. Veale, John K. Antonio, Monte P. Tull, Sean A. Jones |
Selection of instruction set extensions for an FPGA embedded processor core. |
IPDPS |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Gerhard Lienhart, Guillermo Marcus Martinez, Andreas Kugel, Reinhard Männer |
Rapid Design of Special-Purpose Pipeline Processors with FPGAs and its Application to Computational Fluid Dynamics. |
FCCM |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Gerald R. Morris, Viktor K. Prasanna, Richard D. Anderson |
A Hybrid Approach for Mapping Conjugate Gradient onto an FPGA-Augmented Reconfigurable Supercomputer. |
FCCM |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Eric Goubault, Sylvie Putot |
Static Analysis of Numerical Algorithms. |
SAS |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Ling Zhuo, Viktor K. Prasanna |
Scalable Hybrid Designs for Linear Algebra on Reconfigurable Computing Systems. |
ICPADS (1) |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Jack J. Dongarra |
The Impact of Multicore on Math Software and Exploiting Single Precision Computing to Obtain Double Precision Results. |
ICPP |
2006 |
DBLP DOI BibTeX RDF |
|
16 | Mark Giesbrecht, George Labahn, Wen-shin Lee |
Symbolic-numeric sparse interpolation of multivariate polynomials. |
ISSAC |
2006 |
DBLP DOI BibTeX RDF |
symbolic-numeric computing, multivariate interpolation |
16 | Robert D. Kenney, Michael J. Schulte |
High-Speed Multioperand Decimal Adders. |
IEEE Trans. Computers |
2005 |
DBLP DOI BibTeX RDF |
multioperand adders, Computer arithmetic, hardware designs, decimal arithmetic |
16 | Gregorio Bernabé, José M. García 0001, José González 0002 |
Reducing 3D Fast Wavelet Transform Execution Time Using Blocking and the Streaming SIMD Extensions. |
J. VLSI Signal Process. |
2005 |
DBLP DOI BibTeX RDF |
Streaming SIMD extensions, reuse, vectorization, video compression, blocking, 3D wavelet transform |
16 | Arnaud Venet |
Towards the Integration of Symbolic and Numerical Static Analysis. |
VSTTE |
2005 |
DBLP DOI BibTeX RDF |
|
16 | Changpeng Fang, Steve Carr 0001, Soner Önder, Zhenlin Wang |
Instruction Based Memory Distance Analysis and its Application. |
IEEE PACT |
2005 |
DBLP DOI BibTeX RDF |
|
16 | Nevin Kirman, Meyrem Kirman, Mainak Chaudhuri, José F. Martínez |
Checkpointed Early Load Retirement. |
HPCA |
2005 |
DBLP DOI BibTeX RDF |
|
16 | Cristiana Bolchini, Paolo Ferrandi, Pier Luca Lanzi, Fabio Salice |
Toward an FPGA implementation of XCS. |
Congress on Evolutionary Computation |
2005 |
DBLP DOI BibTeX RDF |
|
16 | Sylvie Boldo, Jean-Michel Muller |
Some Functions Computable with a Fused-Mac. |
IEEE Symposium on Computer Arithmetic |
2005 |
DBLP DOI BibTeX RDF |
|
16 | Peter W. Markstein |
A Fast-Start Method for Computing the Inverse Tangent. |
IEEE Symposium on Computer Arithmetic |
2005 |
DBLP DOI BibTeX RDF |
|
16 | Joan L. Mitchell, Arianne T. Hinds |
Enhanced Parallel Processing in Wide Registers. |
IPDPS |
2005 |
DBLP DOI BibTeX RDF |
|
16 | Robert McIlhenny, Milos D. Ercegovac |
RAVIOLI - Reconfigurable Arithmetic Variable-Precision Implementations of On-Line Instructions. |
FCCM |
2005 |
DBLP DOI BibTeX RDF |
|
16 | Gerald R. Morris, Ling Zhuo, Viktor K. Prasanna |
High-Performance FPGA-Based General Reduction Methods. |
FCCM |
2005 |
DBLP DOI BibTeX RDF |
|
16 | Naohito Nakasato, Tsuyoshi Hamada |
Astrophysical Hydrodynamics Simulations on a Reconfigurable System. |
FCCM |
2005 |
DBLP DOI BibTeX RDF |
|
16 | Richard C. Murphy, Arun Rodrigues, Peter M. Kogge, Keith D. Underwood |
The implications of working set analysis on supercomputing memory hierarchy design. |
ICS |
2005 |
DBLP DOI BibTeX RDF |
performance modeling, supercomputing, working set |
16 | Viktor K. Prasanna |
High Performance Computing using Reconfigurable Hardware. |
ENC |
2005 |
DBLP DOI BibTeX RDF |
|
16 | Nilo Stolte |
Arbitrary 3D Resolution Discrete Ray Tracing of Implicit Surfaces. |
DGCI |
2005 |
DBLP DOI BibTeX RDF |
|
16 | Ling Zhuo, Viktor K. Prasanna |
High Performance Linear Algebra Operations on Reconfigurable Systems. |
SC |
2005 |
DBLP DOI BibTeX RDF |
|
16 | David M. Harris |
An Exponentiation Unit for an OpenGL Lighting Engine. |
IEEE Trans. Computers |
2004 |
DBLP DOI BibTeX RDF |
OpenGL hardware acceleration, table complexity, bipartite tables, Powering, computer arithmetic, table lookups, exponentiation |
16 | Christopher C. Doss, Robert L. Riley Jr. |
FPGA-based implementation of single-precision exponential unit. |
FPGA |
2004 |
DBLP DOI BibTeX RDF |
|
16 | Alex Panato, Sandro V. Silva, Flávio Rech Wagner, Marcelo O. Johann, Ricardo Reis 0001, Sergio Bampi |
Design of Very Deep Pipelined Multipliers for FPGAs. |
DATE |
2004 |
DBLP DOI BibTeX RDF |
|
16 | Nobuhiro Doi, Takashi Horiyama, Masaki Nakanishi, Shinji Kimura |
Minimization of fractional wordlength on fixed-point conversion for high-level synthesis. |
ASP-DAC |
2004 |
DBLP DOI BibTeX RDF |
|
16 | Lutz Kettner, Kurt Mehlhorn, Sylvain Pion, Stefan Schirra, Chee-Keng Yap |
Classroom Examples of Robustness Problems in Geometric Computations. |
ESA |
2004 |
DBLP DOI BibTeX RDF |
|
16 | Oleg Kiselyov, Walid Taha |
Relating FFTW and Split-Radix. |
ICESS |
2004 |
DBLP DOI BibTeX RDF |
|
16 | Sharat Chandran, Ananth K. Potty, Milind A. Sohoni |
Fast image transforms using diophantine methods. |
IEEE Trans. Image Process. |
2003 |
DBLP DOI BibTeX RDF |
|
16 | Antonin Hermanek, Zdenek Pohl, Jiri Kadlec |
FPGA Implementation of the Adpaptive Lattice Filter. |
FPL |
2003 |
DBLP DOI BibTeX RDF |
|
16 | Mark G. Arnold |
Iterative Methods for Logarithmic Subtraction. |
ASAP |
2003 |
DBLP DOI BibTeX RDF |
|
16 | Ester M. Garzón, Inmaculada García, José-Jesús Fernández |
An Approach to Teaching Computer Arithmetic. |
VECPAR |
2002 |
DBLP DOI BibTeX RDF |
|
16 | Bradley D. Brown, Howard C. Card |
Stochastic Neural Computation II: Soft Competitive Learning. |
IEEE Trans. Computers |
2001 |
DBLP DOI BibTeX RDF |
stochastic arithmetic, competitive learning, Pulsed neural networks |
16 | Mike Estlick, Miriam Leeser, James Theiler, John J. Szymanski |
Algorithmic transformations in the implementation of K- means clustering on reconfigurable hardware. |
FPGA |
2001 |
DBLP DOI BibTeX RDF |
|
16 | Aleksandar Nanevski, Guy E. Blelloch, Robert Harper 0001 |
Automatic Generation of Staged Geometric Predicates. |
ICFP |
2001 |
DBLP DOI BibTeX RDF |
|
16 | Bernard Goossens |
Typing the ISA to Cluster the Processor. |
PaCT |
2001 |
DBLP DOI BibTeX RDF |
|
16 | Michael J. Schulte, Earl E. Swartzlander Jr. |
A Family of Variable-Precision Interval Arithmetic Processors. |
IEEE Trans. Computers |
2000 |
DBLP DOI BibTeX RDF |
variable-precision arithmetic, computer arithmetic, accuracy, Processors, interval arithmetic, hardware designs, roundoff error |
16 | Kevin Scott, Jack W. Davidson |
Exploring the Limits of Sub-Word Level Parallelism. |
IEEE PACT |
2000 |
DBLP DOI BibTeX RDF |
|
16 | Roberto Maro, Yu Bai 0001, R. Iris Bahar |
Dynamically Reconfiguring Processor Resources to Reduce Power Consumption in High-Performance Processors. |
PACS |
2000 |
DBLP DOI BibTeX RDF |
low-power, high-performance, architecture-level |
16 | Ramon Canal, Joan-Manuel Parcerisa, Antonio González 0001 |
A Cost-Effective Clustered Architecture. |
IEEE PACT |
1999 |
DBLP DOI BibTeX RDF |
code partitioning, dynamic steering, inter-cluster communication, cluster, microarchitecture, clustered architecture, workload balance |
16 | Naila Rahman, Rajeev Raman |
Analysing Cache Effects in Distribution Sorting. |
WAE |
1999 |
DBLP DOI BibTeX RDF |
|
16 | Michael R. Piacentino, Gooitzen S. van der Wal, Michael W. Hansen |
Reconfigurable Elements for a Video Pipeline Processor. |
FCCM |
1999 |
DBLP DOI BibTeX RDF |
|
16 | Kentaro Shimada, Tatsuya Kawashimo, Makoto Hanawa, Ryo Yamagata, Eiki Kamada |
A Superscalar RISC Processor with 160 FPRs for Large Scale Scientific Processing. |
ICCD |
1999 |
DBLP DOI BibTeX RDF |
scientific processing, slide-windowed registers, large number of FPRs, SR8000, supercomputer, software prefetch |
16 | David López 0001, Josep Llosa, Eduard Ayguadé, Mateo Valero |
Impact on Performance of Fused Multiply-Add Units in Aggressive VLIW Architectures. |
ICPP |
1999 |
DBLP DOI BibTeX RDF |
ILP limits, multiply-add fused, performance/cost evaluation, software pipelining, VLIW architectures, numerical code |
16 | Ming-Yang Kao, Jie Wang 0002 |
Efficient Minimization of Numerical Summation Errors. |
ICALP |
1998 |
DBLP DOI BibTeX RDF |
|
16 | Daniel Citron, Dror G. Feitelson, Larry Rudolph |
Accelerating Multi-Media Processing by Implementing Memoing in Multiplication and Division Units. |
ASPLOS |
1998 |
DBLP DOI BibTeX RDF |
|
16 | Alan H. Karp, Peter W. Markstein |
High-Precision Division and Square Root. |
ACM Trans. Math. Softw. |
1997 |
DBLP DOI BibTeX RDF |
quad precision, division, square root |
16 | Alexander H. Delaney, Yoram Bresler |
A fast and accurate Fourier algorithm for iterative parallel-beam tomography. |
IEEE Trans. Image Process. |
1996 |
DBLP DOI BibTeX RDF |
|
16 | Ralf Salomon |
The Influence of Different Coding Schemes on the Computational Complexity of Genetic Algorithms in Function Optimization. |
PPSN |
1996 |
DBLP DOI BibTeX RDF |
|
16 | Bernard Goossens, Duc Thang Vu |
Multithreading to Improve Cycle Width and CPI in Superpipelined Superscalar Processors. |
ISPAN |
1996 |
DBLP DOI BibTeX RDF |
Superpipelined Processors, Architecture, Instruction Level Parallelism, Superscalar Processors, Multithreaded Processors |
16 | Jean-Michel Muller, Arnaud Tisserand, Alexandre Scherbyna |
Semi-Logarithmic Number Systems. |
IEEE Symposium on Computer Arithmetic |
1995 |
DBLP DOI BibTeX RDF |
|
16 | Daniel W. Lozier |
An underflow-induced graphics failure solved by SLI arithmetic. |
IEEE Symposium on Computer Arithmetic |
1993 |
DBLP DOI BibTeX RDF |
|
16 | Todd C. Marek |
A new simulator workbench for comparing SIMD processing element architectures. |
ACM Southeast Regional Conference |
1992 |
DBLP DOI BibTeX RDF |
|
16 | Frank Klingspor, Dietmar Luhofer, Thomas Rottke |
Parallel Searching for 3D-Objects. |
CONPAR |
1992 |
DBLP DOI BibTeX RDF |
geometric searching, parallel topological B*-Trees, polyhedra intersections, minimal distance, data distribution |
16 | Michael S. Karasick, Derek Lieber, Lee R. Nackman |
Efficient Delaunay Triangulation using Rational Arithmetic. |
ACM Trans. Graph. |
1991 |
DBLP DOI BibTeX RDF |
|
16 | Mark R. Thistle, Burton J. Smith |
A processor architecture for horizon. |
SC |
1988 |
DBLP DOI BibTeX RDF |
|
16 | James T. Kuehn, Burton J. Smith |
The horizon supercomputing system: architecture and software. |
SC |
1988 |
DBLP DOI BibTeX RDF |
|
16 | Max Goldstein |
Significance arithmetic on a digital computer. |
Commun. ACM |
1963 |
DBLP DOI BibTeX RDF |
|
15 | Ping-Chun Wu, Jian-Wei Su, Li-Yang Hong, Jin-Sheng Ren, Chih-Han Chien, Ho-Yu Chen, Chao-En Ke, Hsu-Ming Hsiao, Sih-Han Li, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang |
A Floating-Point 6T SRAM In-Memory-Compute Macro Using Hybrid-Domain Structure for Advanced AI Edge Chips. |
IEEE J. Solid State Circuits |
2024 |
DBLP DOI BibTeX RDF |
|
15 | Haoyuan Chen, Liang Liu 0006, Jingwen Meng, Wanying Lu |
AFC: An adaptive lossless floating-point compression algorithm in time series database. |
Inf. Sci. |
2024 |
DBLP DOI BibTeX RDF |
|
15 | Seunghwan Lee, Dong-Joon Shin |
Overflow-Detectable Floating-Point Fully Homomorphic Encryption. |
IEEE Access |
2024 |
DBLP DOI BibTeX RDF |
|
15 | Zuoyan Zhang, Jinchen Xu, Jiangwei Hao, Yang Qu, Haotian He, Bei Zhou |
Hierarchical search algorithm for error detection in floating-point arithmetic expressions. |
J. Supercomput. |
2024 |
DBLP DOI BibTeX RDF |
|
15 | Marcelo Tosini, Martín Vázquez 0001, Lucas Leiva |
Analysis and efficient implementation of IEEE-754 decimal floating point adders/subtractors in FPGAs for DPD and BID encoding. |
J. Supercomput. |
2024 |
DBLP DOI BibTeX RDF |
|
15 | Hanae Nozaki, Kazukuni Kobara |
Power Analysis of Floating-Point Operations for Leakage Resistance Evaluation of Neural Network Model Parameters. |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. |
2024 |
DBLP DOI BibTeX RDF |
|
15 | Zijing Niu, Tingting Zhang, Honglan Jiang, Bruce F. Cockburn, Leibo Liu, Jie Han 0001 |
Hardware-Efficient Logarithmic Floating-Point Multipliers for Error-Tolerant Applications. |
IEEE Trans. Circuits Syst. I Regul. Pap. |
2024 |
DBLP DOI BibTeX RDF |
|
15 | Vikas Shivakumar, Chetan Vudadha |
Design of Resource Efficient Binary and Floating Point Comparator Using FPGA Primitive Instantiation. |
J. Circuits Syst. Comput. |
2024 |
DBLP DOI BibTeX RDF |
|
15 | Hongbing Tan, Libo Huang, Zhong Zheng, Hui Guo 0004, Qianming Yang, Li Shen 0007, Gang Chen 0023, Liquan Xiao, Nong Xiao |
A Low-Cost Floating-Point Dot-Product-Dual-Accumulate Architecture for HPC-Enabled AI. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2024 |
DBLP DOI BibTeX RDF |
|
15 | Y. Zuo, Ning Ning 0002, G. C. Qiao, J. H. Wu, Junhan Bao, X. Y. Zhang, J. Bai, F. H. Wu, Yang Liu 0062, Qi Yu 0002, S. G. Hu |
Floating-Point Approximation Enabling Cost-Effective and High-Precision Digital Implementation of FitzHugh-Nagumo Neural Networks. |
IEEE Trans. Biomed. Circuits Syst. |
2024 |
DBLP DOI BibTeX RDF |
|
15 | Hadis Ahmadpour Kermani, Azadeh Alsadat Emrani Zarandi |
An efficient multi-format low-precision floating-point multiplier. |
Sustain. Comput. Informatics Syst. |
2024 |
DBLP DOI BibTeX RDF |
|
15 | Yeachan Park, Geonho Hwang, Wonyeol Lee 0001, Sejun Park |
Expressive Power of ReLU and Step Networks under Floating-Point Operations. |
CoRR |
2024 |
DBLP DOI BibTeX RDF |
|
15 | Haobo Liu, Zhengyang Qian, Wei Wu, Hongwei Ren, Zhiwei Liu, Leibin Ni |
AFPR-CIM: An Analog-Domain Floating-Point RRAM-based Compute-In-Memory Architecture with Dynamic Range Adaptive FP-ADC. |
CoRR |
2024 |
DBLP DOI BibTeX RDF |
|
15 | Gerardo Bandera, Javier Salamero, Miquel Moretó, Julio Villalba |
Floating Point HUB Adder for RISC-V Sargantana Processor. |
CoRR |
2024 |
DBLP DOI BibTeX RDF |
|
15 | Lucas M. Dutton, Christopher Kumar Anand, Robert F. Enenkel, Silvia Melitta Müller |
Inexactness and Correction of Floating-Point Reciprocal, Division and Square Root. |
CoRR |
2024 |
DBLP DOI BibTeX RDF |
|
15 | Taylor Allred, Xinyi Li, Ashton Wiersdorf, Ben Greenman, Ganesh Gopalakrishnan |
FlowFPX: Nimble Tools for Debugging Floating-Point Exceptions. |
CoRR |
2024 |
DBLP DOI BibTeX RDF |
|
15 | Xinyu Chen, Jiannan Tian, Ian Beaver, Cynthia Freeman, Yan Yan, Jianguo Wang, Dingwen Tao |
FCBench: Cross-Domain Benchmarking of Lossless Compression for Floating-point Data. |
Proc. VLDB Endow. |
2024 |
DBLP BibTeX RDF |
|
15 | Federico Brogi, Simone Bnà, G. Boga, Giorgio Amati, Tomaso Esposti Ongaro, Matteo Cerminara |
On floating point precision in computational fluid dynamics using OpenFOAM. |
Future Gener. Comput. Syst. |
2024 |
DBLP DOI BibTeX RDF |
|
15 | Cenk Gündogan, Thomas C. Schmidt, Dave Oran, Matthias Wählisch |
Alternative Delta Time Encoding for Content-Centric Networking (CCNx) Using Compact Floating-Point Arithmetic. |
RFC |
2024 |
DBLP DOI BibTeX RDF |
|
15 | Keng-Yu Chen, Jiun-Peng Chen |
Masking Floating-Point Number Multiplication and Addition of Falcon First- and Higher-order Implementations and Evaluations. |
IACR Trans. Cryptogr. Hardw. Embed. Syst. |
2024 |
DBLP DOI BibTeX RDF |
|
15 | N. S. Sathyavathi, P. Augusta Sophy Beulet |
Deca-Rounding Methods for Floating Point Numbers: Error Analysis & Hardware Implementation. |
J. Signal Process. Syst. |
2024 |
DBLP DOI BibTeX RDF |
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