Search results for "Multicore"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
13	Steven P. Levitan, Donald M. Chiarulli	Massively parallel processing: it's déjà vu all over again.	DAC	2009	DBLP DOI BibTeX RDF	parallel architectures and algorithms, multicore, massively parallel processing
13	Michael R. Marty, Mark D. Hill	Virtual Hierarchies.	IEEE Micro	2008	DBLP DOI BibTeX RDF	virtual hierarchies, virtual machines, partitioning, chip multiprocessors (CMPs), multicore, cache coherence, server consolidation, space sharing
13	Aaron Block, James H. Anderson, UmaMaheswari C. Devi	Task reweighting under global scheduling on multiprocessors.	Real Time Syst.	2008	DBLP DOI BibTeX RDF	Scheduling, Adaptive, Multiprocessor, Multicore, Reweighting
13	Divya Gulati, Changkyu Kim, Simha Sethumadhavan, Stephen W. Keckler, Doug Burger	Multitasking workload scheduling on flexible-core chip multiprocessors.	PACT	2008	DBLP DOI BibTeX RDF	flexible cores, multitask scheduling, multicore architectures
13	Xiaohong Qiu, Geoffrey C. Fox, Seung-Hee Bae, Jong Youl Choi, Jaliya Ekanayake, Yang Ruan	SALSA Project: Parallel Data Mining of GIS, Web, Medical, Physics, Chemical, and Biology Data.	eScience	2008	DBLP DOI BibTeX RDF	Data Mining, Parallel, Benchmark, Application, Multicore
13	Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi, Ken Mai	A complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs.	FPGA	2008	DBLP DOI BibTeX RDF	simulator, FPGA, prototype, multiprocessor, multicore, emulator
13	Easwaran Raman, Neil Vachharajani, Ram Rangan, David I. August	Spice: speculative parallel iteration chunk execution.	CGO	2008	DBLP DOI BibTeX RDF	automatic paralleization, thread level parallelism, multicore architectures, speculative parallelization, value speculation
13	Sadaf R. Alam, Pratul K. Agarwal, Scott S. Hampton, Hong Ong	Experimental Evaluation of Molecular Dynamics Simulations on Multi-core Systems.	HiPC	2008	DBLP DOI BibTeX RDF	Performance, Multicore, HPC, Molecular Dynamics Simulation
13	Timothy D. R. Hartley, Ümit V. Çatalyürek, Antonio Ruiz, Francisco D. Igual, Rafael Mayo 0002, Manuel Ujaldon	Biomedical image analysis on a cooperative cluster of GPUs and multicores.	ICS	2008	DBLP DOI BibTeX RDF	biomedical image analysis, cuda programming, multicore cpus, multiprocessors, high performance computing, graphics processors
13	Oreste Villa, Gianluca Palermo, Cristina Silvano	Efficiency and scalability of barrier synchronization on NoC based many-core architectures.	CASES	2008	DBLP DOI BibTeX RDF	scalability, synchronization, efficiency, Multicore, NoC, barrier, Manycore
13	Shantanu Gupta, Shuguang Feng, Amin Ansari, Jason A. Blome, Scott A. Mahlke	StageNetSlice: a reconfigurable microarchitecture building block for resilient CMP systems.	CASES	2008	DBLP DOI BibTeX RDF	reliability, architecture, pipeline, multicore
13	Valentina Salapura	Scaling up next generation supercomputers.	Conf. Computing Frontiers	2008	DBLP DOI BibTeX RDF	scalability of systems, chip multiprocessors (cmp), multicore, coherence protocols, blue gene
13	Martin Burtscher, Milind Kulkarni 0001, Dimitrios Prountzos, Keshav Pingali	On the Scalability of an Automatically Parallelized Irregular Application.	LCPC	2008	DBLP DOI BibTeX RDF	sparse graph algorithm, amorphous data-parallelism, optimistic execution, parallel programming, multicore processors, mesh refinement
13	Antonia Zhai, Shengyue Wang, Pen-Chung Yew, Guojin He	Compiler optimizations for parallelizing general-purpose applications under thread-level speculation.	PPoPP	2008	DBLP DOI BibTeX RDF	compiler optimizations, parallelizing compiler, thread-level speculation, multicore systems
13	David Tarjan, Michael Boyer, Kevin Skadron	Federation: repurposing scalar cores for out-of-order instruction issue.	DAC	2008	DBLP DOI BibTeX RDF	CMP, multicore, federation, out-of-order
13	Antonio Pullini, Federico Angiolini, Srinivasan Murali, David Atienza, Giovanni De Micheli, Luca Benini	Bringing NoCs to 65 nm.	IEEE Micro	2007	DBLP DOI BibTeX RDF	network on chip, low-power design, power management, multicore architectures, on-chip interconnection networks, design aids, deep submicron design
13	Mike Butts	Synchronization through Communication in a Massively Parallel Processor Array.	IEEE Micro	2007	DBLP DOI BibTeX RDF	multiple data stream processors, synchronization, parallel architectures, multiprocessors, multicore architectures
13	David Arditti Ilitzky, Jeffrey D. Hoffman, Anthony Chun, Brando Perez Esparza	Architecture of the Scalable Communications Core's Network on Chip.	IEEE Micro	2007	DBLP DOI BibTeX RDF	communication, networking, wireless, parallel architectures, wide-area networks, multicore architectures, on-chip interconnection networks
13	David H. Albonesi	Standing on Solid Ground.	IEEE Micro	2007	DBLP DOI BibTeX RDF	interconnects for multicore chips, special-purpose chips, debugging, human-computer interface, microarchitecture, programmability
13	David H. Albonesi	More Hot Stuff.	IEEE Micro	2007	DBLP DOI BibTeX RDF	power management, environment, ecology, power-aware architectures, multicore chips
13	Yuan Lin 0002, Hyunseok Lee, Mark Woh, Yoav Harel, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner	SODA: A High-Performance DSP Architecture for Software-Defined Radio.	IEEE Micro	2007	DBLP DOI BibTeX RDF	DSP, multicore, SIMD, embedded processor, software-defined radio, SODA
13	Paul Gratz, Changkyu Kim, Karthikeyan Sankaralingam, Heather Hanson, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger	On-Chip Interconnection Networks of the TRIPS Chip.	IEEE Micro	2007	DBLP DOI BibTeX RDF	communication, networking, distributed architectures, packet-switching networks, multicore architectures, on-chip interconnection networks
13	Michael Gschwind, David Erb, Sid Manning, Mark Nutter	An Open Source Environment for Cell Broadband Engine System Software.	Computer	2007	DBLP DOI BibTeX RDF	chip multiprocessors, open source software, multicore processors, Cell Broadband Engine
13	Linda Dailey Paulson	News Briefs.	Computer	2007	DBLP DOI BibTeX RDF	3G cellular technologies, optical communications, femtocells, multicore chips
13	Pierre Michaud, André Seznec, Damien Fetis, Yiannakis Sazeides, Theofanis Constantinou	A study of thread migration in temperature-constrained multicores.	ACM Trans. Archit. Code Optim.	2007	DBLP DOI BibTeX RDF	temperature, Multicore processor, thermal management, thread migration, power density
13	Ahmed Amine Jerraya, Olivier Franza, Markus Levy, Masao Nakaya, Pierre G. Paulin, Ulrich Ramacher, Deepu Talla, Wayne H. Wolf	Roundtable: Envisioning the Future for Multiprocessor SoC.	IEEE Des. Test Comput.	2007	DBLP DOI BibTeX RDF	multiprocessor, SoC, multicore, MPSoC, CPU, chip
13	Michael L. Chu, Scott A. Mahlke	Code and data partitioning for fine-grain parallelism.	LCTES	2007	DBLP DOI BibTeX RDF	code and data partitioning, multicore compilation, fine-grain parallelism
13	M. K. Velamati, Arun Kumar 0004, Naresh Jayam, Ganapathy Senthilkumar, Pallav K. Baruah, Raghunath Sharma, Shakti Kapoor, Ashok Srinivasan	Optimization of Collective Communication in Intra-cell MPI.	HiPC	2007	DBLP DOI BibTeX RDF	heterogeneous multicore processor, MPI, Cell Processor
13	Hongbin Zhu, Kai Bao, Enhua Wu, Xuehui Liu	Stable and efficient miscible liquid-liquid interactions.	VRST	2007	DBLP DOI BibTeX RDF	miscible mixture, subgrid model, stability, control, memory optimization, lattice Boltzmann method, multicore system, free surface
13	Wenlong Li, Eric Q. Li, Aamer Jaleel, Jiulong Shan, Yurong Chen 0001, Qigang Wang, Ravi R. Iyer 0001, Ramesh Illikkal, Yimin Zhang 0002, Dong Liu, Michael Liao, Wei Wei, Jinhua Du	Understanding the Memory Performance of Data-Mining Workloads on Small, Medium, and Large-Scale CMPs Using Hardware-Software Co-simulation.	ISPASS	2007	DBLP DOI BibTeX RDF	DRAM caches, small-scale CMP, medium-scale CMP, large-scale CMP, hardware-software co-simulation, terabyte-level workloads, multithreaded data mining applications, cache design, memory performance, multicore systems, memory system performance
13	Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Zhao Zhang 0010, Howard David	DRAM-Level Prefetching for Fully-Buffered DIMM: Design, Performance and Power Saving.	ISPASS	2007	DBLP DOI BibTeX RDF	channel bandwidth utilization, DRAM-level prefetching, dynamic random access memory, fully-buffered DIMM, dual in-line memory module, redundant bandwidth, memory block, L2 cache block, DRAM power consumption, SPEC2000 program, software cache prefetching, idle memory latency, power saving, multicore processor, memory controller, interconnect structure, DRAM chip
13	Xiaofeng Guo, Jinquan Dai, Long Li, Zhiyuan Lv, Prashant R. Chandra	Latency hiding through multithreading on a network processor.	PPoPP	2007	DBLP DOI BibTeX RDF	compiler, multicore, code motion, latency hiding
13	Michael R. Marty, Mark D. Hill	Virtual hierarchies to support server consolidation.	ISCA	2007	DBLP DOI BibTeX RDF	virtual machines, partitioning, chip multiprocessors (CMPs), multicore, memory hierarchies, cache coherence, server consolidation
13	Carol Stolicny	ITC 2005 panels.	IEEE Des. Test Comput.	2006	DBLP DOI BibTeX RDF	multicore testing, design for testability, soft errors, test compression, International Test Conference, ITC 2005
13	Peter Flake, Simon J. Davidmann, Frank Schirrmeister	System-level exploration tools for MPSoC designs.	DAC	2006	DBLP DOI BibTeX RDF	simulation, software development, debugging, multicore
13	Rakesh Kumar 0002, Dean M. Tullsen, Norman P. Jouppi, Parthasarathy Ranganathan	Heterogeneous Chip Multiprocessors.	Computer	2005	DBLP DOI BibTeX RDF	Multicore microprocessors, Multiprocessors, Chip multiprocessors, CMP, Heterogeneity, System architectures, Power-aware computing
13	W. Neville Holmes	The Turning of the Wheel.	Computer	2005	DBLP DOI BibTeX RDF	virtualization, computing profession, multicore chips
10	Beata Bylina, Jaroslaw Bylina, Lukasz Chabudzinski, Karol Karpowicz, Michal Klisowski, Piotr Oleszczuk, Joanna Potiopa, Przemyslaw Stpiczynski	Fast slope algorithm with the use of vectorization and parallelization for multicore architectures.	GeoInformatica	2024	DBLP DOI BibTeX RDF
10	Chen Li 0033, Ziniu Lin, Lihua Tian, Bin Zhang 0022	A scheduling algorithm based on critical factors for heterogeneous multicore processors.	Concurr. Comput. Pract. Exp.	2024	DBLP DOI BibTeX RDF
10	Seyed Ali Kashani Gharavi, Saeed Safari	Performance Improvement of Processor Through Configurable Approximate Arithmetic Units in Multicore Systems.	IEEE Access	2024	DBLP DOI BibTeX RDF
10	Lei Mo, Xinmei Li, Angeliki Kritikakou, Pengcheng You	Optimal IC Task Mapping to Maximize QoS on Heterogeneous Multicore Systems.	IEEE Trans. Circuits Syst. II Express Briefs	2024	DBLP DOI BibTeX RDF
10	Rafael Rodríguez-Sánchez 0001, Adrián Castelló 0001, Sandra Catalán, Francisco D. Igual, Enrique S. Quintana-Ortí	Experiences with nested parallelism in task-parallel applications using malleable BLAS on multicore processors.	Int. J. High Perform. Comput. Appl.	2024	DBLP DOI BibTeX RDF
10	Lucas Morais, Carlos Álvarez 0001, Daniel Jiménez-González, Juan Miguel De Haro Ruiz, Guido Araujo, Michael Frank 0008, Alfredo Goldman, Xavier Martorell	Enabling HW-Based Task Scheduling in Large Multicore Architectures.	IEEE Trans. Computers	2024	DBLP DOI BibTeX RDF
10	S. Senthilmurugan, K. Gunaseelan	Performance Analysis of Multicore Processor Using FOFO-Based Approximate Compatible ALU.	J. Circuits Syst. Comput.	2024	DBLP DOI BibTeX RDF
10	Yu-Guang Chen, Chieh-Shih Wang, Ing-Chao Lin, Zheng-Wei Chen, Ulf Schlichtmann	Aging-Aware Energy-Efficient Task Deployment of Heterogeneous Multicore Systems.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2024	DBLP DOI BibTeX RDF
10	Marina Shimchenko, Erik Österlund, Tobias Wrigstad	Scheduling Garbage Collection for Energy Efficiency on Asymmetric Multicore Processors.	Art Sci. Eng. Program.	2024	DBLP DOI BibTeX RDF
10	Claudiu Buduleci, Arpad Gellert, Adrian Florea, Remus Brad	Architectural and Technological Approaches for Efficient Energy Management in Multicore Processors.	Comput.	2024	DBLP DOI BibTeX RDF
10	Preeti Godabole, Girish P. Bhole	Utilization and criticality based fault-tolerant scheduling in multicore mixed critical systems.	Int. J. Pervasive Comput. Commun.	2024	DBLP DOI BibTeX RDF
10	Mohammed Alghamdi, Ligang He, Shenyuan Ren, Mohammed Maray	Efficient Parallel Processing of All-Pairs Shortest Paths on Multicore and GPU Systems.	IEEE Trans. Consumer Electron.	2024	DBLP DOI BibTeX RDF
10	Juan Carlos Saez, Fernando Castro, Graziano Fanizzi, Manuel Prieto-Matías	LFOC+: A Fair OS-level Cache-Clustering Policy for Commodity Multicore Systems.	CoRR	2024	DBLP DOI BibTeX RDF
10	Marina Shimchenko, Erik Österlund, Tobias Wrigstad	Scheduling Garbage Collection for Energy Efficiency on Asymmetric Multicore Processors.	CoRR	2024	DBLP DOI BibTeX RDF
10	Antonio Savino, Gautam Gala, Marcello Cinque, Gerhard Fohler	Multicore DRAM Bank-& Row-Conflict Bomb for Timing Attacks in Mixed-Criticality Systems.	CoRR	2024	DBLP DOI BibTeX RDF
10	Juan Carlos Saez, Fernando Castro, Manuel Prieto-Matías	Enabling performance portability of data-parallel OpenMP applications on asymmetric multicore processors.	CoRR	2024	DBLP DOI BibTeX RDF
10	Yokesh Babu Sundaresan, M. A. Saleem Durai	Dynamic machine learning-based heuristic energy optimization approach on multicore architecture.	Comput. Intell.	2024	DBLP DOI BibTeX RDF
10	Jieung Kim, Ronghui Gu, Zhong Shao	SimplMM: A simplified and abstract multicore hardware model for large scale system software formal verification.	J. Syst. Archit.	2024	DBLP DOI BibTeX RDF
10	Javier Rubio, Carlos Bilbao, Juan Carlos Saez, Manuel Prieto-Matías	Exploiting Elasticity via OS-Runtime Cooperation to Improve CPU Utilization in Multicore Systems.	PDP	2024	DBLP DOI BibTeX RDF
10	Tomoki Shimizu, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama	A Non-Work Conserving Algorithm for Dynamic Scheduling of Moldable Gang Tasks on Multicore Systems.	ICEIC	2024	DBLP DOI BibTeX RDF
10	Weiwei Shan, Kaize Zhou, Keran Li, Yuxuan Du, Zhuo Chen, Junyi Qian, Haitao Ge, Jun Yang 0006, Xin Si	14.2 Proactive Voltage Droop Mitigation Using Dual-Proportional-Derivative Control Based on Current and Voltage Prediction Applied to a Multicore Processor in 28nm CMOS.	ISSCC	2024	DBLP DOI BibTeX RDF
10	Avishek Choudhury, Brototi Mondal, Kolin Paul, Biplab K. Sikdar	LLC Block Reuse Predictor Design using Deep Learning to Mitigate Soft Error in Multicore.	VLSID	2024	DBLP DOI BibTeX RDF
10	João Bispo, Sotirios Xydis, Serena Curzel, Luís Miguel Sousa (eds.)	15th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 13th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM 2024, January 18, 2024, Munich, Germany	PARMA-DITAM	2024	DBLP BibTeX RDF
10	Lei Yan, Yueyang Pan, Diyu Zhou, George Candea, Sanidhya Kashyap	Transparent Multicore Scaling of Single-Threaded Network Functions.	EuroSys	2024	DBLP DOI BibTeX RDF
10		Front Matter, Table of Contents, Preface, Conference Organization.	PARMA-DITAM	2024	DBLP DOI BibTeX RDF
10	Marco Procaccini, Amin Sahebi, Marco Barbone, Wayne Luk, Georgi Gaydadjiev, Roberto Giorgi	Accelerating Large-Scale Graph Processing with FPGAs: Lesson Learned and Future Directions.	PARMA-DITAM	2024	DBLP DOI BibTeX RDF
10	Andreas Grapentin, Felix Eberhardt, Tobias Zagorni, Andreas Polze, Michele Gazzetti, Christian Pinto	Zero-Copy, Minimal-Blackout Virtual Machine Migrations Using Disaggregated Shared Memory.	PARMA-DITAM	2024	DBLP DOI BibTeX RDF
10	Gabriele Magnani, Lev Denisov, Daniele Cattaneo 0002, Giovanni Agosta, Stefano Cherubin	Precision Tuning the Rust Memory-Safe Programming Language.	PARMA-DITAM	2024	DBLP DOI BibTeX RDF
10	Oliver Oey, Michael Hübner 0001, Timo Stripf, Jürgen Becker 0001	Embedded Multi-Core Code Generation with Cross-Layer Parallelization.	PARMA-DITAM	2024	DBLP DOI BibTeX RDF
10	Fabrizio Ferrandi, Michele Fiorito, Claudio Barone, Giovanni Gozzi, Serena Curzel	High-Level Synthesis Developments in the Context of European Space Technology Research (Invited Talk).	PARMA-DITAM	2024	DBLP DOI BibTeX RDF
10	Alireza Amirshahi, Giovanni Ansaloni, David Atienza	Accelerator-Driven Data Arrangement to Minimize Transformers Run-Time on Multi-Core Architectures.	PARMA-DITAM	2024	DBLP DOI BibTeX RDF
10	Leonardo Passig Horstmann, José Luis Conradi Hoffmann, Antônio Augusto Fröhlich	Monitoring the performance of multicore embedded systems without disrupting its timing requirements.	Des. Autom. Embed. Syst.	2023	DBLP DOI BibTeX RDF
10	Tim Guertin, Ali R. Hurson	Chapter Four - The multicore architecture.	Adv. Comput.	2023	DBLP DOI BibTeX RDF
10	Muhammad Aditya Sasongko, Milind Chabbi, Paul H. J. Kelly, Didem Unat	Precise event sampling-based data locality tools for AMD multicore architectures.	Concurr. Comput. Pract. Exp.	2023	DBLP DOI BibTeX RDF
10	Adrien Cassagne, Romain Tajan, Olivier Aumage, Camille Leroux, Denis Barthou, Christophe Jégo	A DSEL for high throughput and low latency software-defined radio on multicore CPUs.	Concurr. Comput. Pract. Exp.	2023	DBLP DOI BibTeX RDF
10	Carlos Bilbao, Juan Carlos Saez, Manuel Prieto 0001	Flexible system software scheduling for asymmetric multicore systems with PMCSched: A case for Intel Alder Lake.	Concurr. Comput. Pract. Exp.	2023	DBLP DOI BibTeX RDF
10	Taki Eddine Saidi, Abdelhakim Khouas, Abbes Amira	Implementation of a real-time stereo vision algorithm on a cost-effective heterogeneous multicore platform.	Concurr. Comput. Pract. Exp.	2023	DBLP DOI BibTeX RDF
10	Soma Niloy Ghosh, Vineet Sahula, Lava Bhargava	Enhanced Multicore Performance Using Novel Thread-Aware Cache Coherence and Prefetch-Control Mechanism.	IEEE Embed. Syst. Lett.	2023	DBLP DOI BibTeX RDF
10	Jinwei Zhang, Sheriff Sadiqbatcha, Liang Chen 0025, Cuong Thi, Sachin Sachdeva, Hussam Amrouch, Sheldon X.-D. Tan	Hot-spot aware thermoelectric array based cooling for multicore processors.	Integr.	2023	DBLP DOI BibTeX RDF
10	Esau Taiwo Oladipupo, Oluwakemi Christiana Abikoye, Agbotiname Lucky Imoize, Joseph Bamidele Awotunde, Ting-Yi Chang, Cheng-Chi Lee, Dinh-Thuan Do	An Efficient Authenticated Elliptic Curve Cryptography Scheme for Multicore Wireless Sensor Networks.	IEEE Access	2023	DBLP DOI BibTeX RDF
10	Xiaohong Wen, Guojin Liu, Dejian Li, Yantao Yu, Haisen Zhao, Tiancong Huang	Federated Scheduling Optimization Scheme for Typed Tasks With Power Constraints in Heterogeneous Multicore Processor Architectures.	IEEE Access	2023	DBLP DOI BibTeX RDF
10	José María Aceituno, Ana Guasque, Patricia Balbastre, Francisco Blanes, Luigi Pomante	Optimized Scheduling of Periodic Hard Real-Time Multicore Systems.	IEEE Access	2023	DBLP DOI BibTeX RDF
10	Amjad Ali 0004, Asad Masood Khattak, Shahid Iqbal, Omar Alfandi, Bashir Hayat, Muhammad Hameed Siddiqi, Adil Khan 0001	Overhead Based Cluster Scheduling of Mixed Criticality Systems on Multicore Platform.	IEEE Access	2023	DBLP DOI BibTeX RDF
10	Pablo M. Aviles, Jose A. Belloch, Luis Entrena, Almudena Lindoso	Supervised Triple Macrosynchronized Lockstep (STMLS) Architecture for Multicore Processors.	IEEE Access	2023	DBLP DOI BibTeX RDF
10	Amit Chaurasia, Vijay Shankar Sharma, Chiranji Lal Chowdhary, Shakila Basheer, Thippa Reddy Gadekallu	Non-Gaussian Traffic Modeling for Multicore Architecture Using Wavelet Based Rosenblatt Process.	IEEE Access	2023	DBLP DOI BibTeX RDF
10	Yang Bai, Lixing Chen, Jianhua Li 0001, Jun Wu 0001, Pan Zhou, Zichuan Xu, Jie Xu 0001	Multicore Federated Learning for Mobile-Edge Computing Platforms.	IEEE Internet Things J.	2023	DBLP DOI BibTeX RDF
10	Trio Adiono, Rhesa Muhammad Ramadhan, Nana Sutisna, Infall Syafalni, Rahmat Mulyawan, Chang Hong Lin	Fast and Scalable Multicore YOLOv3-Tiny Accelerator Using Input Stationary Systolic Architecture.	IEEE Trans. Very Large Scale Integr. Syst.	2023	DBLP DOI BibTeX RDF
10	Sankatali Venkateswarlu, Subrat Mishra, Herman Oprins, Bjorn Vermeersch, Moritz Brunion, Jun-Han Han, Mircea R. Stan, Dwaipayan Biswas, Pieter Weckx, Francky Catthoor	Impact of 3-D Integration on Thermal Performance of RISC-V MemPool Multicore SOC.	IEEE Trans. Very Large Scale Integr. Syst.	2023	DBLP DOI BibTeX RDF
10	Agustín Navarro-Torres, Jesús Alastruey-Benedé, Pablo Ibáñez, Víctor Viñals Yúfera	BALANCER: bandwidth allocation and cache partitioning for multicore processors.	J. Supercomput.	2023	DBLP DOI BibTeX RDF
10	Víctor M. García-Molla, Pedro Alonso-Jordá	Parallel border tracking in binary images for multicore computers.	J. Supercomput.	2023	DBLP DOI BibTeX RDF
10	Jinyi Xu, Hao Shi, Yixiang Chen	Efficient tasks scheduling in multicore systems integrated with hardware accelerators.	J. Supercomput.	2023	DBLP DOI BibTeX RDF
10	Christina Giannoula, Athanasios Peppas, Georgios I. Goumas, Nectarios Koziris	High-performance and balanced parallel graph coloring on multicore platforms.	J. Supercomput.	2023	DBLP DOI BibTeX RDF
10	Yaokang Yu, Jitendra Narayan Dash, Jingxian Cui, Dinusha Serandi Gunawardena, Hwa-Yaw Tam	Miniature Two-Axis Accelerometer Based on Multicore Fiber for Pantograph-Catenary System.	IEEE Trans. Instrum. Meas.	2023	DBLP DOI BibTeX RDF
10	Alejandro Fernández-Fraga, Jorge González-Domínguez, Juan Touriño	ParRADMeth: Identification of Differentially Methylated Regions on Multicore Clusters.	IEEE ACM Trans. Comput. Biol. Bioinform.	2023	DBLP DOI BibTeX RDF
10	Abbas Dehghani 0002, Sadegh Fadaei, Bahman Ravaei, Keyvan RahimiZadeh	Deadline-Aware and Energy-Efficient Dynamic Task Mapping and Scheduling for Multicore Systems Based on Wireless Network-on-Chip.	IEEE Trans. Emerg. Top. Comput.	2023	DBLP DOI BibTeX RDF
10	Adnan	Performance evaluation on work-stealing featured parallel programs on asymmetric performance multicore processors.	Array	2023	DBLP DOI BibTeX RDF
10	Ching-Chi Lin, Junjie Shi, Niklas Ueter, Mario Günzel, Jan Reineke 0001, Jian-Jia Chen	Type-Aware Federated Scheduling for Typed DAG Tasks on Heterogeneous Multicore Platforms.	IEEE Trans. Computers	2023	DBLP DOI BibTeX RDF
10	Sangeet Saha, Shounak Chakraborty 0001, Sukarn Agarwal, Rahul Gangopadhyay, Magnus Själander, Klaus D. McDonald-Maier	DELICIOUS: Deadline-Aware Approximate Computing in Cache-Conscious Multicore.	IEEE Trans. Parallel Distributed Syst.	2023	DBLP DOI BibTeX RDF
10	Rafael C. F. Sousa, Márcio Machado Pereira, Yongin Kwon, Taeho Kim, Namsoon Jung, Chang Soo Kim, Michael Frank 0008, Guido Araujo	Tensor slicing and optimization for multicore NPUs.	J. Parallel Distributed Comput.	2023	DBLP DOI BibTeX RDF
10	Pawel Bratek, Lukasz Szustak, Roman Wyrzykowski, Tomasz Olas	Reducing energy consumption using heterogeneous voltage frequency scaling of data-parallel applications for multicore systems.	J. Parallel Distributed Comput.	2023	DBLP DOI BibTeX RDF
10	Avishek Choudhury, Brototi Mondal, Kolin Paul, Biplab K. Sikdar	Energy efficiency in multicore shared cache by fault tolerance using a genetic algorithm based block reuse predictor.	Microprocess. Microsystems	2023	DBLP DOI BibTeX RDF
10	Jinwei Zhang, Sheriff Sadiqbatcha, Sheldon X.-D. Tan	Hot-Trim: Thermal and Reliability Management for Commercial Multicore Processors Considering Workload Dependent Hot Spots.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2023	DBLP DOI BibTeX RDF
10	Xinmei Li, Lei Mo, Angeliki Kritikakou, Olivier Sentieys	Approximation-Aware Task Deployment on Heterogeneous Multicore Platforms With DVFS.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2023	DBLP DOI BibTeX RDF