|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 10002 occurrences of 3019 keywords
|
|
|
Results
Found 11893 publication records. Showing 11893 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
21 | Lars-Ola Damm, Lars Lundberg |
Identification of test process improvements by combining fault trigger classification and faults-slip-through measurement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISESE ![In: 2005 International Symposium on Empirical Software Engineering (ISESE 2005), 17-18 November 2005, Noosa Heads, Australia, pp. 152-161, 2005, IEEE Computer Society, 0-7803-9507-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Manan Syal, Rajat Arora, Michael S. Hsiao |
Extended Forward Implications and Dual Recurrence Relations to Identify Sequentially Untestable Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 23rd International Conference on Computer Design (ICCD 2005), 2-5 October 2005, San Jose, CA, USA, pp. 453-460, 2005, IEEE Computer Society, 0-7695-2451-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Zachary D. Patitz, Nohpill Park, Minsu Choi, Fred J. Meyer |
QCA-Based Majority Gate Design under Radius of Effect-Induced Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 3-5 October 2005, Monterey, CA, USA, pp. 217-228, 2005, IEEE Computer Society, 0-7695-2464-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Ching-Wen Chen, Chang-Jung Ku, Chih-Hung Chang |
Design Schemes and Performance Analysis of Dynamic Rerouting Interconnection Networks for Tolerating Faults and Preventing Collisions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPA ![In: Parallel and Distributed Processing and Applications, Third International Symposium, ISPA 2005, Nanjing, China, November 2-5, 2005, Proceedings, pp. 168-179, 2005, Springer, 3-540-29769-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
destination tag routing, fault tolerance, performance, Parallel computing, multistage interconnection network (MIN), collision, dynamic rerouting |
21 | Mohamed Azimane, Ananta K. Majhi, Guido Gronthoud, Maurice Lousberg |
A New Algorithm for Dynamic Faults Detection in RAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 23rd IEEE VLSI Test Symposium (VTS 2005), 1-5 May 2005, Palm Springs, CA, USA, pp. 177-182, 2005, IEEE Computer Society, 0-7695-2314-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Nicola Santoro, Peter Widmayer |
Majority and Unanimity in Synchronous Networks with Ubiquitous Dynamic Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIROCCO ![In: Structural Information and Communication Complexity, 12th International Colloquium, SIROCCO 2005, Mont Saint-Michel, France, May 24-26, 2005, Proceedings, pp. 262-276, 2005, Springer, 3-540-26052-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
21 | Said Hamdioui, Zaid Al-Ars, Ad J. van de Goor, Mike Rodgers |
Linked faults in random access memories: concept, fault models, test algorithms, and industrial results. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(5), pp. 737-757, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Saravanan Padmanaban, Spyros Tragoudas |
Using BDDs and ZBDDs for Efficient Identification of Testable Path Delay Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 50-55, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Yuichi Sato, Hiroshi Takahashi, Yoshinobu Higami, Yuzo Takamatsu |
Failure Analysis of Open Faults by Using Detecting/Un-detecting Information on Tests. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 13th Asian Test Symposium (ATS 2004), 15-17 November 2004, Kenting, Taiwan, pp. 222-227, 2004, IEEE Computer Society, 0-7695-2235-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Said Hamdioui, John Delos Reyes, Zaid Al-Ars |
Evaluation of Intra-Word Faults in Word-Oriented RAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 13th Asian Test Symposium (ATS 2004), 15-17 November 2004, Kenting, Taiwan, pp. 283-288, 2004, IEEE Computer Society, 0-7695-2235-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Irith Pomeranz, Sudhakar M. Reddy |
Properties of Maximally Dominating Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 13th Asian Test Symposium (ATS 2004), 15-17 November 2004, Kenting, Taiwan, pp. 106-111, 2004, IEEE Computer Society, 0-7695-2235-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Kwang-Jin Lee, Cheol Kim, Suki Kim, Uk-Rae Cho, Hyun-Geun Byun |
Modeling and Testing of Faults in TCAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AsiaSim ![In: Systems Modeling and Simulation: Theory and Applications, Third Asian Simulation Conference, AsiaSim 2004, Jeju Island, Korea, October 4-6, 2004, Revised Selected Papers, pp. 521-528, 2004, Springer, 3-540-24477-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Irith Pomeranz, Sudhakar M. Reddy |
On Undetectable Faults in Partial Scan Circuits Using Transparent-Scan. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 11-13 October 2004, San Jose, CA, USA, Proceedings, pp. 82-84, 2004, IEEE Computer Society, 0-7695-2231-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Patrick Girard 0001, Olivier Héron, Serge Pravossoudovitch, Michel Renovell |
BIST of Delay Faults in the Logic Architecture of Symmetrical FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 12-14 July 2004, Funchal, Madeira Island, Portugal, pp. 187-192, 2004, IEEE Computer Society, 0-7695-2180-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Cecilia Metra, T. M. Mak, Martin Omaña 0001 |
Risks Associated with Faults within Test Pattern Compactors and Their Implications on Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2004 International Test Conference (ITC 2004), October 26-28, 2004, Charlotte, NC, USA, pp. 1223-1231, 2004, IEEE Computer Society, 0-7803-8581-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Yuen-Tak Yu, Man Fai Lau |
Comparing Several Coverage Criteria for Detecting Faults in Logical Decisions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
QSIC ![In: 4th International Conference on Quality Software (QSIC 2004), 8-10 September 2004, Braunschweig, Germany, pp. 14-21, 2004, IEEE Computer Society, 0-7695-2207-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Condition coverage, decision coverage, logical decisions, MUMCUT, coverage criteria, MC/DC |
21 | Michael L. Harrison, James A. Foster |
Co-evolving Faults to Improve the Fault Tolerance of Sorting Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EuroGP ![In: Genetic Programming, 7th European Conference, EuroGP2004, Coimbra, Portugal, April 5-7, 2004, Proceedings, pp. 57-66, 2004, Springer, 3-540-21346-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
21 | Jonathan Bradford, Hartmut Delong, Ilia Polian, Bernd Becker 0001 |
Simulating Realistic Bridging and Crosstalk Faults in an Industrial Setting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 19(4), pp. 387-395, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
fault simulation, crosstalk, industrial experiences, defect-based testing |
21 | Mehdi Baradaran Tahoori |
Application-dependent testing of FPGAs for bridging faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2003, Monterey, CA, USA, February 23-25, 2003, pp. 248, 2003, ACM, 1-58113-651-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
21 | Satoshi Ohtake, Kouhei Ohtani, Hideo Fujiwara |
A Method of Test Generation fo Path Delay Faults Using Stuck-at Fault Test Generation Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 10310-10315, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
21 | Brian Randell |
On Failures and Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FME ![In: FME 2003: Formal Methods, International Symposium of Formal Methods Europe, Pisa, Italy, September 8-14, 2003, Proceedings, pp. 18-39, 2003, Springer, 3-540-40828-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
fault assumptions, Dependability, formal concepts |
21 | Mohammad Gh. Mohammad, Kewal K. Saluja |
Stress Test for Disturb Faults in Non-Volatile Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China, pp. 384-389, 2003, IEEE Computer Society, 0-7695-1951-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
21 | Carina Andersson, Thomas Thelin, Per Runeson, Nina Dzamashvili |
An Experimental Evaluation of Inspection and Testing for Detection of Design Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISESE ![In: 2003 International Symposium on Empirical Software Engineering (ISESE 2003), 30 September - 1 October 2003. Rome, Italy, pp. 174-184, 2003, IEEE Computer Society, 0-7695-2002-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
21 | Marong Phadoongsidhi, Kewal K. Saluja |
Event-Centric Simulation of Crosstalk Pulse Faults in Sequential Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 21st International Conference on Computer Design (ICCD 2003),VLSI in Computers and Processors, 13-15 October 2003, San Jose, CA, USA, Proceedings, pp. 42-47, 2003, IEEE Computer Society, 0-7695-2025-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
21 | Said Hamdioui, Ad J. van de Goor, Mike Rodgers |
Detecting Intra-Word Faults in Word-Oriented Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 21st IEEE VLSI Test Symposium (VTS 2003), 27 April - 1 May 2003, Napa Valley, CA, USA, pp. 241-247, 2003, IEEE Computer Society, 0-7695-1924-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Bit-oriented/word-oriented memories, fault models, memory tests, data backgrounds |
21 | Irith Pomeranz, Sudhakar M. Reddy |
Property-based test generation for scan designs and the effects ofthe test application scheme and scan selection on the number ofdetectable faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(5), pp. 628-637, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Marco Vieira, Henrique Madeira |
Recovery and Performance Balance of a COTS DBMS in the Presence of Operator Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSN ![In: 2002 International Conference on Dependable Systems and Networks (DSN 2002), 23-26 June 2002, Bethesda, MD, USA, Proceedings, pp. 615-626, 2002, IEEE Computer Society, 0-7695-1597-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Saravanan Padmanaban, Spyros Tragoudas |
Exact Grading of Multiple Path Delay Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2002 Design, Automation and Test in Europe Conference and Exposition (DATE 2002), 4-8 March 2002, Paris, France, pp. 84-88, 2002, IEEE Computer Society, 0-7695-1471-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Keith J. Keller, Hiroshi Takahashi, Kim T. Le, Kewal K. Saluja, Yuzo Takamatsu |
Reduction of Target Fault List for Crosstalk-Induced Delay Faults by using Layout Constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 11th Asian Test Symposium (ATS 2002), 18-20 November 2002, Guam, USA, pp. 242-247, 2002, IEEE Computer Society, 0-7695-1825-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Luis E. Garza, Francisco J. Cantu, Salvador Acevedo |
Faults Diagnosis in Industrial Processes with a Hybrid Diagnostic System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICAI ![In: MICAI 2002: Advances in Artificial Intelligence, Second Mexican International Conference on Artificial Intelligence, Merida, Yucatan, Mexico, April 22-26, 2002, Proceedings, pp. 536-546, 2002, Springer, 3-540-43475-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Andrzej Krasniewski |
On the Set of Target Path Delay Faults in Sequential Subcircuits of LUT-based FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, Reconfigurable Computing Is Going Mainstream, 12th International Conference, FPL 2002, Montpellier, France, September 2-4, 2002, Proceedings, pp. 596-606, 2002, Springer, 3-540-44108-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | John C. Munson, Allen P. Nikora |
Toward A Quantifiable Definition of Software Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSRE ![In: 13th International Symposium on Software Reliability Engineering (ISSRE 2002), 12-15 November 2002, Annapolis, MD, USA, pp. 388-396, 2002, IEEE Computer Society, 0-7695-1763-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Janusz A. Starzyk, Dong Liu |
Locating stuck faults in analog circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 153-156, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Jennifer Dworak, James Wingfield, Brad Cobb, Sooryong Lee, Li-C. Wang, M. Ray Mercer |
Fortuitous Detection and its Impact on Test Set Sizes Using Stuck-at and Transition Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 6-8 November 2002, Vancouver, BC, Canada, Proceedings, pp. 177-185, 2002, IEEE Computer Society, 0-7695-1831-1. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Tahar Jarboui, Jean Arlat, Yves Crouzet, Karama Kanoun, Thomas Marteau |
Analysis of the Effects of Real and Injected Software Faults: . ![Search on Bibsonomy](Pics/bibsonomy.png) |
PRDC ![In: 9th Pacific Rim International Symposium on Dependable Computing (PRDC 2002), 16-18 December 2002, Tsukuba-City, Ibarski, Japan, pp. 51-58, 2002, IEEE Computer Society, 0-7695-1852-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
21 | Yong Chang Kim, Vishwani D. Agrawal, Kewal K. Saluja |
Multiple Faults: Modeling, Simulation and Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC/VLSI Design ![In: Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), and the 15th International Conference on VLSI Design (VLSI Design 2002), Bangalore, India, January 7-11, 2002, pp. 592-597, 2002, IEEE Computer Society, 0-7695-1299-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
ATPG Modeling, Fault Modeling, Multiple Fault |
21 | Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto |
Memory Read Faults: Taxonomy and Automatic Test Generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan, pp. 157-163, 2001, IEEE Computer Society, 0-7695-1378-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
21 | Bipul Chandra Paul, Seung Hoon Choi, Yonghee Im, Kaushik Roy 0001 |
Design Verification and Robust Design Technique for Cross-Talk Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan, pp. 449-, 2001, IEEE Computer Society, 0-7695-1378-6. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
21 | Andrzej Krasniewski |
Testing FPGA Delay Faults in the System Environment is Very Different from "Ordinary" Delay Fault Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTW ![In: 7th IEEE International On-Line Testing Workshop (IOLTW 2001), 9-11 July 2001, Taormina, Italy, pp. 37-, 2001, IEEE Computer Society, 0-7695-1290-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
21 | Wei-Cheng Lai, Jing-Reng Huang, Kwang-Ting (Tim) Cheng |
Embedded-Software-Based Approach to Testing Crosstalk-Induced Faults at On-Chip Buses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April - 3 May 2001, Marina Del Rey, CA, USA, pp. 204-209, 2001, IEEE Computer Society, 0-7695-1122-8. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
21 | Hossein Ahmadi, Reza Tafreshi, Farrokh Sassani, Guy Albert Dumont |
On the Performance of Informative Wavelets for Classification and Diagnosis of Machine Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WAA ![In: Wavelet Analysis and Its Applications, Second International Conference, WAA 2001, Hong Kong, China, December 18-20, 2001, Proceedings, pp. 369-383, 2001, Springer, 3-540-43034-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
21 | Frank Liberato, Rami G. Melhem, Daniel Mossé |
Tolerance to Multiple Transient Faults for Aperiodic Tasks in Hard Real-Time Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 49(9), pp. 906-914, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
fault-tolerant schedules, Real-time scheduling, earliest-deadline first, fault recovery |
21 | Irith Pomeranz, Sudhakar M. Reddy |
On n-detection test sets and variable n-detection test sets fortransition faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(3), pp. 372-383, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
21 | Vijay Lakamraju, Russell Tessier |
Tolerating operational faults in cluster-based FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2000, Monterey, CA, USA, February 10-11, 2000, pp. 187-194, 2000, ACM, 1-58113-193-3. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
21 | Marina Thottan, Chuanyi Ji |
Properties of network faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOMS ![In: The Networked Planet: Management Beyond 2000, 7th IEEE/IFIP Network Operations and Management Symposium, NOMS 2000, Honolulu, HI, USA, April 10-14, 2000. Proceedings, pp. 941-942, 2000, IEEE, 0-7803-5928-3. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
21 | D. Basu, R. Paramasivam |
An Approach to Software Assisted Recovery from Hardware Transient Faults for Real Time Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAFECOMP ![In: Computer Safety, Reliability and Security, 19th International Conference, SAFECOMP 2000, Rotterdam, The Netherlands, October 24-27, 2000, Proceedings, pp. 264-274, 2000, Springer, 3-540-41186-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
21 | Boaz Barak, Shai Halevi, Amir Herzberg, Dalit Naor |
Clock synchronization with faults and recoveries (extended abstract). ![Search on Bibsonomy](Pics/bibsonomy.png) |
PODC ![In: Proceedings of the Nineteenth Annual ACM Symposium on Principles of Distributed Computing, July 16-19, 2000, Portland, Oregon, USA., pp. 133-142, 2000, ACM, 1-58113-183-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
clock synchronization, proactive systems, mobile adversary |
21 | Fernando M. Gonçalves, João Paulo Teixeira 0001 |
Defect-Oriented Sampling of Non-Equally Probable Faults in VLSI Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 15(1-2), pp. 41-52, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
fault sampling, defect-oriented test, fault extraction |
21 | Kuen-Jong Lee, Jing-Jou Tang, Tsung-Chu Huang |
BIFEST: a built-in intermediate fault effect sensing and test generation system for CMOS bridging faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 4(2), pp. 194-218, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
21 | Érika F. Cota, Luigi Carro, Marcelo Lubaszewski |
A Method to Diagnose Faults in Linear Analog Circuits using an Adaptive Tester. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 1999 Design, Automation and Test in Europe (DATE '99), 9-12 March 1999, Munich, Germany, pp. 184-188, 1999, IEEE Computer Society / ACM, 0-7695-0078-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
21 | Jin Ding, Yu-Liang Wu |
On the Testing Quality of Random and Pseudo-random Sequences for Permanent and Intermittent Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 1999 Conference on Asia South Pacific Design Automation, Wanchai, Hong Kong, China, January 18-21, 1999, pp. 311-314, 1999, IEEE Computer Society, 0-7803-5012-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
21 | Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada |
Identification of Feedback Bridging Faults with Oscillation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 8th Asian Test Symposium (ATS '99), 16-18 November 1999, Shanghai, China, pp. 25-, 1999, IEEE Computer Society, 0-7695-0315-2. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
feedback bridging fault, CMOS, logic circuit, oscillation |
21 | Reisuke Shimoda, Takaki Yoshida, Masafumi Watari, Yasuhiro Toyota, Kiyokazu Nishi, Akira Motohara |
Practical Application of Automated Fault Diagnosis for Stuck-at, Bridging, and Measurement Condition Dependent Faults in Fully Scanned Sequential Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 8th Asian Test Symposium (ATS '99), 16-18 November 1999, Shanghai, China, pp. 347-, 1999, IEEE Computer Society, 0-7695-0315-2. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
21 | Pankaj Pant, Abhijit Chatterjee |
Efficient diagnosis of path delay faults in digital logic circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999, San Jose, California, USA, November 7-11, 1999, pp. 471-476, 1999, IEEE Computer Society, 0-7803-5832-5. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
21 | Irith Pomeranz, Sudhakar M. Reddy |
On n-Detection Test Sets and Variable n-Detection Test Sets for Transition Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 17th IEEE VLSI Test Symposium (VTS '99), 25-30 April 1999, San Diego, CA, USA, pp. 173-181, 1999, IEEE Computer Society, 0-7695-0146-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
21 | Sudhakar M. Reddy, Irith Pomeranz, Nadir Z. Basturkmen, Xijiang Lin |
Procedures for Identifying Undetectable and Redundant Faults In Synchronous Sequential Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 17th IEEE VLSI Test Symposium (VTS '99), 25-30 April 1999, San Diego, CA, USA, pp. 275-283, 1999, IEEE Computer Society, 0-7695-0146-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
21 | Debaleena Das, Nur A. Touba |
A Low Cost Approach for Detecting, Locating, and Avoiding Interconnect Faults in FPGA-Based Reconfigurable Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 12th International Conference on VLSI Design (VLSI Design 1999), 10-13 January 1999, Goa, India, pp. 266-269, 1999, IEEE Computer Society, 0-7695-0013-7. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
21 | Fabrizio Grandoni 0002, Andrea Bondavalli, Silvano Chiaradonna |
A New Heuristic to Discriminate between Transient and Intermittent Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HASE ![In: 3rd IEEE International Symposium on High-Assurance Systems Engineering (HASE '98), 13-14 November 1998, Washington, D.C, USA, Proceedings, pp. 224-231, 1998, IEEE Computer Society, 0-8186-9221-9. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
21 | Walter M. Lindermeir, Thomas J. Vogels, Helmut E. Graeb |
Analog Test Design with IDD Measurements for the Detection of Parametric and Catastrophic Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 1998 Design, Automation and Test in Europe (DATE '98), February 23-26, 1998, Le Palais des Congrès de Paris, Paris, France, pp. 822-827, 1998, IEEE Computer Society, 0-8186-8359-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
analog and mixed-signal test design, IDD spectral measurements, test decision criteria, yield coverage, fault modeling, fault coverage, discrimination analysis, measurement noise |
21 | Cheng-Wen Wu, Chih-Yuang Su |
A Probabilistic Model for Path Delay Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 7th Asian Test Symposium (ATS '98), 2-4 December 1998, Singapore, pp. 70-75, 1998, IEEE Computer Society, 0-8186-8277-9. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
21 | Holger Karl, Matthias Werner 0001, Lars Küttner |
An Experimental Investigation of Message Latencies in the Totem Protocol in the Presence of Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 24th EUROMICRO '98 Conference, Engineering Systems and Software for the Next Decade, 25-27 August 1998, Vesteras, Sweden, pp. 10468-10475, 1998, IEEE Computer Society, 0-8186-8646-4. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
21 | Albina Moshkova |
On Diagnosis of Retaining Faults in Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Rough Sets and Current Trends in Computing ![In: Rough Sets and Current Trends in Computing, First International Conference, RSCTC'98, Warsaw, Poland, June 22-26, 1998, Proceedings, pp. 513-516, 1998, Springer, 3-540-64655-8. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
21 | Lan Zhao, D. M. H. Walker, Fabrizio Lombardi |
Detection of bridging faults in logic resources of configurable FPGAs using I_DDQ. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1998, Washington, DC, USA, October 18-22, 1998, pp. 1037-1046, 1998, IEEE Computer Society, 0-7803-5093-6. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
IDDQ Tes t, Configurable Logic Blocks, FPGA, Testing, Bridging Fault, Programming Phase |
21 | Cecilia Metra, Michele Favalli, Bruno Riccò |
On-line detection of logic errors due to crosstalk, delay, and transient faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1998, Washington, DC, USA, October 18-22, 1998, pp. 524-533, 1998, IEEE Computer Society, 0-7803-5093-6. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
21 | Cecilia Metra, Michele Favalli, Piero Olivo, Bruno Riccò |
On-line detection of bridging and delay faults in functional blocks of CMOS self-checking circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(7), pp. 770-776, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
21 | Peter A. Krauss, Andreas Ganz, Kurt Antreich |
Distributed Test Pattern Generation for Stuck-At Faults in Sequential Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 11(3), pp. 227-245, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
fault parallelism, search space parallelism, sequential circuits, ATPG |
21 | Ad J. van de Goor, Georgi Gaydadjiev, Vyacheslav N. Yarmolik, V. G. Mikitjuk |
March LA: a test for linked memory faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ED&TC ![In: European Design and Test Conference, ED&TC '97, Paris, France, 17-20 March 1997, pp. 627, 1997, IEEE Computer Society, 0-8186-7786-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
21 | Debesh Kumar Das, Susanta Chakraborty, Bhargab B. Bhattacharya |
New BIST Techniques for Universal and Robust Testing of CMOS Stuck-Open Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 10th International Conference on VLSI Design (VLSI Design 1997), 4-7 January 1997, Hyderabad, India, pp. 303-309, 1997, IEEE Computer Society, 0-8186-7755-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
21 | Sreejit Chakravarty, Yiming Gong, Srikanth Venkataraman |
Diagnostic simulation of stuck-at faults in combinational circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 8(1), pp. 87-97, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
diagnostic power, diagnostic simulation, diagnosis, equivalence classes, diagnostic resolution |
21 | Keerthi Heragu, Janak H. Patel, Vishwani D. Agrawal |
SIGMA: a simulator for segment delay faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1996, San Jose, CA, USA, November 10-14, 1996, pp. 502-508, 1996, IEEE Computer Society / ACM, 0-8186-7597-7. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
fault model, fault simulator, delay fault testing |
21 | Irith Pomeranz, Sudhakar M. Reddy, Janak H. Patel |
On Double Transition Faults as a Delay Fault Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 6th Great Lakes Symposium on VLSI (GLS-VLSI '96), March 22-23, 1996, Ames, IA, USA, pp. 282-287, 1996, IEEE Computer Society, 0-8186-7502-0. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
21 | Ramesh C. Tekumalla, Premachandran R. Menon |
Identifying Redundant Path Delay Faults in Sequential Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 9th International Conference on VLSI Design (VLSI Design 1996), 3-6 January 1996, Bangalore, India, pp. 406-411, 1996, IEEE Computer Society, 0-8186-7228-5. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
21 | Vishwani D. Agrawal, Srimat T. Chakradhar |
Combinational ATPG theorems for identifying untestable faults in sequential circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(9), pp. 1155-1160, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
21 | Mustapha Slamani, Bozena Kaminska |
Multifrequency Analysis of Faults in Analog Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 12(2), pp. 70-80, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
21 | Tapan J. Chakraborty, Vishwani D. Agrawal |
Simulation of at-speed tests for stuck-at faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 13th IEEE VLSI Test Symposium (VTS'95), April 30 - May 3, 1995, Princeton, New Jersey, USA, pp. 216-220, 1995, IEEE Computer Society, 0-8186-7000-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
stuck-at fault detectability, at-speed test simulation, delayed signal transitions, timing hazards, fault simulation method, delay-hazard robust test coverage, timing considerations, high performance circuits, fault diagnosis, logic testing, delays, timing, integrated circuit testing, circuit analysis computing, hazards and race conditions, path delays, high speed test |
21 | Daniel Brand, Vijay S. Iyengar |
Identification of redundant delay faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(5), pp. 553-565, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
21 | Irith Pomeranz, Sudhakar M. Reddy |
SPADES-ACE: a simulator for path delay faults in sequential circuits with extensions to arbitrary clocking schemes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(2), pp. 251-263, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
21 | Karl Fuchs, Michael Pabst, Torsten Rössel |
RESIST: a recursive test pattern generation algorithm for path delay faults considering various test classes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(12), pp. 1550-1562, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
21 | Weiwei Mao, Michael D. Ciletti |
Reducing correlation to improve coverage of delay faults in scan-path design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(5), pp. 638-646, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
21 | Linda S. Milor, Alberto L. Sangiovanni-Vincentelli |
Minimizing production test time to detect faults in analog circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(6), pp. 796-813, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
21 | Yonatan Aumann, Judit Bar-Ilan, Uriel Feige |
On the Cost of Recomputing: Tight Bounds on Pebbling with Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICALP ![In: Automata, Languages and Programming, 21st International Colloquium, ICALP94, Jerusalem, Israel, July 11-14, 1994, Proceedings, pp. 47-58, 1994, Springer, 3-540-58201-0. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
21 | Juan A. Garay |
Reaching (and Maintaining) Agreement in the Presence of Mobile Faults (Extended Abstract). ![Search on Bibsonomy](Pics/bibsonomy.png) |
WDAG ![In: Distributed Algorithms, 8th International Workshop, WDAG '94, Terschelling, The Netherlands, September 29 - October 1, 1994, Proceedings, pp. 253-264, 1994, Springer, 3-540-58449-8. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
21 | Stefan Gerber 0002, Michael Gössel |
Detection of Permanent Hardware Faults of a Floating Point Adder by Pseudoduplication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EDCC ![In: Dependable Computing - EDCC-1, First European Dependable Computing Conference, Berlin, Germany, October 4-6, 1994, Proceedings, pp. 327-335, 1994, Springer, 3-540-58426-9. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
21 | Slawomir Pilarski, Tiko Kameda, André Ivanov |
Sequential faults and aliasing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(7), pp. 1068-1074, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
21 | Michele Favalli, Piero Olivo, Bruno Riccò |
A probabilistic fault model for 'analog' faults in digital CMOS circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(11), pp. 1459-1462, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
21 | Michele Favalli, Piero Olivo, Maurizio Damiani, Bruno Riccò |
Fault simulation of unconventional faults in CMOS circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(5), pp. 677-682, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
21 | Michael H. Schulz, Franz Fink, Karl Fuchs |
Parallel Pattern Fault Simulation of Path Delay Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 26th ACM/IEEE Design Automation Conference, Las Vegas, Nevada, USA, June 25-29, 1989., pp. 357-363, 1989, ACM Press. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
21 | S. Koeppe |
Optimal Layout to Avoid CMOS Stuck-Open Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 24th ACM/IEEE Design Automation Conference. Miami Beach, FL, USA, June 28 - July 1, 1987., pp. 829-835, 1987, IEEE Computer Society Press / ACM. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
|
19 | Chitra Babu, Harshini Ramnath Krishnan |
Fault model and test-case generation for the composition of aspects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM SIGSOFT Softw. Eng. Notes ![In: ACM SIGSOFT Softw. Eng. Notes 34(1), pp. 1-6, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
aspect oriented programming, fault model, aspect composition, join point |
19 | Kevin Ni, Nithya Ramanathan, Mohamed Nabil Hajj Chehade, Laura Balzano, Sheela Nair, Sadaf Zahedi, Eddie Kohler, Gregory J. Pottie, Mark H. Hansen, Mani B. Srivastava |
Sensor network data fault types. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Sens. Networks ![In: ACM Trans. Sens. Networks 5(3), pp. 25:1-25:29, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
sensor network, Data integrity, fault |
19 | Stavros Tripakis |
A Combined On-Line/Off-Line Framework for Black-Box Fault Diagnosis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RV ![In: Runtime Verification, 9th International Workshop, RV 2009, Grenoble, France, June 26-28, 2009. Selected Papers, pp. 152-167, 2009, Springer, 978-3-642-04693-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Anders Lyhne Christensen, Rehan O'Grady, Mauro Birattari, Marco Dorigo |
Fault detection in autonomous robots based on fault injection and learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Auton. Robots ![In: Auton. Robots 24(1), pp. 49-67, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Model-free, Learning, Mobile robots, Fault detection, Fault injection |
19 | Nima Mehdizadeh, Mohammad Shokrollah-Shirazi, Seyed Ghassem Miremadi |
Analyzing fault effects in the 32-bit OpenRISC 1200 microprocessor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARES ![In: Proceedings of the The Third International Conference on Availability, Reliability and Security, ARES 2008, March 4-7, 2008, Technical University of Catalonia, Barcelona , Spain, pp. 648-652, 2008, IEEE Computer Society, 978-0-7695-3102-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Ilinca Ciupa, Alexander Pretschner, Andreas Leitner, Manuel Oriol, Bertrand Meyer 0001 |
On the Predictability of Random Tests for Object-Oriented Software. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICST ![In: First International Conference on Software Testing, Verification, and Validation, ICST 2008, Lillehammer, Norway, April 9-11, 2008, pp. 72-81, 2008, IEEE Computer Society, 978-0-7695-3127-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
predictability, random testing, failure, fault |
19 | Junqiang Zhou, Simeon C. Ntafos, Balakrishnan Prabhakaran 0001 |
Fault Detection Framework for Video Surveillance Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AVSS ![In: Fifth IEEE International Conference on Advanced Video and Signal Based Surveillance, AVSS 2008, Santa Fe, New Mexico, USA, 1-3 September 2008, pp. 219-226, 2008, IEEE Computer Society, 978-0-7695-3341-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Dana Fisman, Orna Kupferman, Yoad Lustig |
On Verifying Fault Tolerance of Distributed Protocols. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TACAS ![In: Tools and Algorithms for the Construction and Analysis of Systems, 14th International Conference, TACAS 2008, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2008, Budapest, Hungary, March 29-April 6, 2008. Proceedings, pp. 315-331, 2008, Springer, 978-3-540-78799-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Thomas Panhofer, Werner Friesenbichler, Martin Delvai |
Fault tolerant Four-State Logic by using Self-Healing Cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 26th International Conference on Computer Design, ICCD 2008, 12-15 October 2008, Lake Tahoe, CA, USA, Proceedings, pp. 1-6, 2008, IEEE Computer Society, 978-1-4244-2657-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Kazuteru Namba, Hideo Ito |
Delay Fault Testability on Two-Rail Logic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 1-3 October 2008, Boston, MA, USA, pp. 482-490, 2008, IEEE Computer Society, 978-0-7695-3365-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
19 | K. S. May Chan, Judith Bishop, Johan Steyn, Luciano Baresi, Sam Guinea |
A Fault Taxonomy for Web Service Composition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSOC Workshops ![In: Service-Oriented Computing - ICSOC 2007 Workshops, International Workshops, Vienna, Austria, September 17, 2007, Revised Selected Papers, pp. 363-375, 2007, Springer, 978-3-540-93850-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
fault taxonomy, Web services, service composition, self-healing |
19 | Mathias Brandstötter, Michael W. Hofbaur, Gerald Steinbauer, Franz Wotawa |
Model-based fault diagnosis and reconfiguration of robot drives. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IROS ![In: 2007 IEEE/RSJ International Conference on Intelligent Robots and Systems, October 29 - November 2, 2007, Sheraton Hotel and Marina, San Diego, California, USA, pp. 1203-1209, 2007, IEEE, 978-1-4244-0912-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
Displaying result #601 - #700 of 11893 (100 per page; Change: ) Pages: [ <<][ 1][ 2][ 3][ 4][ 5][ 6][ 7][ 8][ 9][ 10][ 11][ 12][ 13][ 14][ 15][ 16][ >>] |
|