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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 6626 occurrences of 3075 keywords
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Results
Found 22479 publication records. Showing 22466 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
18 | Yixin Shou, Robert van Engelen, Johnnie Birch |
Flow-Sensitive Loop-Variant Variable Classification in Linear Time. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCPC ![In: Languages and Compilers for Parallel Computing, 20th International Workshop, LCPC 2007, Urbana, IL, USA, October 11-13, 2007, Revised Selected Papers, pp. 323-337, 2007, Springer, 978-3-540-85260-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Maneesha Yellepeddi, Kartikeya Mayaram |
Issues in the Design and Simulation of a MEMS VCO based Phase-Locked Loop. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 1553-1556, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Ali Mili 0001, Tim Daly, Mark G. Pleszkoch, Stacy J. Prowell |
A Semantic Recognizer Infrastructure for Computing Loop Behavior. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HICSS ![In: 40th Hawaii International International Conference on Systems Science (HICSS-40 2007), CD-ROM / Abstracts Proceedings, 3-6 January 2007, Waikoloa, Big Island, HI, USA, pp. 277, 2007, IEEE Computer Society, 0-7695-2755-8. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Yawen Chen 0001, Hong Shen 0001 |
RWA of Hypercube Communications Embedded on A Family of Optical Double-Loop Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICON ![In: Proceedings of the 15th IEEE International Conference on Networks, ICON 2007, 19-21 November 2007, Adelaide, Australia, pp. 149-154, 2007, IEEE, 1-4244-1230-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Guochen Hua, Meng Wang 0005, Zili Shao, Hui Liu 0006, Chun Xue |
Real-Time Loop Scheduling with Energy Optimization Via DVS and ABB for Multi-core Embedded System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUC ![In: Embedded and Ubiquitous Computing, International Conference, EUC 2007, Taipei, Taiwan, December 17-20, 2007, Proceedings, pp. 1-12, 2007, Springer, 978-3-540-77091-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Md. Mafijul Islam |
Predicting Loop Termination to Boost Speculative Thread-Level Parallelism in Embedded Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBAC-PAD ![In: 19th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2007), 24-27 October 2007, Gramado, RS, Brazil, pp. 54-61, 2007, IEEE Computer Society, 0-7695-3014-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Liping Xue, Mahmut T. Kandemir, Guilin Chen, Feihui Li, Ozcan Ozturk 0001, Rajaraman Ramanarayanan, Balaji Vaidyanathan |
Locality-Aware Distributed Loop Scheduling for Chip Multiprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India, pp. 251-258, 2007, IEEE Computer Society, 0-7695-2762-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Anthony T. Chronopoulos, Lionel M. Ni, Satish Penmatsa |
Multi-dimensional dynamic loop scheduling algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CLUSTER ![In: Proceedings of the 2007 IEEE International Conference on Cluster Computing, 17-20 September 2007, Austin, Texas, USA, pp. 241-248, 2007, IEEE Computer Society, 978-1-4244-1387-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
18 | Rade Kutil |
A Single-Loop Approach to SIMD Parallelization of 2-D Wavelet Lifting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PDP ![In: 14th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP 2006), 15-17 February 2006, Montbeliard-Sochaux, France, pp. 413-420, 2006, IEEE Computer Society, 0-7695-2513-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Thomas J. Ashby, Michael F. P. O'Boyle |
Iterative Collective Loop Fusion. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CC ![In: Compiler Construction, 15th International Conference, CC 2006, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2006, Vienna, Austria, March 30-31, 2006, Proceedings, pp. 202-216, 2006, Springer, 3-540-33050-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Alban Douillet, Hongbo Rong, Guang R. Gao |
Multi-dimensional Kernel Generation for Loop Nest Software Pipelining. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2006, Parallel Processing, 12th International Euro-Par Conference, Dresden, Germany, August 28 - September 1, 2006, Proceedings, pp. 311-322, 2006, Springer, 3-540-37783-2. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Jose Herrera, Eduardo Huedo, Rubén S. Montero, Ignacio Martín Llorente |
Loosely-coupled loop scheduling in computational grids. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Gennette Gill, John Hansen, Montek Singh |
Loop pipelining for high-throughput stream computation using self-timed rings. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 2006, pp. 289-296, 2006, ACM, 1-59593-389-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Wei Shu, Joseph Sylvester Chang, Tong Ge, Meng Tong Tan |
Fourier series analysis of the nonlinearities in analog closed-loop PWM class D amplifiers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Xiangyang Ji, Debin Zhao, Wen Gao 0001, Jizheng Xu, Feng Wu 0001 |
An efficient SNR scalability coding framework hybrid open-close loop FGS coding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Kuo-Hsing Cheng, Kai-Fei Chang, Yu-Lung Lo, Ching-Wen Lai, Yuh-Kuang Tseng |
A 100MHz-1GHz adaptive bandwidth phase-locked loop in 90nm process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Florin Balasa, Per Gunnar Kjeldsberg, Martin Palkovic, Arnout Vandecappelle, Francky Catthoor |
Loop Transformation Methodologies for Array-Oriented Memory Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 2006 IEEE International Conference on Application-Specific Systems, Architecture and Processors (ASAP 2006), 11-13 September 2006, Steamboat Springs, Colorado, USA, pp. 205-212, 2006, IEEE Computer Society, 0-7695-2682-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Ganesh Srinivasan, Abhijit Chatterjee, Friedrich Taenzler |
Alternate Loop-Back Diagnostic Tests for Wafer-Level Diagnosis of Modern Wireless Transceivers using Spectral Signatures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 24th IEEE VLSI Test Symposium (VTS 2006), 30 April - 4 May 2006, Berkeley, California, USA, pp. 222-227, 2006, IEEE Computer Society, 0-7695-2514-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Tatiana Tabirca, Sabin Tabirca, Laurence Tianruo Yang |
An O(logp) Algorithm for the Discrete Feedback Guided Dynamic Loop. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AINA (1) ![In: 20th International Conference on Advanced Information Networking and Applications (AINA 2006), 18-20 April 2006, Vienna, Austria, pp. 321-326, 2006, IEEE Computer Society, 0-7695-2466-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Shih-Hsu Huang, Chun-Hua Cheng |
Operation Scheduling for False Loop Free Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006, pp. 1619-1622, 2006, IEEE, 1-4244-0387-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Heidi E. Ziegler, Mary W. Hall |
Evaluating heuristics in automatically mapping multi-loop applications to FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, FPGA 2005, Monterey, California, USA, February 20-22, 2005, pp. 184-195, 2005, ACM, 1-59593-029-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
high-level and architectural synthesis, parallelizing compiler analysis techniques, synthesis techniques for configurable computing, FPGAs, pipelining, rapid prototyping, hardware design |
18 | Momchil Milev, Rod Burt |
A Tool and Methodology for AC-Stability Analysis of Continuous-Time Closed-Loop Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany, pp. 204-208, 2005, IEEE Computer Society, 0-7695-2288-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Antonio A. F. Oliveira, Saulo Ribeiro, Claudio Esperança, Gilson A. Giraldi |
Loop Snakes: The Generalized Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IV ![In: 9th International Conference on Information Visualisation, IV 2005, 6-8 July 2005, London, UK, pp. 975-980, 2005, IEEE Computer Society, 0-7695-2397-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Abhik Roychoudhury, Tulika Mitra, Hemendra Singh Negi |
Analyzing Loop Paths for Execution Time Estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDCIT ![In: Distributed Computing and Internet Technology, Second International Conference, ICDCIT 2005, Bhubaneswar, India, December 22-24, 2005, Proceedings, pp. 458-469, 2005, Springer, 3-540-30999-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Erik Hertzler, David Van Sickle |
300mm time constrained queue loop management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WSC ![In: Proceedings of the 37th Winter Simulation Conference, Orlando, FL, USA, December 4-7, 2005, pp. 66, 2005, IEEE Computer Society, 0-7803-9519-0. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP BibTeX RDF |
|
18 | Sam Jeong, Jung Han |
A Loop Transformation Using Two Parallel Region Partitioning Method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APPT ![In: Advanced Parallel Processing Technologies, 6th International Workshop, APPT 2005, Hong Kong, China, October 27-28, 2005, Proceedings, pp. 23-30, 2005, Springer, 3-540-29639-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Elise de Doncker, Shujun Li, Yoshimitsu Shimizu, Junpei Fujimoto, Fukuko Yuasa |
Regularization and Extrapolation Methods for Infrared Divergent Loop Integrals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
International Conference on Computational Science (1) ![In: Computational Science - ICCS 2005, 5th International Conference, Atlanta, GA, USA, May 22-25, 2005, Proceedings, Part I, pp. 165-171, 2005, Springer, 3-540-26032-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
18 | João M. P. Cardoso |
Dynamic loop pipelining in data-driven architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the Second Conference on Computing Frontiers, 2005, Ischia, Italy, May 4-6, 2005, pp. 106-115, 2005, ACM, 1-59593-019-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
compilation, reconfigurable computing, software pipelining, dataflow, data-driven architectures |
18 | Apan Qasem, Ken Kennedy |
A Cache-Conscious Profitability Model for Empirical Tuning of Loop Fusion. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCPC ![In: Languages and Compilers for Parallel Computing, 18th International Workshop, LCPC 2005, Hawthorne, NY, USA, October 20-22, 2005, Revised Selected Papers, pp. 106-120, 2005, Springer, 978-3-540-69329-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Ming-Ta Hsieh, Gerald E. Sobelman |
Clock and data recovery with adaptive loop gain for spread spectrum SerDes applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 4883-4886, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Ying-Jiun Hsieh, Yavuz A. Bozer |
Analytical Modeling of Closed-Loop Conveyors with Load Recirculation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCSA (4) ![In: Computational Science and Its Applications - ICCSA 2005, International Conference, Singapore, May 9-12, 2005, Proceedings, Part IV, pp. 437-447, 2005, Springer, 3-540-25863-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Conveyor systems, Manufacturing systems, Material handling |
18 | Vivek S. Borkar, Arzad Alam Kherani, B. J. Prabhu |
Closed and Open Loop Optimal Control of Buffer and Energy of a Wireless Device. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WiOpt ![In: 3rd International Symposium on Modeling and Optimization in Mobile, Ad-Hoc and Wireless Networks (WiOpt 2005), 4-6 April 2005, Trentino, Italy, pp. 3-9, 2005, IEEE Computer Society, 0-7695-2267-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Robert A. Soni, R. Michael Buehrer |
On the performance of open-loop transmit diversity techniques for IS-2000 systems: a comparative study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Wirel. Commun. ![In: IEEE Trans. Wirel. Commun. 3(5), pp. 1602-1615, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Keun Chul Hwang, Kwang Bok Lee |
Efficient weight vector representation for closed-loop transmit diversity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Commun. ![In: IEEE Trans. Commun. 52(1), pp. 9-16, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Yongkang Zhu, Grigorios Magklis, Michael L. Scott, Chen Ding 0001, David H. Albonesi |
The Energy Impact of Aggressive Loop Fusion. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: 13th International Conference on Parallel Architectures and Compilation Techniques (PACT 2004), 29 September - 3 October 2004, Antibes Juan-les-Pins, France, pp. 153-164, 2004, IEEE Computer Society, 0-7695-2229-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | João M. P. Cardoso, Pedro C. Diniz |
Modeling Loop Unrolling: Approaches and Open Issues. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Computer Systems: Architectures, Modeling, and Simulation, Third and Fourth International Workshops, SAMOS 2003 and SAMOS 2004, Samos, Greece, July 21-23, 2003 and July 19-21, 2004, Proceedings, pp. 224-233, 2004, Springer, 3-540-22377-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Jan Müller 0001, Dirk Fimmel, Renate Merker |
Exploitation of Instruction-Level Parallelism for Optimal Loop Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Interaction between Compilers and Computer Architectures ![In: 8th Annual Workshop on Interaction between Compilers and Computer Architecture (INTERACT-8 2004), 15 February 2004, Madrid, Spain, pp. 13-21, 2004, IEEE Computer Society, 0-7695-2061-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | S. Wanchana, T. Benjanarasuth, D. Isarakorn, J. Ngamwiwit, N. Komine |
Phase-locked loop process control system using LQR approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICARCV ![In: 8th International Conference on Control, Automation, Robotics and Vision, ICARCV 2004, Kunming, China, 6-9 December 2004, Proceedings, pp. 1615-1619, 2004, IEEE, 0-7803-8653-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Heiko Falk, Manish Verma |
Combined Data Partitioning and Loop Nest Splitting for Energy Consumption Minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SCOPES ![In: Software and Compilers for Embedded Systems, 8th International Workshop, SCOPES 2004, Amsterdam, The Netherlands, September 2-3, 2004, Proceedings, pp. 137-151, 2004, Springer, 3-540-23035-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Emre Özer 0001, Andy Nisbet, David Gregg |
Fine-Tuning Loop-Level Parallelism for Increasing Performance of DSP Applications on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 20-23 April 2004, Napa, CA, USA, Proceedings, pp. 273-274, 2004, IEEE Computer Society, 0-7695-2230-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Kirt M. Noël, Kay C. Wiese |
Exploring the Use of Stem-Loop Characteristics for Pinpointing Structural RNA Genes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSB ![In: 3rd International IEEE Computer Society Computational Systems Bioinformatics Conference, CSB 2004, Stanford, CA, USA, August 16-19, 2004, pp. 533-534, 2004, IEEE Computer Society, 0-7695-2194-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Paolo Cusinato, Stefano Cipriani, Guglielmo Sirna, Gianni Puccio, Eric Duvivier |
Gain/bandwidth programmable PA control loop for GMS/GPRS quad-band applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004, pp. 621-624, 2004, IEEE, 0-7803-8251-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Ji Hwan (Paul) Chun, Hak-soo Yu, Jacob A. Abraham |
An efficient linearity test for on-chip high speed ADC and DAC using loop-back. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004, pp. 328-331, 2004, ACM, 1-58113-853-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
BIST, linearity, ADC, mixed signal test, DAC |
18 | Jan Müller 0001, Dirk Fimmel, Renate Merker |
Optimal Loop Scheduling with Register Constraints Using Flow Graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISPAN ![In: 7th International Symposium on Parallel Architectures, Algorithms, and Networks (I-SPAN 2004), 10-12 May 2004, Hong Kong, SAR, China, pp. 180-186, 2004, IEEE Computer Society, 0-7695-2135-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
18 | Marcus Bednara, Jürgen Teich |
Automatic Synthesis of FPGA Processor Arrays from Loop Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 26(2), pp. 149-165, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
regular processor arrays, FPGA, design automation, space-time mapping |
18 | Suzhen Lin, G. Manimaran |
Double-Loop Feedback-Based Scheduling Approach for Distributed Real-Time Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HiPC ![In: High Performance Computing - HiPC 2003, 10th International Conference, Hyderabad, India, December 17-20, 2003, Proceedings, pp. 268-278, 2003, Springer, 3-540-20626-4. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Fumiaki Tanaka, Atsushi Kameda, Masahito Yamamoto, Azuma Ohuchi |
The Effect of the Bulge Loop upon the Hybridization Process in DNA Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICES ![In: Evolvable Systems: From Biology to Hardware, 5th International Conference, ICES 2003, Trondheim, Norway, March 17-20, 2003, Proceedings, pp. 446-456, 2003, Springer, 3-540-00730-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
DNA computing |
18 | Charlotte Y. Lau, Michael H. Perrott |
Fractional-N frequency synthesizer design at the transfer function level using a direct closed loop realization algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 526-531, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
fractional-N, sigma, design, PLL, frequency, delta, synthesizer |
18 | Natasha Sharygina, James C. Browne |
Model Checking Software via Abstraction of Loop Transitions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FASE ![In: Fundamental Approaches to Software Engineering, 6th International Conference, FASE 2003, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2003, Warsaw, Poland, April 7-11, 2003, Proceedings, pp. 325-340, 2003, Springer, 3-540-00899-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
18 | Yi Qian, Steve Carr 0001, Philip H. Sweany |
Optimizing Loop Performance for Clustered VLIW Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: 2002 International Conference on Parallel Architectures and Compilation Techniques (PACT 2002), 22-25 September 2002, Charlottesville, VA, USA, pp. 271-280, 2002, IEEE Computer Society, 0-7695-1620-3. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
18 | Peng Wu 0001, Paul Feautrier, David A. Padua, Zehra Sura |
Instance-wise points-to analysis for loop-based dependence testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 16th international conference on Supercomputing, ICS 2002, New York City, NY, USA, June 22-26, 2002, pp. 262-273, 2002, ACM, 1-58113-483-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
pointer arrays, Java, dependence analysis, pointer analysis, heap analysis |
18 | Clecio Donizete Lima, Tadao Nakamura |
Exploiting Loop-Level Parallelism with the Shift Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBAC-PAD ![In: 14th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2002), 28-30 October 2002, Vitoria, Espirito Santo, Brazil, pp. 184-194, 2002, IEEE Computer Society, 0-7695-1772-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
18 | Xianglong Huang, Steve Carr 0001, Philip H. Sweany |
Loop Transformations for Architectures with Partitioned Register Banks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES/OM ![In: Proceedings of The Workshop on Languages, Compilers, and Tools for Embedded Systems (LCTES 2001), June 22-23, 2001 / The Workshop on Optimization of Middleware and Distributed Systems (OM 2001), June 18, 2001, Snowbird, Utah, USA, pp. 48-55, 2001, ACM, 1-58113-425-8. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
18 | John W. Sias, Hillery C. Hunter, Wen-mei W. Hwu |
Enhancing loop buffering of media and telecommunications applications using low-overhead predication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 34th Annual International Symposium on Microarchitecture, Austin, Texas, USA, December 1-5, 2001, pp. 262-273, 2001, ACM/IEEE Computer Society, 0-7695-1369-7. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
18 | Tatiana Tabirca, Len Freeman, Sabin Tabirca |
A Theoretical Application of Feedback Guided Dynamic Loop Scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWCC ![In: Advanced Environments, Tools, and Applications for Cluster Computing, NATO Advanced Research Workshop, IWCC 2001, Mangalia, Romania, September 1-6, 2001, Revised Papers, pp. 287-292, 2001, Springer, 3-540-43672-3. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
18 | Chian C. Ho, Chung J. Kuo |
Oversampling sigma-delta modulator stabilized by two local nonlinear feedback loop techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 611-614, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
18 | Ilias Panayiotopoulos, Phillip Constantinou |
Performance Improvement of Nonuniform Polarity-DPLL Symbol Synchronizers by Using Novel Adaptive Statistical Loop Filtering Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCC ![In: Proceedings of the Fifth IEEE Symposium on Computers and Communications (ISCC 2000), 4-6 July 2000, Antibes, France, pp. 756-761, 2000, IEEE Computer Society, 0-7695-0722-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
18 | Nawaaz Ahmed, Nikolay Mateev, Keshav Pingali |
Synthesizing transformations for locality enhancement of imperfectly-nested loop nests. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 14th international conference on Supercomputing, ICS 2000, Santa Fe, NM, USA, May 8-11, 2000, pp. 141-152, 2000, ACM, 1-58113-270-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
18 | Benyong Zhang, Philip E. Allen |
Feed-forward compensated high switching speed digital phase-locked loop frequency synthesizer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 371-374, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
18 | Fenghao Mu, Christer Svensson |
High speed multistage CMOS clock buffers with pulse width control loop. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 541-544, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
18 | Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee |
A Framework for Interprocedural Locality Optimization Using Both Loop and Data Layout Transformations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPP ![In: Proceedings of the International Conference on Parallel Processing 1999, ICPP 1999, Wakamatsu, Japan, September 21-24, 1999, pp. 95-102, 1999, IEEE Computer Society, 0-7695-0350-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
18 | Ananthanarayanan Chockalingam, Laurence B. Milstein |
Open-loop power control performance in DS-CDMA networks with frequency selective fading and non-stationary base stations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Wirel. Networks ![In: Wirel. Networks 4(3), pp. 249-261, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
18 | Jian-Feng Shi, Liang-Fang Chao |
Resource-Constrained Algebraic Transformation for Loop Pipelining. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 6th Great Lakes Symposium on VLSI (GLS-VLSI '96), March 22-23, 1996, Ames, IA, USA, pp. 14-17, 1996, IEEE Computer Society, 0-8186-7502-0. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
18 | Christian Lengauer |
Loop Parallelization in the Polytope Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CONCUR ![In: CONCUR '93, 4th International Conference on Concurrency Theory, Hildesheim, Germany, August 23-26, 1993, Proceedings, pp. 398-416, 1993, Springer, 3-540-57208-2. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
18 | Wei Li 0015, Keshav Pingali |
Access Normalization: Loop Restructuring for NUMA Compilers. (long version: TOCS 11(4): 353-375) ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASPLOS ![In: ASPLOS-V Proceedings - Fifth International Conference on Architectural Support for Programming Languages and Operating Systems, Boston, Massachusetts, USA, October 12-15, 1992., pp. 285-295, 1992, ACM Press, 0-89791-534-8. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
|
18 | Gert Goossens, Joos Vandewalle, Hugo De Man |
Loop Optimization in Register-Transfer Scheduling for DSP-Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 26th ACM/IEEE Design Automation Conference, Las Vegas, Nevada, USA, June 25-29, 1989., pp. 826-831, 1989, ACM Press. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
18 | William J. Collins |
The trouble with for-loop invariants. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGCSE ![In: Proceedings of the 19th SIGCSE Technical Symposium on Computer Science Education, SIGCSE 1988, Atlanta, Georgia, USA, February 25-26, 1988, pp. 1-4, 1988, ACM, 978-0-89791-256-3. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
18 | Saumya K. Debray |
Unfold/Fold Transformations and Loop Optimization of Logic Programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the ACM SIGPLAN'88 Conference on Programming Language Design and Implementation (PLDI), Atlanta, Georgia, USA, June 22-24, 1988, pp. 297-307, 1988, ACM, 0-89791-269-1. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
18 | Hans Kleine Büning, Ulrich Löwen, Stefan Schmitgen |
Loop Detection in Propositional Prolog Programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSL ![In: CSL '88, 2nd Workshop on Computer Science Logic, Duisburg, Germany, October 3-7, 1988, Proceedings, pp. 148-165, 1988, Springer, 3-540-51659-X. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
18 | Janice E. Cuny, Lawrence Snyder |
Conversion from Data-Driven to Synchronous Execution in Loop Programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Program. Lang. Syst. ![In: ACM Trans. Program. Lang. Syst. 9(4), pp. 599-617, 1987. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
|
18 | Sasa Misailovic, Stelios Sidiroglou, Henry Hoffmann, Martin C. Rinard |
Quality of service profiling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSE (1) ![In: Proceedings of the 32nd ACM/IEEE International Conference on Software Engineering - Volume 1, ICSE 2010, Cape Town, South Africa, 1-8 May 2010, pp. 25-34, 2010, ACM, 978-1-60558-719-6. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
loop perforation, quality of service, profiling |
18 | Gregory C. L. Lum, David Y. Y. Yun |
Web-Enabled 3D Game Playing for Looped Knight's Tour. ![Search on Bibsonomy](Pics/bibsonomy.png) |
INTETAIN ![In: Intelligent Technologies for Interactive Entertainment, Third International Conference, INTETAIN 2009, Amsterdam, The Netherlands, June 22-24, 2009. Proceedings, pp. 131-142, 2009, Springer, 978-3-642-02314-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
knight’s tour, 3D grid box, solitaire game, community challenges, growing solved database, Web interaction, SketchUp, Google, closed-loop |
18 | Yang Liu, Ashok Kumar Srivastava, Yao Xu |
A switchable PLL frequency synthesizer and hot carrier effects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, Boston Area, MA, USA, May 10-12 2009, pp. 481-486, 2009, ACM, 978-1-60558-522-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
cmos phase-locked loop, hot carrier effects, jitter, voltage-controlled oscillator, phase noise |
18 | Antonio D'Angelo, Enrico Pagello, H. Yuasa |
Issues on Autonomous Agents from a Roboticle Perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Intell. Robotic Syst. ![In: J. Intell. Robotic Syst. 52(3-4), pp. 389-416, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Roboticle framework, Autopoietic loop, Autonomous robots |
18 | Jing Zhou, Guosun Zeng |
A general data dependence analysis for parallelizing compilers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 45(2), pp. 236-252, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Dependence test, Integer interval theory, Nonlinear subscript, Nested loop |
18 | Jean Sreng, Anatole Lécuyer, Claude Andriot |
Using Vibration Patterns to Provide Impact Position Information in Haptic Manipulation of Virtual Objects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EuroHaptics ![In: Haptics: Perception, Devices and Scenarios, 6th International Conference, EuroHaptics 2008, Madrid, Spain, June 10-13, 2008, Proceedings, pp. 589-598, 2008, Springer, 978-3-540-69056-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
open-loop haptic, vibration patterns, contact location, impact |
18 | Jurgen Westerhoff |
Fear Inducer: A Mixed Reality Audio Experience. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICEC ![In: Entertainment Computing - ICEC 2008, 7th International Conference, Pittsburgh, PA, USA, September 25-27, 2008. Proceedings, pp. 88-93, 2008, Springer, 978-3-540-89221-2. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
audio experience, thrilling experience, biofeedback-loop, mixed reality |
18 | Mingyi Zhang 0002, Ying Zhang, Fangzhen Lin |
A characterization of answer sets for logic programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sci. China Ser. F Inf. Sci. ![In: Sci. China Ser. F Inf. Sci. 50(1), pp. 46-62, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
nested logic programming, characterization of answer sets, completion semantics, tightness, loop formulas |
18 | Anton H. C. Smith, Antonello Monti, Ferdinanda Ponci |
Robust stability and performance analysis using polynomial chaos theory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SCSC ![In: Proceedings of the 2007 Summer Computer Simulation Conference, SCSC 2007, San Diego, California, USA, July 16-19, 2007, pp. 45-52, 2007, Simulation Councils, Inc., 1-56555-316-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP BibTeX RDF |
closed-loop control, uncertainty, modeling and simulation, random process |
18 | Sangho Choe |
CDMA Power Control Using Channel Prediction in Mobile Fading Channels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WWIC ![In: Wired/Wireless Internet Communications, 5th International Conference, WWIC 2007, Coimbra, Portugal, May 23-25, 2007, Proceedings, pp. 370-379, 2007, Springer, 978-3-540-72694-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Predictive closed-loop power control (CLPC), channel prediction, time-varying mobile fading, robustness |
18 | Javed Absar, Min Li 0001, Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Arnout Vandecappelle, Francky Catthoor |
Locality optimization in wireless applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2007, Salzburg, Austria, September 30 - October 3, 2007, pp. 125-130, 2007, ACM, 978-1-59593-824-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
access, reuse, layout, spatial, temporal, loop-nest |
18 | Tao Wei, Jian Mao, Wei Zou, Yu Chen |
A New Algorithm for Identifying Loops in Decompilation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAS ![In: Static Analysis, 14th International Symposium, SAS 2007, Kongens Lyngby, Denmark, August 22-24, 2007, Proceedings, pp. 170-183, 2007, Springer, 978-3-540-74060-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Loop identifying, Unstructuredness coefficient, Control flow analysis, Decompilation |
18 | Li Zhang 0066, Ping-Ping Zhou, Gong-bin Qian, Zhen Ji |
A DWT Blind Image Watermarking Strategy with Secret Sharing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PCM ![In: Advances in Multimedia Information Processing - PCM 2007, 8th Pacific Rim Conference on Multimedia, Hong Kong, China, December 11-14, 2007, Proceedings, pp. 377-384, 2007, Springer, 978-3-540-77254-5. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
blind image watermarking, secret sharing, closed loop, Stirmark |
18 | B. S. Manoj 0001, Vutukuru Mythili Ranganath, C. Siva Ram Murthy |
On Using Multidimensional Markov Chains for Performance Evaluation of Hybrid Wireless Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 17(12), pp. 1496-1511, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Wireless in Local Loop, multihop relaying, multidimensional Markov chains, performance evaluation |
18 | Hsueh-Chih Yang, Lan-Rong Dung |
On multiple-voltage high-level synthesis using algorithmic transformations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 872-876, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
loop shrinking, multiple voltage scheduling, high-level synthesis, retiming, unfolding, low power circuit |
18 | Junwei Zhou, Andrew J. Mason |
Increasing design space of the instruction queue with tag coding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, Chicago, Illinois, USA, April 17-19, 2005, pp. 404-407, 2005, ACM, 1-59593-057-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
instruction queue, wakeup/select loop |
18 | Chung-Hsing Hsu, Ulrich Kremer |
A Quantitative Analysis of Tile Size Selection Algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 27(3), pp. 279-294, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
memory hierarchy optimization, array padding, quantitative case study, performance models, compiler optimizations, loop tiling |
18 | Qing Yi, Ken Kennedy, Haihang You, Keith Seymour, Jack J. Dongarra |
Automatic blocking of QR and LU factorizations for locality. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Memory System Performance ![In: Proceedings of the 2004 workshop on Memory System Performance, Washington, DC, USA, June 8, 2004, pp. 12-22, 2004, ACM, 1-58113-941-1. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
LU, locality, blocking, loop optimizations, LAPACK, QR |
18 | Zhao-Hui Du, Chu-Cheow Lim, Xiao-Feng Li, Chen Yang, Qingyu Zhao, Tin-Fook Ngai |
A cost-driven compilation framework for speculative parallelization of sequential programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the ACM SIGPLAN 2004 Conference on Programming Language Design and Implementation 2004, Washington, DC, USA, June 9-11, 2004, pp. 71-81, 2004, ACM, 1-58113-807-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
cost-driven compilation, speculative parallel threading, loop transformation, thread-level speculation, speculative multithreading, speculative parallelization |
18 | Surin Kittitornkun, Yu Hen Hu |
Processor Array Synthesis from Shift-Variant Deep Nested Do Loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 24(3), pp. 229-249, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
systolic mapping, FPGA, motion estimation, reconfigurable computing, nested loop |
18 | Martin John Burbidge, Frédéric Poullet, Jim Tijou, Andrew Richardson 0001 |
Investigations for Minimum Invasion Digital Only Built-In "Ramp" Based Test Techniques for Charge Pump PLL's. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 19(4), pp. 481-490, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
test, DfT, BIST, jitter, phase locked loop |
18 | Ioana Banicescu, Vijay Velusamy, Johnny Devaprasad |
On the Scalability of Dynamic Scheduling Scientific Applications with Adaptive Weighted Factoring. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Clust. Comput. ![In: Clust. Comput. 6(3), pp. 215-226, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
dynamic loop scheduling, scalability, load balancing, factoring, scientific applications |
18 | Dinesh C. Suresh, Walid A. Najjar, Frank Vahid, Jason R. Villarreal, Greg Stitt |
Profiling tools for hardware/software partitioning of embedded applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES ![In: Proceedings of the 2003 Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'03). San Diego, California, USA, June 11-13, 2003, pp. 189-198, 2003, ACM, 1-58113-647-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
loop analysis, compiler optimization, hardware/software partitioning |
18 | Manuel Arenaz, Juan Touriño, Ramon Doallo |
A GSA-based compiler infrastructure to extract parallelism from complex loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 17th Annual International Conference on Supercomputing, ICS 2003, San Francisco, CA, USA, June 23-26, 2003, pp. 193-204, 2003, ACM, 1-58113-733-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
GSA, loop-level kernel recognition, parallelizing compilers, strongly connected components |
18 | Won-Ki Jeong, Kolja Kähler, Hans-Peter Seidel |
Subdivision Surface Simplification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PG ![In: 10th Pacific Conference on Computer Graphics and Applications, PG 2002, Beijing, China, October 9-11, 2002, pp. 477-480, 2002, IEEE Computer Society, 0-7695-1784-6. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Loop scheme, subdivision surface, mesh simplification, quadric error metric |
18 | Andrey V. Mezhiba, Eby G. Friedman |
Properties of on-chip inductive current loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 12th ACM Great Lakes Symposium on VLSI 2002, New York, NY, USA, April 18-19, 2002, pp. 12-17, 2002, ACM, 1-58113-462-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
loop inductance, inductance, inductive coupling |
18 | Mahmut T. Kandemir, J. Ramanujam |
Data Relation Vectors: A New Abstraction for Data Optimizations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 50(8), pp. 798-810, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
compiler optimizations for memory hierarchy, reuse vectors, data relation vectors, loop transformations, Data reuse, cache locality, memory layouts |
18 | Kemal A. Delic, Umeshwar Dayal |
Knowledge-Based Support Services: Monitoring and Adaptation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DEXA Workshops ![In: 11th International Workshop on Database and Expert Systems Applications (DEXA'00), 6-8 September 2000, Greenwich, London, UK, pp. 1097-1101, 2000, IEEE Computer Society, 0-7695-0680-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
knowledge-based support services, customer support service business, support personnel, automatic problem solving, Hewlett Packard Corporation, monitoring loop, evolving needs, adaptation, knowledge management, knowledge-based system, decision making, productivity, knowledge sharing, business data processing, knowledge extraction, enterprise, knowledge creation, knowledge repositories, knowledge dissemination |
18 | Martin Griebl, Paul Feautrier, Christian Lengauer |
On Index Set Splitting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE PACT ![In: Proceedings of the 1999 International Conference on Parallel Architectures and Compilation Techniques, Newport Beach, California, USA, October 12-16, 1999, pp. 274-282, 1999, IEEE Computer Society, 0-7695-0425-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
index set splitting, polytope model, Automatic parallelization, loop parallelization |
18 | Markus Weinhardt, Wayne Luk |
Pipeline Vectorization for Reconfigurable Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 21-23 April 1999, Napa, CA, USA, pp. 52-62, 1999, IEEE Computer Society, 0-7695-0375-6. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
hardware pipelines, FPGAs, reconfigurable computing, vectorization, loop transformations |
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