Search results for "silicon"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
12	André Seznec, Eric Toullec, Olivier Rochecouste	Register write specialization register read specialization: a path to complexity-effective wide-issue superscalar processors.	MICRO	2002	DBLP DOI BibTeX RDF
12	Paul Master	The Age of Adaptive Computing Is Here.	FPL	2002	DBLP DOI BibTeX RDF
12	Alyssa B. Apsel, Andreas G. Andreou, J. Liu	A 6 channel array of 5 milliwatt, 500 MHz optical receivers in .5 μm SOS CMOS.	ISCAS (5)	2002	DBLP DOI BibTeX RDF
12	Salvatore Baglio, Salvatore Castorina, Luigi Fortuna, Nicolò Savalli	Development of autonomous, mobile micro-electro-mechanical devices.	ISCAS (4)	2002	DBLP DOI BibTeX RDF
12	Akihiko Hanafusa, Tsuneshi Isomura, Yukio Sekiguchi, Hajime Takahashi, Takeyoshi Dohi	Contact Force Evaluation of Orthoses for the Treatment of Malformed Ears.	MICCAI (1)	2002	DBLP DOI BibTeX RDF
12	Eric W. MacDonald, Nur A. Touba	Very Low Voltage Testing of SOI Integrated Circuits.	VTS	2002	DBLP DOI BibTeX RDF
12	Sreejit Chakravarty, Ankur Jain, Nandakumar Radhakrishnan, Eric W. Savage, Sujit T. Zachariah	Experimental Evaluation of Scan Tests for Bridges.	ITC	2002	DBLP DOI BibTeX RDF
12	Subir K. Roy, S. Ramesh, Supratik Chakraborty, Tsuneo Nakata, Sreeranga P. Rajan	Functional Verification of System on Chips-Practices, Issues and Challenges (Tutorial Abstract).	ASP-DAC/VLSI Design	2002	DBLP DOI BibTeX RDF
12	Mike Brunoli, Masao Hotta, Felicia James, Rudy Koch, Roy McGuffin, Andrew J. Moore	Analog intellectual property: now? Or never?	DAC	2002	DBLP DOI BibTeX RDF
12	Tom J. Smy, David J. Walkey, Steven K. Dew	A 3D thermal simulation tool for integrated devices-Atar.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2001	DBLP DOI BibTeX RDF
12	Martin R. Frerichs	Precise extraction of ultra deep submicron interconnect parasitics with parameterizable 3D-modeling: invited talk.	ASP-DAC	2001	DBLP DOI BibTeX RDF
12	Mahmoud Al-Nsour, Hoda S. Abdel-Aty-Zohdy	MOS fully analog reinforcement neural network chip.	ISCAS (3)	2001	DBLP DOI BibTeX RDF
12	Martin Huja, Miroslav Husák	Thermal Microactuators for Optical Purpose.	ITCC	2001	DBLP DOI BibTeX RDF
12	Pradip Bose	Testing for Function and Performance: Towards an Integrated Processor Validation Methodology.	J. Electron. Test.	2000	DBLP DOI BibTeX RDF	performance test cases, bounds modeling, performance validation, integrated methodology, test generation, microprocessor testing
12	Gaye Lightbody, Richard L. Walke, Roger F. Woods, John V. McCanny	Linear QR Architecture for a Single Chip Adaptive Beamformer.	J. VLSI Signal Process.	2000	DBLP DOI BibTeX RDF
12	Dennis W. Prather	Three Dimensional VLSI-Scale Interconnects.	IPDPS Workshops	2000	DBLP DOI BibTeX RDF
12	Dan W. Hammerstrom	Computational Neurobiology Meets Semiconductor Engineering.	ISMVL	2000	DBLP DOI BibTeX RDF
12	Michael Reinhardt, Michael Santarini	What is Design Quality? How can Quality in Electronic Design be Quantified?	ISQED	2000	DBLP DOI BibTeX RDF
12	Kwan-Do Kim, Young-Kwan Park, Jun-Ha Lee, Jeong-Taek Kong, Hee-Sung Kang, Young-Wug Kim, Seok-Jin Kim	Three Dimensional Analysis of Thermal Degradation Effects in FDSOI MOSFET's.	ISQED	2000	DBLP DOI BibTeX RDF	FDSOI, self-heating, finger type, bar type
12	Rajiv V. Joshi, Wei Hwang, S. C. Wilson, Ghavam V. Shahidi, Ching-Te Chuang	A Low Power 900 MHz Register File (8 Ports, 32 Words x 64 Bits) in 1.8V, 0.25µm SOI Technology.	VLSI Design	2000	DBLP DOI BibTeX RDF
12	Paul Lieverse, Ed F. Deprettere, Bart Kienhuis, Erwin A. de Kock	A Clustering Approach to Explore Grain-Sizes in the Definition of Processing Elements in Dataflow Architectures.	J. VLSI Signal Process.	1999	DBLP DOI BibTeX RDF
12	Hugo De Man	System-on-Chip Design: Impact on Education and Research.	IEEE Des. Test Comput.	1999	DBLP DOI BibTeX RDF
12	Terry Thomas	Technology for IP Reuse and Portability.	IEEE Des. Test Comput.	1999	DBLP DOI BibTeX RDF
12	Shung-Shing Lee, Shi-Jinn Horng, Horng-Ren Tsai	Entropy thresholding and its parallel algorithm on the reconfigurable array of processors with wider bus networks.	IEEE Trans. Image Process.	1999	DBLP DOI BibTeX RDF
12	Ivo Bolsens, Wojtek Maly, Ludo Deferm, Jo Borel, Harry J. M. Veendrick	Single Chip or Hybrid System Integration.	DATE	1999	DBLP DOI BibTeX RDF
12	Jean-François Agaësse, Bernard Laurent	Virtual Components Application and Customization.	DATE	1999	DBLP DOI BibTeX RDF
12	Werner De Rammelaere, K. Eckert, T. Lawell, Ralph McGarity, F. Steininger, Patricia Le Moenner, E. Hilkens	Catalyst: A DSIP Design Flow Development in Industry.	ISSS	1999	DBLP DOI BibTeX RDF
12	Tolga Yalçin, Neslin Ismailoglu	Design of a fully-static differential low-power CMOS flip-flop.	ISCAS (1)	1999	DBLP DOI BibTeX RDF
12	Luca Breveglieri, Luigi Dadda	A VLSI inner product macrocell.	IEEE Trans. Very Large Scale Integr. Syst.	1998	DBLP DOI BibTeX RDF
12	Roger DuBois	A Biologically Inspired Object Tracking System.	ICES	1998	DBLP DOI BibTeX RDF
12	A. Castillejo, D. Veychard, Salvador Mir, Jean-Michel Karam, Bernard Courtois	Failure mechanisms and fault classes for CMOS-compatible microelectromechanical systems.	ITC	1998	DBLP DOI BibTeX RDF
12	Mario Paniccia, Travis M. Eiles, V. R. M. Rao, Wai Mun Yee	Novel optical probing technique for flip chip packaged microprocessors.	ITC	1998	DBLP DOI BibTeX RDF
12	Jainendra Kumar	Prototyping the M68060 for Concurrent Verification.	IEEE Des. Test Comput.	1997	DBLP DOI BibTeX RDF
12	Ranjit Gharpurey, Srinath Hosur	Transform domain techniques for efficient extraction of substrate parasitics.	ICCAD	1997	DBLP DOI BibTeX RDF	Green Function, orthonormal transforms, parasitics, substrate coupling
12	KiJong Lee, Kiyoung Choi	Self-timed divider based on RSD number system.	IEEE Trans. Very Large Scale Integr. Syst.	1996	DBLP DOI BibTeX RDF
12	Colin Chiu Wing Hui, Tiong Jiu Ding, John V. McCanny, Roger F. Woods	A New FFT Architecture and Chip Design for Motion Compensation based on Phase Correlation.	ASAP	1996	DBLP DOI BibTeX RDF
12	Mani B. Srivastava, Robert W. Brodersen	System level hardware module generation.	IEEE Trans. Very Large Scale Integr. Syst.	1995	DBLP DOI BibTeX RDF
12	Mark E. Law	Grid adaption near moving boundaries in two dimensions for IC process simulation.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1995	DBLP DOI BibTeX RDF
12	Hyeong-Kyo Kim, Thomas P. Barnwell III	A design synthesis system for recursive DSP algorithms represented by fully specified flow graphs.	J. VLSI Signal Process.	1995	DBLP DOI BibTeX RDF
12	M. Karim Moallemi, Hui Zhang	A general numerical procedure for multilayer multistep IC process simulation.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1994	DBLP DOI BibTeX RDF
12	Yuping He, Ugur Çilingiroglu, Edgar Sánchez-Sinencio	A high-density and low-power charge-based Hamming network.	IEEE Trans. Very Large Scale Integr. Syst.	1993	DBLP DOI BibTeX RDF
12	Vijay Nagasamy, Neerav Berry, Carlos Dangelo	Specification, Planning, and Synthesis in a VHDL Design Environment.	IEEE Des. Test Comput.	1992	DBLP DOI BibTeX RDF
12	Richard B. Fair, Carl L. Gardner, Michael J. Johnson, Stephen W. Kenkel, Donald J. Rose, J. E. Rose, Ravi Subrahmanyan	Two-dimensional process simulation using verified phenomenological models.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1991	DBLP DOI BibTeX RDF
12	Stephen Walters	Computer-Aided Prototyping for ASIC-Based Systems.	IEEE Des. Test Comput.	1991	DBLP DOI BibTeX RDF
12	Kenji Taniguchi 0001, Yoshiaki Shibata, Chihiro Hamaguchi	Process modeling and simulation: boundary conditions for point defect-based impurity diffusion model.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1990	DBLP DOI BibTeX RDF
12	Jef L. van Meerbergen, Jos Huisken, Paul E. R. Lippens, O. McArdle, R. Segers, Gert Goossens, Jan Vanhoof, Dirk Lanneer, Francky Catthoor, Hugo De Man	An integrated automatic design system for complex DSP algorithms.	J. VLSI Signal Process.	1990	DBLP DOI BibTeX RDF
12	Martin D. Giles	Defect-coupled diffusion at high concentrations.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1989	DBLP DOI BibTeX RDF
12	Chin-Long Wey	On yield consideration for the design of redundant programmable logic arrays.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1988	DBLP DOI BibTeX RDF
12	Chin-Long Wey	On Yield Consideration for the Design of Redundant Programmable Logic Arrays.	DAC	1987	DBLP DOI BibTeX RDF
12	Roger Segelken	A Case History of a Computer Media Event - Introducing a Supercomputer Center.	SIGDOC	1985	DBLP DOI BibTeX RDF
12	Dwight D. Hill, John P. Fishburn, Mary Diane Palmer Leland	Effective use of virtual grid compaction in macro-module generators.	DAC	1985	DBLP DOI BibTeX RDF
12	David J. Elliott	How smart the computer: status and future on building its brain.	AFIPS National Computer Conference	1984	DBLP DOI BibTeX RDF
12	Tony Zingale	Distributed processing with iAPX 186 microprocessor systems.	AFIPS National Computer Conference	1982	DBLP DOI BibTeX RDF
12	Bill Huston	Practical CMOS microprocessor systems.	AFIPS National Computer Conference	1982	DBLP DOI BibTeX RDF
12	Randy M. Dumse	Expanded single-chip principles in practical application.	AFIPS National Computer Conference	1982	DBLP DOI BibTeX RDF
9	Sidharth Thomas, Sam Razavian, Jaskirat Singh Virdi, Wei Sun, Benyamin Fallahi Motlagh, Aydin Babakhani	A 400-GHz Efficient Radiator and OOK Transceiver for Multi-Gb/s Wireless Communication in Silicon.	IEEE J. Solid State Circuits	2024	DBLP DOI BibTeX RDF
9	Loïc France, Florent Bruguier, David Novo, Maria Mushtaq, Pascal Benoit	Reducing the Silicon Area Overhead of Counter-Based Rowhammer Mitigations.	IEEE Comput. Archit. Lett.	2024	DBLP DOI BibTeX RDF
9	Jani Babu Shaik, Siona Menezes Picardo, Sonal Singhal, Nilesh Goel	Reliability-aware design of Integrate-and-Fire silicon neurons.	Integr.	2024	DBLP DOI BibTeX RDF
9	Shih-Nung Chen, Shi-Hao Chen	Application of Generative Adversarial Networks for Virtual Silicon Data Generation and Design-Technology Co-Optimization: A Study on WAT and CP.	IEEE Access	2024	DBLP DOI BibTeX RDF
9	Sourav Dev, Karanveer Singh, Mircea Catuneanu, Hrishikesh Vithalani, Abhinand Venugopalan, Janosch Meier, Thomas Schneider 0010, Kambiz Jamshidi	Energy-Efficient Forward-Biased PIN Silicon Mach-Zehnder Modulator With 50 μm Active Phase Shifter Length.	IEEE Access	2024	DBLP DOI BibTeX RDF
9	Haihua Wang, Zekun Zhao, Qiumeng Chen, Yu-Long Jiang, Jing Wan	Back-Gate Fully Depleted Silicon-on-Insulator P-Channel Schottky Barrier MOSFET With Ultrahigh Voltage Sensitivity for Label-Free Virus RNA Detection.	IEEE Trans. Instrum. Meas.	2024	DBLP DOI BibTeX RDF
9	Zhongzhi Jiang, Guanfeng Du, Ziwei Song, Shengxian Cao, Gong Wang, Le Ma	Electromagnetic Method for Detecting Black Piece on Monocrystalline Silicon Photovoltaic Panels.	IEEE Trans. Instrum. Meas.	2024	DBLP DOI BibTeX RDF
9	Jie Xu, Chu-Ming Guo, Cheng Yang, Hai-Feng Zhang	Theoretical Study of a Porous Silicon Cavity Based on Second Harmonic Waves Formed by Ferroelectric Crystals for Wide Range Multiphysical and Chemical Measurement.	IEEE Trans. Instrum. Meas.	2024	DBLP DOI BibTeX RDF
9	Kai Wang, Ying Zhang, Chaoyong Wang, Jun Zhao, Le Liu, Jiaye Chen, Yarui Wang	Discovery of a series of silicon-based ferrimagnets in CrMnSin (n = 4-20) clusters.	J. Comput. Chem.	2024	DBLP DOI BibTeX RDF
9	Zhaohui Jiang 0001, Ke Jiang, Yongfang Xie, Dong Pan, Weihua Gui 0001	A Cooperative Silicon Content Dynamic Prediction Method With Variable Time Delay Estimation in the Blast Furnace Ironmaking Process.	IEEE Trans. Ind. Informatics	2024	DBLP DOI BibTeX RDF
9	Sergey Lychev, Alexander Digilov, Gleb Demin, Evgeney Gusev, Ivan Kushnarev, Nikolay Djuzhev, Vladimir Bespalov	Deformations of Single-Crystal Silicon Circular Plate: Theory and Experiment.	Symmetry	2024	DBLP DOI BibTeX RDF
9	Vishal Saxena, Ankur Kumar, Shubham Mishra, Samuel Palermo, Kadaba R. Lakshmikumar	Optical Interconnects Using Hybrid Integration of CMOS and Silicon-Photonic ICs.	IEEE Trans. Circuits Syst. II Express Briefs	2024	DBLP DOI BibTeX RDF
9	Dadasikandar Kanekal, Sumit Kumar Jindal	Investigation of MEMS Single Turn Meander-Shaped Silicon Carbide Piezoresistive Pressure Sensor on a Clamped Circular Diaphragm for High Pressure Harsh Environment Applications.	J. Circuits Syst. Comput.	2024	DBLP DOI BibTeX RDF
9	Prince Philip, Kapil Jainwal, André van Schaik, Chetan Singh Thakur	Tau-Cell-Based Analog Silicon Retina With Spatio- Temporal Filtering and Contrast Gain Control.	IEEE Trans. Biomed. Circuits Syst.	2024	DBLP DOI BibTeX RDF
9	Yanan Tao, Chao Liang, Ziqi Mei, Zhiqiang Song, Yu Wu, Yunna Sun, Wenqiang Zhang, Yong Ruan, Xiaoguang Zhao	Numerical simulation of copper electrodeposition for Through Silicon Via (TSV) with SPS-PEG-Cl additive system.	Microelectron. J.	2024	DBLP DOI BibTeX RDF
9	Lei Tang 0002, Kangrong Li, Xingshe Zhou 0001, Qiao Yang, Penghui Pan, Daowei Wu, Baoxia Li, Yanling Wang, Nailiang Kuang, Liaoliao Zhang	Analytical equivalent circuit modeling and analysis of complex BGA for 3D silicon-interposer packaging.	Microelectron. J.	2024	DBLP DOI BibTeX RDF
9	Venkata Sai Praneeth Karempudi, Sairam Sri Vatsavai, Ishan G. Thakkar, Oluwaseun Adewunmi Alo, Jeffrey Todd Hastings, Justin Scott Woods	A Low-Dissipation and Scalable GEMM Accelerator with Silicon Nitride Photonics.	CoRR	2024	DBLP DOI BibTeX RDF
9	Salma Afifi, Febin Sunny, Mahdi Nikdast, Sudeep Pasricha	Accelerating Neural Networks for Large Language Models and Graph Processing with Silicon Photonics.	CoRR	2024	DBLP DOI BibTeX RDF
9	Michael Tomlinson, Joe Li, Andreas Andreou	Designing Silicon Brains using LLM: Leveraging ChatGPT for Automated Description of a Spiking Neuron Array.	CoRR	2024	DBLP DOI BibTeX RDF
9	Rui Tang, Shuhei Ohno, Ken Tanizawa, Kazuhiro Ikeda, Makoto Okano, Kasidit Toprasertpong, Shinichi Takagi, Mitsuru Takenaka	A symmetric silicon microring resonator optical crossbar array for accelerated inference and training in deep learning.	CoRR	2024	DBLP DOI BibTeX RDF
9	Velat Kilic, Neil Macfarlane, Jasper Stround, Samuel Metais, Milad Alemohammad, A. Brinton Cooper, Amy C. Foster, Mark A. Foster	Machine Learning Resistant Amorphous Silicon Physically Unclonable Functions (PUFs).	CoRR	2024	DBLP DOI BibTeX RDF
9	Elias Perdomo, Alexander Kropotov, Francelly Cano, Syed Zafar, Teresa Cervero, Xavier Martorell, Behzad Salami 0001	Makinote: An FPGA-Based HW/SW Platform for Pre-Silicon Emulation of RISC-V Designs.	CoRR	2024	DBLP DOI BibTeX RDF
9	Tzu-Chien Hsueh, Yeshaiahu Fainman, Bill Lin 0001	Monolithic Silicon-Photonics Linear-Algebra Accelerators Enabling Next-Gen Massive MIMO.	CoRR	2024	DBLP DOI BibTeX RDF
9	Naoto Sato, Tomonori Sekiguchi, Takeru Utsugi, Hiroyuki Mizuno	Generating Shuttling Procedures for Constrained Silicon Quantum Dot Array.	CoRR	2024	DBLP DOI BibTeX RDF
9	Philipp Schoenegger, Indre Tuminauskaite, Peter S. Park, Philip E. Tetlock	Wisdom of the Silicon Crowd: LLM Ensemble Prediction Capabilities Rival Human Crowd Accuracy.	CoRR	2024	DBLP DOI BibTeX RDF
9	Raphael Schoof, Giuseppe Fabian Castelli, Willy Dörfler	Comparison of Different Elastic Strain Definitions for Largely Deformed SEI of Chemo-Mechanically Coupled Silicon Battery Particles.	CoRR	2024	DBLP DOI BibTeX RDF
9	Tengji Xu, Weipeng Zhang, Jiawei Zhang, Zeyu Luo, Qiarong Xiao, Benshan Wang, Mingcheng Luo, Xingyuan Xu, Bhavin J. Shastri, Paul R. Prucnal, Chaoran Huang 0004	Control-free and efficient silicon photonic neural networks via hardware-aware training and pruning.	CoRR	2024	DBLP DOI BibTeX RDF
9	Seungjong Sun, Eungu Lee, Dongyan Nan, Xiangying Zhao, Wonbyung Lee, Bernard J. Jansen, Jang-Hyun Kim	Random Silicon Sampling: Simulating Human Sub-Population Opinion Using a Large Language Model Based on Group-Level Demographic Information.	CoRR	2024	DBLP DOI BibTeX RDF
9	Febin Sunny, Ebadollah Taheri, Mahdi Nikdast, Sudeep Pasricha	Silicon Photonic 2.5D Interposer Networks for Overcoming Communication Bottlenecks in Scale-out Machine Learning Hardware Accelerators.	CoRR	2024	DBLP DOI BibTeX RDF
9	Zhenguo Wu, Liang Yuan Dai, Yuyang Wang 0003, Songli Wang, Keren Bergman	Flexible silicon photonic architecture for accelerating distributed deep learning.	J. Opt. Commun. Netw.	2024	DBLP DOI BibTeX RDF
9	Yanbin Li, Jiajie Zhu, Zhe Liu 0001, Ming Tang 0002, Shougang Ren	Deep Learning Gradient Visualization-Based Pre-Silicon Side-Channel Leakage Location.	IEEE Trans. Inf. Forensics Secur.	2024	DBLP DOI BibTeX RDF
9	Neda Khiabani, Ching-Wen Chiang, Nai-Chen Liu, Pai-Yen Chen, Yen-Cheng Kuan, Chung-Tse Michael Wu	Metamaterial-Enabled Ultrawideband mmWave Antenna-in-Package Using Heterogeneously-Integrated Silicon IPD and HDI-PCB for B5G/ 6G Applications.	IEEE J. Emerg. Sel. Topics Circuits Syst.	2024	DBLP DOI BibTeX RDF
9	José Antonio Dueñas, Alex Cobo, Franco Galtarossa, Alain Goasduff, Daniele Mengoni, Ángel Miguel Sánchez Benítez	Energy Resolution from a Silicon Detector's Interstrip Regions.	Sensors	2024	DBLP DOI BibTeX RDF
9	Lukas Brinkmann, Erika Garutti, Stephan Martens, Joern Schwandt	Correcting the Non-Linear Response of Silicon Photomultipliers.	Sensors	2024	DBLP DOI BibTeX RDF
9	Jun Zhao, Tao Long, Mingyang Wang, Manwen Liu, Minghua Tang, Zheng Li	Design and 3D Electrical Simulations for a Controllable Equal-Gap Large-Area Silicon Drift Detector.	Sensors	2024	DBLP DOI BibTeX RDF
9	Adam Wawerski, Barbara Siemiatkowska, Michal Józwik, Bartlomiej Fajdek, Malgorzata Partyka	Machine Learning Method and Hyperspectral Imaging for Precise Determination of Glucose and Silicon Levels.	Sensors	2024	DBLP DOI BibTeX RDF
9	Maria Carulla, Rebecca Barten, Filippo Baruffaldi, Anna Bergamaschi, Giacomo Borghi, Maurizio Boscardin, Martin Brückner, Tim A. Butcher, Matteo Centis Vignali, Roberto Dinapoli, Simon Ebner, Francesco Ficorella, Erik Fröjdh, Dominic Greiffenberg, Omar Hammad Ali, Shqipe Hasanaj, Julian Heymes, Viktoria Hinger, Thomas King, Pawel Kozlowski, Carlos Lopez Cuenca, Davide Mezza, Konstantinos Moustakas, Aldo Mozzanica, Giovanni Paternoster, Kirsty A. Paton, Sabina Ronchin, Christian Ruder, Bernd Schmitt, Patrick Sieberer, Dhanya Thattil, Konrad Vogelsang, Xiangyu Xie, Jiaguo Zhang	Quantum Efficiency Measurement and Modeling of Silicon Sensors Optimized for Soft X-ray Detection.	Sensors	2024	DBLP DOI BibTeX RDF
9	Diego Real, David Calvo, Juan de Dios Zornoza, Mario Manzaneda, Rebecca Gozzini, Carlos Ricolfe-Viala, Rafael Lajara, Francisco Albiol	Fast Coincidence Filter for Silicon Photomultiplier Dark Count Rate Rejection.	Sensors	2024	DBLP DOI BibTeX RDF
9	Loic Laplatine, Sonia Messaoudene, Nicolas Gaignebet, Cyril Herrier, Thierry Livache	Correction of 2π Phase Jumps for Silicon Photonic Sensors Based on Mach Zehnder Interferometers with Application in Gas and Biosensing.	Sensors	2024	DBLP DOI BibTeX RDF
9	Kaiwei Lu, Beiju Huang, Xiaoqing Lv, Zan Zhang, Zhengtai Ma	Ultrasensitive Silicon Photonic Refractive Index Sensor Based on Hybrid Double Slot Subwavelength Grating Microring Resonator.	Sensors	2024	DBLP DOI BibTeX RDF
9	Min-Su Kim, Sang-Sun Yoo	Low-Noise Amplifier with Bypass for 5G New Radio Frequency n77 Band and n79 Band in Radio Frequency Silicon on Insulator Complementary Metal-Oxide Semiconductor Technology.	Sensors	2024	DBLP DOI BibTeX RDF
9	Hyunchul Sagong, Seongcheol Jeong, Hojoon Lee	Analysis of Failure Mechanism and Reliability Enhancement of Silicon Strain Gauge-Based Pressure Sensor for Automotive Applications.	Sensors	2024	DBLP DOI BibTeX RDF
9	Yu-Yu Liu, Lingxia Mu, Peng-Ju Zhang, Ding Liu	Research on Classification Algorithm of Silicon Single-Crystal Growth Temperature Gradient Trend Based on Multi-Level Feature Fusion.	Sensors	2024	DBLP DOI BibTeX RDF
9	Changhee Kim, Seungju Han, Taehwan Kim, Sangmin Lee 0002	Implantable pH Sensing System Using Vertically Stacked Silicon Nanowire Arrays and Body Channel Communication for Gastroesophageal Reflux Monitoring.	Sensors	2024	DBLP DOI BibTeX RDF
9	Massimo Caccia, Agnese Giaz, Marco Galoppo, Romualdo Santoro, Micheal Martyn, Carla Bianchi, Raffaele Novario, Peter Woulfe, Sinead O'Keeffe	Characterisation of a Silicon Photomultiplier Based Oncological Brachytherapy Fibre Dosimeter.	Sensors	2024	DBLP DOI BibTeX RDF