Search results for "PI-Bus"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
19	Ilgin Gökasar, Yigit Çetinel	Analysis of the Effect of the Lane-Drops on the Traffic near Bus Stops using Bus GPS Data.	ANT/SEIT	2017	DBLP DOI BibTeX RDF
19	Tinghai Pang, Lei Duan, Jyrki Nummenmaa, Jie Zuo, Peng Zhang	Bus-OLAP: A Bus Journey Data Management Model for Non-on-time Events Query.	APWeb/WAIM (2)	2017	DBLP DOI BibTeX RDF
19	Junghan Baek, Keemin Sohn	Deep-Learning Architectures to Forecast Bus Ridership at the Stop and Stop-To-Stop Levels for Dense and Crowded Bus Networks.	Appl. Artif. Intell.	2016	DBLP DOI BibTeX RDF
19	Brian J. d'Auriol	All-optical Linear Array with a Reconfigurable Pipelined Bus System (OLARPBS) optical bus parallel computing model.	J. Supercomput.	2016	DBLP DOI BibTeX RDF
19	Dan Wan, Camille Kamga, Wei Hao, Aaron Sugiura, Eric B. Beaton	Customer satisfaction with bus rapid transit: a study of New York City select bus service applying structural equation modeling.	Public Transp.	2016	DBLP DOI BibTeX RDF
19	Kenny Supangat, Yustinus Eko Soelistio	Bus Stops Location and Bus Route Planning Using Mean Shift Clustering and Ant Colony in West Jakarta.	CoRR	2016	DBLP BibTeX RDF
19	Raul S. Barth, Renata Galante	Passenger density and flow analysis and city zones and bus stops classification for public bus service management.	SBBD	2016	DBLP BibTeX RDF
19	João F. M. Sarubbi, Caio Mário Mesquita, Elizabeth F. Wanner, Vinícius Fernandes dos Santos, Cristiano M. Silva	A strategy for clustering students minimizing the number of bus stops for solving the school bus routing problem.	NOMS	2016	DBLP DOI BibTeX RDF
19	Luyan Xiao, Xiaopeng Fan, Haixia Mao, Cheng-Zhong Xu 0001, Ping Lu 0008, Shengmei Luo	When Taxi Meets Bus: Night Bus Stop Planning over Large-Scale Traffic Data.	CCBD	2016	DBLP DOI BibTeX RDF
19	Joana Hora Martins, Teresa Galvão Dias, Ana S. Camanho	Improving the Service Level of Bus Transportation Systems: Evaluation and Optimization of Bus Schedules' Robustness.	IESS	2016	DBLP DOI BibTeX RDF
19	Jiqin Zhou, Weigong Zhang, Keni Qiu, Xiaoyan Zhu	UM-BUS: An online fault-tolerant bus for embedded systems.	ISQED	2016	DBLP DOI BibTeX RDF
19	Khaja Ahmad Shaik, Kiyoo Itoh 0002, Amara Amara	0.5-V 50-mV-swing 1.2-GHz 28-nm-FD-SOI 32-bit dynamic bus architecture with dummy bus.	ISQED	2016	DBLP DOI BibTeX RDF
19	Liang Li 0004, Chao Yang 0006, Yahui Zhang, Lipeng Zhang, Jian Song	Correctional DP-Based Energy Management Strategy of Plug-In Hybrid Electric Bus for City-Bus Route.	IEEE Trans. Veh. Technol.	2015	DBLP DOI BibTeX RDF
19	Xiaoxiao Jiang, David H. C. Du	BUS-VANET: A BUS Vehicular Network Integrated with Traffic Infrastructure.	IEEE Intell. Transp. Syst. Mag.	2015	DBLP DOI BibTeX RDF
19	Cong Bai, Zhong-Ren Peng, Qing-Chang Lu, Jian Sun	Dynamic Bus Travel Time Prediction Models on Road with Multiple Bus Routes.	Comput. Intell. Neurosci.	2015	DBLP DOI BibTeX RDF
19	Shucong Jia, Zishan Liu, Konglin Zhu, Lin Zhang 0013, Zubair Md. Fadlullah, Nei Kato	Bus-Ads: Bus-based priced advertising in VANETs using coalition formation game.	ICC	2015	DBLP DOI BibTeX RDF
19	Longcheng Tan, Bin Wu 0007, Sebastian Rivera	A bipolar-DC-bus EV fast charging station with intrinsic DC-bus voltages equalization and minimized voltage ripples.	IECON	2015	DBLP DOI BibTeX RDF
19	Masamichi Takakura, Mikiko Sode Tanaka	Bus transportation system design of community bus "Notty" based on optimization theory.	SII	2015	DBLP DOI BibTeX RDF
19	Han-Shue Tan, Jihua Huang	The design and implementation of an automated bus in revenue service on a bus rapid transit line.	ACC	2014	DBLP DOI BibTeX RDF
19	Chun-Ming Tsai, Zong-Mu Yeh	Detection of Bus Routes Number in Bus Panel via Learning Approach.	ACIIDS (2)	2014	DBLP DOI BibTeX RDF
19	Peng Wu 0004, Feng Chu 0001, Ada Che, Qin Shi	A bus lane reservation problem in urban bus transit network.	ITSC	2014	DBLP DOI BibTeX RDF
19	Ching-Ching Cheng, Chun-Ming Tsai	Using Red-Otsu Thresholding to Detect the Bus Routes Number for Helping Blinds to Take Bus.	IEA/AIE (1)	2014	DBLP DOI BibTeX RDF
19	Hua-Hsin Yeh, Wen-Pin Tu, Jian-Zhi Shen, Tung-Hua Yen, Shih-Hsu Huang	Abstract bus interface unit for ESL design from TLM 2.0 communications to the real bus protocol.	APCCAS	2014	DBLP DOI BibTeX RDF
19	Virot Chiraphadhanakul, Cynthia Barnhart	Incremental bus service design: combining limited-stop and local bus services.	Public Transp.	2013	DBLP DOI BibTeX RDF
19	Patrick Schittekat, Joris Kinable, Kenneth Sörensen, Marc Sevaux, Frits C. R. Spieksma, Johan Springael	A metaheuristic for the school bus routing problem with bus stop selection.	Eur. J. Oper. Res.	2013	DBLP DOI BibTeX RDF
19	Chung-Ming Own, Da-Sheng Lee, Ti-Ho Wang, De-Jun Wang, Yu-Lun Ting	Performance Evaluation of UHF RFID Technologies for Real-Time Bus Recognition in the Taipei Bus Station.	Sensors	2013	DBLP DOI BibTeX RDF
19	Ikuko Shigihara, Akiko Arai, Osamu Saitou, Yuji Kuwahara, Masaru Kamada	A Dynamic Bus Guide Based on Real-Time Bus Locations - A Demonstration Plan.	NBiS	2013	DBLP DOI BibTeX RDF
19	Jorge Valero-Rodriguez, Manuel Garcia-Plaza, Joaquin Eloy-Garcia Carrasco	Dynamic performance of a back-to-back converter under grid disturbances with a classical DC-bus voltage control loop v.s. a DC-bus voltage control loop with Ni-Cd and Ion-Li batteries.	IECON	2013	DBLP DOI BibTeX RDF
19	Chun-Ming Tsai, Zong-Mu Yeh	Text detection in bus panel for visually impaired people ¿seeing¿ bus route number.	ICMLC	2013	DBLP DOI BibTeX RDF
19	Mohammed Ridha Benosman	Conception et évaluation de performance d'un Bus applicatif, massivement parallèle et orienté service. (Design and Performance Evaluation of a Massively Parallel Service-Oriented Bus).		2013	RDF
19	Tsung-Po Chen	Zero-Sequence Circulating Current Reduction Method for Parallel HEPWM Inverters Between AC Bus and DC Bus.	IEEE Trans. Ind. Electron.	2012	DBLP DOI BibTeX RDF
19	Po-Hsun Wu, Tsung-Yi Ho	Bus-driven floorplanning with bus pin assignment and deviation minimization.	Integr.	2012	DBLP DOI BibTeX RDF
19	Kan Zhao, Qiang Li, Guosheng Zhang, Wei Wang, Zhongxiang Li	Research on driving characteristics of double-articulated bus docking the bay bus station.	EMEIT	2011	DBLP DOI BibTeX RDF
19	Mojaharul Islam, Hong-Hee Lee	A Comprehensive Study on IEC61850 Process Bus Architecture and Spit Bus Based Differential Protection.	ICIC (2)	2011	DBLP DOI BibTeX RDF
19	Kota Tsubouchi, Hiroyuki Yamato, Kazuo Hiekata	Development and Evaluation of New Interface for Registration of New Bus Stops for the On-Demand Bus System.	Int. J. Intell. Transp. Syst. Res.	2010	DBLP DOI BibTeX RDF
19	Ji Gu, Hui Guo 0001	An Efficient Segmental Bus-Invert Coding Method for Instruction Memory Data Bus Switching Reduction.	EURASIP J. Embed. Syst.	2009	DBLP DOI BibTeX RDF
19	Yindong Shen, Jiahong Xia	Integrated bus transit scheduling for the Beijing bus group based on a unified mode of operation.	Int. Trans. Oper. Res.	2009	DBLP DOI BibTeX RDF
19	Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, James W. Tschanz, Vivek De	Serial-Link Bus: A Low-Power On-Chip Bus Architecture.	IEEE Trans. Circuits Syst. I Regul. Pap.	2009	DBLP DOI BibTeX RDF
19	Ji Gu, Hui Guo 0001	A Segmental Bus-invert Coding Method for Instruction Memory Data Bus Power Efficiency.	ISCAS	2009	DBLP DOI BibTeX RDF
19	Chi Dung Tran	Vers un environnement générique et configurable pour l'aide à l'évaluation des systèmes interactifs à base d'agents, Application à un Système d'Aide à l'Information voyageur dans le domaine des transports commun (bus, Tram). (Towards a generic and configurable environment to support the evaluation of the agent-based interactive systems with agents, Application to a IAS (Information Assistance System) for passengers in the field of common transport (bus, tram)).		2009	RDF
19	Valérie Guihaire	Modélisation et Optimisation pour le Graphicage des Lignes de Bus. (Models and Optimisation for Bus Network Timetabling).		2009	RDF
19	Shangyao Yan, Ching-Hui Tang	An Integrated Framework for Intercity Bus Scheduling Under Stochastic Bus Travel Times.	Transp. Sci.	2008	DBLP DOI BibTeX RDF
19	Neeta Doifode, Dinesh Padole, Preeti R. Bajaj	Dynamic Lottery Bus Arbiter for Shared Bus System on Chip: A Design Approach with VHDL.	ICETET	2008	DBLP DOI BibTeX RDF
19	Tiedong Wang, Fengjing Shao, Rencheng Sun, He Huang	A Hardware Implement of Bus Bridge Based on Single CPU and Dual Bus Architecture.	ISCSCT (1)	2008	DBLP DOI BibTeX RDF
19	Fraser N. McLeod	Estimating bus passenger waiting times from incomplete bus arrivals data.	J. Oper. Res. Soc.	2007	DBLP DOI BibTeX RDF
19	Myungchul Yoon, Byeong-Hee Roh	A Novel Low-Power Bus Design for Bus-Invert Coding.	IEICE Trans. Electron.	2007	DBLP DOI BibTeX RDF
19	Rasheek Rifaat, Bruce Baily, Gerald Dalke, Brent Duncan, Charles J. Mozina, Louie J. Powell, Jay Fischer, Alex Y. Wu, Joe Weber, James Daley	Bus and Breaker Fail Protection for Industrial and Commercial Power Systems Part I: Introduction and Bus Protection Summary- Working Group Report.	IAS	2007	DBLP DOI BibTeX RDF
19	Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, James W. Tschanz, Vivek De	Serial-link bus: a low-power on-chip bus architecture.	ICCAD	2005	DBLP DOI BibTeX RDF
19	Siu-Kei Wong, Chi-Ying Tsui	Dynamic reconfigurable bus encoding scheme for reducing the energy consumption of deep sub-micron instruction bus.	ISCAS (2)	2004	DBLP BibTeX RDF
19	D. A. Chapman, P. A. Davies, J. Monk	Code-division multiple-access in an optical fiber LAN with amplified bus topology: the SLIM bus.	IEEE Trans. Commun.	2002	DBLP DOI BibTeX RDF
19	Daniel Gomez-Ibanez, Ethan Stump, Benjamin Grocholsky, Vijay Kumar 0001, Camillo J. Taylor	The robotics bus: a local communications bus for robots.	Mobile Robots	2002	DBLP DOI BibTeX RDF
19	C. Yeung, Anssi Haverinen, Graham Matthews, Jonathan Morris, Jauher Zaidi	Standard bus vs. bus wrapper: what is the best solution for future SoC integration?	DATE	2001	DBLP BibTeX RDF
19	D. Torres Roman, J. Gonzalez, M. Guzman	A New Bus Assignment Algorithm for a Shared Bus Switch Fabric.	VLSI Design	2000	DBLP DOI BibTeX RDF
19	Gyungho Lee, Bland Quattlebaum, Sangyeun Cho, Larry L. Kinney	Global Bus Design of a Bus-Based COMA Multiprocessor DICE.	ICCD	1996	DBLP DOI BibTeX RDF
19	Steven H. Vanderleest, Ravishankar K. Iyer	Measurement of I/O bus contention and correlation among heterogeneous device types in a single-bus multiprocessor system.	SIGARCH Comput. Archit. News	1994	DBLP DOI BibTeX RDF
19	Yen-Jen Oyang, Le-Chun Wu	Optimal Design of Megabyte Second-Level Caches for Minimizing Bus Traffic in Shared-Memory Shared-Bus Multiprocessors.	Comput. Syst.	1994	DBLP BibTeX RDF
19	Mohammad S. Obaidat, M. A. Radaideh	A comparative simulation study of the performance of single-bus and two-bus multiprocessors.	Simul.	1991	DBLP DOI BibTeX RDF
19	Peter A. Sichel	ACCESS.bus, an Open Desktop Bus.	Digit. Tech. J.	1991	DBLP BibTeX RDF
19	Arthur L. Dexter	Microcomputer bus structures and bus interface design.	Autom.	1988	DBLP DOI BibTeX RDF
19	Heinrich Dietsch, M. E. Ögrük, Roya Ulrich	LABORINTH - Ein einheitliches Kommunikationskonzept für PDV-Bus, BITBUS und IEC-Bus.	Prozeßrechnersysteme	1988	DBLP DOI BibTeX RDF
19	Alan Clements 0001	Microprocessor bus structures and bus interface design: Arthur L Dexter Marcel Dekker, New York, NY, USA (1986) $59.75 (USA), $71.50 (elsewhere) pp 339.	Microprocess. Microsystems	1987	DBLP DOI BibTeX RDF
19	Göran Pulkkis	A Comparison of Some Mathematical Models of the Bus Traffic in a Single Bus Multimicroprocessor.	J. Inf. Process. Cybern.	1982	DBLP BibTeX RDF
19	M. A. Marson	Bounds on Bus and Memory Interference in a class of Multiple Bus Multiprocessor Systems.	ICDCS	1982	DBLP BibTeX RDF
18	R. Baskaran, K. Krishnaiah	Simulation model to determine frequency of a single bus route with single and multiple headways.	Int. J. Bus. Perform. Supply Chain Model.	2012	DBLP DOI BibTeX RDF
18	Frédéric Pétrot, Denis Hommais, Alain Greiner	Cycle precise core based hardware/software system simulation with predictable event propagation.	EUROMICRO	1997	DBLP DOI BibTeX RDF	hardware software system simulation, predictable event propagation, cycle precise core based system simulator, digital embedded systems, Mealy signals, combinational signals, MIPS R3000, microprocessor core, PI-Bus, Pentium 120, communication, graph, C, high level synthesis, memories, directed graph, FSM, topological sort, compile-time, communicating finite state machines
17	Petru Emanuel Stingu, Frank L. Lewis	A Hardware Platform for Research in Helicopter UAV Control.	J. Intell. Robotic Syst.	2009	DBLP DOI BibTeX RDF	UAV helicopter, Multi-vehicle cooperation, Real-time control, CAN bus
17	Mohsen Saneei, Ali Afzali-Kusha, Zainalabedin Navabi	Sign Bit Reduction Encoding For Low Power Applications.	J. Signal Process. Syst.	2009	DBLP DOI BibTeX RDF	Low power multiplier, Signed multiplier, Sign extension, FIR filter, Power reduction, Energy reduction, Bus encoding
17	Petr Krist	Advanced Industrial Communications.	Towards Intelligent Engineering and Information Technology	2009	DBLP DOI BibTeX RDF	CANopen, Ethernet Powerlink, NMT, solunode, PDO, RS-485, SDO, slave, communication, network, protocol, coding, Ethernet, TDMA, frame, CAN, layer, bus, bit-rate, master, fieldbus, Fast Ethernet
17	Roy Chaoming Hsu, Yaw-Yu Lee, Bin-Wen Kao, Din-Yuen Chan	Hardware Design of Shape-Preserving Contour Tracing for Object of Segmented Images.	PSIVT	2009	DBLP DOI BibTeX RDF	AMBA bus, SOC, Boundary Extraction, Contour Tracing
17	Jianbin Huang, Zongwu Xie, Hong Liu 0002, Kai Sun, Yechao Liu, Zainan Jiang	DSP/FPGA-based Controller Architecture for Flexible Joint Robot with Enhanced Impedance Performance.	J. Intell. Robotic Syst.	2008	DBLP DOI BibTeX RDF	M-LVDS serial data bus, Torque ripple, FPGA, DSP, Impedance control, Flexible joint
17	Rajeev Kumar 0004, Dipankar Das 0002	Code compression for performance enhancement of variable-length embedded processors.	ACM Trans. Embed. Comput. Syst.	2008	DBLP DOI BibTeX RDF	bus switching, code decompression, instruction memory, variable-length ISAs, embedded systems, Code compression, RISC processor
17	Dragos Truscan, Tiberiu Seceleanu, Johan Lilius, Hannu Tenhunen	A Model-Based Design Process for the SegBus Distributed Architecture.	ECBS	2008	DBLP DOI BibTeX RDF	Segmented Bus Architecture, UML, MDA, model transformation
17	Kota Tsubouchi, Kazuo Hiekata, Hiroyuki Yamato	A Research on Predicting the Operation Function for the Workflow-Based Knowledge Management Software.	ITNG	2008	DBLP DOI BibTeX RDF	On-Demand Bus project, recommender system, knowledge management, decision tree
17	Ricky E. Sward	SP1: service oriented architecture (SOA) concepts and implementations for Ada.	SIGAda	2008	DBLP DOI BibTeX RDF	software engineering, service oriented architecture, reliability, ada, software, languages, systems, web server, enterprise service bus, high integrity
17	Tom Goovaerts, Bart De Win, Wouter Joosen	A comparison of two approaches for achieving flexible and adaptive security middleware.	Middleware Security	2008	DBLP DOI BibTeX RDF	security service bus, middleware, aspect-oriented programming, composition, messaging
17	Chunjie Duan, Chengyu Zhu, Sunil P. Khatri	Forbidden transition free crosstalk avoidance CODEC design.	DAC	2008	DBLP DOI BibTeX RDF	crosstalk, CODEC, on-chip bus, Fibonacci number
17	Xinping Zhu, Sharad Malik	A hierarchical modeling framework for on-chip communication architectures of multiprocessing SoCs.	ACM Trans. Design Autom. Electr. Syst.	2007	DBLP DOI BibTeX RDF	on-chip communication architecture, network-on-chip, multiprocessor system, object-oriented modeling, packet-switching network, design exploration, bus, Retargetable simulation
17	Till Luhmann, Jürgen Meister, Christian Wulff	Serviceorientierte Produktplattform für das Energiemanagementsystem der Zukunft.	Wirtschaftsinf.	2007	DBLP DOI BibTeX RDF	Energy Management System, Service Bus, Integration Solution, Product Platform, Service-Oriented Architecture
17	Mike P. Papazoglou, Willem-Jan van den Heuvel	Service oriented architectures: approaches, technologies and research issues.	VLDB J.	2007	DBLP DOI BibTeX RDF	Asynchronous and event-driven processing, Application and service integration, Enterprise bus, Web services, Service oriented architecture
17	Soo Yun Hwang, Hyeong Jun Park, Kyoung Son Jhang	An implementation and performance analysis of slave-side arbitration schemes for the ML-AHB BusMatrix.	SAC	2007	DBLP DOI BibTeX RDF	arbitration scheme, multi-layer AHB BusMatrix, slave-side arbitration, system on a chip, on chip bus
17	Daniel Jiménez-González, Xavier Martorell, Alex Ramírez	Performance Analysis of Cell Broadband Engine for High Memory Bandwidth Applications.	ISPASS	2007	DBLP DOI BibTeX RDF	arithmetic performance analysis, memory bandwidth application, synergistic processor element, DMA controller, direct memory access, element interconnect bus, bandwidth performance peak, processor component, message passing interface, data stream, single instruction multiple data, cell broadband engine, streaming programming model, processor speed
17	Matthew A. Smith, Lars A. Schreiner, Erich Barke, Volker Meyer zu Bexten	Algorithms for automatic length compensation of busses in analog integrated circuits.	ISPD	2007	DBLP DOI BibTeX RDF	analog routing, length compensation, net bundles, paired nets, virtual terminals, routing, EDA, RF, bus routing, IC-layout
17	Ricky E. Sward	Using ada in a service-Ooriented architecture.	SIGAda	2007	DBLP DOI BibTeX RDF	SOA, service-oriented architecture, software architecture, enterprise service bus, ESB
17	Satish Narayana Srirama, Matthias Jarke, Wolfgang Prinz	Mobile web services mediation framework.	MW4SOC	2007	DBLP DOI BibTeX RDF	QoS, service discovery, mobile web services, enterprise service bus
17	Nand Kishor, P. R. Sharma, A. S. Raghuvanshi	An Investigation on Pruned NNARX Identification Model of Hydropower Plant.	Eng. Comput.	2006	DBLP DOI BibTeX RDF	Hydroturbine, Single machine infinite bus, Governor, Neural network, Identification, Pruned, Exciter
17	Tuomas Lindroth, Raicea Lavinia, Tiberiu Seceleanu, Nastooh Avessta, Jukka Teuhola	Building a UML Profile for On-Chip Distributed Platforms.	COMPSAC (2)	2006	DBLP DOI BibTeX RDF	Segmented bus, platform profile, UML
17	Nand Kishor, R. P. Saini, S. P. Singh	Small hydro power plant identification using NNARX structure.	Neural Comput. Appl.	2005	DBLP DOI BibTeX RDF	Hydro turbine, Single machine infinite bus, Exogenous input signal, Neural network, Identification
17	Ian Broster, Alan Burns 0001, Guillermo Rodríguez-Navas	Timing Analysis of Real-Time Communication Under Electromagnetic Interference.	Real Time Syst.	2005	DBLP DOI BibTeX RDF	TTCAN, probabilistic timing analysis, electromagnetic interference, bus guardian, babbling idiot, dependability, faults, Controller Area Network, CAN
17	Krishna Sekar, Kanishka Lahiri, Anand Raghunathan, Sujit Dey	FLEXBUS: a high-performance system-on-chip communication architecture with a dynamically configurable topology.	DAC	2005	DBLP DOI BibTeX RDF	communication architectures, on-chip bus
17	Mohsen Saneei, Ali Afzali-Kusha, Zainalabedin Navabi	Sign bit reduction encoding for low power applications.	DAC	2005	DBLP DOI BibTeX RDF	signed multiplier, sing extension, low power, switching activity, bus encoding
17	Nattawut Thepayasuwan, Alex Doboli	Hardware-Software Co-Design of Resource Constrained Systems on a Chip.	ICDCS Workshops	2004	DBLP DOI BibTeX RDF	bus architectures, layout awarness, optimization, hardware/software co-design, trade-offs
17	Jie Li 0002, Yi Pan 0001, Hong Shen 0001	More Efficient Topological Sort Using Reconfigurable Optical Buses.	J. Supercomput.	2003	DBLP DOI BibTeX RDF	time complexity, analysis of algorithms, massive parallelism, graph problem, optical bus
17	Heiko Zimmer, Axel Jantsch	A fault model notation and error-control scheme for switch-to-switch buses in a network-on-chip.	CODES+ISSS	2003	DBLP DOI BibTeX RDF	fault tolerance, network-on-chip, bus encoding
17	Yu Cao 0001, Xiaodong Yang, Xuejue Huang, Dennis Sylvester	Switch-Factor Based Loop RLC Modeling for Efficient Timing Analysis.	ICCAD	2003	DBLP DOI BibTeX RDF	RLC model, loop inductance, switch-factor, current return loop, data-bus and clock, static timing analysis, slew rate
17	Ketan N. Patel, Igor L. Markov	Error-correction and crosstalk avoidance in DSM busses.	SLIP	2003	DBLP DOI BibTeX RDF	DSM busses, error-correction, crosstalk noise, bus encoding
17	Samar Abdi, Dongwan Shin, Daniel Gajski	Automatic communication refinement for system level design.	DAC	2003	DBLP DOI BibTeX RDF	system bus, communication, system modeling, system level design, model refinement
17	Jun Yang 0002, Rajiv Gupta 0001	Frequent value locality and its applications.	ACM Trans. Embed. Comput. Syst.	2002	DBLP DOI BibTeX RDF	Frequently occurring values, encoding techniques, low power data bus, low power data cache, value profiling
17	Jason E. Fritts, Roger D. Chamberlain	Breaking the Memory Bottleneck with an Optical Data Path.	Annual Simulation Symposium	2002	DBLP DOI BibTeX RDF	bandwidth bottleneck, processor-memory gap, performance evaluation, media processing, optical bus
17	Hatem M. El-Boghdadi, Ramachandran Vaidyanathan, Jerry L. Trahan, Suresh Rai	On the Communication Capability of the Self-Reconfigurable Gate Array Architecture.	IPDPS	2002	DBLP DOI BibTeX RDF	Segmentable Bus, FPGAs, Communication complexity, Run-time Reconfiguration, Self Reconfiguration
17	Kristian Sandström, Christer Norström, Magnus Ahlmark	Frame packing in real-time communication.	RTCSA	2000	DBLP DOI BibTeX RDF	frame packing, common computational model, signal exchange, physical device, signal size, deadline requirement, broadcast bus, variable sized frames, resource perspective, periodic frames, network bandwidth requirement, simple heuristics, signal sets, CAN based system, Local Interconnect Network, cost sensitive embedded systems, car control systems, real-time systems, computational complexity, distributed processing, NP-hard, communication networks, bandwidth allocation, real time communication, microcontrollers, microcontrollers, controller area networks, distributed embedded systems, objective function, automobiles, automotive applications, production cost