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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 2121 occurrences of 943 keywords
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Results
Found 2174 publication records. Showing 2174 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
112 | Geoffrey A. Frank, Bernard Clark, W. Bernard Schaming, William Kline |
Hardware/Software Codesign from the RASSP Perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 15(1-2), pp. 63-81, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
83 | Soonhoi Ha, Sungchan Kim, Choonseung Lee, Youngmin Yi, Seongnam Kwon, Young-Pyo Joo |
PeaCE: A hardware-software codesign environment for multimedia embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 12(3), pp. 24:1-24:25, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
hardware-software cosimulation, embedded systems, design-space exploration, model-based design, Hardware-software codesign |
80 | Matthew F. Parkinson, Sri Parameswaran |
Profiling in the ASP codesign environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSS ![In: Proceedings of the 8th International Symposium on System Synthesis (ISSS 1995), September 13-15, 1995, Cannes, France, pp. 128-133, 1995, ACM, 0-89791-771-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
Automated Synthesis and Partitioning system, Hardware/Software Codesign project, codesign environment, hardware/software codesign methodology, high-level profiling tools, virtual machines, software tools, C, computer architecture, profiling, systems analysis, circuit CAD, workstation, ASP, C code, dedicated hardware, execution profiling |
78 | Vincenza Carchiolo, Michele Malgeri, Giuseppe Mangioni |
Approach to the Synthesis of HW and SW in Codesign. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Fifth International Workshop on Hardware/Software Codesign, CODES/CASHE 1997, March 24-26, 1997, Braunschweig, Germany, pp. 173-177, 1997, IEEE Computer Society, 0-8186-7895-X. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
formal methods, synthesis, codesign |
78 | Markus Voss, Oliver Hammerschmidt |
Implications of Codesign as a Natural Constituent of a Systems Engineering Discipline for Computer Based Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Forth International Workshop on Hardware/Software Codesign, CODES 1996, Pittsburgh, PA, USA, March 18-20, 1996, pp. 124-131, 1996, IEEE Computer Society, 0-8186-7243-9. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Engineering of Computer Based Systems, Hardware/Software- Codesign, Design Theory |
67 | Markus Voss, Tarek Ben Ismail, Ahmed Amine Jerraya, Karl-Heinz Kapp |
Towards a theory for hardware/software codesign. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Third International Workshop on Hardware/Software Codesign, CODES 1994, Grenoble, France, September 22-24, 1994, pp. 173-180, 1994, IEEE Computer Society, 0-8186-6315-4. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
Design Process, System-Level Design, Hardware/Software Codesign, Design Theory |
66 | Wolfram Hardt, Wolfgang Rosenstiel |
Speed-up estimation for HW/SW-systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Forth International Workshop on Hardware/Software Codesign, CODES 1996, Pittsburgh, PA, USA, March 18-20, 1996, pp. 36-43, 1996, IEEE Computer Society, 0-8186-7243-9. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
HW/SW-systems, ciphering algorithm, codesign tool COD, speed-up estimation, logic design, systems analysis, hardware/software codesign, system performance, partitioning methods |
63 | Jean Paul Calvez, D. Isidoro |
A CoDesign experience with the MCSE methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Third International Workshop on Hardware/Software Codesign, CODES 1994, Grenoble, France, September 22-24, 1994, pp. 140-147, 1994, IEEE Computer Society, 0-8186-6315-4. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
62 | Min He, Ming-Che Tsai, Xiaolong Wu, Fei Wang 0005, Ramzi Nasr |
Hardware/Software Codesign - Pedagogy for the Industry. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITNG ![In: Fifth International Conference on Information Technology: New Generations (ITNG 2008), 7-8 April 2008, Las Vegas, Nevada, USA, pp. 279-284, 2008, IEEE Computer Society, 978-0-7695-3099-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
computer engineering curriculum, education, system-level design, Hardware/Software Codesign |
62 | Steven J. Cunning, T. C. Ewing, J. T. Olson, Jerzy W. Rozenblit, Stephan Schulz 0002 |
Towards an Integrated, Model-Based Codesign Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECBS ![In: 6th Symposium on Engineering of Computer-Based Systems (ECBS '99), 7-12 March 1999, Nashville, TN, USA. IEEE Computer Society, 1999, pp. 136-, 1999, IEEE Computer Society, 0-7695-0028-5. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
CAD environment, Simulation, Modeling, Hardware/Software Codesign |
62 | Laurent Freund, Michel Israël, Frédéric Rousseau 0001, J. M. Bergé, Michel Auguin, Cécile Belleudy, Guy Gogniat |
A codesign experiment in acoustic echo cancellation GMDF. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 2(4), pp. 365-383, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
communications, codesign, HW/SW partitioning |
58 | Joachim Falk, Christian Haubelt, Jürgen Teich, Christian Zebelein |
SysteMoC: A Data-Flow Programming Language for Codesign. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 59-97, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
58 | Jarmo Takala, Pekka Jääskeläinen, Teemu Pitkänen |
Codesign Case Study on Transport-Triggered Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 1303-1337, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
58 | Grant Martin, Frank Schirrmeister, Yosinori Watanabe |
Hardware/Software Codesign Across Many Cadence Technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 1093-1126, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
58 | Wanli Chang 0001, Licong Zhang, Debayan Roy, Samarjit Chakraborty |
Control/Architecture Codesign for Cyber-Physical Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 1221-1260, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
58 | Soonhoi Ha, Jürgen Teich, Christian Haubelt, Michael Glaß, Tulika Mitra, Rainer Dömer, Petru Eles, Aviral Shrivastava, Andreas Gerstlauer, Shuvra S. Bhattacharyya |
Introduction to Hardware/Software Codesign. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 3-26, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
58 | Juanjo Noguera, Rosa M. Badia |
HW/SW codesign techniques for dynamically reconfigurable architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 10(4), pp. 399-415, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
57 | M. J. van der Westhuizen, R. G. Harley, D. C. Levy, D. R. Woodward |
Using EDIF for software generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 5th Great Lakes Symposium on VLSI (GLS-VLSI '95), March 16-18, 1995, The State University of New York at Buffalo, USA, pp. 172-, 1995, IEEE Computer Society, 0-8186-7035-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
EDIF, parallel microprocessors, codesign methods, hardware development tools, real-time parallel C code, FPGA, parallel programming, simulated annealing, simulated annealing, software tools, software tool, logic CAD, circuit CAD, C language, scheduling theory, software generation, development systems |
56 | Frank Vahid, Tony Givargis |
Highly-cited ideas in system codesign and synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008, Atlanta, GA, USA, October 19-24, 2008, pp. 191-196, 2008, ACM, 978-1-60558-470-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
hardware/software codesign, citations, system synthesis |
56 | D. C. R. Jensen, Jan Madsen, Steen Pedersen |
The importance of interfaces: a HW/SW codesign case study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Fifth International Workshop on Hardware/Software Codesign, CODES/CASHE 1997, March 24-26, 1997, Braunschweig, Germany, pp. 87-91, 1997, IEEE Computer Society, 0-8186-7895-X. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
hardware software interface, case study, image sequences, optical flow, image analysis, hardware software codesign, prototype system, optimal solutions, functional modules, system level |
56 | Youngsoo Shin, Kiyoung Choi |
Enforcing Schedulability of Multi-Task Systems by Hardware-Software Codesign. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Fifth International Workshop on Hardware/Software Codesign, CODES/CASHE 1997, March 24-26, 1997, Braunschweig, Germany, pp. 3-7, 1997, IEEE Computer Society, 0-8186-7895-X. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
schedulability, real-time, deadline, Codesign, rate-monotonic scheduling |
56 | Guy Gogniat, Michel Auguin, Cécile Belleudy |
A generic multi-unit architecture for codesign methodologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Fifth International Workshop on Hardware/Software Codesign, CODES/CASHE 1997, March 24-26, 1997, Braunschweig, Germany, pp. 23-27, 1997, IEEE Computer Society, 0-8186-7895-X. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
codesign, communication synthesis, heterogeneous architecture, target architecture |
56 | Michael Sheliga, Nelson L. Passos, Edwin Hsing-Mean Sha |
Fully Parallel Hardware/Software Codesign for Multi-Dimensional DSP Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Forth International Workshop on Hardware/Software Codesign, CODES 1996, Pittsburgh, PA, USA, March 18-20, 1996, pp. 18-27, 1996, IEEE Computer Society, 0-8186-7243-9. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Multi-Dimensional Systems, High Level Synthesis, Hardware/Software Codesign |
53 | Jeffry T. Russell |
Program slicing for codesign. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Tenth International Symposium on Hardware/Software Codesign, CODES 2002, Estes Park, Colorado, USA, May 6-8, 2002, pp. 91-96, 2002, ACM, 1-58113-542-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
53 | Brian Grattan, Greg Stitt, Frank Vahid |
Codesign-extended applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Tenth International Symposium on Hardware/Software Codesign, CODES 2002, Estes Park, Colorado, USA, May 6-8, 2002, pp. 1-6, 2002, ACM, 1-58113-542-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
hardware/software cospecification, system-on-a-chip, hardware/software partitioning, platform-based design, configurable logic |
53 | Peter Green 0001, Paul Rushton, Ronnie Beggs |
An example of applying the codesign method MOOSE. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Third International Workshop on Hardware/Software Codesign, CODES 1994, Grenoble, France, September 22-24, 1994, pp. 65-72, 1994, IEEE Computer Society, 0-8186-6315-4. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
51 | Lesley Shannon, Paul Chow |
Using reconfigurability to achieve real-time profiling for hardware/software codesign. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, FPGA 2004, Monterey, California, USA, February 22-24, 2004, pp. 190-199, 2004, ACM, 1-58113-829-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
FPGA, profiling, performance measurement, embedded processor, hardware/software codesign, soft processor |
51 | Amer Baghdadi, Nacer-Eddine Zergainoh, Wander O. Cesário, Ahmed Amine Jerraya |
Combining a Performance Estimation Methodology with a Hardware/Software Codesign Flow Supporting Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Software Eng. ![In: IEEE Trans. Software Eng. 28(9), pp. 822-831, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
hardware/software codesign, Performance estimation, multiprocessor architectures, architecture exploration, system-level simulation |
51 | Guy Gogniat, Michel Auguin, Luc Bianco, Alain Pegatoquet |
A codesign back-end approach for embedded system design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 5(3), pp. 492-509, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
HW/SW integration, template architecture, codesign, communications synthesis |
51 | Vincenza Carchiolo, Michele Malgeri, Giuseppe Mangioni |
Hardware/software synthesis of formal specifications in codesign of embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 5(3), pp. 399-432, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
hardware and software synthesis, embedded system, codesign |
51 | Randall S. Janka, Linda M. Wills |
Combining Virtual Benchmarking with Rapid System Prototyping for Real-Time Embedded Multiprocessor Signal Processing System Codesign. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 20-, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
signal processor, specification and design methodology, middleware, multiprocessor, embedded, rapid prototyping, codesign |
48 | Hideaki Yanagisawa, Minoru Uehara, Hideki Mori |
Server Side C-DASH: Ubiquitous Hardware/Software Codesign Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MDM ![In: 7th International Conference on Mobile Data Management (MDM 2006), Nara, Japan, May 9-13, 2006, pp. 99, 2006, IEEE Computer Society, 0-7695-2526-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
48 | Soonhoi Ha, Choonseung Lee, Youngmin Yi, Seongnam Kwon, Young-Pyo Joo |
Hardware-Software Codesign of Multimedia Embedded Systems: the PeaCE. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RTCSA ![In: 12th IEEE Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2006), 16-18 August 2006, Sydney, Australia, pp. 207-214, 2006, IEEE Computer Society, 0-7695-2676-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
48 | Nattawut Thepayasuwan, Alex Doboli |
Layout conscious approach and bus architecture synthesis for hardware/software codesign of systems on chip optimized for speed. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 13(5), pp. 525-538, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
48 | Sergio A. Cuenca, António S. Câmara, Juan Suardíaz Muro, Ana Toledo Moreo |
Domain-Specific Codesign for Automated Visual Inspection Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IbPRIA (1) ![In: Pattern Recognition and Image Analysis, Second Iberian Conference, IbPRIA 2005, Estoril, Portugal, June 7-9, 2005, Proceedings, Part I, pp. 683-690, 2005, Springer, 3-540-26153-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
48 | Juanjo Noguera, Rosa M. Badia |
Run-Time HW/SW Codesign for Discrete Event Systems using Dynamically Reconfigurable Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSS ![In: Proceedings of the 13th International Symposium on System Synthesis, ISSS'00, Madrid, Spain, September 20-22, 2000., pp. 100-106, 2000, ACM / IEEE Computer Society, 0-7695-0765-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
48 | |
Hardware-Software Codesign. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 14(1), pp. 75-83, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
46 | Maryam Moazeni, Alireza Vahdatpour, Karthik Gururaj, Majid Sarrafzadeh |
Communication bottleneck in hardware-software partitioning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, FPGA 2008, Monterey, California, USA, February 24-26, 2008, pp. 262, 2008, ACM, 978-1-59593-934-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
FPGA, communication, hardware-software codesign |
46 | JoAnn M. Paul, Simon N. Peffers, Donald E. Thomas |
Frequency interleaving as a codesign scheduling paradigm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Eighth International Workshop on Hardware/Software Codesign, CODES 2000, San Diego, California, USA, 2000, pp. 131-135, 2000, ACM, 1-58113-268-9. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
clock domains, frequency interleaved scheduling, hardware/software codesign, computer system modeling |
46 | Francis G. Wolff, Michael J. Knieser, Daniel J. Weyer, Christos A. Papachristou |
Using codesign techniques to support analog functionality. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Seventh International Workshop on Hardware/Software Codesign, CODES 1999, Rome, Italy, 1999, pp. 79-84, 1999, ACM, 1-58113-132-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
design methodologies, analog, hardware/software codesign |
46 | Frank Vahid, Linus Tauro |
An Object-Oriented Communication Library for Hardware-Software CoDesign. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Fifth International Workshop on Hardware/Software Codesign, CODES/CASHE 1997, March 24-26, 1997, Braunschweig, Germany, pp. 81-86, 1997, IEEE Computer Society, 0-8186-7895-X. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Communication, Object-Oriented, C, VHDL, Libraries, Codesign |
46 | Tarek Ben Ismail, Mohamed Abid, Ahmed Amine Jerraya |
COSMOS: a codesign approach for communicating systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Third International Workshop on Hardware/Software Codesign, CODES 1994, Grenoble, France, September 22-24, 1994, pp. 17-24, 1994, IEEE Computer Society, 0-8186-6315-4. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
System Design Model, Hardware/Software Codesign, Communication Synthesis |
43 | Jacopo Panerati, Donatella Sciuto, Giovanni Beltrame |
Optimization Strategies in Design Space Exploration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 189-216, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Kees Goossens, Martijn Koedam, Andrew Nelson 0001, Shubhendu Sinha, Sven Goossens, Yonghui Li 0002, Gabriela Breaban, Reinier van Kampenhout, Rasool Tavakoli, Juan Valencia, Hadi Ahmadi Balef, Benny Akesson, Sander Stuijk, Marc Geilen, Dip Goswami, Majid Nabi |
NoC-Based Multiprocessor Architecture for Mixed-Time-Criticality Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 491-530, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Peter Marwedel, Heiko Falk, Olaf Neugebauer |
Memory-Aware Optimization of Embedded Software for Multiple Objectives. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 829-865, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Soonhoi Ha, Hanwoong Jung |
HOPES: Programming Platform Approach for Embedded Systems Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 951-981, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Ingo Sander, Axel Jantsch, Seyed-Hosein Attarzadeh-Niaki |
ForSyDe: System Design Using a Functional Language and Models of Computation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 99-140, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Shuoxin Lin, Yanzhou Liu 0001, Kyunghun Lee, Lin Li 0029, William Plishker, Shuvra S. Bhattacharyya |
The DSPCAD Framework for Modeling and Synthesis of Signal Processing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 1185-1219, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Michael Glaß, Jürgen Teich, Martin Lukasiewycz, Felix Reimann |
Hybrid Optimization Techniques for System-Level Design Space Exploration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 217-246, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Santiago Pagani, Muhammad Shafique 0001, Jörg Henkel |
Design Space Exploration and Run-Time Adaptation for Multicore Resource Management Under Performance and Power Constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 301-332, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Fernando Herrera, Julio L. Medina, Eugenio Villar |
Modeling Hardware/Software Embedded Systems with UML/MARTE: A Single-Source Design Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 141-185, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Todor P. Stefanov, Andy D. Pimentel, Hristo Nikolov |
DAEDALUS: System-Level Design Methodology for Streaming Multiprocessor Embedded Systems on Chips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 983-1018, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Tulika Mitra |
Application-Specific Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 377-409, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Rainer Leupers, Miguel Angel Aguilar, Juan Fernando Eusse, Jerónimo Castrillón, Weihua Sheng |
MAPS: A Software Development Environment for Embedded Multicore Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 917-949, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Marilyn Wolf |
Embedded Computer Vision. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 1339-1352, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Chun Jason Xue |
Emerging and Nonvolatile Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 443-459, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Gunar Schirner, Andreas Gerstlauer, Rainer Dömer |
SCE: System-on-Chip Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 1019-1050, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Young-Hwan Park, Amin Khajeh, Jun Yong Shin, Fadi J. Kurdahi, Ahmed M. Eltawil, Nikil D. Dutt |
Microarchitecture-Level SoC Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 867-913, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Graziano Pravadelli, Davide Quaglia, Sara Vinco, Franco Fummi |
Semiformal Assertion-Based Verification of Hardware/Software Systems in a Model-Driven Design Framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 683-720, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Santanu Sarma, Nikil D. Dutt |
Architecture and Cross-Layer Design Space Exploration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 247-270, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Mihai Teodor Lazarescu, Luciano Lavagno |
Wireless Sensor Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 1261-1302, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Mansureh Shahraki Moghaddam, Jae-Min Cho, Kiyoung Choi |
Reconfigurable Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 335-376, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Wolfgang Ecker, Johannes Schreiner |
Metamodeling and Code Generation in the Hardware/Software Interface Domain. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 1051-1091, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Oliver Bringmann 0001, Christoph Gerum, Sebastian Ottlik |
Timing Models for Fast Embedded Software Performance Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 655-682, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Klaus Schneider 0001, Jens Brandt 0001 |
Quartz: A Synchronous Language for Model-Based Design of Reactive Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 29-58, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Oliver Bringmann 0001, Sebastian Ottlik, Alexander Viehl |
Precise Software Timing Simulation Considering Execution Contexts. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 621-651, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Frédéric Pétrot, Luc Michel, Clément Deschamps |
Multiprocessor System-on-Chip Prototyping Using Dynamic Binary Translation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 565-591, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Preeti Ranjan Panda |
Memory Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 411-441, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Andy D. Pimentel, Peter van Stralen |
Scenario-Based Design Space Exploration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 271-299, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Haseeb Bokhari, Sri Parameswaran |
Network-on-Chip Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 461-489, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Tim Kogel |
Synopsys Virtual Prototyping for Software Development and Early Architecture Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 1127-1159, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Haibo Zeng 0001, Prachi Joshi, Daniel Thiele, Jonas Diemer, Philip Axer, Rolf Ernst, Petru Eles |
Networked Real-Time Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 753-792, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Daniel Mueller-Gritschneder, Andreas Gerstlauer |
Host-Compiled Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 593-619, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Rainer Dömer, Guantao Liu, Tim Schmidt |
Parallel Simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 533-564, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Ali Pahlevan, Maurizio Rossi 0001, Pablo García Del Valle, Davide Brunelli, David Atienza |
Joint Computing and Electric Systems Optimization for Green Datacenters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 1163-1183, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Aviral Shrivastava, Jian Cai 0001 |
Hardware-Aware Compilation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 795-827, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Robin Hofmann, Leonie Ahrendts, Rolf Ernst |
CPA: Compositional Performance Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Handbook of Hardware/Software Codesign ![In: Handbook of Hardware/Software Codesign., pp. 721-751, 2017, Springer, 978-94-017-7266-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
43 | Naren Narasimhan, Vinoo Srinivasan, Madhavi Vootukuru, Jeffrey Walrath, Sriram Govindarajan, Ranga Vemuri |
Rapid Prototyping of Reconfigurable Coprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 1996 International Conference on Application-Specific Systems, Architectures, and Processors (ASAP '96), August 19-23, 1996, Chicago, IL , USA, pp. 303-312, 1996, IEEE Computer Society, 0-8186-7542-X. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Prototyping, High-level Synthesis, JPEG, Coprocessors, Hardware-Software Co-design, Software Profiling |
42 | Christian Kreiner, Christian Steger, Egon Teiniker, Reinhold Weiss |
A novel codesign approach based on distributed virtual machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Tenth International Symposium on Hardware/Software Codesign, CODES 2002, Estes Park, Colorado, USA, May 6-8, 2002, pp. 109-114, 2002, ACM, 1-58113-542-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Linux |
42 | Matthias Meerwein, C. Baumgartner, W. Glauert |
Linking codesign and reuse in embedded systems design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Eighth International Workshop on Hardware/Software Codesign, CODES 2000, San Diego, California, USA, 2000, pp. 93-97, 2000, ACM, 1-58113-268-9. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
42 | Shinji Kimura, Yasufumi Itou, Makoto Hirao, Katsumasa Watanabe, Mitsuteru Yukishita, Akira Nagoya |
A Hardware/Software Codesign Method for a General Purpose Reconfigurable Co-Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Fifth International Workshop on Hardware/Software Codesign, CODES/CASHE 1997, March 24-26, 1997, Braunschweig, Germany, pp. 147-151, 1997, IEEE Computer Society, 0-8186-7895-X. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
hardware/software co-operation, a computer architecture using FPGA, bus-based reconfigurable co-processor architecture, high-level synthesis and optimization, C compiler to hardware modules |
42 | Tommy King-Yin Cheung, Graham R. Hellestrand, Prasert Kanthamanon |
A Multi-Level Transformation Approach to HW/SW Codesign: A Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Forth International Workshop on Hardware/Software Codesign, CODES 1996, Pittsburgh, PA, USA, March 18-20, 1996, pp. 10-17, 1996, IEEE Computer Society, 0-8186-7243-9. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Design Transformations, Functional Languages |
42 | Flemming Høeg, Niels Mellergaard, Jørgen Staunstrup |
The priority queue as an example of hardware/software codesign. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Third International Workshop on Hardware/Software Codesign, CODES 1994, Grenoble, France, September 22-24, 1994, pp. 81-88, 1994, IEEE Computer Society, 0-8186-6315-4. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
42 | Jens P. Brage, Jan Madsen |
A codesign case study in computer graphics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Third International Workshop on Hardware/Software Codesign, CODES 1994, Grenoble, France, September 22-24, 1994, pp. 132-139, 1994, IEEE Computer Society, 0-8186-6315-4. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
42 | Luciano Lavagno, Massimiliano Chiodo, Paolo Giusto, Attila Jurecska, Harry Hsieh, S. Yee, Alberto L. Sangiovanni-Vincentelli, Kei Suzuki |
A case study in computer-aided codesign of embedded controllers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Third International Workshop on Hardware/Software Codesign, CODES 1994, Grenoble, France, September 22-24, 1994, pp. 220-224, 1994, IEEE Computer Society, 0-8186-6315-4. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
42 | Gernot Koch, Udo Kebschull, Wolfgang Rosenstiel |
A prototyping environment for hardware/software codesign in the COBRA project. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Third International Workshop on Hardware/Software Codesign, CODES 1994, Grenoble, France, September 22-24, 1994, pp. 10-16, 1994, IEEE Computer Society, 0-8186-6315-4. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
41 | Ming-Fang Lai, Hung-Ming Chen |
An Implementation of Performance-Driven Block and I/O Placement for Chip-Package Codesign. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 9th International Symposium on Quality of Electronic Design (ISQED 2008), 17-19 March 2008, San Jose, CA, USA, pp. 604-607, 2008, IEEE Computer Society, 978-0-7695-3117-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Chip-Package Codesign, I/O Placement, Power Integrity |
41 | Kuan Jen Lin, Shih Hao Huang, Shih Wen Chen |
Optimal Allocation of I/O Device Parameters in Hardware and Software Codesign Methodology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUC ![In: Embedded and Ubiquitous Computing, International Conference, EUC 2007, Taipei, Taiwan, December 17-20, 2007, Proceedings, pp. 541-552, 2007, Springer, 978-3-540-77091-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
I/O interface, Hardware/Software Codesign, Device Driver, Programmable controller |
41 | Kuan Jen Lin, Shih Hao Huang, Shih Wen Chen |
A hardware/software codesign approach for programmable IO devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, Chicago, Illinois, USA, April 17-19, 2005, pp. 323-327, 2005, ACM, 1-59593-057-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
hardware/software codesign, device driver, programmable controller, software optimization |
41 | Abdenour Azzedine, Jean-Philippe Diguet, Jean Luc Philippe |
Large exploration for HW/SW partitioning of multirate and aperiodic real-time systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Tenth International Symposium on Hardware/Software Codesign, CODES 2002, Estes Park, Colorado, USA, May 6-8, 2002, pp. 85-90, 2002, ACM, 1-58113-542-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
HW / SW Codesign, RT scheduling, system design exploration |
41 | Juha-Pekka Soininen, Jari Kreku, Yang Qu, Martti Forsell |
Fast processor core selection for WLAN modem using mappability estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES ![In: Proceedings of the Tenth International Symposium on Hardware/Software Codesign, CODES 2002, Estes Park, Colorado, USA, May 6-8, 2002, pp. 61-66, 2002, ACM, 1-58113-542-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
mappability estimation, processor architecture evaluation, codesign, cost function |
41 | Amer Baghdadi, Nacer-Eddine Zergainoh, Wander O. Cesário, T. Roudier, Ahmed Amine Jerraya |
Design Space Exploration for Hardware/Software Codesign of Multiprocessor Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE International Workshop on Rapid System Prototyping ![In: Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000, pp. 8-13, 2000, IEEE Computer Society, 0-7695-0668-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Design Space Exploration, SDL, Hardware/Software Codesign, Performance Estimation, Multiprocessor Architectures |
41 | Jie Gong, Daniel Gajski, Smita Bakshi |
Model refinement for hardware-software codesign. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 2(1), pp. 22-41, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
sofware-hardware codesign, functional model, implementation model, model refinement |
41 | Vincenzo Catania, N. Fiorito, Michele Malgeri, Marco Russo |
A soft computing approach to hardware software codesign. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 5th Great Lakes Symposium on VLSI (GLS-VLSI '95), March 16-18, 1995, The State University of New York at Buffalo, USA, pp. 158-163, 1995, IEEE Computer Society, 0-8186-7035-5. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
soft computing approach, partitioning phase, genetic algorithms, genetic algorithms, fuzzy logic, fuzzy logic, logic CAD, computer aided software engineering, hardware/software codesign |
37 | Jae Young Bang, Daniel Popescu 0001, George Edwards, Nenad Medvidovic, Naveen N. Kulkarni, Girish M. Rama, Srinivas Padmanabhuni |
CoDesign: a highly extensible collaborative software modeling framework. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICSE (2) ![In: Proceedings of the 32nd ACM/IEEE International Conference on Software Engineering - Volume 2, ICSE 2010, Cape Town, South Africa, 1-8 May 2010, pp. 243-246, 2010, ACM. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
37 | Dong-hyun Lee, Keun Lee, Sooyong Park, Mike Hinchey |
A Survival Kit: Adaptive Hardware/Software Codesign Life-Cycle Model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Computer ![In: Computer 42(2), pp. 100-102, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
37 | Ren-Jie Lee, Ming-Fang Lai, Hung-Ming Chen |
Fast Flip-Chip Pin-Out Designation Respin by Pin-Block Design and Floorplanning for Package-Board Codesign. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 804-809, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
37 | Wei-Kei Mak, C.-L. Lai |
On Constrained Pin-Mapping for FPGA-PCB Codesign. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(11), pp. 2393-2401, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
37 | Marco D. Santambrogio, Donatella Sciuto |
Partial Dynamic Reconfiguration: The Caronte Approach. A New Degree of Freedom in the HW/SW Codesign. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-2, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
37 | Shaolei Quan, Chin-Long Wey |
A noise optimization technique for codesign of CMOS radio-frequency low noise amplifiers and low-quality spiral inductors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004, pp. 178-182, 2004, ACM, 1-58113-853-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
CMOS, inductance, RF, LNA |
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