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Found 85 publication records. Showing 85 according to the selection in the facets
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Authors |
Title |
Venue |
Year |
Link |
Author keywords |
70 | Rajiv V. Joshi, Kaushik Roy 0001 |
Design of Deep Sub-Micron CMOS Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 16th International Conference on VLSI Design (VLSI Design 2003), 4-8 January 2003, New Delhi, India, pp. 15-16, 2003, IEEE Computer Society, 0-7695-1868-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
46 | Cédric Majek, Yann Deval, Hervé Lapuyade, Jean-Baptiste Bégueret |
Voltage controlled delay line with phase quadrature outputs for [0.9-4] GHz F-DLL dedicated to zero-IF multi-standard LO. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, SBCCI 2009, Natal, Brazil, August 31 - September 3, 2009, 2009, ACM, 978-1-60558-705-9. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
CMOS-SOI, factorial delay locked loop, multi-standard frequency synthesizer, quadrature phase signals, voltage controlled delay element |
35 | Devesh Nema, Thomas Toifl |
Active compensation of supply noise for a 5-GHz VCO in 45-nm CMOS SOI technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 2617-2620, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
31 | Alexandre Valentian, Olivier Thomas, Andrei Vladimirescu, Amara Amara |
Modeling subthreshold SOI logic for static timing analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 12(6), pp. 662-669, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
27 | Selim J. Abou-Samra, P. A. Aisa, Alain Guyot, Bernard Courtois |
3D CMOS SOL for high performance computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998, Monterey, California, USA, August 10-12, 1998, pp. 54-58, 1998, ACM, 1-58113-059-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
23 | Toshiro Akino, Takashi Hamahata |
A Clock Generator Driven by a Unified-CBiCMOS Buffer Driver for High Speed and Low Energy Operation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006, Proceedings, pp. 225-236, 2006, Springer, 3-540-39094-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
20 | Kaisarbek Omirzakhov, Firooz Aflatouni |
12.1 Monolithically Integrated Sub-63 fJ/b 8-Channel 256Gb/s Optical Transmitter with Autonomous Wavelength Locking in 45nm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2024, San Francisco, CA, USA, February 18-22, 2024, pp. 218-220, 2024, IEEE, 979-8-3503-0620-0. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
20 | Panagiotis G. Zarkos, Sidney Buchbinder, Christos G. Adamopoulos, Sarika Madhvapathy, Olivia Hsu, Jake Whinnery, Pavan Bhargava, Vladimir Stojanovic |
Fully Integrated Electronic-Photonic Ultrasound Receiver Array for Endoscopic Applications in a Zero-Change 45-nm CMOS-SOI Process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 58(6), pp. 1719-1734, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
20 | Tristan Lecocq, Olivier Mazouffre, Eric Kerhervé, Jean-Marie Pham |
NB-IoT Wideband Power Amplifier and Diode-Based Antenna Switch co-Integration in 130 nm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NEWCAS ![In: 21st IEEE Interregional NEWCAS Conference, NEWCAS 2023, Edinburgh, United Kingdom, June 26-28, 2023, pp. 1-5, 2023, IEEE, 979-8-3503-0024-6. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
20 | Yangyang Zhou, Hao Zhang, Lei Zhu, Yuan Zhao, Tian Zhang |
A Fully Integrated S-Band Phase-Array Receiver in 0.13 μm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 31(8), pp. 2250141:1-2250141:22, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
20 | Michael Yampolsky, Evgeny Pikhay, Yakov Roizin |
Embedded UV Sensors in CMOS SOI Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sensors ![In: Sensors 22(3), pp. 712, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
20 | Peter M. Asbeck, Sravya Alluri, Narek Rostomyan, Jefy Alex Jayamon |
Reliability of CMOS-SOI power amplifiers for millimeter-wave 5G: the case for pMOS (Invited). ![Search on Bibsonomy](Pics/bibsonomy.png) |
IRPS ![In: IEEE International Reliability Physics Symposium, IRPS 2022, Dallas, TX, USA, March 27-31, 2022, pp. 4, 2022, IEEE, 978-1-6654-7950-9. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
20 | Cameron Hill, James F. Buckwalter |
A 1-to-18GHz Distributed-Stacked-Complementary Triple-Balanced Passive Mixer With up to 33dBm IIP3 and Integrated LO Driver in 45nm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2022, San Francisco, CA, USA, February 20-26, 2022, pp. 1-3, 2022, IEEE, 978-1-6654-2800-2. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
20 | Elisabetta Moisello, Michele Vaiana, Maria Eloisa Castagna, Antonella La Malfa, Giuseppe Bruno, Edoardo Bonizzoni, Piero Malcovati |
A Novel CMOS-SOI High-Responsivity Thermopile for Thermal Sensing Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, TX, USA, May 27 - June 1, 2022, pp. 871-875, 2022, IEEE, 978-1-6654-8485-5. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
20 | Min-Su Kim, Hee-Sauk Jhon |
An ESD and Interference-Robust Protection Circuit for Cascode Low-Noise Amplifier in CMOS-SOI Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 9, pp. 75293-75301, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
20 | Toshihiko Yoshimasu, Mengchu Fang, Tsuyoshi Sugiura |
A 26-GHz-Band High Back-Off Efficiency Stacked-FET Power Amplifier IC with Adaptively Controlled Bias and Load Circuits in 45-nm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 104-A(2), pp. 477-483, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP BibTeX RDF |
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20 | Christos G. Adamopoulos, Sidney Buchbinder, Panagiotis G. Zarkos, Pavan Bhargava, Asmaysinh Gharia, Ali M. Niknejad, Mekhail Anwar, Vladimir Stojanovic |
Fully Integrated Electronic-Photonic Sensor for Label-Free Refractive Index Sensing in Advanced Zero-Change CMOS-SOI Process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: IEEE Custom Integrated Circuits Conference, CICC 2021, Austin, TX, USA, April 25-30, 2021, pp. 1-2, 2021, IEEE, 978-1-7281-7581-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
20 | Panagiotis G. Zarkos, Sidney Buchbinder, Christos G. Adamopoulos, Sarika Madhvapathy, Olivia Hsu, Jake Whinnery, Pavan Bhargava, Vladimir Stojanovic |
Fully Integrated Electronic-Photonic Ultrasound Receiver Array for Endoscopic Imaging Applications in a Zero-Change 45nm CMOS-SOI Process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Circuits ![In: 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, pp. 1-2, 2021, IEEE, 978-4-86348-780-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
20 | Kang Ning 0002, Yihao Fang, Navid Hosseinzadeh, James F. Buckwalter |
A 30-GHz CMOS SOI Outphasing Power Amplifier With Current Mode Combining for High Backoff Efficiency and Constant Envelope Operation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 55(5), pp. 1411-1421, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
20 | Hussam AlShammary, Ahmed Hamza 0004, Cameron Hill, James F. Buckwalter |
A Reconfigurable Spectrum-Compressing Receiver for Non-Contiguous Carrier Aggregation in CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 55(2), pp. 261-271, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
20 | Soroush Moallemi, Payam Mehr, Kevin Grout, Trevor J. Thornton, Jennifer Kitchen |
Adaptive Power Control Using Current Adjustment for Watt-Level Power Amplifiers in CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 67-II(4), pp. 605-609, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
20 | Mannem Naga Sasikanth, Min-Yu Huang, Tzu-Yuan Huang, Sensen Li, Hua Wang 0006 |
24.2 A Reconfigurable Series/Parallel Quadrature-Coupler-Based Doherty PA in CMOS SOI with VSWR Resilient Linearity and Back-Off PAE for 5G MIMO Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2020 IEEE International Solid- State Circuits Conference, ISSCC 2020, San Francisco, CA, USA, February 16-20, 2020, pp. 364-366, 2020, IEEE, 978-1-7281-3205-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
20 | Omar El-Aassar, Gabriel M. Rebeiz |
A DC-to-108-GHz CMOS SOI Distributed Power Amplifier and Modulator Driver Leveraging Multi-Drive Complementary Stacked Cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 54(12), pp. 3437-3451, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Rana Azhar Shaheen, Rehman Akbar, Timo Rahkonen, Janne Aikio, Alok Sethi, Aarno Pärssinen |
A Differential Reflection-Type Phase Shifter Based on CPW Coupled-Line Coupler in 45nm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISWCS ![In: 16th International Symposium on Wireless Communication Systems, ISWCS 2019, Oulu, Finland, August 27-30, 2019, pp. 558-561, 2019, IEEE, 978-1-7281-2527-5. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
20 | Maria Malits, Igor Brouk, Yael Nemirovsky |
Study of CMOS-SOI Integrated Temperature Sensing Circuits for On-Chip Temperature Monitoring. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sensors ![In: Sensors 18(5), pp. 1629, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | Rui Ma, Martin Kreißig, Frank Ellinger |
A Fast Switchable and Band-Tunable 5-7.5 GHz LNA in 45 nm CMOS SOI Technology for Multi-Standard Wake-up Radios. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 25th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2018, Bordeaux, France, December 9-12, 2018, pp. 829-832, 2018, IEEE, 978-1-5386-9562-3. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
20 | Hamed Gheidi, Toshifumi Nakatani, Vincent W. Leung, Peter M. Asbeck |
A 1-3 GHz Delta-Sigma-Based Closed-Loop Fully Digital Phase Modulator in 45-nm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 52(5), pp. 1185-1195, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | Maria Malits, Yael Nemirovsky |
Nanometric Integrated Temperature and Thermal Sensors in CMOS-SOI Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sensors ![In: Sensors 17(8), pp. 1739, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | Jen-Chieh Hsueh, Vanessa H.-C. Chen, Jean-Olivier Plouchart |
An ultra-high bandwidth sub-ranging ADC with programmable dynamic range in 32nm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017, Boston, MA, USA, August 6-9, 2017, pp. 448-451, 2017, IEEE, 978-1-5090-6389-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | Rana Azhar Shaheen, Rehman Akbar, Alok Sethi, Janne P. Aikio, Timo Rahkonen, Aarno Pärssinen |
A 45nm CMOS SOI, four element phased array receiver supporting two MIMO channels for 5G. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NORCAS ![In: IEEE Nordic Circuits and Systems Conference, NORCAS 2017: NORCHIP and International Symposium of System-on-Chip (SoC), Linköping, Sweden, October 23-25, 2017, pp. 1-4, 2017, IEEE, 978-1-5386-2844-7. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | Janne P. Aikio, Alok Sethi, Rana Azhar Shaheen, Rehman Akbar, Timo Rahkonen, Aarno Pärssinen |
A fully integrated 13 GHz CMOS SOI stacked power amplifier for 5G wireless systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NORCAS ![In: IEEE Nordic Circuits and Systems Conference, NORCAS 2017: NORCHIP and International Symposium of System-on-Chip (SoC), Linköping, Sweden, October 23-25, 2017, pp. 1-4, 2017, IEEE, 978-1-5386-2844-7. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
20 | Chen Sun 0003, Mark T. Wade, Michael Georgas, Sen Lin, Luca Alloatti, Benjamin Moss, Rajesh Kumar, Amir H. Atabaki, Fabio Pavanello, Jeffrey Shainline, Jason Orcutt, Rajeev J. Ram, Milos A. Popovic, Vladimir Stojanovic |
A 45 nm CMOS-SOI Monolithic Photonics Platform With Bit-Statistics-Based Resonant Microring Thermal Tuning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 51(4), pp. 893-907, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
20 | Mohammad Sadegh Mehrjoo, James F. Buckwalter |
13.4 A microwave injection-locking outphasing modulator with 30dB dynamic range and 22% system efficiency in 45nm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2016 IEEE International Solid-State Circuits Conference, ISSCC 2016, San Francisco, CA, USA, January 31 - February 4, 2016, pp. 244-245, 2016, IEEE, 978-1-4673-9466-6. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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20 | Sergey V. Rylov, Troy J. Beukema, Zeynep Toprak Deniz, Thomas Toifl, Yong Liu 0023, Ankur Agrawal, Peter Buchmann, Alexander V. Rylyakov, Michael P. Beakes, Benjamin D. Parker, Mounir Meghelli |
3.1 A 25Gb/s ADC-based serial line receiver in 32nm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2016 IEEE International Solid-State Circuits Conference, ISSCC 2016, San Francisco, CA, USA, January 31 - February 4, 2016, pp. 56-57, 2016, IEEE, 978-1-4673-9466-6. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
20 | Kexu Sun, Zheng Gao, Ping Gui, Rui Wang 0035, Ismail Oguzman, Xiaochen Xu, Karthik Vasanth, Qifa Zhou, K. Kirk Shung |
A 180-Vpp Integrated Linear Amplifier for Ultrasonic Imaging Applications in a High-Voltage CMOS SOI Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 62-II(2), pp. 149-153, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
20 | Vanessa Hung-Chu Chen, Lawrence T. Pileggi |
A 69.5 mW 20 GS/s 6b Time-Interleaved ADC With Embedded Time-to-Digital Calibration in 32 nm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 49(12), pp. 2891-2901, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Jonas Lindstrand, Ivaylo Vasilev, Henrik Sjöland |
A low band cellular terminal antenna impedance tuner in 130nm CMOS-SOI technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: ESSCIRC 2014 - 40th European Solid State Circuits Conference, Venice Lido, Italy, September 22-26, 2014, pp. 459-462, 2014, IEEE, 978-1-4799-5694-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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20 | Marcel A. Kossel, Christian Menolfi, Thomas Toifl, Pier Andrea Francese, Matthias Braendli, Thomas Morf, Lukas Kull, Toke Meyer Andersen, Hazar Yueksel |
A DDR3/4 memory link TX supporting 24-40 Ω, 0.8-1.6 V, 0.8-5.0 Gb/s with slew rate control and thin oxide output stages in 22-nm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: ESSCIRC 2014 - 40th European Solid State Circuits Conference, Venice Lido, Italy, September 22-26, 2014, pp. 135-138, 2014, IEEE, 978-1-4799-5694-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
20 | Vanessa Hung-Chu Chen, Lawrence T. Pileggi |
22.2 A 69.5mW 20GS/s 6b time-interleaved ADC with embedded time-to-digital calibration in 32nm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2014 IEEE International Conference on Solid-State Circuits Conference, ISSCC 2014, Digest of Technical Papers, San Francisco, CA, USA, February 9-13, 2014, pp. 380-381, 2014, IEEE, 978-1-4799-0918-6. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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20 | Jing-Hwa Chen, S. R. Helmi, R. Azadegan, F. Aryanfar, S. Mohammadi |
A Broadband Stacked Power Amplifier in 45-nm CMOS SOI Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 48(11), pp. 2775-2784, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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20 | Mihai A. T. Sanduleanu, Alberto Valdes-Garcia, Y. Liu, Benjamin D. Parker, Shlomo Shlafman, Benny Sheinman, Danny Elad, Scott K. Reynolds, Daniel J. Friedman |
A 60GHz, linear, direct down-conversion mixer with mm-Wave tunability in 32nm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, CICC 2013, San Jose, CA, USA, September 22-25, 2013, pp. 1-4, 2013, IEEE. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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20 | Florence Sonnerat, Romain Pilard, Frederic Gianesello, Sebastien Jan, François Le Pennec, Christian Person, Cedric Durand, Daniel Gloria |
30 dBm P1dB and 4 dB insertion losses optimized 4G antenna tuner fully integrated in a 130 nm CMOS SOI technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RWS ![In: 2013 IEEE Radio and Wireless Symposium, Austin, TX, USA, January 20-23, 2013, pp. 73-75, 2013, IEEE, 978-1-4673-2929-3. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
20 | Yong Liu 0023, Ping-Hsuan Hsieh, Seongwon Kim, Jae-sun Seo, Robert K. Montoye, Leland Chang, José A. Tierno, Daniel J. Friedman |
A 0.1pJ/b 5-to-10Gb/s charge-recycling stacked low-power I/O for on-chip signaling in 45nm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2013 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2013, San Francisco, CA, USA, February 17-21, 2013, pp. 400-401, 2013, IEEE, 978-1-4673-4515-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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20 | Xuebei Yang, Aydin Babakhani |
Optical waveguides and photodiodes in 0.18µm CMOS SOI with no post-processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
OFC/NFOEC ![In: 2013 Optical Fiber Communication Conference and Exposition and the National Fiber Optic Engineers Conference (OFC/NFOEC), Anaheim, CA, USA, March 17-21, 2013, pp. 1-3, 2013, IEEE, 978-1-4799-0457-0. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP BibTeX RDF |
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20 | James F. Buckwalter, Xuezhe Zheng, Guoliang Li 0003, Kannan Raj, Ashok V. Krishnamoorthy |
A Monolithic 25-Gb/s Transceiver With Photonic Ring Modulators and Ge Detectors in a 130-nm CMOS SOI Process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 47(6), pp. 1309-1322, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
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20 | Maria Malits, Dan Corcos, Alexander Svetlitza, Danny Elad, Yael Nemirovsky |
Thermal performance of CMOS-SOI transistors from weak to strong inversion. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Instrum. Meas. Mag. ![In: IEEE Instrum. Meas. Mag. 15(5), pp. 28-34, 2012. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
20 | Hayg-Taniel Dabag, Peter M. Asbeck, James F. Buckwalter |
Linear operation of high-power millimeter-wave stacked-FET PAs in CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: 55th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2012, Boise, ID, USA, August 5-8, 2012, pp. 686-689, 2012, IEEE, 978-1-4673-2526-4. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
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20 | Christian Menolfi, Juergen Hertle, Thomas Toifl, Thomas Morf, Daniele Gardellini, Matthias Braendli, Peter Buchmann, Marcel A. Kossel |
A 28Gb/s source-series terminated TX in 32nm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2012 IEEE International Solid-State Circuits Conference, ISSCC 2012, San Francisco, CA, USA, February 19-23, 2012, pp. 334-336, 2012, IEEE, 978-1-4673-0376-7. The full citation details ...](Pics/full.jpeg) |
2012 |
DBLP DOI BibTeX RDF |
|
20 | Mehmet Parlak, James F. Buckwalter |
A 2.9-dB noise figure, Q-band millimeter-wave CMOS SOI LNA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: 2011 IEEE Custom Integrated Circuits Conference, CICC 2011, San Jose, CA, USA, Sept. 19-21, 2011, pp. 1-4, 2011, IEEE, 978-1-4577-0222-8. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
20 | Mihai A. T. Sanduleanu, Scott K. Reynolds, Jean-Olivier Plouchart |
A 4GS/s, 8.45 ENOB and 5.7fJ/conversion, digital assisted, sampling system in 45nm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: 2011 IEEE Custom Integrated Circuits Conference, CICC 2011, San Jose, CA, USA, Sept. 19-21, 2011, pp. 1-4, 2011, IEEE, 978-1-4577-0222-8. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
20 | Christian Menolfi, Thomas Toifl, Michael Ruegg, Matthias Braendli, Peter Buchmann, Marcel A. Kossel, Thomas Morf |
A 14Gb/s high-swing thin-oxide device SST TX in 45nm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2011, Digest of Technical Papers, San Francisco, CA, USA, 20-24 February, 2011, pp. 156-158, 2011, IEEE, 978-1-61284-303-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
20 | Alessandro Fonte, Sergio Saponara, Giancarlo Pinto, Bruno Neri |
Feasibility study and on-chip antenna for fully integrated μRFID tag at 60 GHz in 65 nm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
RFID-TA ![In: 2011 IEEE International Conference on RFID-Technologies and Applications, RFID-TA 2011, Sitges, Spain, September 15-16, 2011, pp. 457-462, 2011, IEEE, 978-1-4577-0028-6. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
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20 | Erik Öjefors, Neda Baktash, Yan Zhao 0002, Richard Al Hadi, Hani Sherry, Ullrich R. Pfeiffer |
Terahertz imaging detectors in a 65-nm CMOS SOI technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: 36th European Solid-State Circuits Conference, ESSCIRC 2010, Sevilla, Spain, September 13-17, 2010, pp. 486-489, 2010, IEEE, 978-1-4244-6662-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
20 | Wayne D. Dettloff, John C. Eble, Lei Luo 0006, Pravin Kumar Venkatesan, Fred Heaton, Teva Stone, Barry Daly |
A 32mW 7.4Gb/s protocol-agile source-series-terminated transmitter in 45nm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2010, Digest of Technical Papers, San Francisco, CA, USA, 7-11 February, 2010, pp. 370-371, 2010, IEEE, 978-1-4244-6033-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
20 | Nicolas Deparis, Alexandre Siligaris, Pierre Vincent, Nathalie Rolland |
Ultra low consumption UWB pulsed-ILO RF front-end transmitter at 60 GHz in 65-nm CMOS-SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PIMRC ![In: Proceedings of the IEEE 20th International Symposium on Personal, Indoor and Mobile Radio Communications, PIMRC 2009, 13-16 September 2009, Tokyo, Japan, pp. 1652-1656, 2009, IEEE. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
20 | Yusuke Ohtomo, Hiroshi Koizumi, Kazuyoshi Nishimura, Masafumi Nogawa |
A PVT Tolerant STM-16 Clock-and-Data Recovery LSI Using an On-Chip Loop-Gain Variation Compensation Architecture in 0.20-µm CMOS/SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Electron. ![In: IEICE Trans. Electron. 91-C(4), pp. 655-661, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | Gilles Jacquemod, Lionel Geynet, Benjamin Nicolle, Emeric de Foucauld, William Tatinian, Pierre Vincent |
Design and modelling of a multi-standard fractional PLL in CMOS/SOI technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 39(9), pp. 1130-1139, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
20 | S. Robinet, B. Gomez, N. Delorme |
A CMOS-SOI 2.45GHz Remote-Powered Sensor Tag. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2008 IEEE International Solid-State Circuits Conference, ISSCC 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008, pp. 286-287, 2008, IEEE, 978-1-4244-2010-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
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20 | Adithyaram Narasimha, Behnam Analui, Yi Liang, Thomas J. Sleboda, Sherif Abdalla, Erwin Balmater, Steffen Gloeckner, Drew Guckenberger, Mark Harrison, Roger G. M. P. Koumans, Daniel Kucharski, Attila Mekis, Sina Mirsaidi, Dan Song, Thierry Pinguet |
A Fully Integrated 4 × 10-Gb/s DWDM Optoelectronic Transceiver Implemented in a Standard 0.13 µm CMOS SOI Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 42(12), pp. 2736-2744, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
20 | Michael G. Khazhinsky |
ESD protection strategies in advanced CMOS SOI ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 47(9-11), pp. 1313-1321, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
20 | Baudouin Martineau, Andreia Cathelin, François Danneville, Andreas Kaiser, Gilles Dambrine, Sylvie Lépilliet, Frederic Gianesello, Didier Belot |
80 GHz low noise amplifiers in 65nm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: 33rd European Solid-State Circuits Conference, ESSCIRC 2007, Munich, Germany, 11-13 September 2007, pp. 348-351, 2007, IEEE, 978-1-4244-1125-2. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
20 | Adithyaram Narasimha, Behnam Analui, Yi Liang, Thomas J. Sleboda, Cary Gunn |
A Fully Integrated 4ÿ10Gb/s DWDM Optoelectronic Transceiver in a standard 0.13μm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2007 IEEE International Solid-State Circuits Conference, ISSCC 2007, Digest of Technical Papers, San Francisco, CA, USA, February 11-15, 2007, pp. 42-586, 2007, IEEE, 1-4244-0853-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
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20 | Christian Menolfi, Thomas Toifl, Peter Buchmann, Marcel A. Kossel, Thomas Morf, Jonas R. M. Weiss, Martin L. Schmatz |
A 16Gb/s Source-Series Terminated Transmitter in 65nm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2007 IEEE International Solid-State Circuits Conference, ISSCC 2007, Digest of Technical Papers, San Francisco, CA, USA, February 11-15, 2007, pp. 446-614, 2007, IEEE, 1-4244-0853-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
20 | Behnam Analui, Drew Guckenberger, Daniel Kucharski, Adithyaram Narasimha |
A Fully Integrated 20-Gb/s Optoelectronic Transceiver Implemented in a Standard 0.13- $\mu{\hbox {m}}$ CMOS SOI Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 41(12), pp. 2945-2955, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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20 | Thomas Toifl, Christian Menolfi, Michael Ruegg, Robert Reutemann, Peter Buchmann, Marcel A. Kossel, Thomas Morf, Jonas R. M. Weiss, Martin L. Schmatz |
A 22-gb/s PAM-4 receiver in 90-nm CMOS SOI technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 41(4), pp. 954-965, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
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20 | Babak Vakili-Amini, Reza Abdolvand, Farrokh Ayazi |
A 4.5-mW Closed-Loop $\Delta\Sigma$ Micro-Gravity CMOS SOI Accelerometer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 41(12), pp. 2983-2991, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
20 | Babak Vakili-Amini, Reza Abdolvand, Farrokh Ayazi |
A 4.5mW Closed-Loop ΔΣ Micro-Gravity CMOS-SOI Accelerometer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2006 IEEE International Solid State Circuits Conference, ISSCC 2006, Digest of Technical Papers, an Francisco, CA, USA, February 6-9, 2006, pp. 1101-1110, 2006, IEEE, 1-4244-0079-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
20 | Takakuni Douseki, Toshishige Shimamura, Nobutaro Shibata |
A Sub-0.5 V Differential ED-CMOS/SOI Circuit with Over-1-GHz Operation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Electron. ![In: IEICE Trans. Electron. 88-C(4), pp. 582-588, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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20 | Mihai A. T. Sanduleanu, Razvan Ionita, Andrei Vladimirescu |
A 34GHz/1V prescaler in 90nm CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSCIRC ![In: Proceedings of the 31st European Solid-State Circuits Conference, ESSCIRC 2005, Grenoble, France, 12-16 September 2005, pp. 109-112, 2005, IEEE, 0-7803-9205-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
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20 | Markus P. J. Mergens, Olivier Marichal, Steven Thijs, Benjamin Van Camp, Christian C. Russ |
Advanced SCR ESD protection circuits for CMOS/SOI nanotechnologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, CICC 2005, DoubleTree Hotel, San Jose, California, USA, September 18-21, 2005, pp. 481-488, 2005, IEEE, 0-7803-9023-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
20 | Jinsook Kim, Weiping Ni, Edwin C. Kan |
Resistive Loss and Trans-Impedance Characterization of Nonlinear Transmission Lines on CMOS SOI Substrate. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoCC ![In: Proceedings 2005 IEEE International SOC Conference, September 25-28, 2005, Washington Dulles Airport, Herndon, VA, USA, pp. 203-206, 2005, IEEE, 0-7803-9264-7. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
20 | Babak Vakili-Amini, Farrokh Ayazi |
A 2.5-V 14-bit ΣΔ CMOS SOI capacitive accelerometer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 39(12), pp. 2467-2476, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
20 | Igor Brouk, Yael Nemirovsky |
CMOS SOI image sensor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: Proceedings of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2004, Tel Aviv, Israel, December 13-15, 2004, pp. 156-159, 2004, IEEE, 0-7803-8715-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
20 | Erik Säll, Mark Vesterbacka |
Design of a Comparator in CMOS SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'04), 19-21 July 2004, Banff, Alberta, Canada, pp. 229-232, 2004, IEEE Computer Society, 0-7695-2182-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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20 | Carlo Tinella, Jean-Michel Fournier, Didier Belot, Vincent Knopik |
A high-performance CMOS-SOI antenna switch for the 2.5-5-GHz band. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 38(7), pp. 1279-1283, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
20 | Daniela De Venuto, Michael J. Ohletz |
Floating body effects model for fault simulation of fully depleted CMOS/SOI circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 34(10), pp. 889-895, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
20 | Mamoru Ugajin, Tsuneo Tsukahara |
A 1-V 2.4-GHz FSK receiver with a complex BPF and a frequency doubler in CMOS/SOI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: Proceedings of the IEEE Custom Integrated Circuits Conference, CICC 2003, San Jose, CA, USA, September 21 - 24, 2003, pp. 151-154, 2003, IEEE, 0-7803-7842-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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20 | Jader A. De Lima, Sidnei F. Silva, Adriano S. Cordeiro, Michel Verleysen |
A CMOS/SOI Single-input PWM Discriminator for Low-voltage Body-implanted Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 15(1), pp. 469-476, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
20 | Carlo Tinella, Jean-Michel Fournier, J. Haidar |
Noise contribution in a fully integrated 1-V, 2.5-GHz LNA in CMOS-SOI technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: Proceedings of the 2001 8th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2001, Malta, September 2-5, 2001, pp. 1611-1614, 2001, IEEE, 0-7803-7057-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
20 | Srinivasa R. Banna, Philip C. H. Chan, Mansun Chan, Samuel K. H. Fung, Ping K. Ko |
Fully depleted CMOS/SOI device design guidelines for low power applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997, Monterey, California, USA, August 18-20, 1997, pp. 301-306, 1997, ACM, 0-89791-903-3. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
15 | Sheng Li 0007, Jung Ho Ahn, Richard D. Strong, Jay B. Brockman, Dean M. Tullsen, Norman P. Jouppi |
McPAT: an integrated power, area, and timing modeling framework for multicore and manycore architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), December 12-16, 2009, New York, New York, USA, pp. 469-480, 2009, ACM, 978-1-60558-798-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
15 | O. Katz, D. A. Ramon, Israel A. Wagner |
A Robust Random Number Generator Based on a Differential Current-Mode Chaos. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 16(12), pp. 1677-1686, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
15 | Xiao Liu 0001, Andreas Demosthenous, Nick Donaldson |
A Fully Integrated Fail-safe Stimulator Output Stage Dedicated to FES Stimulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 2076-2079, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Nicolas Mäding, Jens Leenstra, Jürgen Pille, Rolf Sautter, Stefan Büttner, Sebastian Ehrenreich, W. Haller |
The vector fixed point unit of the synergistic processor element of the cell architecture processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE Designers' Forum ![In: Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 244-248, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-0-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Jean-Luc Rebourg, Jean-Denis Muller, Manuel Samuelides |
SPIKE_4096: A Neural Integrated Circuit for Image Segmentation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICES ![In: Evolvable Systems: From Biology to Hardware, Second International Conference, ICES 98, Lausanne, Switzerland, September 23-25, 1998, Proceedings, pp. 287-294, 1998, Springer, 3-540-64954-9. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
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