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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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Found 4769 publication records. Showing 4757 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
87 | Vitit Kantabutra |
A Recursive Carry-Lookahead/Carry-Select Hybrid Adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 42(12), pp. 1495-1499, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
recursive carry-lookahead/carry-select hybrid adder, double-precision mantissas, spanning tree carry lookahead adder, redundant cell adder, Am29050 microprocessor, Manchester carry chains, delays, adders |
87 | Pak K. Chan, Martine D. F. Schlag, Clark D. Thomborson, Vojin G. Oklobdzija |
Delay Optimization of Carry-Skip Adders and Block Carry-Lookahead Adders Using Multidimensional Dynamic Programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 41(8), pp. 920-930, 1992. The full citation details ...](Pics/full.jpeg) |
1992 |
DBLP DOI BibTeX RDF |
delay optimisation, block carry-lookahead adders, multidimensional dynamic programming, worst-case carry propagation delays, minimum latency, fanin, dynamic programming, digital arithmetic, adders, gate delays, carry logic, fanout, critical path delay, carry-skip adders |
86 | Akhilesh Tyagi |
A Reduced-Area Scheme for Carry-Select Adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 42(10), pp. 1163-1170, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
reduced-area, conditional-sum adders, carry-chain evaluations, gate-count, carry-ripple, classical carry-select, logic design, adders, logic circuits, gate-delay, parallel-prefix adders, analytic evaluation, area-efficient, carry-skip adders, carry-select adders |
82 | Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian |
An effective BIST scheme for carry-save and carry-propagate array multipliers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 4th Asian Test Symposium (ATS '95), November 23-24, 1995. Bangalore, India, pp. 298-302, 1995, IEEE Computer Society, 0-8186-7129-7. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
BIST scheme, carry-propagate array multipliers, carry-save array multipliers, complex VLSI devices, maximum length LFSR, count-based scheme, multiplier cells, VLSI, logic testing, controllability, built-in self test, integrated circuit testing, automatic testing, observability, fault coverage, test pattern generator, multiplying circuits, carry logic |
72 | Behrooz Parhami |
Comments on "Evaluation of A + B + K Conditions Without Carry Propagation". ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 43(3), pp. 381, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
carry-free circuit, A+B=K, negative effects, carry-save redundant numbers, (3, 2)-counters, carry propagation, carry-save numbers, pipeline processing, logic circuits, pipelined architectures, comparators, addition, parallel counters, redundant number representation, conditional branches |
72 | Tomás Lang, Javier D. Bruguera |
Multilevel Reverse-Carry Computation for Comparison and for Sign and Overflow Detection in Addition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design, VLSI in Computers and Processors, ICCD '99, Austin, Texas, USA, October 10-13, 1999, pp. 73-79, 1999, IEEE Computer Society, 0-7695-0406-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Most significant carry, prefix tree, carry look-ahead adder |
70 | Behnam Amelifard, Farzan Fallah, Massoud Pedram |
Closing the Gap between Carry Select Adder and Ripple Carry Adder: A New Class Closing the Gap between Carry Select Adder and Ripple Carry Adder: A New Class of Low-Power High-Performance Adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA, pp. 148-152, 2005, IEEE Computer Society, 0-7695-2301-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
66 | Keshab K. Parhi |
Low-energy CSMT carry generators and binary adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 7(4), pp. 450-462, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
62 | Oscar Gustafsson, Henrik Ohlsson, Lars Wanhammar |
Minimum-adder integer multipliers using carry-save adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 709-712, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
58 | Behrooz Parhami |
Carry-Free Addition of Recorded Binary Signed-Digit Numbers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 37(11), pp. 1470-1476, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
string recoding, recoded binary signed-digit numbers, number representation systems, borrow chains, propagation-free addition, signed-digit arithmetic, limited-carry propagation, binary signed-digit numbers, borrow-free subtraction, digital arithmetic, subtraction, annihilation, Carry-free addition, carry-free addition, signed digit number representation |
58 | Johannes Grad, James E. Stine |
New algorithms for carry propagation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, Chicago, Illinois, USA, April 17-19, 2005, pp. 396-399, 2005, ACM, 1-59593-057-4. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
carry propagate addition, conditional sum adder, hybrid adder, ling adder, pseudo-complements, reed adder, domino logic, carry-skip adder |
57 | Yan Sun, Xin Zhang, Xi Jin |
High-Performance Carry Select Adder Using Fast All-One Finding Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia International Conference on Modelling and Simulation ![In: Second Asia International Conference on Modelling and Simulation, AMS 2008, Kuala Lumpur, Malaysia, May 13-15, 2008, pp. 1012-1014, 2008, IEEE Computer Society, 978-0-7695-3136-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
fast all-one finding circuit, add-one circuit, carry-select adder |
57 | Scott Hauck, Matthew M. Hosler, Thomas W. Fry |
High-performance carry chains for FPGA's. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 8(2), pp. 138-147, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
57 | Scott Hauck, Matthew M. Hosler, Thomas W. Fry |
High-Performance Carry Chains for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the 1998 ACM/SIGDA Sixth International Symposium on Field Programmable Gate Arrays, FPGA 1998, Monterey, CA, USA, February 22-24, 1998, pp. 223-233, 1998, ACM, 0-89791-978-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
57 | Hans Lindkvist, Per Andersson |
Dynamic CMOS circuit techniques for delay and power reduction in parallel adders . ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARVLSI ![In: 16th Conference on Advanced Research in VLSI (ARVLSI '95), March 27-29, 1995, Chapel Hill, North Carolina, USA, pp. 121-130, 1995, IEEE Computer Society, 0-8186-7047-9. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
dynamic CMOS circuit techniques, delay reduction, parallel adders, high-speed adders, Manchester-carry chains, clock/data precharged dynamic logic blocks, carry calculation trees, parallel processing, VLSI, delays, logic design, digital arithmetic, power consumption, adders, CMOS logic circuits, power reduction, carry logic |
52 | Javier Hormigo, Manuel Ortiz, Francisco J. Quiles 0002, Francisco J. Jaime, Julio Villalba, Emilio L. Zapata |
Efficient Implementation of Carry-Save Adders in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 20th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2009, July 7-9, 2009, Boston, MA, USA, pp. 207-210, 2009, IEEE Computer Society, 978-0-7695-3732-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
52 | Michael T. Frederick, Arun K. Somani |
Multi-Bit Carry Chains for High-Performance Reconfigurable Fabrics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006, pp. 1-6, 2006, IEEE, 1-4244-0312-X. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
52 | Youngjoon Kim, Lee-Sup Kim |
A low power carry select adder with reduced area. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 218-221, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
52 | Seiji Kajihara, Tsutomu Sasao |
On the Adders with Minimum Tests. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 6th Asian Test Symposium (ATS '97), 17-18 November 1997, Akita, Japan, pp. 10-15, 1997, IEEE Computer Society, 0-8186-8209-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
ripple carry adder, minimum test set, test generation, stuck-at fault, carry look-ahead adders |
48 | Vitalij Ocheretnij, Michael Gössel, Egor S. Sogomonyan, Daniel Marienfeld |
Modulo p=3 Checking for a Carry Select Adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 22(1), pp. 101-107, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
concurrent checking, modulo checking, carry select adder |
48 | Yu-Ting Pai, Yu-Kumg Chen |
The Fastest Carry Lookahead Adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 2nd IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2004), 28-30 January 2004, Perth, Australia, pp. 434-436, 2004, IEEE Computer Society, 0-7695-2081-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
central processing unit, integrated circuit, adder, gate delay, carry lookahead adder |
48 | Fu-Chiung Cheng, Stephen H. Unger, Michael Theobald |
Self-Timed Carry-Lookahead Adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 49(7), pp. 659-672, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
delay-insenstive circuits, tree iterative circuits, CMOS, Self-timed circuits, carry-lookahead adders |
48 | Youngmoon Choi, Earl E. Swartzlander Jr. |
Speculative Carry Generation With Prefix Adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 16(3), pp. 321-326, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
48 | Michael J. Schulte, Kai Chirca, John Glossner, Haoran Wang, Suman Mamidi, Pablo I. Balzola, Stamatis Vassiliadis |
A Low-Power Carry Skip Adder with Fast Saturation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 15th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2004), 27-29 September 2004, Galveston, TX, USA, pp. 269-279, 2004, IEEE Computer Society, 0-7695-2226-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
46 | Himanshu Thapliyal, Hamid R. Arabnia, M. B. Srinivas |
Efficient Reversible Logic Design of BCD Subtractors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Trans. Comput. Sci. ![In: Transactions on Computational Science III, pp. 99-121, 2009, Springer, 978-3-642-00211-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
BCD subtractors, BCD adders, Reversible logic |
45 | Anum Khan, Arindom Chakraborty, Upal Barua Joy, Subodh Wairya, Mehedi Hasan |
Carry look-ahead and ripple carry method based 4-bit carry generator circuit for implementing wide-word length adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 140, pp. 105949, October 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
45 | P. Balasubramanian 0001, Cuong Dang, Douglas L. Maskell, K. Prasad |
Asynchronous Early Output Section-Carry Based Carry Lookahead Adder with Alias Carry Logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1710.05470, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP BibTeX RDF |
|
44 | Ohsang Kwon, Earl E. Swartzlander Jr., Kevin J. Nowka |
A fast hybrid carry-lookahead/carry-select adder design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 11th ACM Great Lakes Symposium on VLSI 2001, West Lafayette, Indiana, USA, 2001, pp. 149-152, 2001, ACM, 1-58113-351-0. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
CMOS, domino logic, carry lookahead adder |
44 | Jin-Fu Li 0001, Jiunn-Der Yu, Yu-Jen Huang |
A design methodology for hybrid carry-lookahead/carry-select adders with reconfigurability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 77-80, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
44 | Robert W. Doran |
Variants of an Improved Carry Look-Ahead Adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 37(9), pp. 1110-1113, 1988. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
look-ahead carry, adder, adders, variation, improved, carry look-ahead adder |
43 | Mateus Fonseca, Eduardo A. C. da Costa, Sergio Bampi, José Monteiro 0001 |
Design of a radix-2m hybrid array multiplier using carry save adder format. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2005, Florianolpolis, Brazil, September 4-7, 2005, pp. 172-177, 2005, ACM. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
hybrid multiplier, low power, carry save adder |
43 | Javier D. Bruguera, Tomás Lang |
Multilevel Reverse-Carry Addition: Single and Dual Adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 33(1-2), pp. 55-74, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
prefix adders, dual adders, most-significant-carry detection, computer arithmetic, VLSI design |
43 | Syed Mahfuzul Aziz, S. J. Carr |
On C-Testability of Carry Free Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 1st IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2002), 29-31 January 2002, Christchurch, New Zealand, pp. 417-424, 2002, IEEE Computer Society, 0-7695-1453-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Carry-free, C-Testability, Divider, Radix-2 |
43 | Parag K. Lala, Alvernon Walker |
On-Line Error Detectable Carry-Free Adder Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 24-26 October 2001, San Francisco, CA, USA, Proceedings, pp. 66-71, 2001, IEEE Computer Society, 0-7695-1203-8. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
carry-free adder, signed binary digits, 1-out-of-3 code, on-line error detection |
43 | Johannes Grad, James E. Stine |
Low power binary addition using carry increment adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
43 | Vitalij Ocheretnij, Daniel Marienfeld, Egor S. Sogomonyan, Michael Gössel |
Self-Checking Code-Disjoint Carry-Select Adder with Low Area Overhead by Use of Add1-Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 12-14 July 2004, Funchal, Madeira Island, Portugal, pp. 31-36, 2004, IEEE Computer Society, 0-7695-2180-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
43 | Hosahalli R. Srinivas, Bapiraju Vinnakota, Keshab K. Parhi |
A C-testable carry-free divider. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 2(4), pp. 472-488, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
43 | Hong Diep Nguyen, Bogdan Pasca 0001, Thomas B. Preußer |
FPGA-Specific Arithmetic Optimizations of Short-Latency Adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: International Conference on Field Programmable Logic and Applications, FPL 2011, September 5-7, Chania, Crete, Greece, pp. 232-237, 2011, IEEE Computer Society, 978-1-4577-1484-9. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
carry-chain, carry-select, carry-increment, FPGA, addition |
43 | Chien-In Henry Chen, Anup Kumar |
Comments on "Area-Time Optimal Adder Design". ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 43(4), pp. 507-512, 1994. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
VLSI parallel adder, optimal 32-bit fast carry generator, fast carry generator, BiCMOS drivers, optimal adder design, adders, carry logic, critical path delay |
43 | Mike Paterson, Nicholas Pippenger, Uri Zwick |
Faster Circuits and Shorter Formulae for Multiple Addition, Multiplication and Symmetric Boolean Functions ![Search on Bibsonomy](Pics/bibsonomy.png) |
FOCS ![In: 31st Annual Symposium on Foundations of Computer Science, St. Louis, Missouri, USA, October 22-24, 1990, Volume II, pp. 642-650, 1990, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
multiplication circuits, multiple addition, shallowest possible circuits, shortest possible formulas, occurrence matrix, shortest multiple carry-save addition formulas, delay matrix, multiple carry-save adders, multiplication, symmetric Boolean functions, carry-save addition |
42 | Wen-Chang Yeh, Chein-Wei Jen |
Generalized Earliest-First Fast Addition Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 52(10), pp. 1233-1242, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
Carry-propagation adder, final adder, conditional-sum, carry-lookahead |
40 | John P. Fishburn |
A Depth-Decreasing Heuristic for Combinational Logic: Or How To Convert a Ripple-Carry Adder Into A Carry-Lookahead Adder Or Anything in-between. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, Florida, USA, June 24-28, 1990., pp. 361-364, 1990, IEEE Computer Society Press, 0-89791-363-9. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
39 | Jie Wu 0001, Shuhui Yang, Fei Dai 0001 |
Logarithmic Store-Carry-Forward Routing in Mobile Ad Hoc Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 18(6), pp. 735-748, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
store-carry-forward, MANETs, network capacity, trajectory planning, mobile nodes |
39 | Junhyung Um, Taewhan Kim |
An Optimal Allocation of Carry-Save-Adders in Arithmetic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 50(3), pp. 215-233, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
VLSI, arithmetic circuits, Carry-save-addition |
39 | Bong-Il Park, In-Cheol Park, Chong-Min Kyung |
A Regular Layout Structured Multiplier Based on Weighted Carry-Save Adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design, VLSI in Computers and Processors, ICCD '99, Austin, Texas, USA, October 10-13, 1999, pp. 243-, 1999, IEEE Computer Society, 0-7695-0406-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
Booth algorithm, Carry-Save Adder and Wallace Tree, Multiplier |
38 | Kai Chirca, Michael J. Schulte, John Glossner, Haoran Wang, Suman Mamidi, Pablo I. Balzola, Stamatis Vassiliadis |
A Static Low-Power, High-Performance 32-bit Carry Skip Adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August - 3 September 2004, Rennes, France, pp. 615-619, 2004, IEEE Computer Society, 0-7695-2203-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
38 | Javier D. Bruguera, Tomás Lang |
Multilevel reverse most-significant carry computation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 9(6), pp. 959-962, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
38 | Othmar Staffelbach, Willi Meier |
Cryptographic Significance of the Carry for Ciphers Based on Integer Addition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CRYPTO ![In: Advances in Cryptology - CRYPTO '90, 10th Annual International Cryptology Conference, Santa Barbara, California, USA, August 11-15, 1990, Proceedings, pp. 601-614, 1990, Springer, 3-540-54508-5. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
37 | Bernd Becker 0001, Reiner Kolla |
On the Construction of Optimal Time Adders (Extended Abstract). ![Search on Bibsonomy](Pics/bibsonomy.png) |
STACS ![In: STACS 88, 5th Annual Symposium on Theoretical Aspects of Computer Science, Bordeaux, France, February 11-13, 1988, Proceedings, pp. 18-28, 1988, Springer, 3-540-18834-7. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
36 | Patrick M. Carry, Tim Vigers, Lauren A. Vanderlinden, Carson Keeter, Fran Dong, Teresa Buckner, Elizabeth Litkowski, Ivana Yang, Jill M. Norris, Katherina J. Kechris |
Propensity scores as a novel method to guide sample allocation and minimize batch effects during the design of high throughput experiments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BMC Bioinform. ![In: BMC Bioinform. 24(1), pp. 86, December 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
36 | M. Pöntinen, Mikael Granvik, Achille A. Nucita, L. Conversi, Bruno Altieri, B. Carry, C. M. O'Riordan, D. Scott, N. Aghanim, A. Amara, L. Amendola, N. Auricchio, M. Baldi, D. Bonino, E. Branchini, Massimo Brescia, S. Camera, V. Capobianco, C. Carbone, J. Carretero, M. Castellano, Stefano Cavuoti, A. Cimatti, R. Cledassou, G. Congedo, Y. Copin, L. Corcione, F. Courbin, M. Cropper, A. Da Silva, Hubert Degaudenzi, J. Dinis, Florian Dubath, X. Dupac, S. Dusini, S. Farrens, S. Ferriol, Marco Frailis, Enrico Franceschi, M. Fumana, S. Galeotta, et al. |
Euclid: Identification of asteroid streaks in simulated images using deep learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2310.03845, 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
36 | Chen Qiu, Carry Ruikai Yu |
Assessing the role of new media in modern information society using the analytic network process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Soft Comput. ![In: Soft Comput. 27(7), pp. 3983-3997, April 2023. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
36 | Robert Carry Osborne |
A social solution to the puzzle of doxastic responsibility: a two-dimensional account of responsibility for belief. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Synth. ![In: Synth. 198(10), pp. 9335-9356, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
36 | Piero Montebruno, Robert J. Bennett, Harry Smith, Carry van Lieshout |
Machine learning classification of entrepreneurs in British historical census data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Inf. Process. Manag. ![In: Inf. Process. Manag. 57(3), pp. 102210, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
36 | Stéphane Erard, Baptiste Cecconi, Pierre Le Sidaner, Cyril Chauvin, Angelo Pio Rossi, Mikhail Minin, Maria Teresa Capria, Stavro Ivanovski, Bernard Schmitt, Vincent Génot, Nicolas André, Chiara Marmo, Ann-Carine Vandaele, Loïc Trompet, Manuel Scherf, Ricardo Hueso, Anni Määttänen, Benoît Carry, Nicholas Achilleos, Jan Soucek, David Pisa, Kevin Benson, Pierre Fernique, Ehouarn Millour |
Virtual European Solar & Planetary Access (VESPA): A Planetary Science Virtual Observatory Cornerstone. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Data Sci. J. ![In: Data Sci. J. 19, pp. 22, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
36 | Max Mahlke, Enrique Solano, H. Bouy, Benoît Carry, Gijs A. Verdoes Kleijn, Emmanuel Bertin |
The ssos pipeline: Identification of Solar System objects in astronomical images. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Astron. Comput. ![In: Astron. Comput. 28, pp. 100289, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
36 | Jean-Michel Friedt, Gilles Martin, Gwenhael Goavec-Mérou, David Rabus, Sébastien Alzuaga, Lilia Arapan, Marianne Sagnard, Émile Carry |
Acoustic Transducers as Passive Cooperative Targets for Wireless Sensing of the Sub-Surface World: Challenges of Probing with Ground Penetrating RADAR. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Sensors ![In: Sensors 18(1), pp. 246, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
36 | Daniel Robinson, Thomas Bertrand, Jean-Christophe Carry, Frank Halley, Andreas Karlsson, Magali Mathieu, Hervé Minoux, Marc-Antoine Perrin, Benoit Robert, Laurent Schio, Woody Sherman |
Differential Water Thermodynamics Determine PI3K-Beta/Delta Selectivity for Solvent-Exposed Ligand Modifications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Chem. Inf. Model. ![In: J. Chem. Inf. Model. 56(5), pp. 886-894, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
36 | Rebecca Schnall, Marlene Rojas, Suzanne Bakken, William Brown III 0001, Alex Carballo-Dieguez, Monique Carry, Deborah Gelaude, Jocelyn Patterson Mosley, Jasmine Travers |
A user-centered model for designing consumer mobile health (mHealth) applications (apps). ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Biomed. Informatics ![In: J. Biomed. Informatics 60, pp. 243-251, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
36 | Kareem S. Aggour, Bethany Hoogs, Christina Leber, Carry Correia, Deniz Senturk-Doganaksoy |
Mining company networks for marketing insights and sales leads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASONAM ![In: Advances in Social Networks Analysis and Mining 2013, ASONAM '13, Niagara, ON, Canada - August 25 - 29, 2013, pp. 805-812, 2013, ACM, 978-1-4503-2240-9. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
36 | Yannick Denis, Jean Coldefy, Patrick Gendre, Eric Bourlès, Christophe Carry |
ACTIF: une aide à la conception de systèmes de transports interopérables en France. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Ann. des Télécommunications ![In: Ann. des Télécommunications 60(3-4), pp. 441-453, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
36 | André Eberhard, Pierre-Yves Carry, Jean-Pierre Perdrix, Jean-Marc Fargnoli, Loïc Biot, Pierre F. Baconnier |
A program based on a 'selective' least-squares method for respiratory mechanics monitoring in ventilated patients. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Methods Programs Biomed. ![In: Comput. Methods Programs Biomed. 71(1), pp. 39-61, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
36 | Anne-Sophie Silvent, Catherine Garbay, Pierre-Yves Carry, Michel Dojat |
Rôle des données, informations et connaissances dans la construction de scénarios médicaux. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EGC ![In: Extraction et gestion des connaissances (EGC'2003), Actes des troisièmes journées Extraction et Gestion des Connaissances, Lyon, France, 22-24 janvier 2003, pp. 207-212, 2003, Hermes Science Publications, 2-7462-0631-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP BibTeX RDF |
|
35 | Andreas Burg, Frank K. Gürkaynak, Hubert Kaeslin, Wolfgang Fichtner |
Variable delay ripple carry adder with carry chain interrupt detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 113-116, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
34 | Alexandre F. Tenca, Song Park, Lo'ai Ali Tawalbeh |
Carry-Save Representation Is Shift-Unsafe: The Problem and Its Solution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 55(5), pp. 630-635, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Carry-save, arithmetic shift, computer arithmetic, redundant representation |
34 | Yiran Chen 0001, Hai Li 0001, Kaushik Roy 0001, Cheng-Kok Koh |
Cascaded carry-select adder (C2SA): a new structure for low-power CSA design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005, San Diego, California, USA, August 8-10, 2005, pp. 115-118, 2005, ACM, 1-59593-137-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
low-power, carry-select adder |
34 | Hiroaki Suzuki, Woopyo Jeong, Kaushik Roy 0001 |
Low-power carry-select adder using adaptive supply voltage based on input vector patterns. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004, Newport Beach, California, USA, August 9-11, 2004, pp. 313-318, 2004, ACM. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
adaptive supply voltage, low power adder, carry-select adder |
34 | Kuo-Hsing Cheng, Shun-Wen Cheng, Chan-Wei Huang |
64-bit Hybrid Dual-Threshold Voltage Power-Aware Conditional Carry Adder Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'04), 19-21 July 2004, Banff, Alberta, Canada, pp. 65-68, 2004, IEEE Computer Society, 0-7695-2182-7. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
conditional carry, hybrid dual-threshold voltage, CMOS, VLSI design, Adder |
34 | Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis, Yervant Zorian |
Easily Testable Cellular Carry Lookahead Adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 19(3), pp. 285-298, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
cellular carry lookahead adders, linear-testability, design-for-testability, cell fault model |
34 | Mark Goresky, Andrew Klapper |
Efficient multiply-with-carry random number generators with maximal period. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Model. Comput. Simul. ![In: ACM Trans. Model. Comput. Simul. 13(4), pp. 310-321, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
multiply-with-carry, p-adic number, random number generation, m-sequences, primitive element, k-distribution, feedback shift register, lattice structure, fcsr |
34 | Sangho Jin, Ichiro Kimura, Keigo Watanabe |
Controls of servomotors for carry hospital robots. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Intell. Robotic Syst. ![In: J. Intell. Robotic Syst. 7(3), pp. 353-369, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
Carry hospital robot, computer control, DC servomotor control, PLL control, mobile robot, PI control |
34 | Shu Tezuka, Pierre L'Ecuyer, Raymond Couture |
On the Lattice Structure of the Add-With-Carry and Subtract-With-Borrow Random Number Generators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Model. Comput. Simul. ![In: ACM Trans. Model. Comput. Simul. 3(4), pp. 315-331, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
add-with-carry, subtract-with-borrow, linear congruential generators, spectral test, lattice structure |
34 | Yijun Liu, Stephen B. Furber |
The Design of an Asynchronous Carry-Lookahead Adder Based on Data Characteristics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PATMOS ![In: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings, pp. 647-656, 2005, Springer, 3-540-29013-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
34 | Yajuan He, Chip-Hong Chang, Jiangmin Gu |
An area efficient 64-bit square root carry-select adder for low power applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 4082-4085, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
34 | Egor S. Sogomonyan, Daniel Marienfeld, Vitalij Ocheretnij, Michael Gössel |
A New Self-Checking Sum-Bit Duplicated Carry-Select Adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 1360-1361, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
34 | Vitalij Ocheretnij, Michael Gössel, Egor S. Sogomonyan, Daniel Marienfeld |
A Modulo p Checked Self-Checking Carry Select Adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 9th IEEE International On-Line Testing Symposium (IOLTS 2003), 7-9 July 2003, Kos Island, Greece, pp. 25-29, 2003, IEEE Computer Society, 0-7695-1968-7. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
34 | Zhan Yu, Kei-Yong Khoo, Alan N. Willson Jr. |
The use of carry-save representation in joint module selection and retiming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 37th Conference on Design Automation, Los Angeles, CA, USA, June 5-9, 2000., pp. 768-773, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
34 | Hercule Kwan, Robert Leonard Nelson Jr., Earl E. Swartzlander Jr. |
A new design for a lookahead carry generator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 14(3), pp. 295-302, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
34 | Tobias G. Noll |
Carry-save architectures for high-speed digital signal processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 3(1-2), pp. 121-140, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
33 | R. D. (Shawn) Blanton, John P. Hayes |
Design of a fast, easily testable ALU. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 14th IEEE VLSI Test Symposium (VTS'96), April 28 - May 1, 1996, Princeton, NJ, USA, pp. 9-16, 1996, IEEE Computer Society, 0-8186-7304-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
ALU, adder design, L-testable design, level-testable, carry-lookahead addition, fault diagnosis, logic testing, integrated circuit testing, automatic testing, digital arithmetic, integrated circuit design, adders, logic arrays, test patterns, area overhead, functional faults, carry logic, arithmetic-logic unit, 8 bit |
33 | Jaswinder Pal Singh, Anshul Kumar, Shashi Kumar |
A multiplier generator for Xilinx FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 9th International Conference on VLSI Design (VLSI Design 1996), 3-6 January 1996, Bangalore, India, pp. 322-323, 1996, IEEE Computer Society, 0-8186-7228-5. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
multiplier generator, Xilinx FPGAs, LUT based FPGA, sequential designs, combinational designs, pipelined designs, IDEAS synthesis system, XC3000 family, XC4000 family, dedicated carry logic, XACT tool, XBLOX tool, field programmable gate arrays, high level synthesis, sequential circuits, combinational circuits, digital arithmetic, logic CAD, pipeline processing, integrated circuit design, circuit CAD, table lookup, multiplying circuits, module generator, carry logic, multiplier designs |
33 | Sudhakar Maddi, M. B. Srinivas |
A unified and reconfigurable Montgomery Multiplier architecture without four-to-two CSA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SBCCI ![In: Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2007, Copacabana, Rio de Janeiro, Brazil, September 3-6, 2007, pp. 147-152, 2007, ACM, 978-1-59593-816-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
sum-carry logic, RSA, ECC, reconfigurable architectures, montgomery multiplication, unified architectures |
33 | Thambipillai Srikanthan, Siew Kei Lam, Mishra Suman |
Area-Time Efficient Sign Detection Technique for Binary Signed-Digit Number System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 53(1), pp. 69-72, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
binary signed-digit number system, most significant carry detection, Sign detection |
33 | Dimitris Gizopoulos, Dimitris Nikolos, Antonis M. Paschalis, Constantin Halatsis |
C-Testable modified-Booth multipliers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 8(3), pp. 241-260, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Booth multipliers, design for testability, C-testability, iterative logic arrays, carry lookahead adders, cell fault model |
32 | Jianhua Liu, Michael Chang, Chung-Kuan Cheng, John F. MacDonald, Nan-Chi Chou, Peter Suaris |
Fast adders in modern FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, FPGA 2004, Monterey, California, USA, February 22-24, 2004, pp. 250, 2004, ACM, 1-58113-829-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
30 | Xiaofu Jin, Mingming Fan 0001 |
"I Used To Carry A Wallet, Now I Just Need To Carry My Phone": Understanding Current Banking Practices and Challenges Among Older Adults in China. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2207.12935, 2022. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
30 | Adriana N. Borodzhieva, Ivanka D. Tsvetkova |
Experiential Learning Approach for Teaching the Topic "Arithmetic Circuits for Fast Addition: Carry Propagation-Look-Ahead Carry Generator". ![Search on Bibsonomy](Pics/bibsonomy.png) |
CompSysTech ![In: CompSysTech '22: International Conference on Computer Systems and Technologies 2022, University of Ruse, Ruse, Bulgaria, June 17 - 18, 2022, pp. 136-141, 2022, ACM, 978-1-4503-9644-8. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
30 | Xiaofu Jin, Mingming Fan 0001 |
"I Used To Carry A Wallet, Now I Just Need To Carry My Phone": Understanding Current Banking Practices and Challenges Among Older Adults in China. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASSETS ![In: Proceedings of the 24th International ACM SIGACCESS Conference on Computers and Accessibility, ASSETS 2022, Athens, Greece, October 23-26, 2022, pp. 37:1-37:16, 2022, ACM, 978-1-4503-9258-7. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
30 | |
Low power area optimized and high speed carry select adder using optimized half sum and carry generation unit for FIR filter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Ambient Intell. Humaniz. Comput. ![In: J. Ambient Intell. Humaniz. Comput. 12(5), pp. 5513-5524, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
30 | Mehedi Hasan, Muhammad Saddam Hossain, Abdul Hasib Siddique, Mainul Hossain, Hasan U. Zaman, Sharnali Islam |
A high-speed 4-bit Carry Look-Ahead architecture as a building block for wide word-length Carry-Select Adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 109, pp. 104992, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
30 | Shobhit Belwal, Rajat Bhattacharjya, Kaustav Goswami 0002, Dip Sankar Banerjee |
ACLA: An Approximate Carry-Lookahead Adder with Intelligent Carry Judgement and Correction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 22nd International Symposium on Quality Electronic Design, ISQED 2021, Santa Clara, CA, USA, April 7-9, 2021, pp. 1-7, 2021, IEEE, 978-1-7281-7641-3. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
30 | Md. Ashik Zafar Dipto, Afran Sorwar, Elias Ahammad Sojib, Md. Mostak Tahmid Rangon |
Performance Improvement in Conventional 4-bit Static CMOS Carry Look-Ahead Adder by Modifying Carry-Generate and Propagate Terms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCCNT ![In: 11th International Conference on Computing, Communication and Networking Technologies, ICCCNT 2020, Kharagpur, India, July 1-3, 2020, pp. 1-5, 2020, IEEE, 978-1-7281-6851-7. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
30 | Mehedi Hasan, Parag Biswas, Md. Shihabul Alam, Hasan U. Zaman, Mainul Hossain, Sharnali Islam |
High Speed and Ultra Low Power Design of Carry-Out Bit of 4-Bit Carry Look-Ahead Adder. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCCNT ![In: 10th International Conference on Computing, Communication and Networking Technologies, ICCCNT 2019, Kanpur, India, July 6-8, 2019, pp. 1-5, 2019, IEEE, 978-1-5386-5906-9. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
30 | Minho Nam, Yeonhun Choi, Kyoung-Rok Cho |
High-speed and energy efficient carry select adder (CSLA) dominated by carry generation logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 79, pp. 70-78, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
30 | Milad Bahadori, Mehdi Kamal, Ali Afzali-Kusha, Yasmin Afsharnezhad, Elham Zahraie Salehi |
CL-CPA: A hybrid carry-lookahead/carry-propagate adder for low-power or high-performance operation mode. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 57, pp. 62-68, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
30 | P. Balasubramanian 0001, Cuong Dang, Douglas L. Maskell, K. Prasad |
Approximate Ripple Carry and Carry Lookahead Adders - A Comparative Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1710.05474, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP BibTeX RDF |
|
30 | Jinnan Ding, Shuguo Li |
Determine the carry bit of carry-sum generated by unsigned MBE multiplier without final addition. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 27th International Conference on Field Programmable Logic and Applications, FPL 2017, Ghent, Belgium, September 4-8, 2017, pp. 1-4, 2017, IEEE, 978-9-0903-0428-1. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
30 | P. Balasubramanian 0001, Nikos E. Mastorakis |
ASIC-based Implementation of Synchronous Section-Carry Based Carry Lookahead Adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1603.07961, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP BibTeX RDF |
|
30 | P. Balasubramanian 0001, Nikos E. Mastorakis |
Design of Synchronous Section-Carry Based Carry Lookahead Adders with Improved Figure of Merit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1606.05621, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP BibTeX RDF |
|
30 | Atef Ibrahim, Fayez Gebali |
Optimized structures of hybrid ripple carry and hierarchical carry lookahead adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 46(9), pp. 783-794, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
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