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Publication years (Num. hits)
1987-1994 (15) 1995-1996 (19) 1997 (16) 1998-1999 (22) 2000-2001 (15) 2002 (15) 2003-2004 (17) 2005-2006 (22) 2007-2008 (20) 2009-2012 (21) 2013-2015 (25) 2016 (16) 2017 (22) 2018 (25) 2019 (15) 2020 (17) 2021 (23) 2022-2023 (22) 2024 (3)
Publication types (Num. hits)
article(156) incollection(6) inproceedings(188)
Venues (Conferences, Journals, ...)
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The graphs summarize 147 occurrences of 98 keywords

Results
Found 384 publication records. Showing 350 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
147Arif Ishaq Abou-Seido, Brian Nowak, Chris C. N. Chu Fitted Elmore Delay: A Simple and Accurate Interconnect Delay Model. Search on Bibsonomy ICCD The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
94Yehea I. Ismail, Eby G. Friedman, José Luis Neves Equivalent Elmore delay for RLC trees. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
94Nevine Nassif, Madhav P. Desai, Dale H. Hall Robust Elmore Delay Models Suitable for Full Chip Timing Verification of a 600MHz CMOS Microprocessor. Search on Bibsonomy DAC The full citation details ... 1998 DBLP  DOI  BibTeX  RDF reconstruction, emulation, visibility, functional simulation
94Rohini Gupta, Bogdan Tutuianu, Lawrence T. Pileggi The Elmore delay as a bound for RC trees with generalized input signals. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
81Satoshi Tayu, Mineo Kaneko Characterization and computation of Steiner wiring based on Elmore's delay model. Search on Bibsonomy APCCAS (2) The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
76Jason Cong, Andrew B. Kahng, Cheng-Kok Koh, Chung-Wen Albert Tsao Bounded-skew clock and Steiner routing under Elmore delay. Search on Bibsonomy ICCAD The full citation details ... 1995 DBLP  DOI  BibTeX  RDF bounded-skew, pathlength delay, VLSI, global routing, Elmore delay, zero-skew, zero-skew, clock routing, routing trees
67Andrew B. Kahng, Chung-Wen Albert Tsao Low-cost single-layer clock trees with exact zero Elmore delay skew. Search on Bibsonomy ICCAD The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
67Youxin Gao, D. F. Wong 0001 Wire-Sizing for Delay Minimization and Ringing Control Using Transmission Line Model. Search on Bibsonomy DATE The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
67Yehea I. Ismail, Eby G. Friedman, José Luis Neves Signal waveform characterization in RLC trees. Search on Bibsonomy ISCAS (6) The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
67Kenneth D. Boese, Andrew B. Kahng, Bernard A. McCoy, Gabriel Robins Near-optimal critical sink routing tree constructions. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
63Youxin Gao, D. F. Wong 0001 Optimal shape function for a bi-directional wire under Elmore delay model. Search on Bibsonomy ICCAD The full citation details ... 1997 DBLP  DOI  BibTeX  RDF Bi-directional wire, Optimal shape, Elmore Delay
63Chung-Ping Chen, Hai Zhou 0001, D. F. Wong 0001 Optimal non-uniform wire-sizing under the Elmore delay model. Search on Bibsonomy ICCAD The full citation details ... 1996 DBLP  DOI  BibTeX  RDF Elmore delay model, IBM RS/6000 workstation, NWSA-db, NWSA-md, NWSA-wd algorithm, general routing trees, maximum sink delay, minimization objectives, optimal nonuniform wire sizing, routing-tree problem, sink-delay bounds, total area, total weighted sink-delays, wire-sizing formula, circuit analysis computing, Lagrangian relaxation
54Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman 0001, Parthasarathi Dasgupta Revisiting fidelity: a case of elmore-based Y-routing trees. Search on Bibsonomy SLIP The full citation details ... 2008 DBLP  DOI  BibTeX  RDF routing, Steiner trees, fidelity, rank correlation
54Quming Zhou, Kartik Mohanram Elmore model for energy estimation in RC trees. Search on Bibsonomy DAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF RC trees, interconnect, Energy estimation
54Arif Ishaq Abou-Seido, Brian Nowak, Chris Chong-Nuen Chu Fitted Elmore delay: a simple and accurate interconnect delay model. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
54Manjit Borah, Robert Michael Owens, Mary Jane Irwin A fast algorithm for minimizing the Elmore delay to identified critical sinks. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
54John P. Fishburn Shaping a VLSI wire to minimize Elmore delay. Search on Bibsonomy ED&TC The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
54Jason Cong, Kwok-Shing Leung Optimal wiresizing under Elmore delay model. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
53Kanak Agarwal, Dennis Sylvester, David T. Blaauw A simple metric for slew rate of RC circuits based on two circuit moments. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
53Charles J. Alpert, Anirudh Devgan, Chandramouli V. Kashyap RC delay metrics for performance optimization. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
53Youxin Gao, Martin D. F. Wong Wire-sizing optimization with inductance consideration using transmission-line model. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
53John Lillis, Premal Buch Table-Lookup Methods for Improved Performance-Driven Routing. Search on Bibsonomy DAC The full citation details ... 1998 DBLP  DOI  BibTeX  RDF logic synthesis, gate-sizing, fanout optimization
53Andrew B. Kahng, Sudhakar Muddu An analytical delay model for RLC interconnects. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
53Chung-Ping Chen, D. F. Wong 0001 Optimal Wire-Sizing Function with Fringing Capacitance Consideration. Search on Bibsonomy DAC The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
53Andrew B. Kahng, Chung-Wen Albert Tsao Planar-DME: a single-layer zero-skew clock tree router. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1996 DBLP  DOI  BibTeX  RDF
49Lieven Vandenberghe, Stephen P. Boyd, Abbas El Gamal Optimal wire and transistor sizing for circuits with non-tree topology. Search on Bibsonomy ICCAD The full citation details ... 1997 DBLP  DOI  BibTeX  RDF optimal circuit sizing, crosstalk, Elmore delay, clock distribution networks
49Andrew B. Kahng, Kei Masuko, Sudhakar Muddu Analytical delay models for VLSI interconnects under ramp input. Search on Bibsonomy ICCAD The full citation details ... 1996 DBLP  DOI  BibTeX  RDF SPICE-computed delay, VLSI routing topologies layout, analytical delay models, arbitrary interconnect trees, interconnect transfer function, performance-driven synthesis, ramp input, source-sink delays, VLSI, Elmore delay, interconnect delays, VLSI interconnects, RLC interconnections
41Min Ni, Seda Ogrenci Memik Self-heating-aware optimal wire sizing under Elmore delay model. Search on Bibsonomy DATE The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
41Shuji Tsukiyama, Masahiko Tomita An algorithm for calculating correlation coefficients between Elmore interconnect delays. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
41Youxin Gao, Martin D. F. Wong Optimal shape function for a bidirectional wire under Elmore delay model. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
41Youxin Gao, D. F. Wong 0001 Optimal Wire Shape with Consideration of Coupling Capacitance under Elmore Delay Model. Search on Bibsonomy ASP-DAC The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
40Tao Lin, Lawrence T. Pileggi RC(L) interconnect sizing with second order considerations via posynomial programming. Search on Bibsonomy ISPD The full citation details ... 2001 DBLP  DOI  BibTeX  RDF RC trees, VLSI design automation, central moments, posynomiality, convex programming, interconnect optimization
40Huibo Hou, Jiang Hu, Sachin S. Sapatnekar Non-Hanan routing. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
40Xiaodong Yang, Walter H. Ku, Chung-Kuan Cheng RLC interconnect delay estimation via moments of amplitude and phase response. Search on Bibsonomy ICCAD The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
40Emrah Acar, Altan Odabasioglu, Mustafa Celik, Lawrence T. Pileggi S2P: A Stable 2-Pole RC Delay and Coupling Noise Metric. Search on Bibsonomy Great Lakes Symposium on VLSI The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
40Noel Menezes, Chung-Ping Chen Spec-Based Repeater Insertion and Wire Sizing for On-chip Interconnect. Search on Bibsonomy VLSI Design The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
35Dukgwon Lee, Seunghyun Beak, Youngmin Lee, Eunser Lee, Jungkook Kim, Gyung-Leen Park, Taikyeong Jeong Minimize the delay of parasitic capacitance and modeling in RLC circuit. Search on Bibsonomy ICHIT The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Elmore, parasitic capacitance, delay, interconnection, oscillator
35Yen-Hung Lin, Shu-Hsin Chang, Yih-Lang Li Critical-trunk based obstacle-avoiding rectilinear steiner tree routings for delay and slack optimization. Search on Bibsonomy ISPD The full citation details ... 2009 DBLP  DOI  BibTeX  RDF elmore delay model, obstacle-avoiding rectilinear steiner tree, performance-driven routing, worst negative slack, timing constraint
35Soroush Abbaspour, Hanif Fatemi, Massoud Pedram VITA: variation-aware interconnect timing analysis for symmetric and skewed sources of variation considering variational ramp input. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2005 DBLP  DOI  BibTeX  RDF moment calculation, sources of variation, sensitivity, statistical timing analysis, elmore delay
35Soroush Abbaspour, Amir H. Ajami, Massoud Pedram, Emre Tuncer TFA: a threshold-based filtering algorithm for propagation delay and slew calculation of high-speed VLSI interconnects. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2004 DBLP  DOI  BibTeX  RDF elmore, threshold-based filtering algorithm, static timing analysis, moments, AWE
35Chandramouli V. Kashyap, Charles J. Alpert, Frank Liu 0001, Anirudh Devgan Closed form expressions for extending step delay and slew metrics to ramp inputs. Search on Bibsonomy ISPD The full citation details ... 2003 DBLP  DOI  BibTeX  RDF Elmore, slew, delay, timing, interconnects, PDF, moments, median, skewness
35Vasant B. Rao, Jeffrey Soreff, Ravichander Ledalla, Fred L. Yang Aggressive crunching of extracted RC netlists. Search on Bibsonomy Timing Issues in the Specification and Synthesis of Digital Systems The full citation details ... 2002 DBLP  DOI  BibTeX  RDF RC reduction, TICER, crunching, node elimination, resistor shorting, time constants, interconnect modeling, elmore delay
35Chandramouli V. Kashyap, Charles J. Alpert, Frank Liu 0001, Anirudh Devgan PERI: a technique for extending delay and slew metrics to ramp inputs. Search on Bibsonomy Timing Issues in the Specification and Synthesis of Digital Systems The full citation details ... 2002 DBLP  DOI  BibTeX  RDF Elmore, slew, delay, interconnects, PDF, moments, median, skewness, standard deviation
35Anirudh Devgan Efficient coupled noise estimation for on-chip interconnects. Search on Bibsonomy ICCAD The full citation details ... 1997 DBLP  DOI  BibTeX  RDF coupled noise estimation, dynamic logic circuit families, noise criticality pruning, physical design based noise avoidance, circuit simulation, on-chip interconnects, Elmore delay, noise analysis, timing simulation, integrated circuit noise, deep submicron design
35Jason Cong, Lei He 0001 Optimal wiresizing for interconnects with multiple sources. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 1996 DBLP  DOI  BibTeX  RDF bundled refinement, decomposition of multi-source routing tree, dominance property, multi-source net, multi-source routing tree, optimal wiresizing, variable segment-division, high performance, SPICE, fidelity, interconnect optimization, Elmore delay, local refinement, layout optimization
35Manjit Borah, Robert Michael Owens, Mary Jane Irwin Fast algorithm for performance-oriented Steiner routing. Search on Bibsonomy Great Lakes Symposium on VLSI The full citation details ... 1995 DBLP  DOI  BibTeX  RDF performance-oriented Steiner routing, fast routing algorithm, Elmore delay minimisation, layout generators, computational complexity, VLSI, data structures, data structures, delays, iterative methods, network routing, circuit layout CAD, integrated circuit layout, iterative techniques
27Ahmed Soltan, Ahmed G. Radwan, Alex Yakovlev Elmore delay in the fractional order domain. Search on Bibsonomy ECCTD The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
27Jiani Xie, C. Y. Roger Chen Lookup Table Based Discrete Gate Sizing for Delay Minimization with Modified Elmore Delay Model. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
27Mutlu Avci, Serhan Yamaçli An improved Elmore delay model for VLSI interconnects. Search on Bibsonomy Math. Comput. Model. The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
27Glauco Borges Valim dos Santos, Tiago Reimann, Marcelo O. Johann, Ricardo Reis 0001 The Fidelity Property of the Elmore Delay Model in actual comparison of routing algorithms. Search on Bibsonomy ICCD The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
27Glauco B. V. dos Santos, Tiago Reimann, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis On the accuracy of Elmore-based Delay Models. Search on Bibsonomy ICECS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
27Satoshi Tayu, Mineo Kaneko Characterization and Computation of Steiner Routing Based on Elmore's Delay Model. Search on Bibsonomy IEICE Trans. Fundam. Electron. Commun. Comput. Sci. The full citation details ... 2002 DBLP  BibTeX  RDF
27Clayton B. McDonald, Randal E. Bryant Computing Logic-Stage Delays Using Circuit Simulation and Symbolic Elmore Analysis. Search on Bibsonomy DAC The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
27Tetsushi Koide, Shin'ichi Wakabayashi A timing-driven floorplanning algorithm with the Elmore delay model for building block layout. Search on Bibsonomy Integr. The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
27Youxin Gao, D. F. Wong 0001 Shaping a VLSI wire to minimize Elmore delay with consideration of coupling capacitance. Search on Bibsonomy Integr. The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
27Yehea I. Ismail, Eby G. Friedman, José Luis Neves Equivalent Elmore Delay for RLC Trees. Search on Bibsonomy DAC The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
27Tetsushi Koide, Shin'ichi Wakabayashi, Mitsuhiro Ono, Yutaka Nishimaru, Noriyoshi Yoshida A timing-driven placement algorithm with the Elmore delay model for row-based VLSIs. Search on Bibsonomy Integr. The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
27Tetsushi Koide, Mitsuhiro Ono, Shin'ichi Wakabayashi, Yutaka Nishimaru Par-POPINS: a timing-driven parallel placement method with the Elmore delay model for row based VLSIs. Search on Bibsonomy ASP-DAC The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
27Chung-Ping Chen, Yao-Ping Chen, D. F. Wong 0001 Optimal Wire-Sizing Formular Under the Elmore Delay Model. Search on Bibsonomy DAC The full citation details ... 1996 DBLP  DOI  BibTeX  RDF
27Tetsushi Koide, Mitsuhiro Ono, Shin'ichi Wakabayashi, Yutaka Nishimaru A new performance driven placement method with the Elmore delay model for row based VLSIs. Search on Bibsonomy ASP-DAC The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
27Rohini Gupta, Byron Krauter, Bogdan Tutuianu, John Willis, Lawrence T. Pileggi The Elmore Delay as a Bound for RC Trees with Generalized Input Signals. Search on Bibsonomy DAC The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
27Todd D. Hodes, Bernard A. McCoy, Gabriel Robins Dynamically-Wiresized Elmore-Based Routing Constructions. Search on Bibsonomy ISCAS The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
27Sachin S. Sapatnekar RC Interconnect Optimization Under the Elmore Delay Model. Search on Bibsonomy DAC The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
27Kenneth D. Boese, Andrew B. Kahng, Bernard A. McCoy, Gabriel Robins Rectilinear Steiner Trees with Minimum Elmore Delay. Search on Bibsonomy DAC The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
27Jason Cong, Kwok-Shing Leung Optimal wiresizing under the distributed Elmore delay model. Search on Bibsonomy ICCAD The full citation details ... 1993 DBLP  DOI  BibTeX  RDF
27Kenneth D. Boese, Andrew B. Kahng, Bernard A. McCoy, Gabriel Robins Fidelity and Near-Optimality of Elmore-Based Routing Constructions. Search on Bibsonomy ICCD The full citation details ... 1993 DBLP  DOI  BibTeX  RDF
27Zhuo Li 0001, Nancy Ying Zhou, Weiping Shi Wire Sizing for Non-Tree Topology. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
27Ting Wei Chiang, C. Y. Roger Chen, Wei-Yu Chen An efficient gate delay model for VLSI design. Search on Bibsonomy ICCD The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
27Soroush Abbaspour, Massoud Pedram, Amir H. Ajami, Chandramouli V. Kashyap Fast Interconnect and Gate Timing Analysis for Performance Optimization. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
27Weixiang Shen, Yici Cai, Jiang Hu, Xianlong Hong, Bing Lu High performance clock routing in X-architecture. Search on Bibsonomy ISCAS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
27Li-Da Huang, Minghorng Lai, Martin D. F. Wong, Youxin Gao Maze routing with buffer insertion under transition time constraints. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
27Minghorng Lai, Martin D. F. Wong Maze routing with buffer insertion and wiresizing. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
27Li-Da Huang, Minghorng Lai, D. F. Wong 0001, Youxin Gao Maze Routing with Buffer Insertion under Transition Time Constraints. Search on Bibsonomy DATE The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
27Masud H. Chowdhury, Yehea I. Ismail, Chandramouli V. Kashyap, Byron Krauter Performance analysis of deep sub micron VLSI circuits in the presence of self and mutual inductance. Search on Bibsonomy ISCAS (4) The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
27Minghorng Lai, D. F. Wong 0001 Maze routing with buffer insertion and wiresizing. Search on Bibsonomy DAC The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
27Lieven Vandenberghe, Stephen P. Boyd, Abbas A. El Gamal Optimizing dominant time constant in RC circuits. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
27Rony Kay, Lawrence T. Pileggi EWA: efficient wiring-sizing algorithm for signal nets and clock nets. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
27Rony Kay, Lawrence T. Pileggi PRIMO: Probability Interpretation of Moments for Delay Calculation. Search on Bibsonomy DAC The full citation details ... 1998 DBLP  DOI  BibTeX  RDF transceiver, spread spectrum communication, RF CMOS, digital radio, ISM frequency band
27Noel Menezes, Ross Baldick, Lawrence T. Pileggi A sequential quadratic programming approach to concurrent gate and wire sizing. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
27Satyamurthy Pullela, Noel Menezes, Lawrence T. Pileggi Moment-sensitivity-based wire sizing for skew reduction in on-chip clock nets. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
27Noel Menezes, Ross Baldick, Lawrence T. Pileggi A sequential quadratic programming approach to concurrent gate and wire sizing. Search on Bibsonomy ICCAD The full citation details ... 1995 DBLP  DOI  BibTeX  RDF RC interconnect, optimization, sequential quadratic programming
27Jirí Vlach, James A. Barby, Anthony Vannelli, T. Talkhan, C.-J. Richard Shi Group delay as an estimate of delay in logic. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1991 DBLP  DOI  BibTeX  RDF
27Jean Paul Caisso, Eduard Cerny, Nicholas C. Rumin A recursive technique for computing delays in series-parallel MOS transistor circuits. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1991 DBLP  DOI  BibTeX  RDF
27Steven Paul McCormick, Jonathan Allen Waveform Moment Methods for Improved Interconnection Analysis. Search on Bibsonomy DAC The full citation details ... 1990 DBLP  DOI  BibTeX  RDF
26Tad T. Brunyé, Kelsey Booth, Dalit D. Hendel, Kathleen F. Kerr, Hannah Shucard, Donald L. Weaver, Joann G. Elmore Machine learning classification of diagnostic accuracy in pathologists interpreting breast biopsies. Search on Bibsonomy J. Am. Medical Informatics Assoc. The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
26Nicoleta J. Economou-Zavlanos, Sophia Bessias, Michael P. Cary, Armando Bedoya, Benjamin Goldstein 0001, John Eric Jelovsek, Cara O'Brien, Nancy Walden, Matthew Elmore, Amanda B. Parrish, Scott Elengold, Kay S. Lytle, Suresh Balu, Michael E. Lipkin, Afreen Idris Shariff, Michael Gao, David Leverenz, Ricardo Henao, David Y. Ming, David M. Gallagher, Michael J. Pencina, Eric G. Poon Translating ethical and quality principles for the effective, safe and fair development, deployment and use of artificial intelligence technologies in healthcare. Search on Bibsonomy J. Am. Medical Informatics Assoc. The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
26Rui Liu, Jun Hyuk Chang, Riki Otaki, Zhe Heng Eng, Aaron J. Elmore, Michael J. Franklin, Sanjay Krishnan Towards Resource-adaptive Query Execution in Cloud Native Databases. Search on Bibsonomy CIDR The full citation details ... 2024 DBLP  BibTeX  RDF
26John Paparrizos, Chunwei Liu, Aaron J. Elmore, Michael J. Franklin Querying Time-Series Data: A Comprehensive Comparison of Distance Measures. Search on Bibsonomy IEEE Data Eng. Bull. The full citation details ... 2023 DBLP  BibTeX  RDF
26Benjamin Williams 0003, Will Palmquist, Ryan Elmore Simulation-based decision making in the NFL using NFLSimulatoR. Search on Bibsonomy Ann. Oper. Res. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
26John S. Schreck, David John Gagne II, Charlie Becker, William E. Chapman, Kim Elmore, Gabrielle Gantos, Eliot Kim, Dhamma Kimpara, Thomas Martin, Maria J. Molina, Vanessa M. Pryzbylo, Jacob Radford, Belen Saavedra, Justin Willson, Christopher D. Wirz Evidential Deep Learning: Enhancing Predictive Uncertainty Estimation for Earth System Science Applications. Search on Bibsonomy CoRR The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
26Siyuan Xia, Zhiru Zhu, Chris Zhu, Jinjin Zhao, Kyle Chard, Aaron J. Elmore, Ian T. Foster, Michael J. Franklin, Sanjay Krishnan, Raul Castro Fernandez Data Station: Delegated, Trustworthy, and Auditable Computation to Enable Data-Sharing Consortia with a Data Escrow. Search on Bibsonomy CoRR The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
26Raul Castro Fernandez, Aaron J. Elmore, Michael J. Franklin, Sanjay Krishnan, Chenhao Tan How Large Language Models Will Disrupt Data Management. (PDF / PS) Search on Bibsonomy Proc. VLDB Endow. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
26John Paparrizos, Kaize Wu, Aaron J. Elmore, Christos Faloutsos, Michael J. Franklin Accelerating Similarity Search for Elastic Measures: A Study and New Generalization of Lower Bounding Distances. (PDF / PS) Search on Bibsonomy Proc. VLDB Endow. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
26Georgia Koutrika, Jun Yang 0001, Manos Athanassoulis, Kostas Stefanidis, Ju Fan, Abdul Quamar, Yuanyan Tian, Alekh Jindal, Carsten Binnig, Jennie Rogers, Senjuti Basu Roy, Steven Euijong Whang, Matthias Boehm 0001, Aaron J. Elmore, Vasilis Efthymiou, Xiao Hu 0005, Xiaofang Zhou 0001, Alan D. Fekete Front Matter. Search on Bibsonomy Proc. VLDB Endow. The full citation details ... 2023 DBLP  BibTeX  RDF
26Rui Liu 0002, Aaron J. Elmore, Michael J. Franklin, Sanjay Krishnan Rotary: A Resource Arbitration Framework for Progressive Iterative Analytics. Search on Bibsonomy ICDE The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
26Kechun Liu, Beibin Li, Wenjun Wu, Caitlin J. May, Oliver Chang, Stevan Knezevich, Lisa M. Reisch, Joann G. Elmore, Linda G. Shapiro VSGD-Net: Virtual Staining Guided Melanocyte Detection on Histopathological Images. Search on Bibsonomy WACV The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
26Cangjiao Wang, Andrew J. Elmore, Izaya Numata, Mark A. Cochrane, Shaogang Lei, Christopher R. Hakkenberg, Yuanyuan Li, Yibo Zhao, Yu Tian A Framework for Improving Wall-to-Wall Canopy Height Mapping by Integrating GEDI LiDAR. Search on Bibsonomy Remote. Sens. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
26Andre Kleyner, David Elmore Warranty data maturity - Effect of observation time on reliability prediction and the warranty management process. Search on Bibsonomy Qual. Reliab. Eng. Int. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
26Sachin Mehta, Ximing Lu, Wenjun Wu, Donald L. Weaver, Hannaneh Hajishirzi, Joann G. Elmore, Linda G. Shapiro End-to-End diagnosis of breast biopsy images with transformers. Search on Bibsonomy Medical Image Anal. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
26Shima Nofallah, Wenjun Wu, Kechun Liu, Fatemeh Ghezloo, Joann G. Elmore, Linda G. Shapiro Automated analysis of whole slide digital skin biopsy images. Search on Bibsonomy Frontiers Artif. Intell. The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
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