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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 586 occurrences of 245 keywords
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Results
Found 571 publication records. Showing 571 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
134 | Seongmoon Wang, Sandeep K. Gupta 0001 |
DS-LFSR: a BIST TPG for low switching activity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(7), pp. 842-851, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
84 | Jovan Dj. Golic, Renato Menicocci |
Statistical distinguishers for irregularly decimated linear recurring sequences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Inf. Theory ![In: IEEE Trans. Inf. Theory 52(3), pp. 1153-1159, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
82 | Jinkyu Lee 0005, Nur A. Touba |
LFSR-Reseeding Scheme Achieving Low-Power Dissipation During Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(2), pp. 396-401, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
82 | Zhanglei Wang, Krishnendu Chakrabarty, Seongmoon Wang |
SoC testing using LFSR reseeding, and scan-slice-based TAM optimization and test scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2007 Design, Automation and Test in Europe Conference and Exposition, DATE 2007, Nice, France, April 16-20, 2007, pp. 201-206, 2007, EDA Consortium, San Jose, CA, USA, 978-3-9810801-2-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
82 | Hong-Sik Kim, Sungho Kang 0001 |
Increasing encoding efficiency of LFSR reseeding-based test compression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(5), pp. 913-917, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
82 | C. V. Krishna, Nur A. Touba |
Reducing Test Dat Volume Using LFSR Reseeding with Seed Compression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 2002, Baltimore, MD, USA, October 7-10, 2002, pp. 321-330, 2002, IEEE Computer Society, 0-7803-7543-2. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
79 | Seongmoon Wang, Kedarnath J. Balakrishnan, Wenlong Wei |
X-Block: An Efficient LFSR Reseeding-Based Method to Block Unknowns for Temporal Compactors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 57(7), pp. 978-989, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
output compaction, temporal compactor, blocking unknown values, LFSR reseeding, Built-in Self-Test, BIST, test data compression, MISR, response compaction |
79 | Richard Putman |
Using reiterative LFSR based X-masking to increase output compression in presence of unknowns. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, Orlando, Florida, USA, May 4-6, 2008, pp. 355-358, 2008, ACM, 978-1-59593-999-9. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
reiterative, x-masking, compression, LFSR |
79 | Sarbani Palit, Bimal K. Roy, Arindom De |
A Fast Correlation Attack for LFSR-Based Stream Ciphers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACNS ![In: Applied Cryptography and Network Security, First International Conference, ACNS 2003. Kunming, China, October 16-19, 2003, Proceedings, pp. 331-342, 2003, Springer, 3-540-20208-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
LFSR polynomial, Correlation immune function, Stream cipher, Correlation attack |
73 | Guang Zeng, Yang Yang, Wenbao Han, Shuqin Fan |
Word Oriented Cascade Jump sigma-LFSR. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAECC ![In: Applied Algebra, Algebraic Algorithms and Error-Correcting Codes, 18th International Symposium, AAECC-18 2009, Tarragona, Catalonia, Spain, June 8-12, 2009. Proceedings, pp. 127-136, 2009, Springer, 978-3-642-02180-0. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Cascade Jump LFSR, ??LFSR, Fast Software Encryption, Stream Cipher, Linear Feedback Shift Register(LFSR) |
73 | Ming-Der Shieh, Hsin-Fu Lo, Ming-Hwa Sheu |
High-speed generation of LFSR signatures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, pp. 222-, 2000, IEEE Computer Society, 0-7695-0887-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
high-speed generation, LFSR signatures, compaction simulation, single-input signature register, equivalent multiple-input implementation, finite field theory, high-speed signature computations, lookahead technique, internal-XOR LFSR, external-XOR LFSR, performance evaluation, logic testing, built-in self test, integrated circuit testing, automatic test pattern generation, BIST, linear feedback shift register, binary sequences, subsequences |
71 | Zhanglei Wang, Hongxia Fang, Krishnendu Chakrabarty, Michael Bienek |
Deviation-Based LFSR Reseeding for Test-Data Compression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(2), pp. 259-271, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
71 | C. V. Krishna, Abhijit Jas, Nur A. Touba |
Achieving high encoding efficiency with partial dynamic LFSR reseeding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 9(4), pp. 500-516, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
linear finite shift register, compression, Built-in self-test, reseeding |
71 | Jinkyu Lee 0005, Nur A. Touba |
Low Power Test Data Compression Based on LFSR Reseeding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 11-13 October 2004, San Jose, CA, USA, Proceedings, pp. 180-185, 2004, IEEE Computer Society, 0-7695-2231-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
71 | Shridhar K. Mukund, Edward J. McCluskey, T. R. N. Rao |
An apparatus for pseudo-deterministic testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 13th IEEE VLSI Test Symposium (VTS'95), April 30 - May 3, 1995, Princeton, New Jersey, USA, pp. 125-131, 1995, IEEE Computer Society, 0-8186-7000-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
pseudo-deterministic testing, deterministic patterns, at-speed BIST, arbitrary length shift register, care bits, tap configurations, test segments, don't care bits, random pattern resistant faults, interconnected logic blocks, logic testing, built-in self test, integrated circuit testing, LFSR, shift registers, computational efficiency, test vector, pseudo-random sequences |
69 | Dimitri Kagaris, Spyros Tragoudas |
LFSR Characteristic Polynomials for Pseudo-Exhaustive TPG with Low Number of Seeds. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 19(3), pp. 233-244, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
built-in self-test (BIST), Linear Feedback Shift Registers (LFSR), test pattern generation (TPG) |
68 | Santosh Chandrasekhar, Saikat Chakrabarti 0002, Mukesh Singhal |
Efficient Proxy Signatures For Ubiquitous Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SUTC ![In: IEEE International Conference on Sensor Networks, Ubiquitous, and Trustworthy Computing (SUTC 2008), 11-13 June 2008, Taichung, Taiwan, pp. 106-113, 2008, IEEE Computer Society, 978-0-7695-3158-8. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Schnorr signature, LFSR sequence, cubic LFSR-based cryptosystems, mobile agents, provable security, Proxy signature, ubiquitous systems |
66 | Guang Zeng, Yang Yang, Wenbao Han, Shuqin Fan |
Reducible Polynomial over F2 Constructed by Trinomial sigma-LFSR. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Inscrypt ![In: Information Security and Cryptology, 4th International Conference, Inscrypt 2008, Beijing, China, December 14-17, 2008, Revised Selected Papers, pp. 192-200, 2008, Springer, 978-3-642-01439-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Stickelberger-Swan Theorem, ??LFSR, Finite Field, Linear Feedback Shift Register(LFSR), Irreducible Polynomial |
63 | Cédric Lauradoux |
From Hardware to Software Synthesis of Linear Feedback Shift Registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), Proceedings, 26-30 March 2007, Long Beach, California, USA, pp. 1-8, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
63 | Chien-In Henry Chen, Kiran George |
Automated Synthesis of Configurable Two-dimensional Linear Feedback Shifter Registers for Random/Embedded Test Patterns. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 4th International Symposium on Quality of Electronic Design (ISQED 2003), 24-26 March 2003, San Jose, CA, USA, pp. 111-116, 2003, IEEE Computer Society, 0-7695-1881-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
63 | Wei-Lun Wang, Kuen-Jong Lee |
An Efficient Deterministic Test Pattern Generator for Scan-Based BIST Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 18(1), pp. 43-53, 2002. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
mixed-mode pattern generation, built-in self-test, power consumption, test application time, scan chain |
61 | Maoxiang Yi, Huaguo Liang, Kaihua Zhan, Cuiyun Jiang |
Optimal LFSR-Coding Test Data Compression Based on Test Cube Dividing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSE (2) ![In: Proceedings of the 12th IEEE International Conference on Computational Science and Engineering, CSE 2009, Vancouver, BC, Canada, August 29-31, 2009, pp. 698-702, 2009, IEEE Computer Society, 978-1-4244-5334-4. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
61 | Zhanglei Wang, Krishnendu Chakrabarty, Michael Bienek |
A Seed-Selection Method to Increase Defect Coverage for LFSR-Reseeding-Based Test Compression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 12th European Test Symposium, ETS 2007, Freiburg, Germany, May 20, 2007, pp. 125-130, 2007, IEEE Computer Society, 978-0-7695-2827-4. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
61 | Patrick Girard 0001, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch, Joan Figueras, Salvador Manich, João Paulo Teixeira 0001, Marcelino B. Santos |
Low-energy BIST design: impact of the LFSR TPG parameters on the weighted switching activity. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 110-113, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
61 | Dimitrios Kagaris, Spyros Tragoudas |
Cost-effective LFSR synthesis for optimal pseudoexhaustive BIST test sets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 1(4), pp. 526-536, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
60 | Sourav Mukhopadhyay, Palash Sarkar 0001 |
Application of LFSRs in Time/Memory Trade-Off Cryptanalysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WISA ![In: Information Security Applications, 6th International Workshop, WISA 2005, Jeju Island, Korea, August 22-24, 2005, Revised Selected Papers, pp. 25-37, 2005, Springer, 3-540-31012-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
Time/memory trade-off, LFSR, rainbow table |
60 | Jin Hong 0001, Dong Hoon Lee 0002, Seongtaek Chee, Palash Sarkar 0001 |
Vulnerability of Nonlinear Filter Generators Based on Linear Finite State Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FSE ![In: Fast Software Encryption, 11th International Workshop, FSE 2004, Delhi, India, February 5-7, 2004, Revised Papers, pp. 193-209, 2004, Springer, 3-540-22171-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
nonlinear filter model, Anderson information leakage, Stream cipher, LFSR, CA |
58 | Saikat Chakrabarti 0002, Santosh Chandrasekhar, Mukesh Singhal, Kenneth L. Calvert |
Authenticating Feedback in Multicast Applications Using a Novel Multisignature Scheme Based on Cubic LFSR Sequences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AINA Workshops (1) ![In: 21st International Conference on Advanced Information Networking and Applications (AINA 2007), Workshops Proceedings, Volume 1, May 21-23, 2007, Niagara Falls, Canada, pp. 607-613, 2007, IEEE Computer Society. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Multicast acknowledgements, authenticated feedback, Ack implosion, generalized El-Gamal signatures, LFSR-based PKCs, multisignatures |
58 | Seongan Lim, Seungjoo Kim, Ikkwon Yie, Jaemoon Kim |
Comments on a Signature Scheme Based on the Third Order LFSR Proposed at ACISP2001. ![Search on Bibsonomy](Pics/bibsonomy.png) |
INDOCRYPT ![In: Progress in Cryptology - INDOCRYPT 2001, Second International Conference on Cryptology in India, Chennai, India, December 16-20, 2001, Proceedings, pp. 308-315, 2001, Springer, 3-540-43010-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
Trace Projection, LFSR, digital signature scheme, XTR |
58 | Dimitrios Kagaris, Spyros Tragoudas |
Avoiding linear dependencies in LFSR test pattern generators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 6(2), pp. 229-241, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
ATPG, BIST, LFSR, characteristic polynomials, pseudo-random testing |
55 | Laung-Terng Wang, Edward J. McCluskey |
Condensed Linear Feedback Shift Register (LFSR) Testing - A Pseudoexhaustive Test Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 35(4), pp. 367-370, 1986. The full citation details ...](Pics/full.jpeg) |
1986 |
DBLP DOI BibTeX RDF |
Autonomous test, condensed LFSR testing, LFSR testing, built-in self-test, test pattern generation, pseudoexhaustive testing |
52 | Benjamin Vigoda, Justin Dauwels, Matthias Frey, Neil Gershenfeld, Tobias Koch 0001, Hans-Andrea Loeliger, Patrick R. Merkli |
Synchronization of Pseudorandom Signals by Forward-Only Message Passing With Application to Electronic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Inf. Theory ![In: IEEE Trans. Inf. Theory 52(8), pp. 3843-3852, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
52 | Wei-Lun Wang, Kuen-Jong Lee |
Accelerated test pattern generators for mixed-mode BIST environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, pp. 368-373, 2000, IEEE Computer Society, 0-7695-0887-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
accelerated test pattern generators, mixed-mode BIST, pseudorandom patterns, deterministic patterns, scan-based built-in self-test, multiple sub-chains, multiple sequence generator, fault diagnosis, logic testing, built-in self test, integrated circuit testing, automatic test pattern generation, fault coverage, linear feedback shift registers, cost, test pattern generator, shift registers, test application time, scan chain, mixed analogue-digital integrated circuits, clock cycle, integrated circuit economics |
52 | Christian Dufaza, Yervant Zorian |
On the generation of pseudo-deterministic two-patterns test sequence with LFSRs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ED&TC ![In: European Design and Test Conference, ED&TC '97, Paris, France, 17-20 March 1997, pp. 69-76, 1997, IEEE Computer Society, 0-8186-7786-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
50 | Myung-Hoon Yang, YongJoon Kim, Sunghoon Chun, Sungho Kang 0001 |
An Effective Power Reduction Methodology for Deterministic BIST Using Auxiliary LFSR. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 24(6), pp. 591-595, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Built-in self-test, Power consumption, Linear feedback shift register, Reseeding |
50 | Laurent Alaus, Dominique Noguet, Jacques Palicot |
A Reconfigurable LFSR for Tri-standard SDR Transceiver, Architecture and Complexity Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 11th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2008, Parma, Italy, September 3-5, 2008, pp. 61-67, 2008, IEEE Computer Society, 978-0-7695-3277-6. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
50 | Seongmoon Wang, Kedarnath J. Balakrishnan, Srimat T. Chakradhar |
Efficient unknown blocking using LFSR reseeding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006, pp. 1051-1052, 2006, European Design and Automation Association, Leuven, Belgium, 3-9810801-1-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
50 | Antoine Joux, Pascal Delaunay |
Galois LFSR, Embedded Devices and Side Channel Weaknesses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
INDOCRYPT ![In: Progress in Cryptology - INDOCRYPT 2006, 7th International Conference on Cryptology in India, Kolkata, India, December 11-13, 2006, Proceedings, pp. 436-451, 2006, Springer, 3-540-49767-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
50 | Yu-Hsuan Fu, Sying-Jyan Wang |
Test Data Compression with Partial LFSR-Reseeding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 14th Asian Test Symposium (ATS 2005), 18-21 December 2005, Calcutta, India, pp. 343-347, 2005, IEEE Computer Society, 0-7695-2481-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
50 | Kenneth J. Giuliani, Guang Gong |
New LFSR-Based Cryptosystems and the Trace Discrete Log Problem (Trace-DLP). ![Search on Bibsonomy](Pics/bibsonomy.png) |
SETA ![In: Sequences and Their Applications - SETA 2004, Third International Conference, Seoul, Korea, October 24-28, 2004, Revised Selected Papers, pp. 298-312, 2004, Springer, 3-540-26084-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
50 | Xiaoyun Sun, Larry L. Kinney, Bapiraju Vinnakota |
Combining dictionary coding and LFSR reseeding for test data compression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 944-947, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
built-In self test, VLSI test |
50 | Hong-Sik Kim, YongJoon Kim, Sungho Kang 0001 |
Test-decompression mechanism using a variable-length multiple-polynomial LFSR. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 11(4), pp. 687-690, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
50 | C. V. Krishna, Nur A. Touba |
Hybrid BIST Using an Incrementally Guided LFSR. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 3-5 November 2003, Boston, MA, USA, Proceedings, pp. 217-224, 2003, IEEE Computer Society, 0-7695-2042-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
50 | Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos |
A ROMless LFSR Reseeding Scheme for Scan-based BIST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 11th Asian Test Symposium (ATS 2002), 18-20 November 2002, Guam, USA, pp. 206-, 2002, IEEE Computer Society, 0-7695-1825-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
50 | Wen-Ben Jone, Jiann-Chyi Rau, Shih-Chieh Chang, Yu-Liang Wu |
A tree-structured LFSR synthesis scheme for pseudo-exhaustive testing of VLSI circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1998, Washington, DC, USA, October 18-22, 1998, pp. 322-330, 1998, IEEE Computer Society, 0-7803-5093-6. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
50 | Li-Ren Huang, Jing-Yang Jou, Sy-Yen Kuo |
An Efficient PRPG Strategy By Utilizing Essential Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 5th Asian Test Symposium (ATS '96), November 20-22, 1996, Hsinchu, Taiwan, pp. 199-204, 1996, IEEE Computer Society, 0-8186-7478-4. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
PRPG, essential fault, multiple polynomial, Gauss elimination, pseudorandom test pattern, multivariable linear equation, deterministic test set, random pattern resistant circuit, don't care value, intelligent heuristic, ISCAS-85 benchmark, ISCAS-89 benchmark, built-in self test, BIST, fault coverage, LFSR, test length, hardware overhead, multiple seed |
48 | Saikat Chakrabarti 0002, Santosh Chandrasekhar, Mukesh Singhal, Kenneth L. Calvert |
Authenticating DSR Using a Novel Multisignature Scheme Based on Cubic LFSR Sequences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESAS ![In: Security and Privacy in Ad-hoc and Sensor Networks, 4th European Workshop, ESAS 2007, Cambridge, UK, July 2-3, 2007, Proceedings, pp. 156-171, 2007, Springer, 978-3-540-73274-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
generalized El Gamal signatures, LFSR-based PKCs, DSR, secure routing, multisignatures, small-world graphs, PGP |
48 | Hongjoong Shin, Hak-soo Yu, Jacob A. Abraham |
LFSR-based BIST for analog circuits using slope detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004, pp. 316-321, 2004, ACM, 1-58113-853-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
slope detection, BIST, LFSR, analog testing, mixed-signal testing |
48 | Lijian Li, Yinghua Min |
An efficient BIST design using LFSR-ROM architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, pp. 386-, 2000, IEEE Computer Society, 0-7695-0887-1. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
read-only storage, BIST design, LFSR-ROM architecture, built-in self test, logic design, automatic test pattern generation, test pattern generation, integrated circuit design, shift registers, hardware overhead, ROM, integrated circuit economics |
42 | Andrzej Hlawiczka, Krzysztof Gucwa, Tomasz Garbolino, Michal Kopec |
Interconnect Faults Identification and Localization Using Modified Ring LFSRs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), Bratislava, Slovakia, April 16-18, 2008, pp. 247-250, 2008, IEEE Computer Society, 978-1-4244-2276-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
42 | Alexander Maximov |
Cryptanalysis of the "Grain" family of stream ciphers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AsiaCCS ![In: Proceedings of the 2006 ACM Symposium on Information, Computer and Communications Security, ASIACCS 2006, Taipei, Taiwan, March 21-24, 2006, pp. 283-288, 2006, ACM, 1-59593-272-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
decoding problem, cryptanalysis, correlation attacks, distinguisher, grain |
42 | Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos |
Multiphase BIST: a new reseeding technique for high test-data compression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(10), pp. 1429-1446, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
42 | Huaguo Liang, Cuiyun Jiang |
Sharing BIST with Multiple Cores for System-on-a-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China, pp. 418-423, 2003, IEEE Computer Society, 0-7695-1951-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
42 | Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos |
A highly regular multi-phase reseeding technique for scan-based BIST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, Washington, DC, USA, April 28-29, 2003, pp. 295-298, 2003, ACM, 1-58113-677-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
scan-based schemes, built-in self-test, linear feedback shift registers, reseeding |
42 | Irith Pomeranz, Sudhakar M. Reddy |
On methods to match a test pattern generator to a circuit-under-test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 6(3), pp. 432-444, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
42 | Jovan Dj. Golic |
Towards Fast Correlation Attacks on Irregularly Clocked Shift Registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCRYPT ![In: Advances in Cryptology - EUROCRYPT '95, International Conference on the Theory and Application of Cryptographic Techniques, Saint-Malo, France, May 21-25, 1995, Proceeding, pp. 248-262, 1995, Springer, 3-540-59409-4. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
42 | Willi Meier, Othmar Staffelbach |
Fast Correlation Attacks on Stream Ciphers (Extended Abstract). ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCRYPT ![In: Advances in Cryptology - EUROCRYPT '88, Workshop on the Theory and Application of of Cryptographic Techniques, Davos, Switzerland, May 25-27, 1988, Proceedings, pp. 301-314, 1988, Springer, 3-540-50251-3. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP DOI BibTeX RDF |
|
40 | Saikat Chakrabarti 0002, Santosh Chandrasekhar, Mukesh Singhal, Kenneth L. Calvert |
An Efficient and Scalable Quasi-Aggregate Signature Scheme Based on LFSR Sequences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 20(7), pp. 1059-1072, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
40 | Artur Jutman, Anton Tsertov, Raimund Ubar |
Calculation of LFSR Seed and Polynomial Pair for BIST Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DDECS ![In: Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), Bratislava, Slovakia, April 16-18, 2008, pp. 275-278, 2008, IEEE Computer Society, 978-1-4244-2276-0. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
40 | Claudio Mucci, Luca Vanzolini, Ilario Mirimin, Daniele Gazzola, Antonio Deledda, Sebastian Goller, Joachim Knäblein, Axel Schneider, Luca Ciccarelli, Fabio Campi |
Implementation of Parallel LFSR-based Applications on an Adaptive DSP featuring a Pipelined Configurable Gate Array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation and Test in Europe, DATE 2008, Munich, Germany, March 10-14, 2008, pp. 1444-1449, 2008, ACM, 978-3-9810801-3-1. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
40 | Zheng Gong, Yu Long 0001, Kefei Chen |
Efficient Partially Blind Signature from LFSR. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SNPD (2) ![In: Proceedings of the 8th ACIS International Conference on Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing, SNPD 2007, July 30 - August 1, 2007, Qingdao, China, pp. 717-722, 2007, IEEE Computer Society, 0-7695-2909-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
40 | Sanjay Burman, Debdeep Mukhopadhyay, Kamakoti Veezhinathan |
LFSR Based Stream Ciphers Are Vulnerable to Power Attacks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
INDOCRYPT ![In: Progress in Cryptology - INDOCRYPT 2007, 8th International Conference on Cryptology in India, Chennai, India, December 9-13, 2007, Proceedings, pp. 384-392, 2007, Springer, 978-3-540-77025-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Linear Feed Back Shift Registers, Dynamic Power Dissipation, Side Channel Attacks, Power Analysis, Hamming Distance |
40 | Mohammad Tehranipoor, Mehrdad Nourani, Nisar Ahmed |
Low Transition LFSR for BIST-Based Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 14th Asian Test Symposium (ATS 2005), 18-21 December 2005, Calcutta, India, pp. 138-143, 2005, IEEE Computer Society, 0-7695-2481-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
40 | Masao Naruse, Irith Pomeranz, Sudhakar M. Reddy, Sandip Kundu |
On-chip Compression of Output Responses with Unknown Values Using LFSR Reseeding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA, pp. 1060-1068, 2003, IEEE Computer Society, 0-7803-8106-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
40 | Nan-Cheng Li, Sying-Jyan Wang |
A Reseeding Technique for LFSR-Based BIST Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 11th Asian Test Symposium (ATS 2002), 18-20 November 2002, Guam, USA, pp. 200-205, 2002, IEEE Computer Society, 0-7695-1825-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
Reseedling, LFST, BIST, Test Pattern Generator, Pseudo-Random Testing |
40 | Seung-Moon Yoo, Seong-Ook Jung, Sung-Mo Kang |
Low cost and high efficiency BIST scheme with 2-level LFSR and ATPT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 1-4, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
40 | Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos |
A New Reseeding Technique for LFSR-Based Test Pattern Generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTW ![In: 7th IEEE International On-Line Testing Workshop (IOLTW 2001), 9-11 July 2001, Taormina, Italy, pp. 80-86, 2001, IEEE Computer Society, 0-7695-1290-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
40 | Li-Ren Huang, Jing-Yang Jou, Sy-Yen Kuo |
Gauss-elimination-based generation of multiple seed-polynomial pairs for LFSR. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(9), pp. 1015-1024, 1997. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
40 | Shujian Zhang, Rod Byrne, Jon C. Muzio, D. Michael Miller |
Quantitative analysis for linear hybrid cellular automata and LFSR as built-in self-test generators for sequential faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 7(3), pp. 209-221, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
linear hybrid cellular automata, sequential fault, transition capability, built-in self-test, linear feedback shift register, linear finite state machine |
40 | Hugo Krawczyk |
LFSR-based Hashing and Authentication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CRYPTO ![In: Advances in Cryptology - CRYPTO '94, 14th Annual International Cryptology Conference, Santa Barbara, California, USA, August 21-25, 1994, Proceedings, pp. 129-139, 1994, Springer, 3-540-58333-5. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
40 | Peizhong Lu, Song Guowen |
Feasible Calculation of the Generator for Combined LFSR Sequences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAECC ![In: Applied Algebra, Algebraic Algorithms and Error-Correcting Codes, 8th International Symposium, AAECC-8, Tokyo, Japan, August 20-24, 1990, Proceedings, pp. 86-95, 1990, Springer, 3-540-54195-0. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP DOI BibTeX RDF |
|
39 | Bin Zhang 0003, Dengguo Feng |
New Guess-and-Determine Attack on the Self-Shrinking Generator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASIACRYPT ![In: Advances in Cryptology - ASIACRYPT 2006, 12th International Conference on the Theory and Application of Cryptology and Information Security, Shanghai, China, December 3-7, 2006, Proceedings, pp. 54-68, 2006, Springer, 3-540-49475-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
Self-shrinking, Guess-and-determine, Stream cipher, Linear feedback shift register (LFSR) |
39 | Biplab K. Sikdar, Kolin Paul, Gosta Pada Biswas, Parimal Pal Chaudhuri, Vamsi Boppana, Cliff Yang, Sobhan Mukherjee |
Theory and Application of GF(2p) Cellular Automata as On-chip Test Pattern Generator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 13th International Conference on VLSI Design (VLSI Design 2000), 4-7 January 2000, Calcutta, India, pp. 556-561, 2000, IEEE Computer Society, 0-7695-0487-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Extension field, BIST structure, Cellular Automata (CA), VLSI design and RTL, Finite field, DFT, Fault coverage, LFSR |
39 | Nadime Zacharia, Janusz Rajski, Jerzy Tyszer |
Decompression of test data using variable-length seed LFSRs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 13th IEEE VLSI Test Symposium (VTS'95), April 30 - May 3, 1995, Princeton, New Jersey, USA, pp. 426-433, 1995, IEEE Computer Society, 0-8186-7000-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
test data decompression, variable-length seed LFSRs, deterministic test vectors, scan circuits, multiple polynomial LFSR, encoding efficiency, logic testing, built-in self test, integrated circuit testing, encoding, automatic testing, polynomials, linear feedback shift register, shift registers, modular design, digital integrated circuits |
38 | Mohamed El-Hadedy 0001, Russell Hua, Kazutomo Yoshii, Wen-Mei Hwu, Martin Margala |
RECO-LFSR: Reconfigurable Low-power Cryptographic processor based on LFSR for Trusted IoT platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 24th International Symposium on Quality Electronic Design, ISQED 2023, San Francisco, CA, USA, April 5-7, 2023, pp. 1-7, 2023, IEEE, 979-8-3503-3475-3. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
38 | Abhishek Chakraborty 0001, Bodhisatwa Mazumdar, Debdeep Mukhopadhyay |
Fibonacci LFSR vs. Galois LFSR: Which is More Vulnerable to Power Attacks? ![Search on Bibsonomy](Pics/bibsonomy.png) |
SPACE ![In: Security, Privacy, and Applied Cryptography Engineering - 4th International Conference, SPACE 2014, Pune, India, October 18-22, 2014. Proceedings, pp. 14-27, 2014, Springer, 978-3-319-12059-1. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
37 | Leonard Colavito, Dennis Silage |
Efficient PGA LFSR Implementation Whitens Pseudorandom Numbers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReConFig ![In: ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, Proceedings, pp. 308-313, 2009, IEEE Computer Society, 978-0-7695-3917-1. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Whitening, FPGA, LFSR |
37 | Xiaowei Li 0001, Paul Y. S. Cheung, Hideo Fujiwara |
LFSR-Based Deterministic TPG for Two-Pattern Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 16(5), pp. 419-426, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
configurable LFSR, built-in self-test, path delay faults, two-pattern test |
31 | Mehrdad Nourani, Mohammad Tehranipoor, Nisar Ahmed |
Low-Transition Test Pattern Generation for BIST-Based Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 57(3), pp. 303-315, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Low power pattern generation, Test generation, Built-in tests, Testing strategies, Random generation |
31 | Hong-Sik Kim, Sungho Kang 0001, Michael S. Hsiao |
A New Scan Architecture for Both Low Power Testing and Test Volume Compression Under SOC Test Environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 24(4), pp. 365-378, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
Keyword System on a chip, Test compression, Low power testing, Scan testing |
31 | Debrup Chakraborty, Palash Sarkar 0001 |
A General Construction of Tweakable Block Ciphers and Different Modes of Operations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Inf. Theory ![In: IEEE Trans. Inf. Theory 54(5), pp. 1991-2006, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
31 | Makoto Matsumoto, Mutsuo Saito, Takuji Nishimura, Mariko Hagita |
A Fast Stream Cipher with Huge State Space and Quasigroup Filter for Software. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Selected Areas in Cryptography ![In: Selected Areas in Cryptography, 14th International Workshop, SAC 2007, Ottawa, Canada, August 16-17, 2007, Revised Selected Papers, pp. 246-263, 2007, Springer, 978-3-540-77359-7. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
combined generator, filter with memory, quasigroup filter, multiplicative filter, CryptMT, distribution, stream cipher, period, eSTREAM |
31 | Petr Fiser |
Pseudo-Random Pattern Generator Design for Column-Matching BIST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Tenth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2007), 29-31 August 2007, Lübeck, Germany, pp. 657-663, 2007, IEEE Computer Society, 0-7695-2978-X. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
31 | Dong Zheng 0001, Xiangxue Li, Kefei Chen, Jianhua Li |
Linkable Ring Signatures from Linear Feedback Shift Register. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUC Workshops ![In: Emerging Directions in Embedded and Ubiquitous Computing, EUC 2007 Workshops: TRUST, WSOC, NCUS, UUWSN, USN, ESO, and SECUBIQ, Taipei, Taiwan, December 17-20, 2007, Proceedings, pp. 716-727, 2007, Springer, 978-3-540-77089-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Characteristic sequence, Linkabilty, Anonymity, Linear feedback shift register, Ring signatures |
31 | Kedarnath J. Balakrishnan |
Efficient Scan-Based BIST Using Multiple LFSRs and Dictionary Coding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 20th International Conference on VLSI Design (VLSI Design 2007), Sixth International Conference on Embedded Systems (ICES 2007), 6-10 January 2007, Bangalore, India, pp. 345-350, 2007, IEEE Computer Society, 0-7695-2762-0. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
31 | Malav Shah, Dipankar Nagchoudhuri |
BIST Scheme for Low Heat Dissipation and Reduced Test Application Time. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-SoC ![In: IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006, pp. 239-244, 2006, IEEE. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
31 | Kedarnath J. Balakrishnan, Seongmoon Wang, Srimat T. Chakradhar |
PIDISC: Pattern Independent Design Independent Seed Compression Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India, pp. 811-817, 2006, IEEE Computer Society, 0-7695-2502-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
31 | Frederik Armknecht, Willi Meier |
Fault Attacks on Combiners with Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Selected Areas in Cryptography ![In: Selected Areas in Cryptography, 12th International Workshop, SAC 2005, Kingston, ON, Canada, August 11-12, 2005, Revised Selected Papers, pp. 36-50, 2005, Springer, 3-540-33108-5. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
31 | Bin Zhang 0003, Hongjun Wu 0001, Dengguo Feng, Feng Bao 0001 |
Security Analysis of the Generalized Self-shrinking Generator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICICS ![In: Information and Communications Security, 6th International Conference, ICICS 2004, Malaga, Spain, October 27-29, 2004, Proceedings, pp. 388-400, 2004, Springer, 3-540-23563-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
Stream cipher, Linear feedback shift register, Fast correlation attack, Clock control, Self-shrinking generator |
31 | Patrik Ekdahl, Willi Meier, Thomas Johansson 0001 |
Predicting the Shrinking Generator with Fixed Connections. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCRYPT ![In: Advances in Cryptology - EUROCRYPT 2003, International Conference on the Theory and Applications of Cryptographic Techniques, Warsaw, Poland, May 4-8, 2003, Proceedings, pp. 330-344, 2003, Springer, 3-540-14039-5. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
31 | Chien-In Henry Chen, Kiran George |
Configurable two-dimensional linear feedback shifter registers for deterministic and random patterns [logic BIST]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 521-524, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
31 | Chunsheng Liu, Krishnendu Chakrabarty |
Compact Dictionaries for Fault Diagnosis in BIST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 4th International Symposium on Quality of Electronic Design (ISQED 2003), 24-26 March 2003, San Jose, CA, USA, pp. 105-110, 2003, IEEE Computer Society, 0-7695-1881-8. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
31 | Bhargab B. Bhattacharya, Sharad C. Seth, Sheng Zhang 0008 |
Low-Energy BIST Design for Scan-based Logic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 16th International Conference on VLSI Design (VLSI Design 2003), 4-8 January 2003, New Delhi, India, pp. 546-551, 2003, IEEE Computer Society, 0-7695-1868-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
31 | Peter Wohl, John A. Waicukauski, Sanjay Patel, Minesh B. Amin |
Efficient compression and application of deterministic patterns in a logic BIST architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 566-569, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
test-generation (ATPG), self-test (BIST) |
31 | Srinivas Devadas, Kurt Keutzer |
An algorithmic approach to optimizing fault coverage for BIST logic synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: Proceedings IEEE International Test Conference 1998, Washington, DC, USA, October 18-22, 1998, pp. 164-173, 1998, IEEE Computer Society, 0-7803-5093-6. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
31 | Nur A. Touba, Edward J. McCluskey |
Transformed pseudo-random patterns for BIST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 13th IEEE VLSI Test Symposium (VTS'95), April 30 - May 3, 1995, Princeton, New Jersey, USA, pp. 410-416, 1995, IEEE Computer Society, 0-8186-7000-2. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
pseudorandom patterns transformation, onchip test pattern generation, mapping logic, on-chip TPG, logic testing, built-in self test, integrated circuit testing, logic design, BIST, combinational circuits, automatic testing, combinational logic |
31 | Kencheng Zeng, Dah-Yea Wei, T. R. N. Rao |
d-Functions in Vk(F2) and Self-Decimation of m-Sequences. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AAECC ![In: Applied Algebra, Algebraic Algorithms and Error-Correcting Codes, 9th International Symposium, AAECC-9, New Orleans, LA, USA, October 7-11, 1991, Proceedings, pp. 465-476, 1991, Springer, 3-540-54522-0. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
31 | Peter D. Hortensius, Robert D. McLeod, Werner Pries, D. Michael Miller, Howard C. Card |
Cellular automata-based pseudorandom number generators for built-in self-test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(8), pp. 842-859, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
31 | Yves Roggeman |
Varying Feedback Shift Registers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCRYPT ![In: Advances in Cryptology - EUROCRYPT '89, Workshop on the Theory and Application of of Cryptographic Techniques, Houthalen, Belgium, April 10-13, 1989, Proceedings, pp. 670-679, 1989, Springer, 3-540-53433-4. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
31 | Harald Niederreiter |
Keysystem Sequences with a Good Linear Complexity Profile for Every STrating Point. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROCRYPT ![In: Advances in Cryptology - EUROCRYPT '89, Workshop on the Theory and Application of of Cryptographic Techniques, Houthalen, Belgium, April 10-13, 1989, Proceedings, pp. 523-532, 1989, Springer, 3-540-53433-4. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
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