Search results for "analog/mixed-signal"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
62	David Walter, Scott Little, Nicholas Seegmiller, Chris J. Myers, Tomohiro Yoneda	Symbolic Model Checking of Analog/Mixed-Signal Circuits.	ASP-DAC	2007	DBLP DOI BibTeX RDF	analog/mixed-signal circuits, Boolean based symbolic model checking algorithm, VHDL-AMS description, labeled hybrid Petri nets, Boolean signals, temporal logic formulas, timed CTL, Boolean variables, Boolean function, binary decision diagram, hardware description language
48	ByongChan Lim, Jaeha Kim, Mark A. Horowitz	An efficient test vector generation for checking analog/mixed-signal functional models.	DAC	2010	DBLP DOI BibTeX RDF	linear abstraction, validation, equivalence checking, verilog, functional model, test vector, mixed-signal circuits
44	Sudip Chakrabarti, Abhijit Chatterjee	Compact Fault Dictionary Construction for Efficient Isolation of Faults in Analog and Mixed-Signal Circuits.	ARVLSI	1999	DBLP DOI BibTeX RDF	fault diagnosis, analog, Design automation, mixed-signal, fault isolation
41	Reimund Wittmann, Massimo Vanzi, Hans-Joachim Wassener, Navraj Nandra, Joachim Kunkel, José E. da Franca, Christian Münker	Life begins at 65: unless you are mixed signal?	DATE	2007	DBLP DOI BibTeX RDF
40	Scott Little, Nicholas Seegmiller, David Walter, Chris J. Myers, Tomohiro Yoneda	Verification of analog/mixed-signal circuits using labeled hybrid petri nets.	ICCAD	2006	DBLP DOI BibTeX RDF	hybrid petri nets, formal methods
39	Yu Liu, Masato Yoshioka, Katsumi Homma, Toshiyuki Shibuya, Yuzi Kanazawa	Generation of yield-embedded Pareto-front for simultaneous optimization of yield and performances.	DAC	2010	DBLP DOI BibTeX RDF	analog/mixed-signal, optimization, yield, Pareto-front
35	Nai-Chi Lee	A hierarchical analog test bus framework for testing mixed-signal integrated circuits and printed circuit boards.	J. Electron. Test.	1993	DBLP DOI BibTeX RDF
34	Ralf Sommer, Irmtraud Rugen-Herzig, Eckhard Hennig, Umberto Gatti, Piero Malcovati, Franco Maloberti, Karsten Einwich, Christoph Clauß, Peter Schwarz, G. Noessing	From System Specification To Layout: Seamless Top-Down Design Methods for Analog and Mixed-Signal Applications.	DATE	2002	DBLP DOI BibTeX RDF
33	Viera Stopjaková, Pavol Malosek, Marek Matej, Vladislav Nagy, Martin Margala	Defect detection in analog and mixed circuits by neural networks using wavelet analysis.	IEEE Trans. Reliab.	2005	DBLP DOI BibTeX RDF
30	Guo Yu, Peng Li 0001	Yield-aware analog integrated circuit optimization using geostatistics motivated performance modeling.	ICCAD	2007	DBLP DOI BibTeX RDF
30	Mama Hamour, Resve A. Saleh, Shahriar Mirabbasi, André Ivanov	Analog IP design flow for SoC applications.	ISCAS (4)	2003	DBLP DOI BibTeX RDF
29	David Walter, Scott Little, Chris J. Myers, Nicholas Seegmiller, Tomohiro Yoneda	Verification of Analog/Mixed-Signal Circuits Using Symbolic Methods.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
29	Scott Little, Alper Sen 0001, Chris J. Myers	Application of Automated Model Generation Techniques to Analog/Mixed-Signal Circuits.	MTV	2007	DBLP DOI BibTeX RDF
29	Scott Little, David Walter, Kevin R. Jones, Chris J. Myers	Analog/Mixed-Signal Circuit Verification Using Models Generated from Simulation Traces.	ATVA	2007	DBLP DOI BibTeX RDF
29	Jiun-Lang Huang, Chen-Yang Pan, Kwang-Ting Cheng	Specification Back-Propagation and Its Application to DC Fault Simulation for Analog/Mixed-Signal Circuits.	VTS	1999	DBLP DOI BibTeX RDF
28	Ender Yilmaz, Sule Ozev	Fast and Accurate DPPM Computation Using Model Based Filtering.	ETS	2011	DBLP DOI BibTeX RDF	DPPM, Analog/Mixed Signal, Simulation, Importance sampling, Test Quality
28	Xuan-Lun Huang, Chen-Yuan Yang, Jiun-Lang Huang	Diagnosing integrator leakage of single-bit first-order DeltaSigma modulator using DC input.	ASP-DAC	2009	DBLP DOI BibTeX RDF	?? modulation, analog/mixed-signal testing, integrator leakage, diagnosis, design-for-test (DfT)
28	Jiun-Lang Huang	On-Chip Random Jitter Testing Using Low Tap-Count Coarse Delay Lines.	J. Electron. Test.	2006	DBLP DOI BibTeX RDF	jitter measurement, random jitter, analog/mixed-signal testing, design-for-test
28	Anna Maria Brosa, Joan Figueras	On Maximizing the Coverage of Catastrophic and Parametric Faults.	J. Electron. Test.	2000	DBLP DOI BibTeX RDF	analog & mixed-signal testing, fault coverage, set covering problems
27	Yu Liu, Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro Fujita	System level design language extensions for timed/untimed digital-analog combined system design.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	AMS extension, timed/untimed, synchronization, system level design, mixed-signal
27	Carlo Guardiani, Patrick McNamara, Lidia Daldoss, Sharad Saxena, Stefano Zanella, Wei Xiang, Suli Liu	Analog IP Testing: Diagnosis and Optimization.	DATE	2002	DBLP DOI BibTeX RDF
25	Dogan Ulus, Alper Sen 0001, I. Faik Baskaya	Analog layer extensions for analog/mixed-signal assertion languages.	VLSI-SoC	2013	DBLP DOI BibTeX RDF
25	Chin-Long Wey, Mohammad Athar Khalil, Jim Liu, Gregory Wierzba	Hierarchical extreme-voltage stress test of analog CMOS ICs for gate-oxide reliability enhancement.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	IC reliability
24	Senthil Kumar Lakshmanan, Peter Tawdross, Andreas König 0001	Towards Organic Sensing System-First Measurement Result of Self-x Sensor Signal Amplifier.	HIS	2006	DBLP DOI BibTeX RDF
23	Haruo Kobayashi 0001	Signal Generation Technologies for Analog/Mixed-Signal IC Testing.	ASICON	2023	DBLP DOI BibTeX RDF
23	Keren Zhu 0001, Hao Chen 0059, Mingjie Liu, Xiyuan Tang, Nan Sun 0001, David Z. Pan	Effective Analog/Mixed-Signal Circuit Placement Considering System Signal Flow.	ICCAD	2020	DBLP DOI BibTeX RDF
23	Haruo Kobayashi 0001, Nene Kushita, Minh Tri Tran 0001, Koji Asami, Hao San, Anna Kuwana, Akemi Hatta	Analog / Mixed-Signal / RF Circuits for Complex Signal Processing.	ASICON	2019	DBLP DOI BibTeX RDF
23	Masayuki Kawabata, Koji Asami, Shohei Shibuya, Tomonori Yanagida, Haruo Kobayashi 0001	Low-distortion signal generation for analog/mixed-signal circuit testing with digital ATE.	ITC-Asia	2017	DBLP DOI BibTeX RDF
23	Janet Roveda, Dung Nguyen, Linda S. Powers, Kui Ren 0001, Jerrie Fairbanks	Effective signal region based analog mixed signal design considering variations and applications.	SoCC	2013	DBLP DOI BibTeX RDF
22	Christopher Labrecque	Near-term industrial perspective of analog CAD.	ICCAD	2006	DBLP DOI BibTeX RDF	computer-aided design, analog, integrated circuits, mixed-signal
22	Mike W. T. Wong, K. Y. Ko, Yim-Shu Lee	Analog and Mixed-Signal IP Cores Testing.	DELTA	2002	DBLP DOI BibTeX RDF	mixed-signal design, analog circuit testing, SOCs
21	Rahul Bhattacharya, Santosh Biswas, Siddhartha Mukhopadhyay	FPGA based chip emulation system for test development and verification of analog and mixed signal circuits (abstract only).	FPGA	2010	DBLP DOI BibTeX RDF	ams testing, concurrent test development, behavioral modeling
21	Mark R. Greenstreet	Verifying VLSI Circuits.	ATVA	2009	DBLP DOI BibTeX RDF
21	Geoffrey Ying, Andreas Kuehlmann, Kenneth S. Kundert, Georges G. E. Gielen, Eric Grimme, Martin O'Leary, Sandeep Tare, Warren Wong	Guess, solder, measure, repeat: how do I get my mixed-signal chip right?	DAC	2009	DBLP DOI BibTeX RDF	Verilog-AMS, analog behavioral modeling, low power verification, mixed-signal verification, VHDL, SPICE, functional verification, Verilog, performance verification
21	Jeffrey Ayres, Michael L. Bushnell	Analog Circuit Testing Using Auto Regressive Moving Average Models.	VLSI Design	2007	DBLP DOI BibTeX RDF
21	Hao-Chiao Hong, Jiun-Lang Huang, Kwang-Ting Cheng, Cheng-Wen Wu	On-chip Analog Response Extraction with 1-Bit ? - Modulators.	Asian Test Symposium	2002	DBLP DOI BibTeX RDF
18	Shanthi Pavan, Nagendra Krishnapura	Oversampling Analog-to-Digital Converter Design.	VLSI Design	2008	DBLP DOI BibTeX RDF
18	Brian Marshall	Beyond P-Cell and Gate-Level: Accuracy Requirements for Simulation of Nanometer SoC Designs.	IWSOC	2004	DBLP DOI BibTeX RDF
18	Seyoung Kim, Jaeha Kim	Reachability Analysis for Nonlinear Analog/Mixed-Signal Circuits With Trajectory-Based Reachable Sets.	IEEE Access	2023	DBLP DOI BibTeX RDF
18	Kwangmin Kim, Hyoseok Song, Byeongcheol Lee, Byungsub Kim	A Speculative Divide-and-Conquer Optimization Method for Large Analog/Mixed-Signal Circuits: A High-Speed FFE SST Transmitter Example.	IEEE Trans. Very Large Scale Integr. Syst.	2023	DBLP DOI BibTeX RDF
18	Ramprasath Srinivasa Gopalakrishnan, Meghna Madhusudan, Arvind K. Sharma, Jitesh Poojary, Soner Yaldiz, Ramesh Harjani, Steven M. Burns, Sachin S. Sapatnekar	A Generalized Methodology for Well Island Generation and Well-tap Insertion in Analog/Mixed-signal Layouts.	ACM Trans. Design Autom. Electr. Syst.	2023	DBLP DOI BibTeX RDF
18	Ahmet Faruk Budak, Keren Zhu 0001, David Z. Pan	Practical Layout-Aware Analog/Mixed-Signal Design Automation with Bayesian Neural Networks.	CoRR	2023	DBLP DOI BibTeX RDF
18	Ali Deeb, Mohamed Salem, Abdalrahman Ibrahim, Witesyavwirwa Vianney Kambale, Joachim Pichler, Fadi Al Machot, Kyandoghere Kyamakya	A comprehensive generalization of a Graph-Attention-Network GAT based system towards real IP analog-mixed-signal AMS schematics structure recognition.	ICECS	2023	DBLP DOI BibTeX RDF
18	Ahmet Faruk Budak, Keren Zhu 0001, David Z. Pan	Practical Layout-Aware Analog/Mixed-Signal Design Automation with Bayesian Neural Networks.	ICCAD	2023	DBLP DOI BibTeX RDF
18	Hyoseok Song, Kwangmin Kim, Changyoon Han, Byungsub Kim	Review: A Speculative Divide-and-Conquer Optimization Method for Large Analog/Mixed-Signal Circuits.	ISOCC	2023	DBLP DOI BibTeX RDF
18	Saurabh Goyal, Sanjay Kumar Wadhwa, Divya Tripathi, Gaurav Agrawal, Krishna Thakur, Deependra Kumar Jain, Alvin Leng Sun Loke, Atul Kumar, Manish Kumar Upadhyay, Bhawna, Sanjoy Kumar Dey	Design Challenges and Techniques for 5nm FinFET CMOS Analog/Mixed-Signal Circuits.	VLSID	2023	DBLP DOI BibTeX RDF
18	Roland Müller, Loreto Mateu, Ralf Brederlow	Analog/Mixed-Signal Standard Cell Based Approach for Automated Circuit Generation of Neural Network Accelerators.	DCIS	2023	DBLP DOI BibTeX RDF
18	Steven Herbst, Gabriel Rutsch, Wolfgang Ecker, Mark Horowitz	An Open-Source Framework for FPGA Emulation of Analog/Mixed-Signal Integrated Circuit Designs.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2022	DBLP DOI BibTeX RDF
18	Jhon Gomez, Nektar Xama, Anthony Coyette, Ronny Vanhooren, Wim Dobbelaere, Georges G. E. Gielen	DDtM: Increasing Latent Defect Detection in Analog/Mixed-Signal ICs Using the Difference in Distance to Mean Value.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2022	DBLP DOI BibTeX RDF
18	Tonmoy Dhar, Ramprasath S 0001, Jitesh Poojary, Soner Yaldiz, Steven M. Burns, Ramesh Harjani, Sachin S. Sapatnekar	A Charge Flow Formulation for Guiding Analog/Mixed-Signal Placement.	DATE	2022	DBLP DOI BibTeX RDF
18	Shiyu Su, Qiaochu Zhang, Juzheng Liu, Mohsen Hassanpourghadi, Rezwan A. Rasul, Mike Shuo-Wei Chen	TAFA: Design Automation of Analog Mixed-Signal FIR Filters Using Time Approximation Architecture.	ASP-DAC	2022	DBLP DOI BibTeX RDF
18	Shiyu Su, Qiaochu Zhang, Mohsen Hassanpourghadi, Juzheng Liu, Rezwan A. Rasul, Mike Shuo-Wei Chen	Analog/Mixed-Signal Circuit Synthesis Enabled by the Advancements of Circuit Architectures and Machine Learning Algorithms.	ASP-DAC	2022	DBLP DOI BibTeX RDF
18	Prashant Kurrey, Mihir Kavishwar, Rajesh Zele	Analog/Mixed-Signal Classification for Voice Activity Detection.	ICECS 2022	2022	DBLP DOI BibTeX RDF
18	Ramprasath S 0001, Meghna Madhusudan, Arvind K. Sharma, Jitesh Poojary, Soner Yaldiz, Ramesh Harjani, Steven M. Burns, Sachin S. Sapatnekar	Analog/Mixed-Signal Layout Optimization using Optimal Well Taps.	ISPD	2022	DBLP DOI BibTeX RDF
18	Dima Kilani, Baker Mohammad, Yasmin Halawani, Mohamed F. Tolba 0002, Hani H. Saleh	C3PU: Cross-Coupling Capacitor Processing Unit Using Analog-Mixed Signal for AI Inference.	IEEE Access	2021	DBLP DOI BibTeX RDF
18	Shiyu Su, Qiaochu Zhang, Mohsen Hassanpourghadi, Juzheng Liu, Rezwan A. Rasul, Mike Shuo-Wei Chen	Analog/Mixed-Signal Circuit Synthesis Enabled by the Advancements of Circuit Architectures and Machine Learning Algorithms.	CoRR	2021	DBLP BibTeX RDF
18	Dima Kilani, Baker Mohammad, Yasmin Halawani, Mohammed F. Tolba 0002, Hani H. Saleh	C3PU: Cross-Coupling Capacitor Processing Unit Using Analog-Mixed Signal In-Memory Computing for AI Inference.	CoRR	2021	DBLP BibTeX RDF
18	Shiyu Su, Qiaochu Zhang, Juzheng Liu, Mohsen Hassanpourghadi, Rezwan A. Rasul, Mike Shuo-Wei Chen	TAFA: Design Automation of Analog Mixed-Signal FIR Filters Using Time Approximation Architecture.	CoRR	2021	DBLP BibTeX RDF
18	Mohammad-Mahdi Bidmeshki, Angelos Antonopoulos 0002, Yiorgos Makris	Proof-Carrying Hardware-Based Information Flow Tracking in Analog/Mixed-Signal Designs.	IEEE J. Emerg. Sel. Topics Circuits Syst.	2021	DBLP DOI BibTeX RDF
18	Jun-Yang Lei, Abhijit Chatterjee	Automatic Surrogate Model Generation and Debugging of Analog/Mixed-Signal Designs Via Collaborative Stimulus Generation and Machine Learning.	ASP-DAC	2021	DBLP DOI BibTeX RDF
18	Juzheng Liu, Shiyu Su, Meghna Madhusudan, Mohsen Hassanpourghadi, Samuel Saunders, Qiaochu Zhang, Rezwan A. Rasul, Yaguang Li, Jiang Hu, Arvind Kumar Sharma, Sachin S. Sapatnekar, Ramesh Harjani, Anthony Levi, Sandeep Gupta 0001, Mike Shuo-Wei Chen	From Specification to Silicon: Towards Analog/Mixed-Signal Design Automation using Surrogate NN Models with Transfer Learning.	ICCAD	2021	DBLP DOI BibTeX RDF
18	Haruo Kobayashi 0001, Xueyan Bai, Yujie Zhao, Shuhei Yamamoto, Dan Yao, Manato Hirai, Jianglin Wei, Shogo Katayama, Anna Kuwana	Classical Mathematics and Analog/Mixed-Signal IC Design.	ASICON	2021	DBLP DOI BibTeX RDF
18	Praise O. Farayola, Isaac Bruce, Shravan K. Chaganti, Abalhassan Sheikh, Srivaths Ravi 0001, Degang Chen 0001	Massive Multisite Variability-Aware Die Distribution Estimation for Analog/Mixed-Signal Circuits Test Validation.	DTIS	2021	DBLP DOI BibTeX RDF
18	Mohsen Hassanpourghadi, Shiyu Su, Rezwan A. Rasul, Juzheng Liu, Qiaochu Zhang, Mike Shuo-Wei Chen	Circuit Connectivity Inspired Neural Network for Analog Mixed-Signal Functional Modeling.	DAC	2021	DBLP DOI BibTeX RDF
18	Enrico Fraccaroli, Michele Lora, Franco Fummi	Automatic Generation of Analog/Mixed Signal Virtual Platforms for Smart Systems.	IEEE Trans. Computers	2020	DBLP DOI BibTeX RDF
18	Tatsuya Ishikawa, Chia-Wei Pai, Hiroki Ishikuro	A Linearity Testing of Cascaded Analog Mixed-Signal Blocks Using SEIR Method.	I2MTC	2020	DBLP DOI BibTeX RDF
18	Andrei Gaita, Georgian Nicolae, Emilian C. David, Andi Buzo, Corneliu Burileanu, Georg Pelz	A SIFT-based Waveform Clustering Method for aiding analog/mixed-signal IC Verification.	ETS	2020	DBLP DOI BibTeX RDF
18	Mohamed Elshamy, Giorgio Di Natale, Antonios Pavlidis, Marie-Minerve Louërat, Haralampos-G. D. Stratigopoulos	Hardware Trojan Attacks in Analog/Mixed-Signal ICs via the Test Access Mechanism.	ETS	2020	DBLP DOI BibTeX RDF
18	Joseph C. Bardin	Analog/Mixed-Signal Integrated Circuits for Quantum Computing.	BCICTS	2020	DBLP DOI BibTeX RDF
18	Jeroen P. G. van Dijk, Pascal 't Hart, Gerd Kiene, Ramon Overwater, Pinakin Padalia, Job van Staveren, Masoud Babaie, Andrei Vladimirescu, Edoardo Charbon, Fabio Sebastiano	Cryo-CMOS for Analog/Mixed-Signal Circuits and Systems.	CICC	2020	DBLP DOI BibTeX RDF
18	Jhon Gomez, Nektar Xama, Anthony Coyette, Ronny Vanhooren, Wim Dobbelaere, Georges G. E. Gielen	Pinhole Latent Defect Modeling and Simulation for Defect-Oriented Analog/Mixed-Signal Testing.	VTS	2020	DBLP DOI BibTeX RDF
18	Sayandeep Sanyal, Aritra Hazra, Pallab Dasgupta, Scott Morrison, Sudhakar Surendran, Lakshmanan Balasubramanian	CoveRT: A Coverage Reporting Tool for Analog Mixed-Signal Designs.	VLSID	2020	DBLP DOI BibTeX RDF
18	Daniela Genius, Rodrigo Cortés Porto, Ludovic Apvrille, François Pêcheux	A Tool for High-level Modeling of Analog/Mixed Signal Embedded Systems.	MODELSWARD	2019	DBLP DOI BibTeX RDF
18	Daniela Genius, Rodrigo Cortés Porto, Ludovic Apvrille, François Pêcheux	A Framework for Multi-level Modeling of Analog/Mixed Signal Embedded Systems.	MODELSWARD (Revised Selected Papers)	2019	DBLP DOI BibTeX RDF
18	Matthew J. Casto, Brian Dupaix, Pompei Len Orlando, Waleed Khalil	Process Specific Functions for Assurance of Analog/Mixed-Signal Integrated Circuits.	MWSCAS	2019	DBLP DOI BibTeX RDF
18	Federico Bizzarri, Angelo Brambilla, Abdelali El Aroudi	Analog-Mixed-Signal Simulation of DC-DC Boost-Based MPPT System Taking into Account Weather Conditions Variations.	ICECS	2019	DBLP DOI BibTeX RDF
18	Alvin Leng Sun Loke, Da Yang, Tin Tin Wee, Jonathan L. Holland, Patrick Isakanian, Kern Rim, Sam Yang, Jacob S. Schneider, Giri Nallapati, Sreeker Dundigal, Hasnain Lakdawala, Behnam Amelifard, Chulkyu Lee, Betty McGovern, Paul S. Holdaway, Xiaohua Kong, Burton M. Leary	Analog/Mixed-Signal Design Challenges in 7-nm CMOS and Beyond.	CICC	2019	DBLP DOI BibTeX RDF
18	Alvin Leng Sun Loke, C. K. Lee, Burton Mike Leary	Nanoscale CMOS Implications on Analog/Mixed-Signal Design.	CICC	2019	DBLP DOI BibTeX RDF
18	Federico Bizzarri, Angelo Brambilla, Abdelali El Aroudi	Nonlinear Analysis of a DC-DC Boost Converter Working as a Maximum Power Point Tracker using Analog-Mixed-Signal Circuit Simulation.	ISCAS	2019	DBLP DOI BibTeX RDF
18	Yukiko Shibasaki, Koji Asami, Anna Kuwana, Kosuke Machida, Yuanyang Du, Akemi Hatta, Kazuyoshi Kubo, Haruo Kobayashi 0001	Crest Factor Controlled Multi-Tone Signals for Analog/Mixed-Signal IC Testing.	ITC-Asia	2019	DBLP DOI BibTeX RDF
18	Salem Abdennadher, Arani Sinha, Yonghyun Kim	Analog/Mixed Signal IP DFx from a Foundry perspective.	LATS	2019	DBLP DOI BibTeX RDF
18	Akhilesh Jaiswal 0001, Amogh Agrawal, Indranil Chakraborty, Mustafa Fayez Ali, Kaushik Roy 0001	Digital and Analog-Mixed-Signal In-Memory Processing in CMOS SRAM.	ACM Great Lakes Symposium on VLSI	2019	DBLP DOI BibTeX RDF
18	Kyle Juretus, Vaibhav Venugopal Rao, Ioannis Savidis	Securing Analog Mixed-Signal Integrated Circuits Through Shared Dependencies.	ACM Great Lakes Symposium on VLSI	2019	DBLP DOI BibTeX RDF
18	Mingoo Seok, Minhao Yang, Zhewei Jiang, Aurel A. Lazar, Jae-sun Seo	Cases for Analog Mixed Signal Computing Integrated Circuits for Deep Neural Networks.	VLSI-DAT	2019	DBLP DOI BibTeX RDF
18	Angad S. Rekhi, Brian Zimmer, Nikola Nedovic, Ningxi Liu, Rangharajan Venkatesan, Miaorong Wang, Brucek Khailany, William J. Dally, C. Thomas Gray	Analog/Mixed-Signal Hardware Error Modeling for Deep Learning Inference.	DAC	2019	DBLP DOI BibTeX RDF
18	Biying Xu, Yibo Lin, Xiyuan Tang, Shaolan Li, Linxiao Shen, Nan Sun 0001, David Z. Pan	WellGAN: Generative-Adversarial-Network-Guided Well Generation for Analog/Mixed-Signal Circuit Layout.	DAC	2019	DBLP DOI BibTeX RDF
18	Vlastimil Kote, Adam Kubacak, Patrik Vacula, Jiri Jakovenko, Miroslav Husák	Automated pre-placement phase as a part of robust analog-mixed signal physical design flow.	Integr.	2018	DBLP DOI BibTeX RDF
18	Ke Huang 0001, Manuel J. Barragán	Guest Editorial: Special Issue on Analog, Mixed-Signal, and RF Testing.	J. Electron. Test.	2018	DBLP DOI BibTeX RDF
18	Alvin Leng Sun Loke, Da Yang, Tin Tin Wee, Jonathan L. Holland, Patrick Isakanian, Kern Rim, Sam Yang, Jacob S. Schneider, Giri Nallapati, Sreeker Dundigal, Hasnain Lakdawala, Behnam Amelifard, Chulkyu Lee, Betty McGovern, Paul S. Holdaway, Xiaohua Kong, Burton M. Leary	Analog/mixed-signal design challenges in 7-nm CMOS and beyond.	CICC	2018	DBLP DOI BibTeX RDF
18	Naohiko Shimizu, Junichi Akita, Marie-Minerve Louërat, Haralampos-G. D. Stratigopoulos, Jean-Paul Chaput, Dimitri Galayko	Open Source Hardware and EDA Tools for Analog/Mixed-Signal Design and Prototyping.	ISCAS	2018	DBLP DOI BibTeX RDF
18	Manuel J. Barragán, William R. Eisenstadt	Guest Editorial: Analog, Mixed-Signal and RF Testing.	J. Electron. Test.	2017	DBLP DOI BibTeX RDF
18	Angelos Antonopoulos 0002, Christiana Kapatsori, Yiorgos Makris	Trusted Analog/Mixed- Signal/RF ICs: A Survey and a Perspective.	IEEE Des. Test	2017	DBLP DOI BibTeX RDF
18	Andreas Furtig, Georg Glaeser, Christoph Grimm 0001, Lars Hedrich, Stefan Heinen, Hyun-Sek Lukas Lee, Gregor Nitsche, Markus Olbrich, Carna Radojicic, Fabian Speicher	Novel metrics for Analog Mixed-Signal coverage.	DDECS	2017	DBLP DOI BibTeX RDF
18	Mohammad-Mahdi Bidmeshki, Angelos Antonopoulos 0002, Yiorgos Makris	Information flow tracking in analog/mixed-signal designs through proof-carrying hardware IP.	DATE	2017	DBLP DOI BibTeX RDF
18	Angelos Antonopoulos 0002, Christiana Kapatsori, Yiorgos Makris	Security and trust in the analog/mixed-signal/RF domain: A survey and a perspective.	ETS	2017	DBLP DOI BibTeX RDF
18	Christoph Grimm 0001, Carna Radojicic	Extending Affine Arithmetic for Formal Verification of Analog/Mixed-Signal Systems.	MBMV	2017	DBLP BibTeX RDF
18	Troy Bryant, Sreeja Chowdhury, Domenic Forte, Mark M. Tehranipoor, Nima Maghari	A stochastic all-digital weak physically unclonable function for analog/mixed-signal applications.	HOST	2017	DBLP DOI BibTeX RDF
18	Christoph Grimm 0001, Michael Rathmair	Dealing with Uncertainties in Analog/Mixed-Signal Systems: Invited.	DAC	2017	DBLP DOI BibTeX RDF
18	Vladimir Dubikhin, Chris J. Myers, Danil Sokolov, Ioannis Syranidis, Alexandre Yakovlev	Advances in Formal Methods for the Design of Analog/Mixed-Signal Systems: Invited.	DAC	2017	DBLP DOI BibTeX RDF
18	Gildas Léger, Carsten Wegener	Guest Editorial: Analog, Mixed-Signal and RF Testing.	J. Electron. Test.	2016	DBLP DOI BibTeX RDF