Search results for "bitwidth"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
216	Rajkishore Barik, Vivek Sarkar	Enhanced Bitwidth-Aware Register Allocation.	CC	2006	DBLP DOI BibTeX RDF
146	Jason Cong, Yiping Fan, Guoling Han, Yizhou Lin, Junjuan Xu, Zhiru Zhang, Xu Cheng 0001	Bitwidth-aware scheduling and binding in high-level synthesis.	ASP-DAC	2005	DBLP DOI BibTeX RDF
128	Scott A. Mahlke, Rajiv A. Ravindran, Michael S. Schlansker, Robert Schreiber, Timothy Sherwood	Bitwidth cognizant architecture synthesis of custom hardwareaccelerators.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2001	DBLP DOI BibTeX RDF
128	Mark Stephenson, Jonathan Babb, Saman P. Amarasinghe	Bitwidth analysis with application to silicon compilation.	PLDI	2000	DBLP DOI BibTeX RDF
105	J. Y. F. Tong, David Nagle, Rob A. Rutenbar	Reducing power by optimizing the necessary precision/range of floating-point arithmetic.	IEEE Trans. Very Large Scale Integr. Syst.	2000	DBLP DOI BibTeX RDF
93	Junjuan Xu, Jason Cong, Xu Cheng 0001	Lower-bound estimation for multi-bitwidth scheduling.	ISCAS (1)	2005	DBLP DOI BibTeX RDF
66	Jason Cong, Karthik Gururaj, Bin Liu 0006, Chunyue Liu, Yi Zou, Zhiru Zhang, Sheng Zhou	Revisiting bitwidth optimizations.	FPGA	2009	DBLP DOI BibTeX RDF	fixed-poin, fpga, arithmetic, bitwidth
66	Sriraman Tallam, Rajiv Gupta 0001	Bitwidth aware global register allocation.	POPL	2003	DBLP DOI BibTeX RDF	minimal bitwidth, packing interfering nodes, subword data, embedded applications
58	Hiroto Yasuura, Hiroyuki Tomiyama, Takanori Okuma, Yun Cao	Data Memory Design Considering Effective Bitwidth for Low-Energy Embedded Systems.	ISSS	2002	DBLP DOI BibTeX RDF	WTLS, security, performance, mobile computing, embedded system, wireless communications, encryption, AES, RSA, design methodology, system architecture, platform, DES, IPSec, SSL, decryption, handset, 3DES, security processing
58	Takanori Okuma, Yun Cao, Masanori Muroyama, Hiroto Yasuura	Reducing access energy of on-chip data memory considering active data bitwidth.	ISLPED	2002	DBLP DOI BibTeX RDF
52	Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Ajay Kumar Verma, Seyed-Hosein Attarzadeh-Niaki, Chrysostomos Nicopoulos, Frank K. Gürkaynak, Philip Brisk, Yusuf Leblebici, Paolo Ienne	Field Programmable Compressor Trees: Acceleration of Multi-Input Addition on FPGAs.	ACM Trans. Reconfigurable Technol. Syst.	2009	DBLP DOI BibTeX RDF	Field Programmable Compressor Tree (FPCT), compressor tree, Field Programmable Gate Array (FPGA)
52	Jong-eun Lee, Kiyoung Choi, Nikil D. Dutt	Efficient instruction encoding for automatic instruction set design of configurable ASIPs.	ICCAD	2002	DBLP DOI BibTeX RDF
47	Zixuan Ma, Haojie Wang, Guanyu Feng, Chen Zhang, Lei Xie, Jiaao He, Shengqi Chen 0001, Jidong Zhai	Efficiently emulating high-bitwidth computation with low-bitwidth hardware.	ICS	2022	DBLP DOI BibTeX RDF
47	Shuchang Zhou 0001, Zekun Ni, Xinyu Zhou 0004, He Wen, Yuxin Wu, Yuheng Zou	DoReFa-Net: Training Low Bitwidth Convolutional Neural Networks with Low Bitwidth Gradients.	CoRR	2016	DBLP BibTeX RDF
43	Jong-eun Lee, Kiyoung Choi, Nikil D. Dutt	Instruction set synthesis with efficient instruction encoding for configurable processors.	ACM Trans. Design Autom. Electr. Syst.	2007	DBLP DOI BibTeX RDF	ISA customization and specialization, bitwidth-economical, Application-specific instruction set processor (ASIP), configurable processor, instruction encoding
43	Bin Wu, Jianwen Zhu, Farid N. Najm	An analytical approach for dynamic range estimation.	DAC	2004	DBLP DOI BibTeX RDF	Karhunen-Loeve Expansion (KLE), correlation, dynamic range, bitwidth
41	Rong Lin	Trading Bitwidth For Array Size: A Unified Reconfigurable Arithmetic Processor Design.	ISQED	2001	DBLP DOI BibTeX RDF	IP design, inner product processor, matrix multiplier, run-time reconfigurable architecture, SOC, array multiplier, polynomial evaluation
35	Haisheng Liu, Jean-Philippe Diguet, Christophe Jégo, Michel Jézéquel, Emmanuel Boutillon	Energy Efficient Turbo Decoder with Reduced State Metric Quantization.	SiPS	2007	DBLP DOI BibTeX RDF
35	Bin Wu, Jianwen Zhu, Farid N. Najm	Dynamic-range estimation.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
35	Yu-Wen Huang, Ching-Yeh Chen, Chen-Han Tsai, Chun-Fu Shen, Liang-Gee Chen	Survey on Block Matching Motion Estimation Algorithms and Architectures with New Results.	J. VLSI Signal Process.	2006	DBLP DOI BibTeX RDF	global elimination algorithm, motion estimation, VLSI architecture, block matching
35	John Regehr, Usit Duongsaa	Deriving abstract transfer functions for analyzing embedded software.	LCTES	2006	DBLP DOI BibTeX RDF	static analysis, abstract interpretation, embedded software, transfer functions
35	Bin Wu, Jianwen Zhu, Farid N. Najm	Dynamic range estimation for nonlinear systems.	ICCAD	2004	DBLP DOI BibTeX RDF
35	David M. Brooks, Margaret Martonosi	Dynamically Exploiting Narrow Width Operands to Improve Processor Power and Performance.	HPCA	1999	DBLP DOI BibTeX RDF
25	Jonathan A. Clarke, George A. Constantinides, Peter Y. K. Cheung	Word-length selection for power minimization via nonlinear optimization.	ACM Trans. Design Autom. Electr. Syst.	2009	DBLP DOI BibTeX RDF	word length, synthesis, signal processing, Power consumption, power consumption, bitwidth
25	Jason Cong, Karthik Gururaj, Bin Liu 0006, Chunyue Liu, Zhiru Zhang, Sheng Zhou, Yi Zou	Evaluation of Static Analysis Techniques for Fixed-Point Precision Optimization.	FCCM	2009	DBLP DOI BibTeX RDF	precision analysis, static analysis, bitwidth
25	George A. Constantinides	Word-length optimization for differentiable nonlinear systems.	ACM Trans. Design Autom. Electr. Syst.	2006	DBLP DOI BibTeX RDF	word-length, synthesis, Signal processing, bitwidth
25	C. Scott Ananian, Martin C. Rinard	Data size optimizations for java programs.	LCTES	2003	DBLP DOI BibTeX RDF	bitwidth analysis, field externalization, field packing, size optimizations, static specialization, embedded systems
25	Vasily G. Moshnyaga, Koji Inoue, Mizuka Fukagawa	Reducing energy consumption of video memory by bit-width compression.	ISLPED	2002	DBLP DOI BibTeX RDF	bitwidth-compression, frame memory, low-power design
25	Toshinori Sato, Itsujiro Arita	Partial Resolution in Data Value Predictors.	ICPP	2000	DBLP DOI BibTeX RDF	partial resolution, tag bitwidth, instruction level parallelism, value prediction, data speculation
23	Sihua Wang, Mingzhe Chen, Christopher G. Brinton, Changchuan Yin, Walid Saad, Shuguang Cui	Performance Optimization for Variable Bitwidth Federated Learning in Wireless Networks.	IEEE Trans. Wirel. Commun.	2024	DBLP DOI BibTeX RDF
23	Yiyue Chen, Haris Vikalo, Chianing Wang	Fed-QSSL: A Framework for Personalized Federated Learning under Bitwidth and Data Heterogeneity.	AAAI	2024	DBLP DOI BibTeX RDF
23	Henrique B. Brum, Mário P. Véstias, Horácio C. Neto	LiDAR 3D Object Detection in FPGA with Low Bitwidth Quantization.	ARC	2024	DBLP DOI BibTeX RDF
23	Mário P. Véstias, Rui Policarpo Duarte, José T. de Sousa, Horácio C. Neto	Efficient Design of Low Bitwidth Convolutional Neural Networks on FPGA with Optimized Dot Product Units.	ACM Trans. Reconfigurable Technol. Syst.	2023	DBLP DOI BibTeX RDF
23	Yu Ji, Lan Chen	FedQNN: A Computation-Communication-Efficient Federated Learning Framework for IoT With Low-Bitwidth Neural Network Quantization.	IEEE Internet Things J.	2023	DBLP DOI BibTeX RDF
23	Yiyue Chen, Haris Vikalo, Chianing Johnny Wang	Fed-QSSL: A Framework for Personalized Federated Learning under Bitwidth and Data Heterogeneity.	CoRR	2023	DBLP DOI BibTeX RDF
23	Jing Liu, Ruihao Gong, Xiuying Wei, Zhiwei Dong, Jianfei Cai 0001, Bohan Zhuang	QLLM: Accurate and Efficient Low-Bitwidth Quantization for Large Language Models.	CoRR	2023	DBLP DOI BibTeX RDF
23	Jorn Peters, Marios Fournarakis, Markus Nagel, Mart van Baalen, Tijmen Blankevoort	QBitOpt: Fast and Accurate Bitwidth Reallocation during Training.	CoRR	2023	DBLP DOI BibTeX RDF
23	Peng Peng, Mingyu You, Kai Jiang, Youzao Lian, Weisheng Xu	MBFQuant: A Multiplier-Bitwidth-Fixed, Mixed-Precision Quantization Method for Mobile CNN-Based Applications.	IEEE Trans. Image Process.	2023	DBLP DOI BibTeX RDF
23	Pai-Yu Tan, Cheng-Wen Wu	A Low-Bitwidth Integer-STBP Algorithm for Efficient Training and Inference of Spiking Neural Networks.	ASP-DAC	2023	DBLP DOI BibTeX RDF
23	Ping Feng, Jiahong Ning, Tingting Yang 0001, Jiabao Kang, Jiale Wang, Yicheng Li	Federated Optimal Framework with Low-bitwidth Quantization for Distribution System.	GLOBECOM	2023	DBLP DOI BibTeX RDF
23	Jorn Peters, Marios Fournarakis, Markus Nagel, Mart van Baalen, Tijmen Blankevoort	QBitOpt: Fast and Accurate Bitwidth Reallocation during Training.	ICCV (Workshops)	2023	DBLP DOI BibTeX RDF
23	Wei Mao 0002, Liuyao Dai, Kai Li, Quan Cheng, Yuhang Wang, Laimin Du, Shaobo Luo, Mingqiang Huang, Hao Yu 0001	An Energy-Efficient Mixed-Bitwidth Systolic Accelerator for NAS-Optimized Deep Neural Networks.	IEEE Trans. Very Large Scale Integr. Syst.	2022	DBLP DOI BibTeX RDF
23	Pengyu Wang, Yufan Cheng, Qihang Peng, Binhong Dong, Shaoqian Li	Low-Bitwidth Convolutional Neural Networks for Wireless Interference Identification.	IEEE Trans. Cogn. Commun. Netw.	2022	DBLP DOI BibTeX RDF
23	Lichen Feng, Yueqi Zhang, Zhangming Zhu	An Efficient Multilayer Spiking Convolutional Neural Network Processor for Object Recognition With Low Bitwidth and Channel-Level Parallelism.	IEEE Trans. Circuits Syst. II Express Briefs	2022	DBLP DOI BibTeX RDF
23	Jaehong Yoon, Geon Park, Wonyong Jeong, Sung Ju Hwang	Bitwidth Heterogeneous Federated Learning with Progressive Weight Dequantization.	CoRR	2022	DBLP BibTeX RDF
23	Sihua Wang, Mingzhe Chen, Christopher G. Brinton, Changchuan Yin, Walid Saad, Shuguang Cui	Performance Optimization for Variable Bitwidth Federated Learning in Wireless Networks.	CoRR	2022	DBLP DOI BibTeX RDF
23	Jiseok Youn, Jaehun Song, Hyung-Sin Kim, Saewoong Bahk	Bitwidth-Adaptive Quantization-Aware Neural Network Training: A Meta-Learning Approach.	CoRR	2022	DBLP DOI BibTeX RDF
23	Dominika Przewlocka-Rus, Syed Shakib Sarwar, Huseyin Ekin Sumbul, Yuecheng Li, Barbara De Salvo	Power-of-Two Quantization for Low Bitwidth and Hardware Compliant Neural Networks.	CoRR	2022	DBLP DOI BibTeX RDF
23	Bohan Zhuang, Mingkui Tan, Jing Liu 0048, Lingqiao Liu, Ian Reid 0001, Chunhua Shen	Effective Training of Convolutional Neural Networks With Low-Bitwidth Weights and Activations.	IEEE Trans. Pattern Anal. Mach. Intell.	2022	DBLP DOI BibTeX RDF
23	Wen Fei, Wenrui Dai, Chenglin Li, Junni Zou, Hongkai Xiong	General Bitwidth Assignment for Efficient Deep Convolutional Neural Network Quantization.	IEEE Trans. Neural Networks Learn. Syst.	2022	DBLP DOI BibTeX RDF
23	Jiseok Youn, Jaehun Song, Hyung-Sin Kim, Saewoong Bahk	Bitwidth-Adaptive Quantization-Aware Neural Network Training: A Meta-Learning Approach.	ECCV (12)	2022	DBLP DOI BibTeX RDF
23	Jaehong Yoon, Geon Park, Wonyong Jeong, Sung Ju Hwang	Bitwidth Heterogeneous Federated Learning with Progressive Weight Dequantization.	ICML	2022	DBLP BibTeX RDF
23	Liyan Shen, Ye Dong, Binxing Fang, Jinqiao Shi, Xuebin Wang, Shengli Pan 0003, Ruisheng Shi	ABNN2: secure two-party arbitrary-bitwidth quantized neural network predictions.	DAC	2022	DBLP DOI BibTeX RDF
23	Tianshu Chu, Qin Luo, Jie Yang 0002, Xiaolin Huang	Mixed-precision quantized neural networks with progressively decreasing bitwidth.	Pattern Recognit.	2021	DBLP DOI BibTeX RDF
23	Chaofan Tao, Rui Lin, Quan Chen, Zhaoyang Zhang, Ping Luo 0002, Ngai Wong	FAT: Learning Low-Bitwidth Parametric Representation via Frequency-Aware Transformation.	CoRR	2021	DBLP BibTeX RDF
23	Yuk Wong 0001, Zhenjiang Dong, Wei Zhang	Low Bitwidth CNN Accelerator on FPGA Using Winograd and Block Floating Point Arithmetic.	ISVLSI	2021	DBLP DOI BibTeX RDF
23	Jun-Shen Wu, Chi-En Wang, Ren-Shuo Liu	Value-Aware Error Detection and Correction for SRAM Buffers in Low-Bitwidth, Floating-Point CNN Accelerators.	ASP-DAC	2021	DBLP DOI BibTeX RDF
23	Geancarlo Abich, Ricardo Reis 0001, Luciano Ost	The Impact of Precision Bitwidth on the Soft Error Reliability of the MobileNet Network.	LASCAS	2021	DBLP DOI BibTeX RDF
23	Yi-Lin Tsai, Jian-Jiun Ding	An Improved LZW Algorithm for Large Data Size and Low Bitwidth per Code.	TENCON	2021	DBLP DOI BibTeX RDF
23	Justin Morris, Si Thu Kaung Set, Gadi Rosen, Mohsen Imani, Baris Aksanli, Tajana Rosing	AdaptBit-HD: Adaptive Model Bitwidth for Hyperdimensional Computing.	ICCD	2021	DBLP DOI BibTeX RDF
23	Yao Chen 0008, Cole Hawkins, Kaiqi Zhang 0002, Zheng Zhang 0005, Cong Hao	3U-EdgeAI: Ultra-Low Memory Training, Ultra-Low Bitwidth Quantization, and Ultra-Low Latency Acceleration.	ACM Great Lakes Symposium on VLSI	2021	DBLP DOI BibTeX RDF
23	Xinzhe Liu, Fupeng Chen, Raees Kizhakkumkara Muhamad, David Blinder, Dessislava Nikolova, Peter Schelkens, Francky Catthoor, Yajun Ha	Bitwidth-Optimized Energy-Efficient FFT Design via Scaling Information Propagation.	DAC	2021	DBLP DOI BibTeX RDF
23	Jun Chen 0023, Yong Liu 0007, Hao Zhang, Shengnan Hou, Jian Yang	Propagating Asymptotic-Estimated Gradients for Low Bitwidth Quantized Neural Networks.	IEEE J. Sel. Top. Signal Process.	2020	DBLP DOI BibTeX RDF
23	Shoukai Xu, Haokun Li, Bohan Zhuang, Jing Liu 0048, Jiezhang Cao, Chuangrun Liang, Mingkui Tan	Generative Low-bitwidth Data Free Quantization.	CoRR	2020	DBLP BibTeX RDF
23	Yuhang Li, Wei Wang 0059, Haoli Bai, Ruihao Gong, Xin Dong 0009, Fengwei Yu	Efficient Bitwidth Search for Practical Mixed Precision Neural Network.	CoRR	2020	DBLP BibTeX RDF
23	Ting-Wu Chin, Pierce I-Jen Chuang, Vikas Chandra, Diana Marculescu	One Weight Bitwidth to Rule Them All.	CoRR	2020	DBLP BibTeX RDF
23	Jun Chen 0023, Yong Liu 0007, Hao Zhang, Shengnan Hou, Jian Yang	Propagating Asymptotic-Estimated Gradients for Low Bitwidth Quantized Neural Networks.	CoRR	2020	DBLP BibTeX RDF
23	Jianfei Chen, Yu Gai, Zhewei Yao, Michael W. Mahoney, Joseph E. Gonzalez	A Statistical Framework for Low-bitwidth Training of Deep Neural Networks.	CoRR	2020	DBLP BibTeX RDF
23	Haochong Lan, Zhiping Lin 0001, Xiaoping Lai	Searching for High Accuracy Mix-Bitwidth Network Architecture.	ICARCV	2020	DBLP DOI BibTeX RDF
23	Suresh Purini, Vinamra Benara, Ziaul Choudhury, Uday Bondhugula	Bitwidth customization in image processing pipelines using interval analysis and SMT solvers.	CC	2020	DBLP DOI BibTeX RDF
23	Jianfei Chen, Yu Gai, Zhewei Yao, Michael W. Mahoney, Joseph E. Gonzalez	A Statistical Framework for Low-bitwidth Training of Deep Neural Networks.	NeurIPS	2020	DBLP BibTeX RDF
23	Yun Long, Edward Lee, Daehyun Kim 0002, Saibal Mukhopadhyay	Flex-PIM: A Ferroelectric FET based Vector Matrix Multiplication Engine with Dynamical Bitwidth and Floating Point Precision.	IJCNN	2020	DBLP DOI BibTeX RDF
23	Shoukai Xu, Haokun Li, Bohan Zhuang, Jing Liu 0048, Jiezhang Cao, Chuangrun Liang, Mingkui Tan	Generative Low-Bitwidth Data Free Quantization.	ECCV (12)	2020	DBLP DOI BibTeX RDF
23	Ting-Wu Chin, Pierce I-Jen Chuang, Vikas Chandra, Diana Marculescu	One Weight Bitwidth to Rule Them All.	ECCV Workshops (5)	2020	DBLP DOI BibTeX RDF
23	Ahmed T. Elthakeb, Prannoy Pilligundla, Hadi Esmaeilzadeh	SinReQ: Generalized Sinusoidal Regularization for Automatic Low-Bitwidth Deep Quantized Training.	CoRR	2019	DBLP BibTeX RDF
23	Bohan Zhuang, Jing Liu 0048, Mingkui Tan, Lingqiao Liu, Ian D. Reid 0001, Chunhua Shen	Effective Training of Convolutional Neural Networks with Low-bitwidth Weights and Activations.	CoRR	2019	DBLP BibTeX RDF
23	Tianshu Chu, Qin Luo, Jie Yang 0002, Xiaolin Huang	Mixed-Precision Quantized Neural Network with Progressively Decreasing Bitwidth For Image Classification and Object Detection.	CoRR	2019	DBLP BibTeX RDF
23	Rémi Bernhard, Pierre-Alain Moëllic, Jean-Max Dutertre	Impact of Low-bitwidth Quantization on the Adversarial Robustness for Embedded Neural Networks.	CoRR	2019	DBLP BibTeX RDF
23	Ioannis Tsiokanos, Lev Mukhanov, Georgios Karakonstantis	Low-Power Variation-Aware Cores based on Dynamic Data-Dependent Bitwidth Truncation.	DATE	2019	DBLP DOI BibTeX RDF
23	Haoxin Fan, Jianjing An, Dong Wang 0040	Training Low Bitwidth Model with Weight Normalization for Convolutional Neural Networks.	PRCV (1)	2019	DBLP DOI BibTeX RDF
23	Kun Huang, Bingbing Ni, Xiaokang Yang	Efficient Quantization for Neural Networks with Binary Weights and Low Bitwidth Activations.	AAAI	2019	DBLP DOI BibTeX RDF
23	Rémi Bernhard, Pierre-Alain Moëllic, Jean-Max Dutertre	Impact of Low-Bitwidth Quantization on the Adversarial Robustness for Embedded Neural Networks.	CW	2019	DBLP DOI BibTeX RDF
23	Josh Fromm, Shwetak N. Patel, Matthai Philipose	Heterogeneous Bitwidth Binarization in Convolutional Neural Networks.	CoRR	2018	DBLP BibTeX RDF
23	Yi Cai 0003, Tianqi Tang 0001, Lixue Xia, Ming Cheng, Zhenhua Zhu, Yu Wang 0002, Huazhong Yang	Training low bitwidth convolutional neural network on RRAM.	ASP-DAC	2018	DBLP DOI BibTeX RDF
23	Bohan Zhuang, Chunhua Shen, Mingkui Tan, Lingqiao Liu, Ian D. Reid 0001	Towards Effective Low-Bitwidth Convolutional Neural Networks.	CVPR	2018	DBLP BibTeX RDF
23	Joshua Fromm, Shwetak N. Patel, Matthai Philipose	Heterogeneous Bitwidth Binarization in Convolutional Neural Networks.	NeurIPS	2018	DBLP BibTeX RDF
23	Kotaro Terada, Masao Yanagisawa, Nozomu Togawa	A Bitwidth-Aware High-Level Synthesis Algorithm Using Operation Chainings for Tiled-DR Architectures.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2017	DBLP DOI BibTeX RDF
23	Benjamin Carrión Schäfer	Enabling High-Level Synthesis Resource Sharing Design Space Exploration in FPGAs Through Automatic Internal Bitwidth Adjustments.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2017	DBLP DOI BibTeX RDF
23	Bohan Zhuang, Chunhua Shen, Mingkui Tan, Lingqiao Liu, Ian D. Reid 0001	Towards Effective Low-bitwidth Convolutional Neural Networks.	CoRR	2017	DBLP BibTeX RDF
23	Simon Joel Schmidt, David Boland	Dynamic bitwidth assignment for efficient dot products.	FPL	2017	DBLP DOI BibTeX RDF
23	Nachiket Kapre, Deheng Ye	GPU-Accelerated High-Level Synthesis for Bitwidth Optimization of FPGA Datapaths.	FPGA	2016	DBLP DOI BibTeX RDF
23	Keisuke Inoue, Mineo Kaneko	Bitwidth-aware register allocation and binding for clock period minimization.	MWSCAS	2015	DBLP DOI BibTeX RDF
23	Bu-Ching Lin, Juinn-Dar Huang, Jing-Yang Jou	ILP-Based Bitwidth-Aware Subexpression Sharing for Area Minimization in Multiple Constant Multiplication.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2014	DBLP DOI BibTeX RDF
23	V. Krishna Nandivada, Rajkishore Barik	Improved bitwidth-aware variable packing.	ACM Trans. Archit. Code Optim.	2013	DBLP DOI BibTeX RDF
23	Ana Klimovic, Jason Helge Anderson	Bitwidth-optimized hardware accelerators with software fallback.	FPT	2013	DBLP DOI BibTeX RDF
23	Seetharam Narasimhan, Keerthi Kunaparaju, Swarup Bhunia	Healing of DSP Circuits Under Power Bound Using Post-Silicon Operand Bitwidth Truncation.	IEEE Trans. Circuits Syst. I Regul. Pap.	2012	DBLP DOI BibTeX RDF
23	Indu Bhagat	Code optimizations for narrow bitwidth architectures.		2012	RDF
23	Ghizlane Lhairech-Lebreton, Philippe Coussy, Dominique Heller, Eric Martin 0001	Bitwidth-aware high-level synthesis for designing low-power DSP applications.	ICECS	2010	DBLP DOI BibTeX RDF
23	Per Bjesse	Word level bitwidth reduction for unbounded hardware model checking.	Formal Methods Syst. Des.	2009	DBLP DOI BibTeX RDF
23	Aleksandr Zaks, Zijiang Yang 0006, Ilya Shlyakhter, Franjo Ivancic, Srihari Cadambi, Malay K. Ganai, Aarti Gupta, Pranav Ashar	Bitwidth Reduction via Symbolic Interval Analysis for Software Model Checking.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF