Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
95 | Jimmy Shinn-Hwa Wang, Wayne Wei-Ming Dai |
Transient analysis of coupled transmission lines characterized with the frequency-dependent losses using scattering-parameter based macromodel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings, pp. 18-24, 1995, IEEE Computer Society, 0-8186-7165-3. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
coupled transmission lines, frequency-dependent losses, scattering-parameter based macromodel, S-parameter macromodel based simulator, circuit analysis computing, transient analysis, transient analysis, transmission lines, losses, S-parameters |
92 | Mark M. Gourary, Sergey G. Rusakov, Sergey L. Ulyanov, Michael M. Zharov, Brian J. Mulvaney, Kiran K. Gullapalli |
Smoothed form of nonlinear phase macromodel for oscillators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008, pp. 807-814, 2008, IEEE Computer Society, 978-1-4244-2820-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
92 | Chun-Hsu Ko, Jin-Chern Chiou |
Fuzzy macromodel for dynamic simulation of microelectromechanical systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Syst. Man Cybern. Part A ![In: IEEE Trans. Syst. Man Cybern. Part A 36(4), pp. 823-830, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
87 | Sudhir Aggarwal |
An Enhanced Macromodel for a CMOS Operational Amplifier for HDL Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 9th International Conference on VLSI Design (VLSI Design 1996), 3-6 January 1996, Bangalore, India, pp. 331-332, 1996, IEEE Computer Society, 0-8186-7228-5. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
VHDL-Analog, Non-linear model, Analog IC's, Operational Amplifier, Macromodel |
85 | Altan Odabasioglu, Mustafa Celik, Lawrence T. Pileggi |
PRIMA: passive reduced-order interconnect macromodeling algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1997, San Jose, CA, USA, November 9-13, 1997, pp. 58-65, 1997, IEEE Computer Society / ACM, 0-8186-8200-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
MPVL, PRIMA, RLC interconnect circuits, block Arnoldi technique, driver-load models, guaranteed passivity, macromodel passivity, macromodel stability, passive reduced-order interconnect macromodeling algorithm, path tracing algorithm, reduced order N-port models, simulation, CAD, integrated circuit layout, frequency domain, circuit stability |
82 | Anish Muttreja, Anand Raghunathan, Srivaths Ravi 0001, Niraj K. Jha |
Automated Energy/Performance Macromodeling of Embedded Software. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(3), pp. 542-552, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
82 | Yunsi Fei, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha |
A hybrid energy-estimation technique for extensible processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(5), pp. 652-664, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
82 | Anish Muttreja, Anand Raghunathan, Srivaths Ravi 0001, Niraj K. Jha |
Automated energy/performance macromodeling of embedded software. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 99-102, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
data serialization, genetic programming, regression, embedded software, symbolic, macromodeling |
78 | Bing Zhong, Tao Hu, Dawei Fu, Steven L. Dvorak, John L. Prince |
A study of a hybrid phase-pole macromodel for transient simulation of complex interconnects structures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(8), pp. 1250-1261, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
77 | Bin Zhang 0011 |
Online circuit reliability monitoring. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, Boston Area, MA, USA, May 10-12 2009, pp. 221-226, 2009, ACM, 978-1-60558-522-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
reliability, circuit, macromodel, online monitoring |
69 | Tatsuya Koyagi, Masahiro Fukui, Resve A. Saleh |
Delay macromodeling and estimation for RTL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2008), 18-21 May 2008, Sheraton Seattle Hotel, Seattle, Washington, USA, pp. 2430-2433, 2008, IEEE, 978-1-4244-1683-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
65 | Wei Qiang, Yang Cao, Yuan-yuan Yan, Xun Gao |
Power Estimation of CMOS Circuits by Neural Network Macromodel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISNN (2) ![In: Advances in Neural Networks - ISNN 2006, Third International Symposium on Neural Networks, Chengdu, China, May 28 - June 1, 2006, Proceedings, Part III, pp. 1313-1318, 2006, Springer, 3-540-34482-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
65 | Xiaolue Lai, Jaijeet S. Roychowdhury |
TP-PPV: piecewise nonlinear, time-shifted oscillator macromodel extraction for fast, accurate PLL simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 2006, pp. 269-274, 2006, ACM, 1-59593-389-1. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
65 | Yang Xu 0017, Xin Li 0001, Peng Li 0001, Lawrence T. Pileggi |
Noise Macromodel for Radio Frequency Integrated Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 10150-10155, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
65 | Shrutin Ulman |
Macromodel for short circuit power dissipation of submicron CMOS inverters and its application to design CMOS buffers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 269-272, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
65 | Jeong-Taek Kong, David Overhauser |
Methods to improve digital MOS macromodel accuracy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(7), pp. 868-881, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
63 | Saket Srivastava, Sanjukta Bhanja |
Hierarchical Probabilistic Macromodeling for QCA Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 56(2), pp. 174-190, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
QCA computing, QCA macromodel, Bayesian networks, Quantum-dot Cellular Automata, probabilistic computing |
59 | Saurabh K. Tiwary, Rob A. Rutenbar |
Scalable trajectory methods for on-demand analog macromodel extraction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005, pp. 403-408, 2005, ACM, 1-59593-058-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
trajectory method, analog, SPICE, circuit, macromodel |
55 | Shweta Chary, Michael L. Bushnell |
Analog Macromodeling for Combined Resistive Vias, Resistive Bridges, and Capacitive Crosstalk Delay Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India, pp. 818-823, 2006, IEEE Computer Society, 0-7695-2502-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
55 | Subodh Gupta, Farid N. Najm |
Energy and peak-current per-cycle estimation at RTL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 11(4), pp. 525-537, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
51 | Mengmeng Ding, Ranga Vemuri |
A combined feasibility and performance macromodel for analog circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005, pp. 63-68, 2005, ACM, 1-59593-058-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
feasibility models, performance macromodeling, active learning |
51 | Edith Kussener, Hervé Barthélemy, Alexandre Malherbe, Andreas Kaiser |
Versatile macromodel for the power supply of submicronic CMOS microprocessors based on voltage down DC-DC converter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 821-824, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
51 | Janusz Zarebski |
A new electrothermal dynamic macromodel of the power Darlington transistor for SPICE. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 305-308, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
49 | Hao Yu 0001, Yiyu Shi 0001, Lei He 0001, Tanay Karnik |
Thermal via allocation for 3D ICs considering temporally and spatially variant thermal power. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006, pp. 156-161, 2006, ACM, 1-59593-462-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
SQP optimization, structured and parameterized macromodel, thermal management and simulation |
49 | Siddharth Choudhuri, Rabi N. Mahapatra |
Energy characterization of filesystems for diskless embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004, pp. 566-569, 2004, ACM, 1-58113-828-8. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
diskless, flash, macromodel |
49 | Xin Li 0001, Peng Li 0001, Yang Xu 0017, Lawrence T. Pileggi |
Analog and RF circuit macromodels for system-level analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 478-483, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
analog/RF circuits, macromodel |
47 | Ming Yang 0033, Wenjian Yu |
Reliable Macromodel Generation for the Capacitance Extraction Based on Macromodel-Aware Random Walk Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(4), pp. 946-951, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
44 | Ying Wei 0002, Alex Doboli |
Systematic development of nonlinear analog circuit macromodels through successive operator composition and nonlinear model decoupling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 1023-1028, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
nonlinear macromodel, structural macromodel, analog circuits |
41 | Felipe Klein, Guido Araujo, Rodolfo Azevedo, Roberto Leao, Luiz C. V. dos Santos |
On the Limitations of Power Macromodeling Techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), May 9-11, 2007, Porto Alegre, Brazil, pp. 395-400, 2007, IEEE Computer Society, 0-7695-2896-1. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
41 | Min Ma, Roni Khazaka |
Multi-level Order Reduction with Nonlinear Port Constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 1485-1488, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
41 | Natalie Nakhla, Ramachandra Achar, Michel S. Nakhla, Anestis Dounavis |
Delay extraction based closed-form SPICE compatible passive macromodels for distributed transmission line interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 1082-1085, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
41 | Pavel V. Nikitin, Vikram Jandhyala, Daniel A. White, Nathan Champagne, John D. Rockway, C.-J. Richard Shi, Chuanyi Yang, Yong Wang 0006, Gong Ouyang, Rob Sharpe, John W. Rockway |
Modeling and Simulation of Circuit-Electromagnetic Effects in Electronic Design Flow. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 5th International Symposium on Quality of Electronic Design (ISQED 2004), 22-24 March 2004, San Jose, CA, USA, pp. 244-249, 2004, IEEE Computer Society, 0-7695-2093-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
41 | Janusz Zarebski, Krzysztof Górecki |
The electrothermal model of the linear power supplies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (1) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 369-372, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
41 | Ayman I. Kayssi, Karem A. Sakallah |
Timing models for gallium arsenide direct-coupled FET logic circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14(3), pp. 384-393, 1995. The full citation details ...](Pics/full.jpeg) |
1995 |
DBLP DOI BibTeX RDF |
|
41 | Yun-Cheng Ju, Vasant B. Rao, Resve A. Saleh |
Consistency checking and optimization of macromodels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(8), pp. 957-967, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
37 | Chin-Cheng Kuo, Pei-Syun Lin, Chien-Nan Jimmy Liu |
A SCORE macromodel for PLL designs to analyze supply noise interaction issues at behavioral level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009, pp. 516-521, 2009, IEEE, 978-1-4244-2748-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
37 | Michael P. Reyes, Ronald S. Fearing |
Macromodel for the mechanics of gecko hair adhesion. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICRA ![In: 2008 IEEE International Conference on Robotics and Automation, ICRA 2008, May 19-23, 2008, Pasadena, California, USA, pp. 1602-1607, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
37 | Tsung-Hao Chen, Clement Luk, Charlie Chung-Ping Chen |
SuPREME: Substrate and Power-delivery Reluctance-Enhanced Macromodel Evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2003 International Conference on Computer-Aided Design, ICCAD 2003, San Jose, CA, USA, November 9-13, 2003, pp. 786-792, 2003, IEEE Computer Society / ACM, 1-58113-762-1. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
37 | Adrian Maxim, Danielle Andreu, Marc Cousineau, Jacques Boucher |
A novel SPICE behavioral macromodel of operational amplifiers including a high accuracy description of frequency characteristics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (6) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 278-281, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
37 | S. Turgis, Daniel Auvergne |
A novel macromodel for power estimation in CMOS structures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(11), pp. 1090-1098, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
37 | Chen-Yang Pan, Kwang-Ting Cheng, Sandeep Gupta 0001 |
A comprehensive fault macromodel for opamps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1994, San Jose, California, USA, November 6-10, 1994, pp. 344-348, 1994, IEEE Computer Society / ACM, 0-89791-690-5. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
37 | Haifang Liao, Wayne Wei-Ming Dai |
Capturing time-of-flight delay for transient analysis based on scattering parameter macromodel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1994, San Jose, California, USA, November 6-10, 1994, pp. 412-417, 1994, IEEE Computer Society / ACM, 0-89791-690-5. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
27 | Hao Yu 0001, Yiyu Shi 0001, Lei He 0001, Tanay Karnik |
Thermal Via Allocation for 3-D ICs Considering Temporally and Spatially Variant Thermal Power. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 16(12), pp. 1609-1619, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
27 | Yaseer Arafat Durrani, Ana Abril, Teresa Riesgo |
Efficient Power Macromodeling Technique for IP-Based Digital System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA, pp. 1145-1148, 2007, IEEE, 1-4244-0920-9. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
27 | Zhichun Wang, Xiaolue Lai, Jaijeet S. Roychowdhury |
PV-PPV: Parameter Variability Aware, Automatically Extracted, Nonlinear Time-Shifted Oscillator Macromodels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007, pp. 142-147, 2007, IEEE. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
27 | Xiaolue Lai, Jaijeet S. Roychowdhury |
Fast simulation of large networks of nanotechnological and biochemical oscillators for investigating self-organization phenomena. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006, pp. 273-278, 2006, IEEE, 0-7803-9451-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
27 | Min Ma, Alfred Tze-Mun Leung, Roni Khazaka |
Sparse macromodels for parametric networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece, 2006, IEEE, 0-7803-9389-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
27 | Gurpreet Shinh, Natalie Nakhla, Ramachandra Achar, Michel S. Nakhla, Ihsan Erdin |
Efficient and Accurate EMC Analysis of High-Frequency VLSI Subnetworks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India, pp. 672-676, 2006, IEEE Computer Society, 0-7695-2502-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
27 | Hao Yu 0001, Yiyu Shi 0001, Lei He 0001 |
Fast analysis of structured power grid by triangularization based structure preserving model order reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 43rd Design Automation Conference, DAC 2006, San Francisco, CA, USA, July 24-28, 2006, pp. 205-210, 2006, ACM, 1-59593-381-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
PG grid simulation, model order reduction |
27 | Dharmendra Saraswat, Ramachandra Achar, Michel S. Nakhla |
Global Passivity Enforcement Algorithm for Macromodels of Interconnect Subnetworks Characterized by Tabulated Data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 13(7), pp. 819-832, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
27 | Xiaolue Lai, Yayun Wan, Jaijeet S. Roychowdhury |
Fast PLL simulation using nonlinear VCO macromodels for accurate prediction of jitter and cycle-slipping due to loop non-idealities and supply noise. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 459-464, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
27 | Natalie Nakhla, Ramachandra Achar, Michel S. Nakhla |
Accurate and closed-form SPICE compatible passive macromodels for distributed interconnects with frequency dependent parameters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (6) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 5770-5773, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
27 | Luis Elvira, Ferran Martorell, Xavier Aragonès, José Luis González 0001 |
A Macromodelling Methodology for Efficient High-Level Simulation of Substrate Noise Generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 1362-1363, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
27 | Jinwoo Choi, Sung-Hwan Min, Joong-Ho Kim, Madhavan Swaminathan, Wendemagegnehu T. Beyene, Chuck Yuan |
Modeling and Analysis of Power Distribution Networks for Gigabit Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Mob. Comput. ![In: IEEE Trans. Mob. Comput. 2(4), pp. 299-313, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
transmission matrix method, power bus, decoupling, macromodeling, Power distribution network |
27 | Yuichi Tanji, Akio Ushida, Michel S. Nakhla |
Passive closed-form expression of RLCG transmission lines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (3) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 795-798, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
27 | Alessandro Bogliolo, Roberto Corgnati, Enrico Macii, Massimo Poncino |
Parameterized RTL power models for soft macros. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 9(6), pp. 880-887, 2001. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
27 | Alessandro Bogliolo, Roberto Corgnati, Enrico Macii, Massimo Poncino |
Parameterized RTL power models for combinational soft macros. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999, San Jose, California, USA, November 7-11, 1999, pp. 284-288, 1999, IEEE Computer Society, 0-7803-5832-5. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
27 | Altan Odabasioglu, Mustafa Celik, Lawrence T. Pileggi |
PRIMA: passive reduced-order interconnect macromodeling algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(8), pp. 645-654, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
27 | Chen-Yang Pan, Kwang-Ting Cheng, Sandeep Gupta 0001 |
Fault macromodeling and a testing strategy for opamps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Electron. Test. ![In: J. Electron. Test. 9(3), pp. 225-235, 1996. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
catastrophic fault model, operational amplifier design for testability, analog test, macromodeling, parametric faults |
27 | Jianfeng Shao, Ramesh Harjani |
Macromodeling of analog circuits for hierarchical circuit design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1994, San Jose, California, USA, November 6-10, 1994, pp. 656-663, 1994, IEEE Computer Society / ACM, 0-89791-690-5. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP DOI BibTeX RDF |
|
27 | Dong H. Xie, Michel S. Nakhla |
Delay and crosstalk simulation of high-speed VLSI interconnects with nonlinear terminations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(11), pp. 1798-1811, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
|
27 | Giorgio Casinovi, Alberto L. Sangiovanni-Vincentelli |
A macromodeling algorithm for analog circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(2), pp. 150-160, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
|
24 | Ivailo M. Pandiev |
Development of PSpice Macromodel for Monolithic Single-Supply Power Amplifiers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MIXDES ![In: 2021 28th International Conference on Mixed Design of Integrated Circuits and System, Lodz, Poland, June 24-26, 2021, pp. 178-183, 2021, IEEE, 978-83-63578-20-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
24 | Mark M. Gourary, Sergey G. Rusakov, Sergey L. Ulyanov, Michael M. Zharov |
Development of Time-Varying PLL Macromodel for Jitter Evaluation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EWDTS ![In: 2018 IEEE East-West Design & Test Symposium, EWDTS 2018, Kazan, Russia, September 14-17, 2018, pp. 1-7, 2018, IEEE, 978-1-5386-5710-2. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
24 | Carlos Sánchez-López, Miguel Ángel Carrasco-Aguilar, F. E. Morales-Lopez |
A SPICE-Compatible Nonlinear CCII Macromodel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 26(9), pp. 1750144:1-1750144:8, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
24 | Guoyong Shi, Hanbin Hu, Shuwen Deng |
Topological Approach to Automatic Symbolic Macromodel Generation for Analog Integrated Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 22(3), pp. 47:1-47:25, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
24 | Luis A. Duffaut Espinosa, Mads Almassalkhi, Paul Hines, Shoeib Heydari, Jeff Frolik |
Towards a macromodel for Packetized Energy Management of resistive water heaters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CISS ![In: 51st Annual Conference on Information Sciences and Systems, CISS 2017, Baltimore, MD, USA, March 22-24, 2017, pp. 1-6, 2017, IEEE, 978-1-5090-4780-2. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
24 | Ailin Zhang, Guoyong Shi |
An Automatic Integrator Macromodel Generation Method for Behavioral Simulation of SC Sigma-Delta Modulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 99-A(5), pp. 908-916, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
24 | Eduardo Ortega-Torres, Sergio Ruíz-Hernández, Carlos Sánchez-López |
A nonlinear macromodel for current-feedback operational amplifiers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 46(10), pp. 941-949, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
24 | K. Shawn Watts, Pranav Dalal, Andrew J. Tebben, Daniel L. Cheney, John C. Shelley |
Macrocycle Conformational Sampling with MacroModel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Chem. Inf. Model. ![In: J. Chem. Inf. Model. 54(10), pp. 2680-2696, 2014. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
24 | Linbin Chen, Fabrizio Lombardi, Jie Han 0001 |
An enhanced HSPICE macromodel of a PCM cell with threshold switching and recovery behavior. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: IEEE 57th International Midwest Symposium on Circuits and Systems, MWSCAS 2014, College Station, TX, USA, August 3-6, 2014, pp. 993-996, 2014, IEEE, 978-1-4799-4134-6. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
24 | Pilin Junsangsri, Fabrizio Lombardi, Jie Han 0001 |
HSPICE macromodel of a Programmable Metallization Cell (PMC) and its application to memory design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NANOARCH ![In: IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2014, Paris, France, July 8-10, 2014, pp. 45-50, 2014, IEEE Computer Society/ACM, 978-1-4799-6383-6. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
24 | Donghwa Shin, Alessandro Sassone, Alberto Bocca, Alberto Macii, Enrico Macii, Massimo Poncino |
A compact macromodel for the charge phase of a battery with typical charging protocol. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: International Symposium on Low Power Electronics and Design, ISLPED'14, La Jolla, CA, USA - August 11 - 13, 2014, pp. 267-270, 2014, ACM, 978-1-4503-2975-0. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
24 | Konstantin O. Petrosyants, Igor A. Kharitonov, Lev M. Sambursky, V. N. Bogatyrev, Z. M. Povarnitcyna, E. S. Drozdenko |
Simulation of total dose influence on analog-digital SOI/SOS CMOS circuits with EKV-RAD macromodel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EWDTS ![In: East-West Design & Test Symposium, EWDTS 2013, Rostov-on-Don, Russia, September 27-30, 2013, pp. 1-6, 2013, IEEE Computer Society, 978-1-4799-2095-2. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
24 | Sangho Shin, Kyungmin Kim, Sung-Mo Steve Kang |
Memristor macromodel and its application to neuronal spike generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECCTD ![In: 21st European Conference on Circuit Theory and Design, ECCTD 2013, Dresden, Germany, September 8-12, 2013, pp. 1-4, 2013, IEEE. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
24 | Francesc Masana, Javier Chavarria, Domingo Biel, Alberto Poveda, Francesc Guinjoan, Eduard Alarcón |
SiC power JFET electrothermal macromodel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MIXDES ![In: Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2013, Gdynia, Poland, June 20-22, 2013, pp. 444-447, 2013, IEEE. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP BibTeX RDF |
|
24 | Ting Zhu 0002, Mustafa Berke Yelten, Michael B. Steer, Paul D. Franzon |
Application of Surrogate Modeling in Variation-aware Macromodel and Circuit Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIMULTECH ![In: SIMULTECH 2011 - Proceedings of 1st International Conference on Simulation and Modeling Methodologies, Technologies and Applications, Noordwijkerhout, The Netherlands, 29 - 31 July, 2011, pp. 502-508, 2011, SciTePress, 978-989-8425-78-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP BibTeX RDF |
|
24 | Bhaskar Gopalan |
A SPICE Macromodel for the Analysis of Lossy Dispersive Coupled GaAs Interconnect Line System. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 2011: 24th International Conference on VLSI Design, IIT Madras, Chennai, India, 2-7 January 2011, pp. 88-93, 2011, IEEE Computer Society, 978-0-7695-4348-2. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
|
24 | Amir Beygi, Anestis Dounavis |
Sensitivity Analysis of Lossy Multiconductor Transmission Lines Based on the Passive Method of Characteristics Macromodel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(8), pp. 1290-1294, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
24 | José Ángel Díaz-Madrid, Juan Hinojosa, Ginés Doménech-Asensi |
Fuzzy logic technique for accurate analog circuits macromodel sizing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Circuit Theory Appl. ![In: Int. J. Circuit Theory Appl. 38(3), pp. 307-319, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
24 | Paolo Maffezzoni |
Synchronization Analysis of Two Weakly Coupled Oscillators Through a PPV Macromodel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(3), pp. 654-663, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
24 | Paolo Maffezzoni, Dario D'Amore, Saeid Daneshgar, Michael Peter Kennedy |
Analysis and Design of Injection-Locked Frequency Dividers by Means of a Phase-Domain Macromodel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(11), pp. 2956-2966, 2010. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
24 | Hao Yu 0001, Xuexin Liu, Hai Wang 0002, Sheldon X.-D. Tan |
A fast analog mismatch analysis by an incremental and stochastic trajectory piecewise linear macromodel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 15th Asia South Pacific Design Automation Conference, ASP-DAC 2010, Taipei, Taiwan, January 18-21, 2010, pp. 211-216, 2010, IEEE, 978-1-60558-837-7. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
24 | Paolo Maffezzoni, Dario D'Amore, Saeid Daneshgar, Michael Peter Kennedy |
Estimating the locking range of analog dividers through a phase-domain macromodel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France, pp. 1535-1538, 2010, IEEE, 978-1-4244-5308-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
24 | Shivam Priyadarshi, Nikhil Kriplani, Michael B. Steer, T. Robert Harris |
Fast dynamic simulation of VLSI circuits using reduced order compact macromodel of standard cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BMAS ![In: 2010 IEEE International Behavioral Modeling and Simulation Conference, BMAS 2010, San Jose, CA, USA, September 23-24, 2010, pp. 75-80, 2010, IEEE, 978-1-4244-8996-1. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
|
24 | Jinghui Xu, Weizheng Yuan, Honglong Chang, Binghe Ma |
Angularly parameterized macromodel extraction for microstructures with a large number of terminals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NEMS ![In: 4th IEEE International Conference on Nano/Micro Engineered and Molecular Systems, IEEE-NEMS 2009, Shenzhen, China, January 5-8, 2009, pp. 37-40, 2009, IEEE Computer Society, 978-1-4244-4629-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
24 | Janusz Zarebski, Krzysztof Górecki |
Electrothermal compact macromodel of monolithic switching voltage regulator MC34063A. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 48(10), pp. 1703-1710, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
24 | Kiran Kumar Garje, Anil Kumar, Santosh Biswas, Amitava Banerjee, Pam Srikanth, Siddhartha Mukhopadhyay |
Macromodel Based Fault Simulation of Linear Circuits using Parameter Estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICIIS ![In: IEEE Reglon 10 Colloquium and Third International Conference on Industrial and Information Systems, ICIIS 2008, Kharagpur, India, December 8-10, 2008, pp. 1-6, 2008, IEEE. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
24 | Xiaolue Lai |
Frequency-aware PPV: a robust phase macromodel for accurate oscillator noise analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2008 International Conference on Computer-Aided Design, ICCAD 2008, San Jose, CA, USA, November 10-13, 2008, pp. 803-806, 2008, IEEE Computer Society, 978-1-4244-2820-5. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
24 | Dimitrios Bountas, Georgios I. Stamoulis, Nestoras E. Evmorfopoulos |
A macromodel technique for VLSI dynamic simulation by mapping pre-characterized transitions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 26th International Conference on Computer Design, ICCD 2008, 12-15 October 2008, Lake Tahoe, CA, USA, Proceedings, pp. 450-456, 2008, IEEE Computer Society, 978-1-4244-2657-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
24 | Jin-Gu Lee, Dae Hwan Kim, Jaegab Lee, Dong Myong Kim, Kyeong-Sik Min |
A compact HSPICE macromodel of resistive RAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 4(19), pp. 600-605, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
24 | Chandramouli V. Kashyap, Chirayu S. Amin, Noel Menezes, Eli Chiprout |
A nonlinear cell macromodel for digital applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2007 International Conference on Computer-Aided Design, ICCAD 2007, San Jose, CA, USA, November 5-8, 2007, pp. 678-685, 2007, IEEE Computer Society, 1-4244-1382-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
24 | Wei Dong 0002, Zhuo Feng, Peng Li 0001 |
Efficient VCO phase macromodel generation considering statistical parametric variations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2007 International Conference on Computer-Aided Design, ICCAD 2007, San Jose, CA, USA, November 5-8, 2007, pp. 874-878, 2007, IEEE Computer Society, 1-4244-1382-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
24 | Dmitry Vasilyev, Michal Rewienski, Jacob K. White 0001 |
Macromodel Generation for BioMEMS Components Using a Stabilized Balanced Truncation Plus Trajectory Piecewise-Linear Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(2), pp. 285-293, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
24 | Janusz Zarebski, Krzysztof Górecki |
The electrothermal macromodel of voltage mode PWM controllers for SPICE. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 37(8), pp. 728-734, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
24 | Gholamreza Karimi, Sattar Mirzakuchaki |
Simulation of substrate coupling in mixed-signal IC's using an efficient and real-time macromodel. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 3(23), pp. 509-516, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
24 | Shweta Srivastava, Xiaolue Lai, Jaijeet S. Roychowdhury |
Nonlinear Phase Macromodel Based Simulation/Design of PLLs with Superharmonically Locked Dividers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CICC ![In: Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, CICC 2006, DoubleTree Hotel, San Jose, California, USA, September 10-13, 2006, pp. 349-352, 2006, IEEE, 1-4244-0075-9. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
24 | B. Haddadin, Min Ma, T. S. Roseanu, Roni Khazaka |
Efficient Macromodel for Interconnects Excited by Incident Fields. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCECE ![In: Proceedings of the Canadian Conference on Electrical and Computer Engineering, CCECE 2006, May 7-10, 2006, Ottawa Congress Centre, Ottawa, Canada, pp. 90-93, 2006, IEEE, 1-4244-0038-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
24 | Dmitry Gorodetsky, Philip Wilsey |
Rapid Evaluation of Macromodel Response with the FDTD Method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSC ![In: Proceedings of the 2006 International Conference on Scientific Computing, CSC 2006, Las Vegas, Nevada, USA, June 26-29, 2006, pp. 267-271, 2006, CSREA Press, 1-60132-007-8. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP BibTeX RDF |
|
24 | Luis Elvira, Ferran Martorell, Xavier Aragonès, José Luis González 0001 |
A physical-based noise macromodel for fast simulation of switching noise generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. J. ![In: Microelectron. J. 35(8), pp. 677-684, 2004. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|