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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 193 occurrences of 163 keywords
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Results
Found 263 publication records. Showing 263 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
51 | Allon Adir, Hezi Azatchi, Eyal Bin, Ofer Peled, Kirill Shoikhet |
A generic micro-architectural test plan approach for microprocessor verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005, pp. 769-774, 2005, ACM, 1-59593-058-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
generic test plan, test generation, coverage, micro-architecture, dynamic verification |
41 | Shai Erez, Guy Even |
An improved micro-architecture for function approximation using piecewise quadratic interpolation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 26th International Conference on Computer Design, ICCD 2008, 12-15 October 2008, Lake Tahoe, CA, USA, Proceedings, pp. 422-426, 2008, IEEE Computer Society, 978-1-4244-2657-7. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
|
39 | Ashok Jagannathan, Hannah Honghua Yang, Kris Konigsfeld, Dan Milliron, Mosur Mohan, Michail Romesis, Glenn Reinman, Jason Cong |
Microarchitecture evaluation with floorplanning and interconnect pipelining. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005, pp. 8-15, 2005, ACM Press, 0-7803-8737-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
38 | Pramod Ramarao, Akhilesh Tyagi |
An Adiabatic Framework for a Low Energy µ-Architecture & Compiler. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Interaction between Compilers and Computer Architectures ![In: 7th Annual Workshop on Interaction between Compilers and Computer Architecture (INTERACT-7 2003), 8 February 2003, Anaheim, CA, USA, pp. 65-74, 2003, IEEE Computer Society, 0-7695-1889-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
36 | Heon-Mo Koo, Prabhat Mishra 0001, Jayanta Bhadra, Magdy S. Abadir |
Directed Micro-architectural Test Generation for an Industrial Processor: A Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, USA, pp. 33-36, 2006, IEEE Computer Society, 978-0-7695-2839-7. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Dmitry G. Korzun, Andrei V. Gurtov |
A local equilibrium model for P2P resource ranking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS Perform. Evaluation Rev. ![In: SIGMETRICS Perform. Evaluation Rev. 37(2), pp. 27-29, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
34 | Bill Lin 0001, Jun (Jim) Xu, Nan Hua, Hao Wang 0006, Haiquan (Chuck) Zhao |
A randomized interleaved DRAM architecture for the maintenance of exact statistics counters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS Perform. Evaluation Rev. ![In: SIGMETRICS Perform. Evaluation Rev. 37(2), pp. 53-54, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
34 | Sipat Triukose, Zhihua Wen, Michael Rabinovich |
Content delivery networks: how big is big enough? ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS Perform. Evaluation Rev. ![In: SIGMETRICS Perform. Evaluation Rev. 37(2), pp. 59-60, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
34 | Alma Riska, Erik Riedel |
Evaluation of disk-level workloads at different time scales. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS Perform. Evaluation Rev. ![In: SIGMETRICS Perform. Evaluation Rev. 37(2), pp. 67-68, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
34 | Mathew S. Thoennes, Charles C. Weems |
Exploration of the Performance of a Data Mining Application via Hardware Based Monitoring. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Supercomput. ![In: J. Supercomput. 26(1), pp. 25-42, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
simulation, data mining, performance, monitoring, application, tuning, micro-architecture |
32 | Faye A. Briggs, Suresh Chittor, Kai Cheng |
Micro-architecture techniques in the intel E8870 scalable memory controller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WMPI ![In: Proceedings of the 3rd Workshop on Memory Performance Issues, in conjunction with the 31st International Symposium on Computer Architecture 2004, Munich, Germany, June 20, 2004, pp. 30-36, 2004, ACM, 1-59593-040-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
distributed coherency, transaction flows, scalability, memory latency |
31 | Eric Schnarr, Mark D. Hill, James R. Larus |
Facile: A Language and Compiler for High-Performance Processor Simulators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLDI ![In: Proceedings of the 2001 ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), Snowbird, Utah, USA, June 20-22, 2001, pp. 321-331, 2001, ACM, 1-58113-414-2. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
micro-architecture simulation, out-of-order processor simulation, partial evaluation, memoization |
30 | Wai Sum Mong, Jianwen Zhu |
A retargetable micro-architecture simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 752-757, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
30 | Chris R. Jesshope, Bing Luo |
Micro-Threading: A New Approach to Future RISC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACAC ![In: 5th Australasian Computer Architecture Conference (ACAC 2000), 31 January - 3 February 2000, Canberra, Australia, pp. 34-41, 2000, IEEE Computer Society, 0-7695-0512-0. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
29 | Lucanus J. Simonson, Lei He 0001 |
Micro-architecture Performance Estimation by Formula. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Embedded Computer Systems: Architectures, Modeling, and Simulation 5th International Workshop, SAMOS 2005, Samos, Greece, July 18-20, 2005, Proceedings, pp. 192-201, 2005, Springer, 3-540-26969-X. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Lev Kirischian, Irina Terterian, Pil Woo Chun, Vadim Geurkov |
Re-Configurable Parallel Stream Processor with Self-Assembling and Self-Restorable Micro-Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PARELEC ![In: 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 7-10 September 2004, Dresden, Germany, pp. 165-170, 2004, IEEE Computer Society, 0-7695-2080-4. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Wonbok Lee, Kimish Patel, Massoud Pedram |
B2Sim: : a fast micro-architecture simulator based on basic block characterization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CODES+ISSS ![In: Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2006, Seoul, Korea, October 22-25, 2006, pp. 199-204, 2006, ACM, 1-59593-370-0. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
basic block, micro-architecture simulation, program behavior |
26 | Hala A. Farouk, Magdy Saeb |
An Improved FPGA Implementation of the Modified Hybrid Hiding Encryption Algorithm (MHHEA) for Data Communication Security. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2005 Design, Automation and Test in Europe Conference and Exposition (DATE 2005), 7-11 March 2005, Munich, Germany, pp. 76-81, 2005, IEEE Computer Society, 0-7695-2288-2. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
25 | David A. Dunn, Wei-Chung Hsu |
Instruction Scheduling for the HP PA-8000. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 29, Paris, France, December 2-4, 1996, pp. 298-307, 1996, ACM/IEEE Computer Society, 0-8186-7641-8. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
HP PA-8000, instruction polarity cache interfaces, memory dependences, production compiler, scheduling, latency, compiler optimization, instruction scheduling, resource constraints, micro-architecture |
24 | Antti Evesti, Susanna Pantsar-Syväniemi |
Towards micro architecture for security adaptation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ECSA Companion Volume ![In: Software Architecture, 4th European Conference, ECSA 2010, Copenhagen, Denmark, August 23-26, 2010. Companion Volume, pp. 181-188, 2010, ACM, 978-1-4503-0179-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
quality, smart space, run-time |
24 | Eyal Bin, Laurent Fournier |
Micro-Architecture Verification for Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MTV ![In: Fifth International Workshop on Microprocessor Test and Verification (MTV 2004), Common Challenges and Solutions, 08-10 September 2004, Austin, Texas, USA, pp. 112-113, 2004, IEEE Computer Society, 0-7695-2320-X. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
24 | Khushwinder Jasrotia, Jianwen Zhu |
Stacked FSMD: A Power Efficient Micro-Architecture for High Level Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 5th International Symposium on Quality of Electronic Design (ISQED 2004), 22-24 March 2004, San Jose, CA, USA, pp. 425-430, 2004, IEEE Computer Society, 0-7695-2093-6. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
24 | J. H. Jacobs, Augustus K. Uht, R. C. Ord |
Modeling the effects of instruction queue loading on a static instruction stream micro-architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 21st Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1988, San Diego, California, USA, November 28 - December 2, 1988, pp. 11-20, 1988, ACM/IEEE, 0-8186-1919-8. The full citation details ...](Pics/full.jpeg) |
1988 |
DBLP BibTeX RDF |
|
23 | Shu-Lin Hwang, Feipei Lai |
Two Cache Lines Prediction for a Wide-Issue Micro-architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACSAC ![In: 6th Australasian Computer Systems Architecture Conference (ACSAC 2001), 29-30 January 2001, Gold Coast, Queensland, Australia, pp. 71-79, 2001, IEEE Computer Society, 0-7695-0954-1. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
22 | Steven Balensiefer, Lucas Kreger-Stickles, Mark Oskin |
An Evaluation Framework and Instruction Set Architecture for Ion-Trap Based Quantum Micro-Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCA ![In: 32st International Symposium on Computer Architecture (ISCA 2005), 4-8 June 2005, Madison, Wisconsin, USA, pp. 186-196, 2005, IEEE Computer Society, 978-0-7695-2270-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
22 | James Burns, Jean-Luc Gaudiot |
Quantifying the SMT Layout Overhead-Does SMT Pull Its Weight? ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Sixth International Symposium on High-Performance Computer Architecture, Toulouse, France, January 8-12, 2000, pp. 109-120, 2000, IEEE Computer Society, 0-7695-0550-3. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
Simultaneous Multi-Threading (SMT) |
22 | Alina Toma |
Joint super-resolution/segmentation approaches for the tomographic images analysis of the bone micro-architecture. (Approches conjointes de super-résolution / segmentation pour l'analyse des images tomographiques de la micro-architecture osseuse). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2016 |
RDF |
|
21 | Liwen Shih |
Microprogramming heritage of RISC design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 23rd Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1990, Orlando, Florida, USA, November 27-29, 1990, pp. 275-280, 1990, ACM/IEEE, 0-89791-413-9. The full citation details ...](Pics/full.jpeg) |
1990 |
DBLP BibTeX RDF |
|
19 | Samarjit Chakraborty, Tulika Mitra, Abhik Roychoudhury, Lothar Thiele |
Cache-aware timing analysis of streaming applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Real Time Syst. ![In: Real Time Syst. 41(1), pp. 52-85, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Timing analysis, Instruction cache, Streaming applications |
19 | Douglas Samuel Kirk, Marc Roper, Murray Wood |
Identifying and addressing problems in object-oriented framework reuse. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Empir. Softw. Eng. ![In: Empir. Softw. Eng. 12(3), pp. 243-274, 2007. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
Framework reuse, Empirical study, Documentation, Object-oriented frameworks, Qualitative study, Software comprehension |
19 | Kostas Bousias, Chris R. Jesshope |
The Challenges of Massive On-Chip Concurrency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asia-Pacific Computer Systems Architecture Conference ![In: Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, ACSAC 2005, Singapore, October 24-26, 2005, Proceedings, pp. 157-170, 2005, Springer, 3-540-29643-3. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Friman Sánchez, Esther Salamí, Alex Ramírez, Mateo Valero |
Performance Analysis of Sequence Alignment Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IISWC ![In: Proceedings of the 2006 IEEE International Symposium on Workload Characterization, IISWC 2006, October 25-27, 2006, San Jose, California, USA, pp. 51-60, 2006, IEEE Computer Society, 1-4244-0508-4. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Carl J. Mauer, Mark D. Hill, David A. Wood 0001 |
Full-system timing-first simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the International Conference on Measurements and Modeling of Computer Systems, SIGMETRICS 2002, June 15-19, 2002, Marina Del Rey, California, USA, pp. 108-116, 2002, ACM, 1-58113-531-9. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
18 | Victor V. Zyuban, Peter M. Kogge |
Optimization of high-performance superscalar architectures for energy efficiency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000, Rapallo, Italy, July 25-27, 2000, pp. 84-89, 2000, ACM, 1-58113-190-9. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
18 | Susanna Pantsar-Syväniemi, Eila Ovaska, Susanna Ferrari, Tullio Salmon Cinotti, Guido Zamagni, Luca Roffia, Sandra Mattarozzi, Valerio Nannini |
Case Study: Context-Aware Supervision of a Smart Maintenance Process. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAINT ![In: 11th Annual International Symposium on Applications and the Internet, SAINT 2011, Munich, Germany, 18-21 July, 2011, Proceedings, pp. 309-314, 2011, IEEE Computer Society, 978-1-4577-0531-1. The full citation details ...](Pics/full.jpeg) |
2011 |
DBLP DOI BibTeX RDF |
adaptation, context-awareness, smart environment, run-time, micro-architecture |
18 | Rohit Sunkam Ramanujam, Vassos Soteriou, Bill Lin 0001, Li-Shiuan Peh |
Design of a High-Throughput Distributed Shared-Buffer NoC Router. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NOCS ![In: NOCS 2010, Fourth ACM/IEEE International Symposium on Networks-on-Chip, Grenoble, France, May 3-6, 2010, pp. 69-78, 2010, IEEE Computer Society, 978-0-7695-4053-5. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
Router micro-architecture, On-chip interconnection networks |
18 | Siddhesh S. Mhambrey, Lawrence T. Clark, Satendra Kumar Maurya, Krzysztof S. Berezowski |
Out-of-order issue logic using sorting networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010, pp. 385-388, 2010, ACM, 978-1-4503-0012-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
out-of-order processing, ILP, micro-architecture, issue queue, high speed circuits |
18 | Thomas Baumann, Doris Schmitt-Landsiedel, Christian Pacha |
Architectural assessment of design techniques to improve speed and robustness in embedded microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009, pp. 947-950, 2009, ACM, 978-1-60558-497-3. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
variability-aware design, robustness, micro-architecture |
18 | Tay-Jyi Lin, Shin-Kai Chen, Yu-Ting Kuo, Chih-Wei Liu, Pi-Chen Hsiao |
Design and Implementation of a High-Performance and Complexity-Effective VLIW DSP for Multimedia Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 51(3), pp. 209-223, 2008. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
register organization, VLIW, digital signal processor, micro-architecture, instruction encoding |
17 | Yuchun Ma, Zhuoyuan Li, Jason Cong, Xianlong Hong, Glenn Reinman, Sheqin Dong, Qiang Zhou 0001 |
Micro-architecture Pipelining Optimization with Throughput-Aware Floorplanning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007, pp. 920-925, 2007, IEEE Computer Society, 1-4244-0629-3. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
graph-based approach, microarchitecture pipelining optimization, throughput-aware floorplanning, block pipelining, interconnect pipelining, graph-based algorithm, mixed integer linear programming, wire pipelining |
17 | Zhenyu Qi, Matthew M. Ziegler, Stephen V. Kosonocky, Jan M. Rabaey, Mircea R. Stan |
Multi-Dimensional Circuit and Micro-Architecture Level Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 8th International Symposium on Quality of Electronic Design (ISQED 2007), 26-28 March 2007, San Jose, CA, USA, pp. 275-280, 2007, IEEE Computer Society, 978-0-7695-2795-6. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
17 | |
Intel® XScale® Micro-Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Encyclopedia of Multimedia ![In: Encyclopedia of Multimedia, 2006, Springer, 978-0-387-24395-5. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
17 | Hala A. Farouk, Magdy Saeb |
Design and implementation of a secret key steganographic micro-architecture employing FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 2004, pp. 577-578, 2004, IEEE Computer Society, 0-7803-8175-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
17 | Kolin Paul, Parimal Pal Chaudhuri, Dipanwita Roy Chowdhury |
Scalable Pipelined Micro-Architecture for Wavelet Transform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 13th International Conference on VLSI Design (VLSI Design 2000), 4-7 January 2000, Calcutta, India, pp. 144-, 2000, IEEE Computer Society, 0-7695-0487-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
17 | Umesh Krishnaswamy, Isaac D. Scherson |
Micro-Architecture Evaluation Using Performance Vectors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGMETRICS ![In: Proceedings of the 1996 ACM SIGMETRICS international conference on Measurement and modeling of computer systems, Philadelphia, Pennsylvania, USA, May 23-26, 1996, pp. 148-159, 1996, ACM, 0-89791-793-6. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
17 | Forrest Brewer, Daniel Gajski |
Knowledge Based Control in Micro-Architecture Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 24th ACM/IEEE Design Automation Conference. Miami Beach, FL, USA, June 28 - July 1, 1987., pp. 203-209, 1987, IEEE Computer Society Press / ACM. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
|
17 | Vangalur S. Alagar, Ralf Lämmel |
Three-Tiered Specification of Micro-architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICFEM ![In: Formal Methods and Software Engineering, 4th International Conference on Formal Engineering Methods, ICFEM 2002 Shanghai, China, October 21-25, 2002, Proceedings, pp. 92-97, 2002, Springer, 3-540-00029-1. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
UML, interaction, formal methods, frameworks, design patterns, reuse, evolution, object-oriented design, micro-architectures |
17 | |
A D&T Roundtable: Power Delivery and Distribution. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 17(4), pp. 98-102, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
15 | Maria Mushtaq |
Software-based Detection and Mitigation of Microarchitectural Attacks on Intel's x86 Architecture. (Mise en oeuvre de mécanismes logiciels pour la détection et la prévention des attaques exploitant la micro-architecture des processeurs Intel x86). ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2019 |
RDF |
|
15 | Leszek Siwik, Kamil Wlodarczyk, Mateusz Kluczny |
Staged event-driven architecture as a micro-architecture of distributed and pluginable crawling platform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Sci. ![In: Comput. Sci. 14(4), pp. 645-666, 2013. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
14 | Yong-Kyu Jung |
Fault-recovery Non-FPGA-based Adaptable Computing System Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AHS ![In: Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), August 5-8, 2007, University of Edinburgh, Scotland, United Kingdom, pp. 709-716, 2007, IEEE Computer Society, 0-7695-2866-X. The full citation details ...](Pics/full.jpeg) |
2007 |
DBLP DOI BibTeX RDF |
|
13 | Donglai Dai, Aniruddha S. Vaidya, Roy Saharoy, Seungjoon Park, Dongkook Park, Hariharan L. Thantry, Ralf Plate, Elmar Maas, Akhilesh Kumar, Mani Azimi |
FPGA-based prototyping of a 2D MESH / TORUS on-chip interconnect (abstract only). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, FPGA 2010, Monterey, California, USA, February 21-23, 2010, pp. 293, 2010, ACM, 978-1-60558-911-4. The full citation details ...](Pics/full.jpeg) |
2010 |
DBLP DOI BibTeX RDF |
fpga, routing algorithm, on-chip interconnect, router architecture |
13 | Mohammad Hossein Neishaburi, Zeljko Zilic |
Reliability aware NoC router architecture using input channel buffer sharing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, Boston Area, MA, USA, May 10-12 2009, pp. 511-516, 2009, ACM, 978-1-60558-522-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
system on chip, network on chip, virtual channel |
13 | Ram Srinivasan, Jeanine E. Cook, Olaf M. Lubeck |
Performance modeling using Monte Carlo simulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Comput. Archit. Lett. ![In: IEEE Comput. Archit. Lett. 5(1), pp. 38-41, 2006. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
13 | Avi Mendelson |
Memory management challenges in the power-aware computing era. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISMM ![In: Proceedings of the 5th International Symposium on Memory Management, ISMM 2006, Ottawa, Ontario, Canada, June 10-11, 2006, pp. 1-2, 2006, ACM, 1-59593-221-6. The full citation details ...](Pics/full.jpeg) |
2006 |
DBLP DOI BibTeX RDF |
|
13 | Steve Carr 0001, Soner Önder |
A case for a working-set-based memory hierarchy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the Second Conference on Computing Frontiers, 2005, Ischia, Italy, May 4-6, 2005, pp. 252-261, 2005, ACM, 1-59593-019-1. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
cache design, loop tiling |
13 | Michael A. Howland, Robert A. Mueller, Philip H. Sweany |
Trace scheduling optimization in a retargetable microcode compiler. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 20st Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1987, Colorado Springs, Colorado, USA, December 1-4, 1987, pp. 106-114, 1987, ACM/IEEE, 0-89791-250-0. The full citation details ...](Pics/full.jpeg) |
1987 |
DBLP DOI BibTeX RDF |
|
12 | Håkon Ording Bugge |
An evaluation of Intel's core i7 architecture using a comparative approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Comput. Sci. Res. Dev. ![In: Comput. Sci. Res. Dev. 23(3-4), pp. 203-209, 2009. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
SPEC MPI2007, Nehalem, iCore7, Harpertown, Quad-Core, QuickPath Interconnect, Moore’s Law, Benchmarking, Stream, Micro-benchmarks |
12 | Anmol Mathur, Qi Wang |
Power Reduction Techniques and Flows at RTL and System Level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: VLSI Design 2009: Improving Productivity through Higher Abstraction, The 22nd International Conference on VLSI Design, New Delhi, India, 5-9 January 2009, pp. 28-29, 2009, IEEE Computer Society, 978-0-7695-3506-7. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
|
12 | Nathan Chong, Samin Ishtiaq |
Reasoning about the ARM weakly consistent memory model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MSPC ![In: Proceedings of the 2008 ACM SIGPLAN workshop on Memory Systems Performance and Correctness: held in conjunction with the Thirteenth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS '08), Seattle, Washington, USA, March 2, 2008, pp. 16-19, 2008, ACM, 978-1-60558-049-4. The full citation details ...](Pics/full.jpeg) |
2008 |
DBLP DOI BibTeX RDF |
weakly consistent memory model, ARM |
12 | Ludovic L'Hours |
Generating Efficient Custom FPGA Soft-Cores for Control-Dominated Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 16th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2005), 23-25 July 2005, Samos, Greece, pp. 127-133, 2005, IEEE Computer Society, 0-7695-2407-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Yong-Joon Park, Gyungho Lee |
Repairing return address stack for buffer overflow protection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Conf. Computing Frontiers ![In: Proceedings of the First Conference on Computing Frontiers, 2004, Ischia, Italy, April 14-16, 2004, pp. 335-342, 2004, ACM, 1-58113-741-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
computer architecture, computer security, buffer overflow, intrusion tolerance |
12 | Alex C.-Y. Chang, Wu-An Kuo, Allen C.-H. Wu, TingTing Hwang |
G-MAC: An Application-Specific MAC/Co-Processor Synthesizer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2003 Design, Automation and Test in Europe Conference and Exposition (DATE 2003), 3-7 March 2003, Munich, Germany, pp. 11134-11135, 2003, IEEE Computer Society, 0-7695-1870-2. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Stamatis Vassiliadis, Nikitas J. Dimopoulos, Jean-Francois Collard, Arndt Bode |
Topic Introduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Euro-Par ![In: Euro-Par 2003. Parallel Processing, 9th International Euro-Par Conference, Klagenfurt, Austria, August 26-29, 2003. Proceedings, pp. 541-542, 2003, Springer, 3-540-40788-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Hans M. Mulder, P. Stravers |
A flexible VLSI core for an adaptable architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 22nd Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1989, Dublin, Ireland, August 14-16, 1989, pp. 223-231, 1989, ACM/IEEE, 0-89791-324-8. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
|
11 | Maryam Esmaeilian, Hakem Beitollahi |
Experimental evaluation of RISC-V micro-architecture against fault injection attack. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microprocess. Microsystems ![In: Microprocess. Microsystems 104, pp. 104991, 2024. The full citation details ...](Pics/full.jpeg) |
2024 |
DBLP DOI BibTeX RDF |
|
11 | Folkert de Ronde, Matti Dreef, Stephan Wong, David Elkouss |
Micro-architecture and Control Electronics Simulation of Modular Color Center-Based Quantum Computers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Embedded Computer Systems: Architectures, Modeling, and Simulation - 23rd International Conference, SAMOS 2023, Samos, Greece, July 2-6, 2023, Proceedings, pp. 141-157, 2023, Springer, 978-3-031-46076-0. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
11 | Xiaoxiao Ma, Fan Yang, Zhan Wang, Ning Kang 0007, Xunjun An |
Understanding the Scalability Problem of RNIC Cache at the Micro-architecture Level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICC ![In: IEEE International Conference on Communications, ICC 2023, Rome, Italy, May 28 - June 1, 2023, pp. 6059-6065, 2023, IEEE, 978-1-5386-7462-8. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
11 | Giuseppe Maria Sarda, Nimish Shah, Debjyoti Bhattacharjee, Peter Debacker, Marian Verhelst |
Optimising GPGPU Execution Through Runtime Micro-Architecture Parameter Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IISWC ![In: IEEE International Symposium on Workload Characterization, IISWC 2023, Ghent, Belgium, October 1-3, 2023, pp. 226-228, 2023, IEEE, 979-8-3503-0317-9. The full citation details ...](Pics/full.jpeg) |
2023 |
DBLP DOI BibTeX RDF |
|
11 | Satyajit Bora, Roy Paily |
A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low Power Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 68(6), pp. 2132-2136, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
11 | Pruthvy Yellu, Landon Buell, Miguel Mark, Michel A. Kinsy, Dongpeng Xu 0001, Qiaoyan Yu |
Security Threat Analyses and Attack Models for Approximate Computing Systems: From Hardware and Micro-architecture Perspectives. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 26(4), pp. 32:1-32:31, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
11 | Sumesh Kumar, Fahad Saeed |
Communication-avoiding micro-architecture to compute Xcorr scores for peptide identification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2108.00147, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP BibTeX RDF |
|
11 | Qilin Si, M. Imtiaz Rashid, Benjamin Carrión Schäfer |
Micro-architecture Tuning for Dynamic Frequency Scaling in Coarse-Grain Runtime Reconfigurable Arrays with Adaptive Clock Domain Support. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2021, Tampa, FL, USA, July 7-9, 2021, pp. 212-217, 2021, IEEE, 978-1-6654-3946-6. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
11 | Sumesh Kumar, Fahad Saeed |
Communication-avoiding micro-architecture to compute Xcorr scores for peptide identification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 31st International Conference on Field-Programmable Logic and Applications, FPL 2021, Dresden, Germany, August 30 - Sept. 3, 2021, pp. 99-103, 2021, IEEE, 978-1-6654-3759-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
11 | Zahra Kazemi, Amin Norollah, Afef Kchaou, Mahdi Fazeli, David Hély, Vincent Beroulle |
An In-Depth Vulnerability Analysis of RISC-V Micro-Architecture Against Fault Injection Attack. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2021, Athens, Greece, October 6-8, 2021, pp. 1-6, 2021, IEEE, 978-1-6654-1609-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
11 | Poulami Das 0005, Christopher A. Pattison, Srilatha Manne, Douglas M. Carmean, Krysta M. Svore, Moinuddin K. Qureshi, Nicolas Delfosse |
A Scalable Decoder Micro-architecture for Fault-Tolerant Quantum Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2001.06598, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
|
11 | Lauren De Meyer, Elke De Mulder, Michael Tunstall |
On the Effect of the (Micro)Architecture on the Development of Side-Channel Resistant Software. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IACR Cryptol. ePrint Arch. ![In: IACR Cryptol. ePrint Arch. 2020, pp. 1297, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
|
11 | Juan Escobedo, Mingjie Lin |
DOMIS: Dual-Bank Optimal Micro-Architecture for Iterative Stencils. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Seaside, CA, USA, February 23-25, 2020, pp. 315, 2020, ACM, 978-1-4503-7099-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
11 | Liang Zhu, Chao Chen 0022, Zihao Su, Weiguang Chen, Tao Li 0006, Zhibin Yu 0001 |
BBS: Micro-Architecture Benchmarking Blockchain Systems through Machine Learning and Fuzzy Set. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: IEEE International Symposium on High Performance Computer Architecture, HPCA 2020, San Diego, CA, USA, February 22-26, 2020, pp. 411-423, 2020, IEEE, 978-1-7281-6149-5. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
11 | Linda Wang, Alexander Wong |
Enabling Computer Vision Driven Assistive Devices for the Visually Impaired via Micro-architecture Design Exploration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1905.07836, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
|
11 | Jilin W. J. L. Wang, Fabrizio Lombardi, Xiyun Zhang, Christelle Anaclet, Plamen Ch. Ivanov |
Non-equilibrium critical dynamics of bursts in θ and δ rhythms as fundamental characteristic of sleep and wake micro-architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PLoS Comput. Biol. ![In: PLoS Comput. Biol. 15(11), 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Andrés Rainiero Hernández Coronado, Wonjun Lee 0003 |
Are We Referring to the Same x86 64?: Detection of Cache Events in AMD's Zen Micro-architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICDCS ![In: 39th IEEE International Conference on Distributed Computing Systems, ICDCS 2019, Dallas, TX, USA, July 7-10, 2019, pp. 2217-2227, 2019, IEEE, 978-1-7281-2519-0. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Khoi Minh Huynh, Tiantian Xu, Ye Wu 0001, Geng Chen 0001, Kim-Han Thung, Haiyong Wu, Weili Lin, Dinggang Shen, Pew-Thian Yap |
Probing Brain Micro-architecture by Orientation Distribution Invariant Identification of Diffusion Compartments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICCAI (3) ![In: Medical Image Computing and Computer Assisted Intervention - MICCAI 2019 - 22nd International Conference, Shenzhen, China, October 13-17, 2019, Proceedings, Part III, pp. 547-555, 2019, Springer, 978-3-030-32247-2. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Sraman Choudhury, Srikar Chundury, Subramaniam Kalambur, Dinkar Sitaram |
Poster Paper Impact Of Software Stack Version On Micro-architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICPE Companion ![In: Companion of the 2019 ACM/SPEC International Conference on Performance Engineering, ICPE 2019, Mumbai, India, April 07-11, 2019, pp. 41-42, 2019, ACM, 978-1-4503-6286-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Fang Li, Jinrong Han, Ziyuan Zhu, Dan Meng |
Spatial-Temporal Attention Network for Malware Detection Using Micro-architecture Features. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IJCNN ![In: International Joint Conference on Neural Networks, IJCNN 2019 Budapest, Hungary, July 14-19, 2019, pp. 1-8, 2019, IEEE, 978-1-7281-1985-4. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Yu-Zhe Wang, Jingjie Wu, Shi-Hao Chen, Mango Chia-Tso Chao, Chia-Hsiang Yang |
Micro-Architecture Optimization for Low-Power Bitcoin Mining ASICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI-DAT ![In: International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019, Hsinchu, Taiwan, April 22-25, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-0655-7. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
11 | Hoda Ahmadinejad, Omid Fatemi |
Moving towards grey-box predictive models at micro-architecture level by investigating inherent program characteristics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Comput. Digit. Tech. ![In: IET Comput. Digit. Tech. 12(2), pp. 53-61, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
11 | Hadi Mardani Kamali, Kimia Zamiri Azar, Shaahin Hessabi |
DuCNoC: A High-Throughput FPGA-Based NoC Simulator Using Dual-Clock Lightweight Router Micro-Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 67(2), pp. 208-221, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
11 | Shun Wang, Xiaojuan Li, Yong Guan, Rui Wang 0024, Jie Zhang 0074 |
Executable Micro-Architecture Modeling and Automatic Verification of EtherCAT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SmartWorld/SCALCOM/UIC/ATC/CBDCom/IOP/SCI ![In: 2018 IEEE SmartWorld, Ubiquitous Intelligence & Computing, Advanced & Trusted Computing, Scalable Computing & Communications, Cloud & Big Data Computing, Internet of People and Smart City Innovation, SmartWorld/SCALCOM/UIC/ATC/CBDCom/IOP/SCI 2018, Guangzhou, China, October 8-12, 2018, pp. 308-315, 2018, IEEE, 978-1-5386-9380-3. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
11 | Chikun Yuan, Letian Huang, Junshi Wang, Qiang Li 0021 |
Micro-Architecture Design for Low Overhead Fault Tolerant Network-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2018, 27-30 May 2018, Florence, Italy, pp. 1-5, 2018, IEEE, 978-1-5386-4881-0. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
11 | P. Harsha |
A Novel Micro-Architecture Using a Simplified Logistic Map for Embedded Security. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Embed. Syst. Lett. ![In: IEEE Embed. Syst. Lett. 9(2), pp. 41-44, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
11 | Sander De Pestel, Stijn Eyerman, Lieven Eeckhout |
Linear Branch Entropy: Characterizing and Optimizing Branch Behavior in a Micro-Architecture Independent Way. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 66(3), pp. 458-472, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
11 | Zhiguo Liu, Ni Zhang, Qiu Tang, Ningning Song, Zengming Yu, Hongbin Zhang |
Saving Energy on Processor Micro-Architecture Level for Big Data Stream Mobile Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSC ![In: Second IEEE International Conference on Data Science in Cyberspace, DSC 2017, Shenzhen, China, June 26-29, 2017, pp. 7-13, 2017, IEEE Computer Society, 978-1-5386-1600-0. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
11 | Don Kurian Dennis, Ayushi Priyam, Sukhpreet Singh Virk, Sajal Agrawal, Tanuj Sharma, Arijit Mondal, Kailash Chandra Ray |
Single cycle RISC-V micro architecture processor and its FPGA prototype. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISED ![In: 7th International Symposium on Embedded Computing and System Design, ISED 2017, Durgapur, India, December 18-20, 2017, pp. 1-5, 2017, IEEE, 978-1-5386-3032-7. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
11 | Siyuan Xu, Benjamin Carrión Schäfer |
Approximate Reconfigurable Hardware Accelerator: Adapting the Micro-Architecture to Dynamic Workloads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 2017 IEEE International Conference on Computer Design, ICCD 2017, Boston, MA, USA, November 5-8, 2017, pp. 113-120, 2017, IEEE Computer Society, 978-1-5386-2254-4. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
11 | Yun Long Lan, V. Muthukumar |
Efficient virtual channel allocator for NoC router micro-architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoCC ![In: 30th IEEE International System-on-Chip Conference, SOCC 2017, Munich, Germany, September 5-8, 2017, pp. 169-174, 2017, IEEE, 978-1-5386-4034-0. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
11 | Sam Van den Steen, Stijn Eyerman, Sander De Pestel, Moncef Mechri, Trevor E. Carlson, David Black-Schaffer, Erik Hagersten, Lieven Eeckhout |
Analytical Processor Performance and Power Modeling Using Micro-Architecture Independent Characteristics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 65(12), pp. 3537-3551, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
11 | Haecheon Kim, Seungmin Lim, Junkee Yoon, Seungjae Baek, Jongmoo Choi, Seong-je Cho |
Analysis of micro-architecture resources interference on multicore NUMA systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAC ![In: Proceedings of the 31st Annual ACM Symposium on Applied Computing, Pisa, Italy, April 4-8, 2016, pp. 1871-1876, 2016, ACM, 978-1-4503-3739-7. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
11 | Meenakshi Sundaram Bhaskaran |
Micro-Architecture and Systems Support for Emerging Non-Volatile Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2016 |
RDF |
|
11 | Zakaria Lakhdara, Salah Merniz |
A SysML and CLEAN Based Methodology for RISC Processor Micro-Architecture Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Embed. Real Time Commun. Syst. ![In: Int. J. Embed. Real Time Commun. Syst. 6(1), pp. 101-131, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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